/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de51.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-e106359-m [2022-04-14 19:41:28,119 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-14 19:41:28,122 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-14 19:41:28,165 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-14 19:41:28,173 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-14 19:41:28,173 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-14 19:41:28,174 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-14 19:41:28,175 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-14 19:41:28,176 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-14 19:41:28,176 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-14 19:41:28,178 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-14 19:41:28,179 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-14 19:41:28,180 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-14 19:41:28,183 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-14 19:41:28,184 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-14 19:41:28,184 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-14 19:41:28,185 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-14 19:41:28,187 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-14 19:41:28,193 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-14 19:41:28,194 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-14 19:41:28,201 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-14 19:41:28,202 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-14 19:41:28,217 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-14 19:41:28,218 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-14 19:41:28,219 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-14 19:41:28,219 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-14 19:41:28,220 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-14 19:41:28,220 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-14 19:41:28,220 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-14 19:41:28,220 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-14 19:41:28,220 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-14 19:41:28,221 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-14 19:41:28,221 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-14 19:41:28,221 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-14 19:41:28,221 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-14 19:41:28,221 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-14 19:41:28,221 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-14 19:41:28,222 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-14 19:41:28,222 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-14 19:41:28,222 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-14 19:41:28,222 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-14 19:41:28,222 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-14 19:41:28,222 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-14 19:41:28,223 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-14 19:41:28,223 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-14 19:41:28,446 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-14 19:41:28,474 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-14 19:41:28,476 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-14 19:41:28,477 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-14 19:41:28,479 INFO L275 PluginConnector]: CDTParser initialized [2022-04-14 19:41:28,480 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de51.c [2022-04-14 19:41:28,552 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3c8aa87fd/0d9b80d56c0e415ea450fc7d29e926e2/FLAG42d2e44bb [2022-04-14 19:41:28,916 INFO L306 CDTParser]: Found 1 translation units. [2022-04-14 19:41:28,917 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de51.c [2022-04-14 19:41:28,921 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3c8aa87fd/0d9b80d56c0e415ea450fc7d29e926e2/FLAG42d2e44bb [2022-04-14 19:41:28,932 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3c8aa87fd/0d9b80d56c0e415ea450fc7d29e926e2 [2022-04-14 19:41:28,934 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-14 19:41:28,935 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-14 19:41:28,936 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-14 19:41:28,936 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-14 19:41:28,940 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-14 19:41:28,941 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.04 07:41:28" (1/1) ... [2022-04-14 19:41:28,942 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6b1e0312 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:28, skipping insertion in model container [2022-04-14 19:41:28,942 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.04 07:41:28" (1/1) ... [2022-04-14 19:41:28,948 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-14 19:41:28,958 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-14 19:41:29,075 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de51.c[368,381] [2022-04-14 19:41:29,111 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-14 19:41:29,119 INFO L203 MainTranslator]: Completed pre-run [2022-04-14 19:41:29,128 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de51.c[368,381] [2022-04-14 19:41:29,133 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-14 19:41:29,145 INFO L208 MainTranslator]: Completed translation [2022-04-14 19:41:29,145 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:29 WrapperNode [2022-04-14 19:41:29,145 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-14 19:41:29,146 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-14 19:41:29,146 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-14 19:41:29,146 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-14 19:41:29,154 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:29" (1/1) ... [2022-04-14 19:41:29,154 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:29" (1/1) ... [2022-04-14 19:41:29,159 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:29" (1/1) ... [2022-04-14 19:41:29,160 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:29" (1/1) ... [2022-04-14 19:41:29,165 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:29" (1/1) ... [2022-04-14 19:41:29,170 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:29" (1/1) ... [2022-04-14 19:41:29,171 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:29" (1/1) ... [2022-04-14 19:41:29,173 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-14 19:41:29,173 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-14 19:41:29,174 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-14 19:41:29,174 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-14 19:41:29,174 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:29" (1/1) ... [2022-04-14 19:41:29,180 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-14 19:41:29,191 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:41:29,205 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-14 19:41:29,211 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-14 19:41:29,234 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-14 19:41:29,234 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-14 19:41:29,234 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-14 19:41:29,234 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-14 19:41:29,234 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-14 19:41:29,235 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-14 19:41:29,235 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-14 19:41:29,235 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-14 19:41:29,235 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-14 19:41:29,235 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-14 19:41:29,235 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-14 19:41:29,235 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-14 19:41:29,235 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-14 19:41:29,236 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-14 19:41:29,236 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-14 19:41:29,236 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-14 19:41:29,236 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-14 19:41:29,236 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-14 19:41:29,286 INFO L234 CfgBuilder]: Building ICFG [2022-04-14 19:41:29,288 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-14 19:41:29,500 INFO L275 CfgBuilder]: Performing block encoding [2022-04-14 19:41:29,506 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-14 19:41:29,506 INFO L299 CfgBuilder]: Removed 5 assume(true) statements. [2022-04-14 19:41:29,508 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 07:41:29 BoogieIcfgContainer [2022-04-14 19:41:29,508 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-14 19:41:29,509 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-14 19:41:29,509 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-14 19:41:29,510 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-14 19:41:29,513 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 07:41:29" (1/1) ... [2022-04-14 19:41:29,515 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-14 19:41:30,012 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-14 19:41:30,013 INFO L91 elerationTransformer]: Accelerated Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] to Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] [2022-04-14 19:41:30,343 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-14 19:41:30,344 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_~z~0=v_main_~z~0_7, main_#t~post8=|v_main_#t~post8_1|, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] to Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] [2022-04-14 19:41:30,678 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-14 19:41:30,678 INFO L91 elerationTransformer]: Accelerated Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~z~0=v_main_~z~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post10=|v_main_#t~post10_1|, main_~z~0=v_main_~z~0_2, main_~y~0=v_main_~y~0_3, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] to Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] [2022-04-14 19:41:30,942 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-14 19:41:30,943 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_7, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] to Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] [2022-04-14 19:41:31,257 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-14 19:41:31,258 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] to Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] [2022-04-14 19:41:31,262 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 14.04 07:41:31 BasicIcfg [2022-04-14 19:41:31,262 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-14 19:41:31,263 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-14 19:41:31,263 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-14 19:41:31,266 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-14 19:41:31,266 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.04 07:41:28" (1/4) ... [2022-04-14 19:41:31,267 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2cc6f51c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.04 07:41:31, skipping insertion in model container [2022-04-14 19:41:31,267 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:29" (2/4) ... [2022-04-14 19:41:31,267 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2cc6f51c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.04 07:41:31, skipping insertion in model container [2022-04-14 19:41:31,268 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 07:41:29" (3/4) ... [2022-04-14 19:41:31,268 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2cc6f51c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.04 07:41:31, skipping insertion in model container [2022-04-14 19:41:31,268 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 14.04 07:41:31" (4/4) ... [2022-04-14 19:41:31,269 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de51.cJordan [2022-04-14 19:41:31,273 INFO L202 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-14 19:41:31,274 INFO L161 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-14 19:41:31,306 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-14 19:41:31,311 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-14 19:41:31,311 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-14 19:41:31,326 INFO L276 IsEmpty]: Start isEmpty. Operand has 24 states, 16 states have (on average 1.75) internal successors, (28), 17 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 19:41:31,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-14 19:41:31,332 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:41:31,333 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:41:31,333 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:41:31,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:41:31,338 INFO L85 PathProgramCache]: Analyzing trace with hash 702671213, now seen corresponding path program 1 times [2022-04-14 19:41:31,345 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:41:31,346 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [235416167] [2022-04-14 19:41:31,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:41:31,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:41:31,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:31,463 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:41:31,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:31,488 INFO L290 TraceCheckUtils]: 0: Hoare triple {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {27#true} is VALID [2022-04-14 19:41:31,489 INFO L290 TraceCheckUtils]: 1: Hoare triple {27#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-14 19:41:31,489 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {27#true} {27#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-14 19:41:31,491 INFO L272 TraceCheckUtils]: 0: Hoare triple {27#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:41:31,491 INFO L290 TraceCheckUtils]: 1: Hoare triple {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {27#true} is VALID [2022-04-14 19:41:31,491 INFO L290 TraceCheckUtils]: 2: Hoare triple {27#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-14 19:41:31,492 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {27#true} {27#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-14 19:41:31,493 INFO L272 TraceCheckUtils]: 4: Hoare triple {27#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-14 19:41:31,493 INFO L290 TraceCheckUtils]: 5: Hoare triple {27#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {27#true} is VALID [2022-04-14 19:41:31,494 INFO L290 TraceCheckUtils]: 6: Hoare triple {27#true} [92] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-14 19:41:31,494 INFO L290 TraceCheckUtils]: 7: Hoare triple {28#false} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {28#false} is VALID [2022-04-14 19:41:31,494 INFO L290 TraceCheckUtils]: 8: Hoare triple {28#false} [96] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-14 19:41:31,495 INFO L290 TraceCheckUtils]: 9: Hoare triple {28#false} [99] L29-1-->L35-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-14 19:41:31,495 INFO L290 TraceCheckUtils]: 10: Hoare triple {28#false} [102] L35-1-->L41-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-14 19:41:31,495 INFO L290 TraceCheckUtils]: 11: Hoare triple {28#false} [105] L41-1-->L41-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-14 19:41:31,496 INFO L272 TraceCheckUtils]: 12: Hoare triple {28#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {28#false} is VALID [2022-04-14 19:41:31,496 INFO L290 TraceCheckUtils]: 13: Hoare triple {28#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28#false} is VALID [2022-04-14 19:41:31,497 INFO L290 TraceCheckUtils]: 14: Hoare triple {28#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-14 19:41:31,498 INFO L290 TraceCheckUtils]: 15: Hoare triple {28#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-14 19:41:31,498 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:41:31,498 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:41:31,499 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [235416167] [2022-04-14 19:41:31,500 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [235416167] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:41:31,500 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 19:41:31,500 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-14 19:41:31,504 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [202939589] [2022-04-14 19:41:31,504 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:41:31,510 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-14 19:41:31,512 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:41:31,516 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:31,537 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:41:31,538 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-14 19:41:31,538 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:41:31,568 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-14 19:41:31,569 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-14 19:41:31,572 INFO L87 Difference]: Start difference. First operand has 24 states, 16 states have (on average 1.75) internal successors, (28), 17 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:31,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:31,647 INFO L93 Difference]: Finished difference Result 24 states and 28 transitions. [2022-04-14 19:41:31,648 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-14 19:41:31,649 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-14 19:41:31,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:41:31,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:31,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 34 transitions. [2022-04-14 19:41:31,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:31,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 34 transitions. [2022-04-14 19:41:31,670 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 34 transitions. [2022-04-14 19:41:31,711 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:41:31,721 INFO L225 Difference]: With dead ends: 24 [2022-04-14 19:41:31,722 INFO L226 Difference]: Without dead ends: 17 [2022-04-14 19:41:31,723 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-14 19:41:31,728 INFO L913 BasicCegarLoop]: 27 mSDtfsCounter, 19 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 30 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:41:31,730 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [20 Valid, 30 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-14 19:41:31,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-04-14 19:41:31,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-04-14 19:41:31,754 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:41:31,755 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:31,755 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:31,756 INFO L87 Difference]: Start difference. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:31,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:31,763 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2022-04-14 19:41:31,763 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-14 19:41:31,764 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:41:31,764 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:41:31,765 INFO L74 IsIncluded]: Start isIncluded. First operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-14 19:41:31,765 INFO L87 Difference]: Start difference. First operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-14 19:41:31,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:31,769 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2022-04-14 19:41:31,770 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-14 19:41:31,770 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:41:31,771 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:41:31,771 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:41:31,771 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:41:31,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:31,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2022-04-14 19:41:31,774 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 21 transitions. Word has length 16 [2022-04-14 19:41:31,774 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:41:31,774 INFO L478 AbstractCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-04-14 19:41:31,774 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:31,775 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-14 19:41:31,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-14 19:41:31,775 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:41:31,775 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:41:31,775 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-14 19:41:31,776 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:41:31,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:41:31,776 INFO L85 PathProgramCache]: Analyzing trace with hash -1128942900, now seen corresponding path program 1 times [2022-04-14 19:41:31,776 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:41:31,777 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1053281221] [2022-04-14 19:41:31,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:41:31,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:41:31,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:31,952 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:41:31,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:31,977 INFO L290 TraceCheckUtils]: 0: Hoare triple {118#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {110#true} is VALID [2022-04-14 19:41:31,978 INFO L290 TraceCheckUtils]: 1: Hoare triple {110#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-14 19:41:31,978 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {110#true} {110#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-14 19:41:31,979 INFO L272 TraceCheckUtils]: 0: Hoare triple {110#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {118#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:41:31,979 INFO L290 TraceCheckUtils]: 1: Hoare triple {118#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {110#true} is VALID [2022-04-14 19:41:31,980 INFO L290 TraceCheckUtils]: 2: Hoare triple {110#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-14 19:41:31,980 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {110#true} {110#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-14 19:41:31,980 INFO L272 TraceCheckUtils]: 4: Hoare triple {110#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-14 19:41:31,981 INFO L290 TraceCheckUtils]: 5: Hoare triple {110#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-14 19:41:31,981 INFO L290 TraceCheckUtils]: 6: Hoare triple {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-14 19:41:31,982 INFO L290 TraceCheckUtils]: 7: Hoare triple {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-14 19:41:31,982 INFO L290 TraceCheckUtils]: 8: Hoare triple {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-14 19:41:31,983 INFO L290 TraceCheckUtils]: 9: Hoare triple {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-14 19:41:31,983 INFO L290 TraceCheckUtils]: 10: Hoare triple {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-14 19:41:31,984 INFO L290 TraceCheckUtils]: 11: Hoare triple {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-14 19:41:31,985 INFO L272 TraceCheckUtils]: 12: Hoare triple {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {116#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:41:31,985 INFO L290 TraceCheckUtils]: 13: Hoare triple {116#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {117#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:41:31,986 INFO L290 TraceCheckUtils]: 14: Hoare triple {117#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {111#false} is VALID [2022-04-14 19:41:31,986 INFO L290 TraceCheckUtils]: 15: Hoare triple {111#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {111#false} is VALID [2022-04-14 19:41:31,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:41:31,986 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:41:31,987 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1053281221] [2022-04-14 19:41:31,988 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1053281221] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:41:31,988 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 19:41:31,988 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-14 19:41:31,988 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [326157634] [2022-04-14 19:41:31,988 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:41:31,989 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-14 19:41:31,990 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:41:31,995 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:32,011 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:41:32,015 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-14 19:41:32,016 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:41:32,016 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-14 19:41:32,017 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-04-14 19:41:32,017 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. Second operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:32,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:32,188 INFO L93 Difference]: Finished difference Result 29 states and 40 transitions. [2022-04-14 19:41:32,188 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-14 19:41:32,188 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-14 19:41:32,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:41:32,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:32,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 41 transitions. [2022-04-14 19:41:32,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:32,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 41 transitions. [2022-04-14 19:41:32,200 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 41 transitions. [2022-04-14 19:41:32,255 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:41:32,256 INFO L225 Difference]: With dead ends: 29 [2022-04-14 19:41:32,257 INFO L226 Difference]: Without dead ends: 26 [2022-04-14 19:41:32,257 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2022-04-14 19:41:32,259 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 17 mSDsluCounter, 19 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 33 SdHoareTripleChecker+Invalid, 51 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 7 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:41:32,260 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [17 Valid, 33 Invalid, 51 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 37 Invalid, 0 Unknown, 7 Unchecked, 0.0s Time] [2022-04-14 19:41:32,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2022-04-14 19:41:32,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 23. [2022-04-14 19:41:32,266 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:41:32,266 INFO L82 GeneralOperation]: Start isEquivalent. First operand 26 states. Second operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:32,267 INFO L74 IsIncluded]: Start isIncluded. First operand 26 states. Second operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:32,267 INFO L87 Difference]: Start difference. First operand 26 states. Second operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:32,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:32,271 INFO L93 Difference]: Finished difference Result 26 states and 37 transitions. [2022-04-14 19:41:32,271 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 37 transitions. [2022-04-14 19:41:32,272 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:41:32,272 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:41:32,272 INFO L74 IsIncluded]: Start isIncluded. First operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-14 19:41:32,272 INFO L87 Difference]: Start difference. First operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-14 19:41:32,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:32,275 INFO L93 Difference]: Finished difference Result 26 states and 37 transitions. [2022-04-14 19:41:32,275 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 37 transitions. [2022-04-14 19:41:32,276 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:41:32,276 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:41:32,276 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:41:32,276 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:41:32,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:32,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 31 transitions. [2022-04-14 19:41:32,279 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 31 transitions. Word has length 16 [2022-04-14 19:41:32,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:41:32,279 INFO L478 AbstractCegarLoop]: Abstraction has 23 states and 31 transitions. [2022-04-14 19:41:32,280 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:32,280 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 31 transitions. [2022-04-14 19:41:32,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-14 19:41:32,281 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:41:32,281 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:41:32,281 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-14 19:41:32,281 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:41:32,282 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:41:32,282 INFO L85 PathProgramCache]: Analyzing trace with hash -610770875, now seen corresponding path program 1 times [2022-04-14 19:41:32,282 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:41:32,282 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1885473956] [2022-04-14 19:41:32,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:41:32,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:41:32,317 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:41:32,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:32,361 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:41:32,422 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:41:32,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:32,438 INFO L290 TraceCheckUtils]: 0: Hoare triple {240#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {231#true} is VALID [2022-04-14 19:41:32,439 INFO L290 TraceCheckUtils]: 1: Hoare triple {231#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-14 19:41:32,440 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {231#true} {231#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-14 19:41:32,441 INFO L272 TraceCheckUtils]: 0: Hoare triple {231#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:41:32,441 INFO L290 TraceCheckUtils]: 1: Hoare triple {240#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {231#true} is VALID [2022-04-14 19:41:32,441 INFO L290 TraceCheckUtils]: 2: Hoare triple {231#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-14 19:41:32,442 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {231#true} {231#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-14 19:41:32,442 INFO L272 TraceCheckUtils]: 4: Hoare triple {231#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-14 19:41:32,443 INFO L290 TraceCheckUtils]: 5: Hoare triple {231#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {236#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:41:32,445 INFO L290 TraceCheckUtils]: 6: Hoare triple {236#(= main_~n~0 main_~x~0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {236#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:41:32,445 INFO L290 TraceCheckUtils]: 7: Hoare triple {236#(= main_~n~0 main_~x~0)} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {236#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:41:32,453 INFO L290 TraceCheckUtils]: 8: Hoare triple {236#(= main_~n~0 main_~x~0)} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {237#(and (= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:41:32,454 INFO L290 TraceCheckUtils]: 9: Hoare triple {237#(and (= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {237#(and (= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:41:32,455 INFO L290 TraceCheckUtils]: 10: Hoare triple {237#(and (= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {237#(and (= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:41:32,460 INFO L290 TraceCheckUtils]: 11: Hoare triple {237#(and (= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {236#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:41:32,461 INFO L290 TraceCheckUtils]: 12: Hoare triple {236#(= main_~n~0 main_~x~0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {236#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:41:32,462 INFO L272 TraceCheckUtils]: 13: Hoare triple {236#(= main_~n~0 main_~x~0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {238#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:41:32,464 INFO L290 TraceCheckUtils]: 14: Hoare triple {238#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {239#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:41:32,465 INFO L290 TraceCheckUtils]: 15: Hoare triple {239#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {232#false} is VALID [2022-04-14 19:41:32,465 INFO L290 TraceCheckUtils]: 16: Hoare triple {232#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {232#false} is VALID [2022-04-14 19:41:32,466 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:41:32,466 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:41:32,466 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1885473956] [2022-04-14 19:41:32,466 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1885473956] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:41:32,466 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1818432117] [2022-04-14 19:41:32,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:41:32,467 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:41:32,467 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:41:32,469 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:41:32,499 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-14 19:41:32,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:32,522 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-14 19:41:32,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:32,562 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:41:32,982 INFO L272 TraceCheckUtils]: 0: Hoare triple {231#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-14 19:41:32,983 INFO L290 TraceCheckUtils]: 1: Hoare triple {231#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {231#true} is VALID [2022-04-14 19:41:32,983 INFO L290 TraceCheckUtils]: 2: Hoare triple {231#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-14 19:41:32,983 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {231#true} {231#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-14 19:41:32,983 INFO L272 TraceCheckUtils]: 4: Hoare triple {231#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-14 19:41:32,984 INFO L290 TraceCheckUtils]: 5: Hoare triple {231#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {236#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:41:32,984 INFO L290 TraceCheckUtils]: 6: Hoare triple {236#(= main_~n~0 main_~x~0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {262#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:41:32,985 INFO L290 TraceCheckUtils]: 7: Hoare triple {262#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {262#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:41:32,985 INFO L290 TraceCheckUtils]: 8: Hoare triple {262#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {269#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:41:32,987 INFO L290 TraceCheckUtils]: 9: Hoare triple {269#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {269#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:41:32,987 INFO L290 TraceCheckUtils]: 10: Hoare triple {269#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {269#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:41:32,988 INFO L290 TraceCheckUtils]: 11: Hoare triple {269#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {262#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:41:32,990 INFO L290 TraceCheckUtils]: 12: Hoare triple {262#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {262#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:41:32,991 INFO L272 TraceCheckUtils]: 13: Hoare triple {262#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {285#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:41:32,991 INFO L290 TraceCheckUtils]: 14: Hoare triple {285#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {289#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:41:32,992 INFO L290 TraceCheckUtils]: 15: Hoare triple {289#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {232#false} is VALID [2022-04-14 19:41:32,992 INFO L290 TraceCheckUtils]: 16: Hoare triple {232#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {232#false} is VALID [2022-04-14 19:41:32,993 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:41:32,993 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:41:40,252 INFO L290 TraceCheckUtils]: 16: Hoare triple {232#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {232#false} is VALID [2022-04-14 19:41:40,256 INFO L290 TraceCheckUtils]: 15: Hoare triple {289#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {232#false} is VALID [2022-04-14 19:41:40,257 INFO L290 TraceCheckUtils]: 14: Hoare triple {285#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {289#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:41:40,262 INFO L272 TraceCheckUtils]: 13: Hoare triple {305#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {285#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:41:40,263 INFO L290 TraceCheckUtils]: 12: Hoare triple {305#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {305#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-14 19:41:42,279 WARN L290 TraceCheckUtils]: 11: Hoare triple {312#(forall ((aux_mod_v_main_~x~0_27_31 Int)) (or (> 0 aux_mod_v_main_~x~0_27_31) (>= aux_mod_v_main_~x~0_27_31 4294967296) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_27_31 Int)) (not (= (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_27_31 Int)) (or (not (< main_~x~0 (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296))))))) (not (< 0 (mod main_~z~0 4294967296))))) (= aux_mod_v_main_~x~0_27_31 (mod main_~n~0 4294967296))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {305#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is UNKNOWN [2022-04-14 19:41:42,280 INFO L290 TraceCheckUtils]: 10: Hoare triple {312#(forall ((aux_mod_v_main_~x~0_27_31 Int)) (or (> 0 aux_mod_v_main_~x~0_27_31) (>= aux_mod_v_main_~x~0_27_31 4294967296) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_27_31 Int)) (not (= (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_27_31 Int)) (or (not (< main_~x~0 (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296))))))) (not (< 0 (mod main_~z~0 4294967296))))) (= aux_mod_v_main_~x~0_27_31 (mod main_~n~0 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {312#(forall ((aux_mod_v_main_~x~0_27_31 Int)) (or (> 0 aux_mod_v_main_~x~0_27_31) (>= aux_mod_v_main_~x~0_27_31 4294967296) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_27_31 Int)) (not (= (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_27_31 Int)) (or (not (< main_~x~0 (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296))))))) (not (< 0 (mod main_~z~0 4294967296))))) (= aux_mod_v_main_~x~0_27_31 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:41:42,741 INFO L290 TraceCheckUtils]: 9: Hoare triple {312#(forall ((aux_mod_v_main_~x~0_27_31 Int)) (or (> 0 aux_mod_v_main_~x~0_27_31) (>= aux_mod_v_main_~x~0_27_31 4294967296) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_27_31 Int)) (not (= (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_27_31 Int)) (or (not (< main_~x~0 (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296))))))) (not (< 0 (mod main_~z~0 4294967296))))) (= aux_mod_v_main_~x~0_27_31 (mod main_~n~0 4294967296))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {312#(forall ((aux_mod_v_main_~x~0_27_31 Int)) (or (> 0 aux_mod_v_main_~x~0_27_31) (>= aux_mod_v_main_~x~0_27_31 4294967296) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_27_31 Int)) (not (= (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_27_31 Int)) (or (not (< main_~x~0 (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296))))))) (not (< 0 (mod main_~z~0 4294967296))))) (= aux_mod_v_main_~x~0_27_31 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:41:42,751 INFO L290 TraceCheckUtils]: 8: Hoare triple {305#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {312#(forall ((aux_mod_v_main_~x~0_27_31 Int)) (or (> 0 aux_mod_v_main_~x~0_27_31) (>= aux_mod_v_main_~x~0_27_31 4294967296) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_27_31 Int)) (not (= (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_27_31 Int)) (or (not (< main_~x~0 (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296))))))) (not (< 0 (mod main_~z~0 4294967296))))) (= aux_mod_v_main_~x~0_27_31 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:41:42,752 INFO L290 TraceCheckUtils]: 7: Hoare triple {305#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {305#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-14 19:41:42,753 INFO L290 TraceCheckUtils]: 6: Hoare triple {328#(or (= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296)) (< 0 (mod main_~x~0 4294967296)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {305#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-14 19:41:42,753 INFO L290 TraceCheckUtils]: 5: Hoare triple {231#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {328#(or (= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296)) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-14 19:41:42,753 INFO L272 TraceCheckUtils]: 4: Hoare triple {231#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-14 19:41:42,754 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {231#true} {231#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-14 19:41:42,754 INFO L290 TraceCheckUtils]: 2: Hoare triple {231#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-14 19:41:42,754 INFO L290 TraceCheckUtils]: 1: Hoare triple {231#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {231#true} is VALID [2022-04-14 19:41:42,754 INFO L272 TraceCheckUtils]: 0: Hoare triple {231#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-14 19:41:42,754 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:41:42,755 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1818432117] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:41:42,755 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:41:42,755 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 14 [2022-04-14 19:41:42,755 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [120928835] [2022-04-14 19:41:42,755 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:41:42,756 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.2142857142857144) internal successors, (31), 11 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:41:42,756 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:41:42,757 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 2.2142857142857144) internal successors, (31), 11 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:48,855 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 35 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-14 19:41:48,856 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-14 19:41:48,856 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:41:48,856 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-14 19:41:48,857 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=137, Unknown=2, NotChecked=0, Total=182 [2022-04-14 19:41:48,857 INFO L87 Difference]: Start difference. First operand 23 states and 31 transitions. Second operand has 14 states, 14 states have (on average 2.2142857142857144) internal successors, (31), 11 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:49,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:49,346 INFO L93 Difference]: Finished difference Result 34 states and 48 transitions. [2022-04-14 19:41:49,346 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-14 19:41:49,346 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.2142857142857144) internal successors, (31), 11 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:41:49,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:41:49,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.2142857142857144) internal successors, (31), 11 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:49,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 44 transitions. [2022-04-14 19:41:49,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.2142857142857144) internal successors, (31), 11 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:49,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 44 transitions. [2022-04-14 19:41:49,350 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 44 transitions. [2022-04-14 19:41:49,395 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:41:49,397 INFO L225 Difference]: With dead ends: 34 [2022-04-14 19:41:49,397 INFO L226 Difference]: Without dead ends: 31 [2022-04-14 19:41:49,397 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 26 SyntacticMatches, 4 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=82, Invalid=258, Unknown=2, NotChecked=0, Total=342 [2022-04-14 19:41:49,398 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 19 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 61 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 20 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:41:49,398 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [19 Valid, 61 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 75 Invalid, 0 Unknown, 20 Unchecked, 0.1s Time] [2022-04-14 19:41:49,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2022-04-14 19:41:49,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 26. [2022-04-14 19:41:49,401 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:41:49,402 INFO L82 GeneralOperation]: Start isEquivalent. First operand 31 states. Second operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:49,402 INFO L74 IsIncluded]: Start isIncluded. First operand 31 states. Second operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:49,402 INFO L87 Difference]: Start difference. First operand 31 states. Second operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:49,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:49,404 INFO L93 Difference]: Finished difference Result 31 states and 45 transitions. [2022-04-14 19:41:49,404 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 45 transitions. [2022-04-14 19:41:49,404 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:41:49,404 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:41:49,405 INFO L74 IsIncluded]: Start isIncluded. First operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31 states. [2022-04-14 19:41:49,405 INFO L87 Difference]: Start difference. First operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31 states. [2022-04-14 19:41:49,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:49,408 INFO L93 Difference]: Finished difference Result 31 states and 45 transitions. [2022-04-14 19:41:49,408 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 45 transitions. [2022-04-14 19:41:49,409 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:41:49,409 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:41:49,409 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:41:49,409 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:41:49,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:49,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 36 transitions. [2022-04-14 19:41:49,415 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 36 transitions. Word has length 17 [2022-04-14 19:41:49,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:41:49,415 INFO L478 AbstractCegarLoop]: Abstraction has 26 states and 36 transitions. [2022-04-14 19:41:49,415 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.2142857142857144) internal successors, (31), 11 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:49,416 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 36 transitions. [2022-04-14 19:41:49,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-14 19:41:49,416 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:41:49,416 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:41:49,447 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-14 19:41:49,623 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:41:49,624 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:41:49,625 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:41:49,625 INFO L85 PathProgramCache]: Analyzing trace with hash 162216202, now seen corresponding path program 1 times [2022-04-14 19:41:49,626 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:41:49,627 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [536176947] [2022-04-14 19:41:49,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:41:49,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:41:49,651 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-14 19:41:49,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:49,674 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-14 19:41:49,831 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:41:49,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:49,840 INFO L290 TraceCheckUtils]: 0: Hoare triple {492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {481#true} is VALID [2022-04-14 19:41:49,841 INFO L290 TraceCheckUtils]: 1: Hoare triple {481#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {481#true} is VALID [2022-04-14 19:41:49,841 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {481#true} {481#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {481#true} is VALID [2022-04-14 19:41:49,842 INFO L272 TraceCheckUtils]: 0: Hoare triple {481#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:41:49,843 INFO L290 TraceCheckUtils]: 1: Hoare triple {492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {481#true} is VALID [2022-04-14 19:41:49,843 INFO L290 TraceCheckUtils]: 2: Hoare triple {481#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {481#true} is VALID [2022-04-14 19:41:49,843 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {481#true} {481#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {481#true} is VALID [2022-04-14 19:41:49,843 INFO L272 TraceCheckUtils]: 4: Hoare triple {481#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {481#true} is VALID [2022-04-14 19:41:49,844 INFO L290 TraceCheckUtils]: 5: Hoare triple {481#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {486#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-14 19:41:49,845 INFO L290 TraceCheckUtils]: 6: Hoare triple {486#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:41:49,845 INFO L290 TraceCheckUtils]: 7: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:41:49,848 INFO L290 TraceCheckUtils]: 8: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:41:49,849 INFO L290 TraceCheckUtils]: 9: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:41:49,851 INFO L290 TraceCheckUtils]: 10: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {488#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:49,853 INFO L290 TraceCheckUtils]: 11: Hoare triple {488#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {489#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (* 4294967296 (div main_~x~0 4294967296)) main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:49,854 INFO L290 TraceCheckUtils]: 12: Hoare triple {489#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (* 4294967296 (div main_~x~0 4294967296)) main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {489#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (* 4294967296 (div main_~x~0 4294967296)) main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:49,855 INFO L272 TraceCheckUtils]: 13: Hoare triple {489#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (* 4294967296 (div main_~x~0 4294967296)) main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {490#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:41:49,855 INFO L290 TraceCheckUtils]: 14: Hoare triple {490#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {491#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:41:49,856 INFO L290 TraceCheckUtils]: 15: Hoare triple {491#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {482#false} is VALID [2022-04-14 19:41:49,856 INFO L290 TraceCheckUtils]: 16: Hoare triple {482#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {482#false} is VALID [2022-04-14 19:41:49,857 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:41:49,857 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:41:49,857 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [536176947] [2022-04-14 19:41:49,857 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [536176947] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:41:49,857 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1369578389] [2022-04-14 19:41:49,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:41:49,858 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:41:49,858 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:41:49,859 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:41:49,885 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-14 19:41:49,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:49,903 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-14 19:41:49,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:49,915 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:41:50,247 INFO L272 TraceCheckUtils]: 0: Hoare triple {481#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {481#true} is VALID [2022-04-14 19:41:50,248 INFO L290 TraceCheckUtils]: 1: Hoare triple {481#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {481#true} is VALID [2022-04-14 19:41:50,248 INFO L290 TraceCheckUtils]: 2: Hoare triple {481#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {481#true} is VALID [2022-04-14 19:41:50,248 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {481#true} {481#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {481#true} is VALID [2022-04-14 19:41:50,248 INFO L272 TraceCheckUtils]: 4: Hoare triple {481#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {481#true} is VALID [2022-04-14 19:41:50,249 INFO L290 TraceCheckUtils]: 5: Hoare triple {481#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {486#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-14 19:41:50,250 INFO L290 TraceCheckUtils]: 6: Hoare triple {486#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:41:50,251 INFO L290 TraceCheckUtils]: 7: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:41:50,251 INFO L290 TraceCheckUtils]: 8: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:41:50,252 INFO L290 TraceCheckUtils]: 9: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:41:50,254 INFO L290 TraceCheckUtils]: 10: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:41:50,255 INFO L290 TraceCheckUtils]: 11: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:41:50,255 INFO L290 TraceCheckUtils]: 12: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:41:50,256 INFO L272 TraceCheckUtils]: 13: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {535#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:41:50,257 INFO L290 TraceCheckUtils]: 14: Hoare triple {535#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {539#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:41:50,257 INFO L290 TraceCheckUtils]: 15: Hoare triple {539#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {482#false} is VALID [2022-04-14 19:41:50,258 INFO L290 TraceCheckUtils]: 16: Hoare triple {482#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {482#false} is VALID [2022-04-14 19:41:50,258 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:41:50,258 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-14 19:41:50,258 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1369578389] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:41:50,258 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-14 19:41:50,259 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [9] total 11 [2022-04-14 19:41:50,259 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [975203999] [2022-04-14 19:41:50,259 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:41:50,259 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:41:50,259 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:41:50,260 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:50,277 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:41:50,277 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-14 19:41:50,277 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:41:50,277 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-14 19:41:50,278 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2022-04-14 19:41:50,278 INFO L87 Difference]: Start difference. First operand 26 states and 36 transitions. Second operand has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:50,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:50,359 INFO L93 Difference]: Finished difference Result 32 states and 43 transitions. [2022-04-14 19:41:50,359 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-14 19:41:50,359 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:41:50,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:41:50,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:50,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 35 transitions. [2022-04-14 19:41:50,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:50,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 35 transitions. [2022-04-14 19:41:50,362 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 35 transitions. [2022-04-14 19:41:50,400 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:41:50,401 INFO L225 Difference]: With dead ends: 32 [2022-04-14 19:41:50,401 INFO L226 Difference]: Without dead ends: 29 [2022-04-14 19:41:50,402 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 13 SyntacticMatches, 4 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2022-04-14 19:41:50,402 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 9 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 51 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 4 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:41:50,403 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [9 Valid, 51 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 4 Unchecked, 0.0s Time] [2022-04-14 19:41:50,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2022-04-14 19:41:50,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 26. [2022-04-14 19:41:50,405 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:41:50,405 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:50,405 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:50,406 INFO L87 Difference]: Start difference. First operand 29 states. Second operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:50,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:50,407 INFO L93 Difference]: Finished difference Result 29 states and 40 transitions. [2022-04-14 19:41:50,407 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 40 transitions. [2022-04-14 19:41:50,407 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:41:50,408 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:41:50,408 INFO L74 IsIncluded]: Start isIncluded. First operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-14 19:41:50,408 INFO L87 Difference]: Start difference. First operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-14 19:41:50,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:50,409 INFO L93 Difference]: Finished difference Result 29 states and 40 transitions. [2022-04-14 19:41:50,409 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 40 transitions. [2022-04-14 19:41:50,410 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:41:50,410 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:41:50,410 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:41:50,410 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:41:50,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:50,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 36 transitions. [2022-04-14 19:41:50,411 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 36 transitions. Word has length 17 [2022-04-14 19:41:50,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:41:50,411 INFO L478 AbstractCegarLoop]: Abstraction has 26 states and 36 transitions. [2022-04-14 19:41:50,411 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:50,411 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 36 transitions. [2022-04-14 19:41:50,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-14 19:41:50,412 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:41:50,412 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:41:50,443 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-14 19:41:50,627 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-14 19:41:50,628 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:41:50,628 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:41:50,628 INFO L85 PathProgramCache]: Analyzing trace with hash -1833749398, now seen corresponding path program 1 times [2022-04-14 19:41:50,628 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:41:50,628 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1121231901] [2022-04-14 19:41:50,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:41:50,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:41:50,642 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:41:50,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:50,682 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:41:50,798 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:41:50,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:50,809 INFO L290 TraceCheckUtils]: 0: Hoare triple {674#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {663#true} is VALID [2022-04-14 19:41:50,810 INFO L290 TraceCheckUtils]: 1: Hoare triple {663#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {663#true} is VALID [2022-04-14 19:41:50,810 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {663#true} {663#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {663#true} is VALID [2022-04-14 19:41:50,811 INFO L272 TraceCheckUtils]: 0: Hoare triple {663#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {674#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:41:50,811 INFO L290 TraceCheckUtils]: 1: Hoare triple {674#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {663#true} is VALID [2022-04-14 19:41:50,811 INFO L290 TraceCheckUtils]: 2: Hoare triple {663#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {663#true} is VALID [2022-04-14 19:41:50,811 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {663#true} {663#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {663#true} is VALID [2022-04-14 19:41:50,811 INFO L272 TraceCheckUtils]: 4: Hoare triple {663#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {663#true} is VALID [2022-04-14 19:41:50,812 INFO L290 TraceCheckUtils]: 5: Hoare triple {663#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {668#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-14 19:41:50,813 INFO L290 TraceCheckUtils]: 6: Hoare triple {668#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {669#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:41:50,813 INFO L290 TraceCheckUtils]: 7: Hoare triple {669#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {669#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:41:50,815 INFO L290 TraceCheckUtils]: 8: Hoare triple {669#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {670#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-14 19:41:50,815 INFO L290 TraceCheckUtils]: 9: Hoare triple {670#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {670#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-14 19:41:50,816 INFO L290 TraceCheckUtils]: 10: Hoare triple {670#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {670#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-14 19:41:50,817 INFO L290 TraceCheckUtils]: 11: Hoare triple {670#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {671#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:50,817 INFO L290 TraceCheckUtils]: 12: Hoare triple {671#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {671#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:50,819 INFO L272 TraceCheckUtils]: 13: Hoare triple {671#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {672#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:41:50,819 INFO L290 TraceCheckUtils]: 14: Hoare triple {672#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {673#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:41:50,820 INFO L290 TraceCheckUtils]: 15: Hoare triple {673#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {664#false} is VALID [2022-04-14 19:41:50,820 INFO L290 TraceCheckUtils]: 16: Hoare triple {664#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {664#false} is VALID [2022-04-14 19:41:50,820 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:41:50,820 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:41:50,821 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1121231901] [2022-04-14 19:41:50,821 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1121231901] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:41:50,821 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2037217482] [2022-04-14 19:41:50,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:41:50,821 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:41:50,821 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:41:50,822 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:41:50,824 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-14 19:41:50,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:50,857 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-14 19:41:50,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:50,867 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:41:51,403 INFO L272 TraceCheckUtils]: 0: Hoare triple {663#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {663#true} is VALID [2022-04-14 19:41:51,403 INFO L290 TraceCheckUtils]: 1: Hoare triple {663#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {663#true} is VALID [2022-04-14 19:41:51,404 INFO L290 TraceCheckUtils]: 2: Hoare triple {663#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {663#true} is VALID [2022-04-14 19:41:51,404 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {663#true} {663#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {663#true} is VALID [2022-04-14 19:41:51,404 INFO L272 TraceCheckUtils]: 4: Hoare triple {663#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {663#true} is VALID [2022-04-14 19:41:51,404 INFO L290 TraceCheckUtils]: 5: Hoare triple {663#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {668#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-14 19:41:51,405 INFO L290 TraceCheckUtils]: 6: Hoare triple {668#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {696#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:41:51,406 INFO L290 TraceCheckUtils]: 7: Hoare triple {696#(not (< 0 (mod main_~n~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {696#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:41:51,406 INFO L290 TraceCheckUtils]: 8: Hoare triple {696#(not (< 0 (mod main_~n~0 4294967296)))} [98] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {696#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:41:51,406 INFO L290 TraceCheckUtils]: 9: Hoare triple {696#(not (< 0 (mod main_~n~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {696#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:41:51,407 INFO L290 TraceCheckUtils]: 10: Hoare triple {696#(not (< 0 (mod main_~n~0 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {696#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:41:51,407 INFO L290 TraceCheckUtils]: 11: Hoare triple {696#(not (< 0 (mod main_~n~0 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {712#(and (not (< 0 (mod main_~x~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:41:51,408 INFO L290 TraceCheckUtils]: 12: Hoare triple {712#(and (not (< 0 (mod main_~x~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {712#(and (not (< 0 (mod main_~x~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:41:51,409 INFO L272 TraceCheckUtils]: 13: Hoare triple {712#(and (not (< 0 (mod main_~x~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {719#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:41:51,409 INFO L290 TraceCheckUtils]: 14: Hoare triple {719#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {723#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:41:51,410 INFO L290 TraceCheckUtils]: 15: Hoare triple {723#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {664#false} is VALID [2022-04-14 19:41:51,410 INFO L290 TraceCheckUtils]: 16: Hoare triple {664#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {664#false} is VALID [2022-04-14 19:41:51,410 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:41:51,410 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-14 19:41:51,410 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2037217482] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:41:51,410 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-14 19:41:51,410 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [9] total 13 [2022-04-14 19:41:51,411 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1657415248] [2022-04-14 19:41:51,411 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:41:51,411 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 6 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:41:51,411 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:41:51,411 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 6 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:51,428 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:41:51,428 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-14 19:41:51,428 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:41:51,428 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-14 19:41:51,429 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=119, Unknown=0, NotChecked=0, Total=156 [2022-04-14 19:41:51,429 INFO L87 Difference]: Start difference. First operand 26 states and 36 transitions. Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 6 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:51,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:51,538 INFO L93 Difference]: Finished difference Result 35 states and 49 transitions. [2022-04-14 19:41:51,538 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-14 19:41:51,538 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 6 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:41:51,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:41:51,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 6 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:51,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 42 transitions. [2022-04-14 19:41:51,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 6 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:51,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 42 transitions. [2022-04-14 19:41:51,541 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 42 transitions. [2022-04-14 19:41:51,579 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:41:51,580 INFO L225 Difference]: With dead ends: 35 [2022-04-14 19:41:51,580 INFO L226 Difference]: Without dead ends: 32 [2022-04-14 19:41:51,581 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 14 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2022-04-14 19:41:51,581 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 15 mSDsluCounter, 63 mSDsCounter, 0 mSdLazyCounter, 25 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 77 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 25 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 4 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:41:51,582 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [15 Valid, 77 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 25 Invalid, 0 Unknown, 4 Unchecked, 0.0s Time] [2022-04-14 19:41:51,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2022-04-14 19:41:51,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 29. [2022-04-14 19:41:51,584 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:41:51,584 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32 states. Second operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:51,584 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:51,584 INFO L87 Difference]: Start difference. First operand 32 states. Second operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:51,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:51,586 INFO L93 Difference]: Finished difference Result 32 states and 46 transitions. [2022-04-14 19:41:51,586 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 46 transitions. [2022-04-14 19:41:51,586 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:41:51,586 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:41:51,586 INFO L74 IsIncluded]: Start isIncluded. First operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-14 19:41:51,587 INFO L87 Difference]: Start difference. First operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-14 19:41:51,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:51,588 INFO L93 Difference]: Finished difference Result 32 states and 46 transitions. [2022-04-14 19:41:51,588 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 46 transitions. [2022-04-14 19:41:51,588 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:41:51,588 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:41:51,588 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:41:51,589 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:41:51,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:51,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 42 transitions. [2022-04-14 19:41:51,590 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 42 transitions. Word has length 17 [2022-04-14 19:41:51,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:41:51,590 INFO L478 AbstractCegarLoop]: Abstraction has 29 states and 42 transitions. [2022-04-14 19:41:51,590 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 6 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:51,590 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 42 transitions. [2022-04-14 19:41:51,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-14 19:41:51,591 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:41:51,591 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:41:51,614 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-14 19:41:51,807 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:41:51,807 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:41:51,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:41:51,808 INFO L85 PathProgramCache]: Analyzing trace with hash -2110277654, now seen corresponding path program 1 times [2022-04-14 19:41:51,808 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:41:51,808 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1738842871] [2022-04-14 19:41:51,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:41:51,808 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:41:51,816 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:41:51,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:51,834 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.1))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:41:52,001 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:41:52,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:52,009 INFO L290 TraceCheckUtils]: 0: Hoare triple {871#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {860#true} is VALID [2022-04-14 19:41:52,010 INFO L290 TraceCheckUtils]: 1: Hoare triple {860#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-14 19:41:52,011 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {860#true} {860#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-14 19:41:52,011 INFO L272 TraceCheckUtils]: 0: Hoare triple {860#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {871#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:41:52,012 INFO L290 TraceCheckUtils]: 1: Hoare triple {871#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {860#true} is VALID [2022-04-14 19:41:52,012 INFO L290 TraceCheckUtils]: 2: Hoare triple {860#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-14 19:41:52,012 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {860#true} {860#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-14 19:41:52,012 INFO L272 TraceCheckUtils]: 4: Hoare triple {860#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-14 19:41:52,012 INFO L290 TraceCheckUtils]: 5: Hoare triple {860#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {865#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:41:52,022 INFO L290 TraceCheckUtils]: 6: Hoare triple {865#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {866#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:52,023 INFO L290 TraceCheckUtils]: 7: Hoare triple {866#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {867#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:41:52,024 INFO L290 TraceCheckUtils]: 8: Hoare triple {867#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {867#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:41:52,025 INFO L290 TraceCheckUtils]: 9: Hoare triple {867#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {867#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:41:52,026 INFO L290 TraceCheckUtils]: 10: Hoare triple {867#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:52,027 INFO L290 TraceCheckUtils]: 11: Hoare triple {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:52,028 INFO L290 TraceCheckUtils]: 12: Hoare triple {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:52,029 INFO L272 TraceCheckUtils]: 13: Hoare triple {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {869#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:41:52,029 INFO L290 TraceCheckUtils]: 14: Hoare triple {869#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {870#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:41:52,030 INFO L290 TraceCheckUtils]: 15: Hoare triple {870#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {861#false} is VALID [2022-04-14 19:41:52,030 INFO L290 TraceCheckUtils]: 16: Hoare triple {861#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {861#false} is VALID [2022-04-14 19:41:52,030 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:41:52,030 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:41:52,031 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1738842871] [2022-04-14 19:41:52,031 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1738842871] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:41:52,031 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [652249941] [2022-04-14 19:41:52,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:41:52,031 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:41:52,031 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:41:52,036 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:41:52,037 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-14 19:41:52,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:52,091 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-14 19:41:52,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:52,106 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:41:53,171 INFO L272 TraceCheckUtils]: 0: Hoare triple {860#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-14 19:41:53,172 INFO L290 TraceCheckUtils]: 1: Hoare triple {860#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {860#true} is VALID [2022-04-14 19:41:53,172 INFO L290 TraceCheckUtils]: 2: Hoare triple {860#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-14 19:41:53,172 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {860#true} {860#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-14 19:41:53,172 INFO L272 TraceCheckUtils]: 4: Hoare triple {860#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-14 19:41:53,183 INFO L290 TraceCheckUtils]: 5: Hoare triple {860#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {865#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:41:53,192 INFO L290 TraceCheckUtils]: 6: Hoare triple {865#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {893#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-14 19:41:53,194 INFO L290 TraceCheckUtils]: 7: Hoare triple {893#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {897#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-14 19:41:53,196 INFO L290 TraceCheckUtils]: 8: Hoare triple {897#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {901#(and (or (and (= main_~z~0 0) (= main_~n~0 main_~x~0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:41:53,202 INFO L290 TraceCheckUtils]: 9: Hoare triple {901#(and (or (and (= main_~z~0 0) (= main_~n~0 main_~x~0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0))) (not (< 0 (mod main_~x~0 4294967296))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {905#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:41:53,202 INFO L290 TraceCheckUtils]: 10: Hoare triple {905#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {905#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:41:53,203 INFO L290 TraceCheckUtils]: 11: Hoare triple {905#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {905#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:41:53,203 INFO L290 TraceCheckUtils]: 12: Hoare triple {905#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {905#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:41:53,205 INFO L272 TraceCheckUtils]: 13: Hoare triple {905#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {918#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:41:53,205 INFO L290 TraceCheckUtils]: 14: Hoare triple {918#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {922#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:41:53,210 INFO L290 TraceCheckUtils]: 15: Hoare triple {922#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {861#false} is VALID [2022-04-14 19:41:53,210 INFO L290 TraceCheckUtils]: 16: Hoare triple {861#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {861#false} is VALID [2022-04-14 19:41:53,210 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:41:53,210 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:42:01,563 INFO L290 TraceCheckUtils]: 16: Hoare triple {861#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {861#false} is VALID [2022-04-14 19:42:01,564 INFO L290 TraceCheckUtils]: 15: Hoare triple {922#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {861#false} is VALID [2022-04-14 19:42:01,564 INFO L290 TraceCheckUtils]: 14: Hoare triple {918#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {922#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:42:01,565 INFO L272 TraceCheckUtils]: 13: Hoare triple {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {918#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:42:01,566 INFO L290 TraceCheckUtils]: 12: Hoare triple {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:01,567 INFO L290 TraceCheckUtils]: 11: Hoare triple {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:01,568 INFO L290 TraceCheckUtils]: 10: Hoare triple {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:01,568 INFO L290 TraceCheckUtils]: 9: Hoare triple {950#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:01,569 INFO L290 TraceCheckUtils]: 8: Hoare triple {867#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {950#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-14 19:42:01,570 INFO L290 TraceCheckUtils]: 7: Hoare triple {866#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {867#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:42:01,732 INFO L290 TraceCheckUtils]: 6: Hoare triple {960#(forall ((aux_div_aux_mod_v_main_~x~0_31_31_87 Int) (aux_div_v_main_~x~0_31_31 Int) (aux_mod_aux_mod_v_main_~x~0_31_31_87 Int)) (or (>= aux_mod_aux_mod_v_main_~x~0_31_31_87 4294967296) (and (or (exists ((v_it_1 Int)) (and (<= (+ v_it_1 aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296) 1) main_~x~0) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))) (forall ((aux_div_v_main_~y~0_22_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_22_31 4294967296) (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_v_main_~y~0_22_31 4294967296) (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296))))) (not (< 0 (mod main_~x~0 4294967296))) (not (< (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296)) main_~x~0))) (or (forall ((aux_div_v_main_~y~0_22_31 Int)) (or (< main_~y~0 (* aux_div_v_main_~y~0_22_31 4294967296)) (<= (+ (* aux_div_v_main_~y~0_22_31 4294967296) 1) (+ main_~y~0 aux_mod_aux_mod_v_main_~x~0_31_31_87)))) (not (= main_~x~0 (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296)))))) (< (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296)) (* aux_div_v_main_~x~0_31_31 4294967296)) (< (+ main_~n~0 (* aux_div_v_main_~x~0_31_31 4294967296)) (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* (div main_~n~0 4294967296) 4294967296) (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296) 1)) (> 0 aux_mod_aux_mod_v_main_~x~0_31_31_87)))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {866#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:01,736 INFO L290 TraceCheckUtils]: 5: Hoare triple {860#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {960#(forall ((aux_div_aux_mod_v_main_~x~0_31_31_87 Int) (aux_div_v_main_~x~0_31_31 Int) (aux_mod_aux_mod_v_main_~x~0_31_31_87 Int)) (or (>= aux_mod_aux_mod_v_main_~x~0_31_31_87 4294967296) (and (or (exists ((v_it_1 Int)) (and (<= (+ v_it_1 aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296) 1) main_~x~0) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))) (forall ((aux_div_v_main_~y~0_22_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_22_31 4294967296) (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_v_main_~y~0_22_31 4294967296) (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296))))) (not (< 0 (mod main_~x~0 4294967296))) (not (< (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296)) main_~x~0))) (or (forall ((aux_div_v_main_~y~0_22_31 Int)) (or (< main_~y~0 (* aux_div_v_main_~y~0_22_31 4294967296)) (<= (+ (* aux_div_v_main_~y~0_22_31 4294967296) 1) (+ main_~y~0 aux_mod_aux_mod_v_main_~x~0_31_31_87)))) (not (= main_~x~0 (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296)))))) (< (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296)) (* aux_div_v_main_~x~0_31_31 4294967296)) (< (+ main_~n~0 (* aux_div_v_main_~x~0_31_31 4294967296)) (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* (div main_~n~0 4294967296) 4294967296) (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296) 1)) (> 0 aux_mod_aux_mod_v_main_~x~0_31_31_87)))} is VALID [2022-04-14 19:42:01,736 INFO L272 TraceCheckUtils]: 4: Hoare triple {860#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-14 19:42:01,736 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {860#true} {860#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-14 19:42:01,736 INFO L290 TraceCheckUtils]: 2: Hoare triple {860#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-14 19:42:01,737 INFO L290 TraceCheckUtils]: 1: Hoare triple {860#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {860#true} is VALID [2022-04-14 19:42:01,737 INFO L272 TraceCheckUtils]: 0: Hoare triple {860#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-14 19:42:01,737 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:42:01,737 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [652249941] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:42:01,737 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:42:01,737 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 17 [2022-04-14 19:42:01,737 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [241825886] [2022-04-14 19:42:01,737 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:42:01,738 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:42:01,738 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:42:01,738 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:03,826 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 34 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:03,827 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-14 19:42:03,827 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:42:03,827 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-14 19:42:03,827 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=215, Unknown=2, NotChecked=0, Total=272 [2022-04-14 19:42:03,828 INFO L87 Difference]: Start difference. First operand 29 states and 42 transitions. Second operand has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:04,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:04,460 INFO L93 Difference]: Finished difference Result 45 states and 68 transitions. [2022-04-14 19:42:04,460 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-14 19:42:04,461 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:42:04,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:42:04,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:04,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 48 transitions. [2022-04-14 19:42:04,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:04,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 48 transitions. [2022-04-14 19:42:04,464 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 48 transitions. [2022-04-14 19:42:04,532 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:04,533 INFO L225 Difference]: With dead ends: 45 [2022-04-14 19:42:04,533 INFO L226 Difference]: Without dead ends: 42 [2022-04-14 19:42:04,533 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 23 SyntacticMatches, 6 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 121 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=115, Invalid=389, Unknown=2, NotChecked=0, Total=506 [2022-04-14 19:42:04,534 INFO L913 BasicCegarLoop]: 9 mSDtfsCounter, 33 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 81 SdHoareTripleChecker+Invalid, 136 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 43 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:42:04,534 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [33 Valid, 81 Invalid, 136 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 82 Invalid, 0 Unknown, 43 Unchecked, 0.1s Time] [2022-04-14 19:42:04,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2022-04-14 19:42:04,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 33. [2022-04-14 19:42:04,537 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:42:04,537 INFO L82 GeneralOperation]: Start isEquivalent. First operand 42 states. Second operand has 33 states, 28 states have (on average 1.6071428571428572) internal successors, (45), 28 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:04,537 INFO L74 IsIncluded]: Start isIncluded. First operand 42 states. Second operand has 33 states, 28 states have (on average 1.6071428571428572) internal successors, (45), 28 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:04,537 INFO L87 Difference]: Start difference. First operand 42 states. Second operand has 33 states, 28 states have (on average 1.6071428571428572) internal successors, (45), 28 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:04,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:04,540 INFO L93 Difference]: Finished difference Result 42 states and 65 transitions. [2022-04-14 19:42:04,540 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 65 transitions. [2022-04-14 19:42:04,540 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:04,540 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:04,541 INFO L74 IsIncluded]: Start isIncluded. First operand has 33 states, 28 states have (on average 1.6071428571428572) internal successors, (45), 28 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 42 states. [2022-04-14 19:42:04,541 INFO L87 Difference]: Start difference. First operand has 33 states, 28 states have (on average 1.6071428571428572) internal successors, (45), 28 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 42 states. [2022-04-14 19:42:04,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:04,542 INFO L93 Difference]: Finished difference Result 42 states and 65 transitions. [2022-04-14 19:42:04,543 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 65 transitions. [2022-04-14 19:42:04,543 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:04,543 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:04,543 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:42:04,543 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:42:04,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 28 states have (on average 1.6071428571428572) internal successors, (45), 28 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:04,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 49 transitions. [2022-04-14 19:42:04,544 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 49 transitions. Word has length 17 [2022-04-14 19:42:04,545 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:42:04,545 INFO L478 AbstractCegarLoop]: Abstraction has 33 states and 49 transitions. [2022-04-14 19:42:04,545 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:04,545 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 49 transitions. [2022-04-14 19:42:04,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-14 19:42:04,545 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:42:04,546 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:42:04,570 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-14 19:42:04,767 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:04,768 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:42:04,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:42:04,768 INFO L85 PathProgramCache]: Analyzing trace with hash -1727307284, now seen corresponding path program 2 times [2022-04-14 19:42:04,768 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:42:04,768 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [462009068] [2022-04-14 19:42:04,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:04,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:42:04,789 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:04,789 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_11 .cse0 (* (- 4294967296) (div (+ main_~z~0_11 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:04,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:04,814 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.2))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:04,816 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_11 .cse0 (* (- 4294967296) (div (+ main_~z~0_11 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:04,889 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:42:04,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:04,896 INFO L290 TraceCheckUtils]: 0: Hoare triple {1166#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1156#true} is VALID [2022-04-14 19:42:04,896 INFO L290 TraceCheckUtils]: 1: Hoare triple {1156#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1156#true} is VALID [2022-04-14 19:42:04,897 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1156#true} {1156#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1156#true} is VALID [2022-04-14 19:42:04,897 INFO L272 TraceCheckUtils]: 0: Hoare triple {1156#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1166#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:42:04,897 INFO L290 TraceCheckUtils]: 1: Hoare triple {1166#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1156#true} is VALID [2022-04-14 19:42:04,897 INFO L290 TraceCheckUtils]: 2: Hoare triple {1156#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1156#true} is VALID [2022-04-14 19:42:04,897 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1156#true} {1156#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1156#true} is VALID [2022-04-14 19:42:04,898 INFO L272 TraceCheckUtils]: 4: Hoare triple {1156#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1156#true} is VALID [2022-04-14 19:42:04,898 INFO L290 TraceCheckUtils]: 5: Hoare triple {1156#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1161#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-14 19:42:04,899 INFO L290 TraceCheckUtils]: 6: Hoare triple {1161#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1161#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-14 19:42:04,899 INFO L290 TraceCheckUtils]: 7: Hoare triple {1161#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1162#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} is VALID [2022-04-14 19:42:04,900 INFO L290 TraceCheckUtils]: 8: Hoare triple {1162#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1162#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} is VALID [2022-04-14 19:42:04,900 INFO L290 TraceCheckUtils]: 9: Hoare triple {1162#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1162#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} is VALID [2022-04-14 19:42:04,901 INFO L290 TraceCheckUtils]: 10: Hoare triple {1162#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1162#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} is VALID [2022-04-14 19:42:04,901 INFO L290 TraceCheckUtils]: 11: Hoare triple {1162#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1162#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} is VALID [2022-04-14 19:42:04,902 INFO L290 TraceCheckUtils]: 12: Hoare triple {1162#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1163#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:42:04,902 INFO L290 TraceCheckUtils]: 13: Hoare triple {1163#(= main_~n~0 main_~x~0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1163#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:42:04,903 INFO L272 TraceCheckUtils]: 14: Hoare triple {1163#(= main_~n~0 main_~x~0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1164#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:42:04,903 INFO L290 TraceCheckUtils]: 15: Hoare triple {1164#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1165#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:42:04,903 INFO L290 TraceCheckUtils]: 16: Hoare triple {1165#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1157#false} is VALID [2022-04-14 19:42:04,904 INFO L290 TraceCheckUtils]: 17: Hoare triple {1157#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1157#false} is VALID [2022-04-14 19:42:04,904 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:42:04,904 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:42:04,904 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [462009068] [2022-04-14 19:42:04,904 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [462009068] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:42:04,904 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [603885527] [2022-04-14 19:42:04,904 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-14 19:42:04,904 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:04,904 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:42:04,905 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:42:04,908 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-14 19:42:04,940 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-14 19:42:04,941 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-14 19:42:04,941 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-14 19:42:04,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:04,953 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:42:05,415 INFO L272 TraceCheckUtils]: 0: Hoare triple {1156#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1156#true} is VALID [2022-04-14 19:42:05,415 INFO L290 TraceCheckUtils]: 1: Hoare triple {1156#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1156#true} is VALID [2022-04-14 19:42:05,415 INFO L290 TraceCheckUtils]: 2: Hoare triple {1156#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1156#true} is VALID [2022-04-14 19:42:05,415 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1156#true} {1156#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1156#true} is VALID [2022-04-14 19:42:05,416 INFO L272 TraceCheckUtils]: 4: Hoare triple {1156#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1156#true} is VALID [2022-04-14 19:42:05,416 INFO L290 TraceCheckUtils]: 5: Hoare triple {1156#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1163#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:42:05,417 INFO L290 TraceCheckUtils]: 6: Hoare triple {1163#(= main_~n~0 main_~x~0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1188#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:05,417 INFO L290 TraceCheckUtils]: 7: Hoare triple {1188#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1188#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:05,418 INFO L290 TraceCheckUtils]: 8: Hoare triple {1188#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1195#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:05,418 INFO L290 TraceCheckUtils]: 9: Hoare triple {1195#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1195#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:05,419 INFO L290 TraceCheckUtils]: 10: Hoare triple {1195#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1195#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:05,420 INFO L290 TraceCheckUtils]: 11: Hoare triple {1195#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1195#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:05,421 INFO L290 TraceCheckUtils]: 12: Hoare triple {1195#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1188#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:05,422 INFO L290 TraceCheckUtils]: 13: Hoare triple {1188#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1188#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:05,423 INFO L272 TraceCheckUtils]: 14: Hoare triple {1188#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1214#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:42:05,423 INFO L290 TraceCheckUtils]: 15: Hoare triple {1214#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1218#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:42:05,423 INFO L290 TraceCheckUtils]: 16: Hoare triple {1218#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1157#false} is VALID [2022-04-14 19:42:05,424 INFO L290 TraceCheckUtils]: 17: Hoare triple {1157#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1157#false} is VALID [2022-04-14 19:42:05,424 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:42:05,424 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:42:50,598 INFO L290 TraceCheckUtils]: 17: Hoare triple {1157#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1157#false} is VALID [2022-04-14 19:42:50,599 INFO L290 TraceCheckUtils]: 16: Hoare triple {1218#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1157#false} is VALID [2022-04-14 19:42:50,599 INFO L290 TraceCheckUtils]: 15: Hoare triple {1214#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1218#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:42:50,600 INFO L272 TraceCheckUtils]: 14: Hoare triple {1234#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1214#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:42:50,600 INFO L290 TraceCheckUtils]: 13: Hoare triple {1234#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1234#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-14 19:42:52,616 WARN L290 TraceCheckUtils]: 12: Hoare triple {1241#(forall ((aux_mod_v_main_~x~0_35_31 Int)) (or (and (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)) main_~x~0))))) (= aux_mod_v_main_~x~0_35_31 (mod main_~n~0 4294967296)) (>= aux_mod_v_main_~x~0_35_31 4294967296) (> 0 aux_mod_v_main_~x~0_35_31)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1234#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is UNKNOWN [2022-04-14 19:42:54,645 WARN L290 TraceCheckUtils]: 11: Hoare triple {1245#(forall ((aux_mod_v_main_~x~0_35_31 Int)) (or (= aux_mod_v_main_~x~0_35_31 (mod main_~n~0 4294967296)) (>= aux_mod_v_main_~x~0_35_31 4294967296) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((v_main_~x~0_36 Int)) (or (not (< main_~x~0 v_main_~x~0_36)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) v_main_~x~0_36))) (and (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (or (not (< v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (<= (+ v_main_~x~0_36 v_it_5 1) (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0 (* v_it_5 4294967295)) 4294967296))))))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))))) (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296))))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)) main_~x~0))))) (> 0 aux_mod_v_main_~x~0_35_31)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1241#(forall ((aux_mod_v_main_~x~0_35_31 Int)) (or (and (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)) main_~x~0))))) (= aux_mod_v_main_~x~0_35_31 (mod main_~n~0 4294967296)) (>= aux_mod_v_main_~x~0_35_31 4294967296) (> 0 aux_mod_v_main_~x~0_35_31)))} is UNKNOWN [2022-04-14 19:42:56,661 WARN L290 TraceCheckUtils]: 10: Hoare triple {1245#(forall ((aux_mod_v_main_~x~0_35_31 Int)) (or (= aux_mod_v_main_~x~0_35_31 (mod main_~n~0 4294967296)) (>= aux_mod_v_main_~x~0_35_31 4294967296) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((v_main_~x~0_36 Int)) (or (not (< main_~x~0 v_main_~x~0_36)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) v_main_~x~0_36))) (and (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (or (not (< v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (<= (+ v_main_~x~0_36 v_it_5 1) (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0 (* v_it_5 4294967295)) 4294967296))))))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))))) (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296))))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)) main_~x~0))))) (> 0 aux_mod_v_main_~x~0_35_31)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1245#(forall ((aux_mod_v_main_~x~0_35_31 Int)) (or (= aux_mod_v_main_~x~0_35_31 (mod main_~n~0 4294967296)) (>= aux_mod_v_main_~x~0_35_31 4294967296) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((v_main_~x~0_36 Int)) (or (not (< main_~x~0 v_main_~x~0_36)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) v_main_~x~0_36))) (and (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (or (not (< v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (<= (+ v_main_~x~0_36 v_it_5 1) (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0 (* v_it_5 4294967295)) 4294967296))))))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))))) (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296))))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)) main_~x~0))))) (> 0 aux_mod_v_main_~x~0_35_31)))} is UNKNOWN [2022-04-14 19:42:58,682 WARN L290 TraceCheckUtils]: 9: Hoare triple {1245#(forall ((aux_mod_v_main_~x~0_35_31 Int)) (or (= aux_mod_v_main_~x~0_35_31 (mod main_~n~0 4294967296)) (>= aux_mod_v_main_~x~0_35_31 4294967296) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((v_main_~x~0_36 Int)) (or (not (< main_~x~0 v_main_~x~0_36)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) v_main_~x~0_36))) (and (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (or (not (< v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (<= (+ v_main_~x~0_36 v_it_5 1) (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0 (* v_it_5 4294967295)) 4294967296))))))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))))) (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296))))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)) main_~x~0))))) (> 0 aux_mod_v_main_~x~0_35_31)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1245#(forall ((aux_mod_v_main_~x~0_35_31 Int)) (or (= aux_mod_v_main_~x~0_35_31 (mod main_~n~0 4294967296)) (>= aux_mod_v_main_~x~0_35_31 4294967296) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((v_main_~x~0_36 Int)) (or (not (< main_~x~0 v_main_~x~0_36)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) v_main_~x~0_36))) (and (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (or (not (< v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (<= (+ v_main_~x~0_36 v_it_5 1) (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0 (* v_it_5 4294967295)) 4294967296))))))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))))) (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296))))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)) main_~x~0))))) (> 0 aux_mod_v_main_~x~0_35_31)))} is UNKNOWN [2022-04-14 19:42:58,691 INFO L290 TraceCheckUtils]: 8: Hoare triple {1234#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1245#(forall ((aux_mod_v_main_~x~0_35_31 Int)) (or (= aux_mod_v_main_~x~0_35_31 (mod main_~n~0 4294967296)) (>= aux_mod_v_main_~x~0_35_31 4294967296) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((v_main_~x~0_36 Int)) (or (not (< main_~x~0 v_main_~x~0_36)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) v_main_~x~0_36))) (and (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (or (not (< v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (<= (+ v_main_~x~0_36 v_it_5 1) (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0 (* v_it_5 4294967295)) 4294967296))))))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))))) (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296))))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)) main_~x~0))))) (> 0 aux_mod_v_main_~x~0_35_31)))} is VALID [2022-04-14 19:42:58,692 INFO L290 TraceCheckUtils]: 7: Hoare triple {1234#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1234#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-14 19:42:58,692 INFO L290 TraceCheckUtils]: 6: Hoare triple {1261#(or (= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296)) (< 0 (mod main_~x~0 4294967296)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1234#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-14 19:42:58,693 INFO L290 TraceCheckUtils]: 5: Hoare triple {1156#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1261#(or (= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296)) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-14 19:42:58,693 INFO L272 TraceCheckUtils]: 4: Hoare triple {1156#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1156#true} is VALID [2022-04-14 19:42:58,693 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1156#true} {1156#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1156#true} is VALID [2022-04-14 19:42:58,693 INFO L290 TraceCheckUtils]: 2: Hoare triple {1156#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1156#true} is VALID [2022-04-14 19:42:58,694 INFO L290 TraceCheckUtils]: 1: Hoare triple {1156#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1156#true} is VALID [2022-04-14 19:42:58,694 INFO L272 TraceCheckUtils]: 0: Hoare triple {1156#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1156#true} is VALID [2022-04-14 19:42:58,694 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 1 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:42:58,694 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [603885527] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:42:58,694 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:42:58,694 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 8] total 16 [2022-04-14 19:42:58,694 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1694132531] [2022-04-14 19:42:58,695 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:42:58,695 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.1875) internal successors, (35), 13 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:42:58,695 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:42:58,696 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 2.1875) internal successors, (35), 13 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:43:06,903 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 38 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2022-04-14 19:43:06,903 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-14 19:43:06,903 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:43:06,904 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-14 19:43:06,904 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=173, Unknown=16, NotChecked=0, Total=240 [2022-04-14 19:43:06,904 INFO L87 Difference]: Start difference. First operand 33 states and 49 transitions. Second operand has 16 states, 16 states have (on average 2.1875) internal successors, (35), 13 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:43:21,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:43:21,586 INFO L93 Difference]: Finished difference Result 44 states and 66 transitions. [2022-04-14 19:43:21,586 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-14 19:43:21,586 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.1875) internal successors, (35), 13 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:43:21,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:43:21,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.1875) internal successors, (35), 13 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:43:21,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 44 transitions. [2022-04-14 19:43:21,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.1875) internal successors, (35), 13 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:43:21,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 44 transitions. [2022-04-14 19:43:21,590 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 44 transitions. [2022-04-14 19:43:21,646 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:43:21,647 INFO L225 Difference]: With dead ends: 44 [2022-04-14 19:43:21,647 INFO L226 Difference]: Without dead ends: 38 [2022-04-14 19:43:21,647 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 28 SyntacticMatches, 5 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 49.0s TimeCoverageRelationStatistics Valid=118, Invalid=366, Unknown=22, NotChecked=0, Total=506 [2022-04-14 19:43:21,648 INFO L913 BasicCegarLoop]: 10 mSDtfsCounter, 29 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 104 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 74 SdHoareTripleChecker+Invalid, 144 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 104 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 30 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:43:21,648 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [29 Valid, 74 Invalid, 144 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 104 Invalid, 0 Unknown, 30 Unchecked, 0.1s Time] [2022-04-14 19:43:21,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2022-04-14 19:43:21,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 32. [2022-04-14 19:43:21,650 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:43:21,651 INFO L82 GeneralOperation]: Start isEquivalent. First operand 38 states. Second operand has 32 states, 27 states have (on average 1.5925925925925926) internal successors, (43), 27 states have internal predecessors, (43), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:43:21,651 INFO L74 IsIncluded]: Start isIncluded. First operand 38 states. Second operand has 32 states, 27 states have (on average 1.5925925925925926) internal successors, (43), 27 states have internal predecessors, (43), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:43:21,651 INFO L87 Difference]: Start difference. First operand 38 states. Second operand has 32 states, 27 states have (on average 1.5925925925925926) internal successors, (43), 27 states have internal predecessors, (43), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:43:21,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:43:21,652 INFO L93 Difference]: Finished difference Result 38 states and 59 transitions. [2022-04-14 19:43:21,653 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 59 transitions. [2022-04-14 19:43:21,653 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:43:21,653 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:43:21,653 INFO L74 IsIncluded]: Start isIncluded. First operand has 32 states, 27 states have (on average 1.5925925925925926) internal successors, (43), 27 states have internal predecessors, (43), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-14 19:43:21,653 INFO L87 Difference]: Start difference. First operand has 32 states, 27 states have (on average 1.5925925925925926) internal successors, (43), 27 states have internal predecessors, (43), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-14 19:43:21,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:43:21,655 INFO L93 Difference]: Finished difference Result 38 states and 59 transitions. [2022-04-14 19:43:21,655 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 59 transitions. [2022-04-14 19:43:21,655 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:43:21,655 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:43:21,655 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:43:21,655 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:43:21,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 27 states have (on average 1.5925925925925926) internal successors, (43), 27 states have internal predecessors, (43), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:43:21,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 47 transitions. [2022-04-14 19:43:21,657 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 47 transitions. Word has length 18 [2022-04-14 19:43:21,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:43:21,657 INFO L478 AbstractCegarLoop]: Abstraction has 32 states and 47 transitions. [2022-04-14 19:43:21,657 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.1875) internal successors, (35), 13 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:43:21,657 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 47 transitions. [2022-04-14 19:43:21,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-14 19:43:21,658 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:43:21,658 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:43:21,674 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2022-04-14 19:43:21,858 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:43:21,858 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:43:21,859 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:43:21,859 INFO L85 PathProgramCache]: Analyzing trace with hash 760455623, now seen corresponding path program 1 times [2022-04-14 19:43:21,859 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:43:21,859 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1425647039] [2022-04-14 19:43:21,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:43:21,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:43:21,869 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-14 19:43:21,870 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:43:21,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:43:21,883 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.2))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-14 19:43:21,885 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:43:22,010 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:43:22,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:43:22,015 INFO L290 TraceCheckUtils]: 0: Hoare triple {1461#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1449#true} is VALID [2022-04-14 19:43:22,015 INFO L290 TraceCheckUtils]: 1: Hoare triple {1449#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1449#true} is VALID [2022-04-14 19:43:22,015 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1449#true} {1449#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1449#true} is VALID [2022-04-14 19:43:22,018 INFO L272 TraceCheckUtils]: 0: Hoare triple {1449#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1461#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:43:22,018 INFO L290 TraceCheckUtils]: 1: Hoare triple {1461#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1449#true} is VALID [2022-04-14 19:43:22,018 INFO L290 TraceCheckUtils]: 2: Hoare triple {1449#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1449#true} is VALID [2022-04-14 19:43:22,018 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1449#true} {1449#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1449#true} is VALID [2022-04-14 19:43:22,018 INFO L272 TraceCheckUtils]: 4: Hoare triple {1449#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1449#true} is VALID [2022-04-14 19:43:22,018 INFO L290 TraceCheckUtils]: 5: Hoare triple {1449#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1454#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-14 19:43:22,019 INFO L290 TraceCheckUtils]: 6: Hoare triple {1454#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1455#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:43:22,020 INFO L290 TraceCheckUtils]: 7: Hoare triple {1455#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1455#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:43:22,021 INFO L290 TraceCheckUtils]: 8: Hoare triple {1455#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1456#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:43:22,021 INFO L290 TraceCheckUtils]: 9: Hoare triple {1456#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1456#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:43:22,023 INFO L290 TraceCheckUtils]: 10: Hoare triple {1456#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1457#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:43:22,024 INFO L290 TraceCheckUtils]: 11: Hoare triple {1457#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1457#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:43:22,025 INFO L290 TraceCheckUtils]: 12: Hoare triple {1457#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1458#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:43:22,026 INFO L290 TraceCheckUtils]: 13: Hoare triple {1458#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1458#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:43:22,027 INFO L272 TraceCheckUtils]: 14: Hoare triple {1458#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1459#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:43:22,028 INFO L290 TraceCheckUtils]: 15: Hoare triple {1459#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1460#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:43:22,028 INFO L290 TraceCheckUtils]: 16: Hoare triple {1460#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1450#false} is VALID [2022-04-14 19:43:22,028 INFO L290 TraceCheckUtils]: 17: Hoare triple {1450#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1450#false} is VALID [2022-04-14 19:43:22,029 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:43:22,029 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:43:22,029 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1425647039] [2022-04-14 19:43:22,029 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1425647039] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:43:22,029 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1728188651] [2022-04-14 19:43:22,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:43:22,029 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:43:22,030 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:43:22,031 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:43:22,031 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-14 19:43:22,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:43:22,068 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-14 19:43:22,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:43:22,085 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:43:22,884 INFO L272 TraceCheckUtils]: 0: Hoare triple {1449#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1449#true} is VALID [2022-04-14 19:43:22,884 INFO L290 TraceCheckUtils]: 1: Hoare triple {1449#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1449#true} is VALID [2022-04-14 19:43:22,885 INFO L290 TraceCheckUtils]: 2: Hoare triple {1449#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1449#true} is VALID [2022-04-14 19:43:22,885 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1449#true} {1449#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1449#true} is VALID [2022-04-14 19:43:22,885 INFO L272 TraceCheckUtils]: 4: Hoare triple {1449#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1449#true} is VALID [2022-04-14 19:43:22,885 INFO L290 TraceCheckUtils]: 5: Hoare triple {1449#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1454#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-14 19:43:22,886 INFO L290 TraceCheckUtils]: 6: Hoare triple {1454#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1455#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:43:22,888 INFO L290 TraceCheckUtils]: 7: Hoare triple {1455#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1455#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:43:22,889 INFO L290 TraceCheckUtils]: 8: Hoare triple {1455#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1456#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:43:22,889 INFO L290 TraceCheckUtils]: 9: Hoare triple {1456#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1456#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:43:22,891 INFO L290 TraceCheckUtils]: 10: Hoare triple {1456#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1456#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:43:22,891 INFO L290 TraceCheckUtils]: 11: Hoare triple {1456#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1456#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:43:22,893 INFO L290 TraceCheckUtils]: 12: Hoare triple {1456#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1455#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:43:22,893 INFO L290 TraceCheckUtils]: 13: Hoare triple {1455#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1455#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:43:22,894 INFO L272 TraceCheckUtils]: 14: Hoare triple {1455#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1507#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:43:22,895 INFO L290 TraceCheckUtils]: 15: Hoare triple {1507#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1511#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:43:22,895 INFO L290 TraceCheckUtils]: 16: Hoare triple {1511#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1450#false} is VALID [2022-04-14 19:43:22,895 INFO L290 TraceCheckUtils]: 17: Hoare triple {1450#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1450#false} is VALID [2022-04-14 19:43:22,895 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:43:22,895 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:44:08,563 INFO L290 TraceCheckUtils]: 17: Hoare triple {1450#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1450#false} is VALID [2022-04-14 19:44:08,565 INFO L290 TraceCheckUtils]: 16: Hoare triple {1511#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1450#false} is VALID [2022-04-14 19:44:08,565 INFO L290 TraceCheckUtils]: 15: Hoare triple {1507#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1511#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:44:08,566 INFO L272 TraceCheckUtils]: 14: Hoare triple {1527#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1507#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:44:08,567 INFO L290 TraceCheckUtils]: 13: Hoare triple {1527#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1527#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-14 19:44:10,580 WARN L290 TraceCheckUtils]: 12: Hoare triple {1534#(forall ((aux_mod_v_main_~x~0_40_31 Int)) (or (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_40_31 Int)) (not (= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_40_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296))))) (> 0 aux_mod_v_main_~x~0_40_31) (>= aux_mod_v_main_~x~0_40_31 4294967296)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1527#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is UNKNOWN [2022-04-14 19:44:10,581 INFO L290 TraceCheckUtils]: 11: Hoare triple {1538#(or (forall ((aux_mod_v_main_~x~0_40_31 Int)) (or (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_40_31 Int)) (not (= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_40_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296))))) (> 0 aux_mod_v_main_~x~0_40_31) (>= aux_mod_v_main_~x~0_40_31 4294967296))) (< 0 (mod main_~x~0 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1534#(forall ((aux_mod_v_main_~x~0_40_31 Int)) (or (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_40_31 Int)) (not (= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_40_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296))))) (> 0 aux_mod_v_main_~x~0_40_31) (>= aux_mod_v_main_~x~0_40_31 4294967296)))} is VALID [2022-04-14 19:44:12,594 WARN L290 TraceCheckUtils]: 10: Hoare triple {1542#(forall ((aux_div_v_main_~x~0_41_31 Int) (aux_mod_v_main_~x~0_41_31 Int) (aux_mod_v_main_~x~0_40_31 Int)) (or (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (< aux_mod_v_main_~x~0_41_31 0) (<= 4294967296 aux_mod_v_main_~x~0_40_31) (< aux_mod_v_main_~x~0_40_31 0) (< 0 aux_mod_v_main_~x~0_41_31) (and (or (forall ((aux_div_v_main_~x~0_40_31 Int)) (or (not (< (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296) v_it_5 1) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_40_31 Int)) (not (= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))))))) (and (not (= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) main_~x~0)) (or (not (< (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) main_~x~0)) (not (< 0 (mod main_~x~0 4294967296))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296) v_it_4 1) main_~x~0)))))))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1538#(or (forall ((aux_mod_v_main_~x~0_40_31 Int)) (or (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_40_31 Int)) (not (= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_40_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296))))) (> 0 aux_mod_v_main_~x~0_40_31) (>= aux_mod_v_main_~x~0_40_31 4294967296))) (< 0 (mod main_~x~0 4294967296)))} is UNKNOWN [2022-04-14 19:44:14,611 WARN L290 TraceCheckUtils]: 9: Hoare triple {1542#(forall ((aux_div_v_main_~x~0_41_31 Int) (aux_mod_v_main_~x~0_41_31 Int) (aux_mod_v_main_~x~0_40_31 Int)) (or (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (< aux_mod_v_main_~x~0_41_31 0) (<= 4294967296 aux_mod_v_main_~x~0_40_31) (< aux_mod_v_main_~x~0_40_31 0) (< 0 aux_mod_v_main_~x~0_41_31) (and (or (forall ((aux_div_v_main_~x~0_40_31 Int)) (or (not (< (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296) v_it_5 1) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_40_31 Int)) (not (= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))))))) (and (not (= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) main_~x~0)) (or (not (< (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) main_~x~0)) (not (< 0 (mod main_~x~0 4294967296))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296) v_it_4 1) main_~x~0)))))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1542#(forall ((aux_div_v_main_~x~0_41_31 Int) (aux_mod_v_main_~x~0_41_31 Int) (aux_mod_v_main_~x~0_40_31 Int)) (or (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (< aux_mod_v_main_~x~0_41_31 0) (<= 4294967296 aux_mod_v_main_~x~0_40_31) (< aux_mod_v_main_~x~0_40_31 0) (< 0 aux_mod_v_main_~x~0_41_31) (and (or (forall ((aux_div_v_main_~x~0_40_31 Int)) (or (not (< (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296) v_it_5 1) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_40_31 Int)) (not (= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))))))) (and (not (= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) main_~x~0)) (or (not (< (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) main_~x~0)) (not (< 0 (mod main_~x~0 4294967296))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296) v_it_4 1) main_~x~0)))))))} is UNKNOWN [2022-04-14 19:44:14,748 INFO L290 TraceCheckUtils]: 8: Hoare triple {1549#(forall ((aux_div_v_main_~x~0_41_31 Int) (aux_div_v_main_~x~0_40_31 Int) (aux_mod_v_main_~x~0_40_31 Int)) (or (< (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) (* aux_div_v_main_~x~0_41_31 4294967296)) (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (<= 4294967296 aux_mod_v_main_~x~0_40_31) (< aux_mod_v_main_~x~0_40_31 0) (and (not (= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)) (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296) v_it_4 1) main_~x~0) (<= 1 v_it_4))) (not (< 0 (mod main_~x~0 4294967296))) (not (< (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)))) (< (* aux_div_v_main_~x~0_41_31 4294967296) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1542#(forall ((aux_div_v_main_~x~0_41_31 Int) (aux_mod_v_main_~x~0_41_31 Int) (aux_mod_v_main_~x~0_40_31 Int)) (or (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (< aux_mod_v_main_~x~0_41_31 0) (<= 4294967296 aux_mod_v_main_~x~0_40_31) (< aux_mod_v_main_~x~0_40_31 0) (< 0 aux_mod_v_main_~x~0_41_31) (and (or (forall ((aux_div_v_main_~x~0_40_31 Int)) (or (not (< (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296) v_it_5 1) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_40_31 Int)) (not (= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))))))) (and (not (= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) main_~x~0)) (or (not (< (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) main_~x~0)) (not (< 0 (mod main_~x~0 4294967296))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296) v_it_4 1) main_~x~0)))))))} is VALID [2022-04-14 19:44:14,765 INFO L290 TraceCheckUtils]: 7: Hoare triple {1549#(forall ((aux_div_v_main_~x~0_41_31 Int) (aux_div_v_main_~x~0_40_31 Int) (aux_mod_v_main_~x~0_40_31 Int)) (or (< (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) (* aux_div_v_main_~x~0_41_31 4294967296)) (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (<= 4294967296 aux_mod_v_main_~x~0_40_31) (< aux_mod_v_main_~x~0_40_31 0) (and (not (= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)) (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296) v_it_4 1) main_~x~0) (<= 1 v_it_4))) (not (< 0 (mod main_~x~0 4294967296))) (not (< (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)))) (< (* aux_div_v_main_~x~0_41_31 4294967296) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1549#(forall ((aux_div_v_main_~x~0_41_31 Int) (aux_div_v_main_~x~0_40_31 Int) (aux_mod_v_main_~x~0_40_31 Int)) (or (< (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) (* aux_div_v_main_~x~0_41_31 4294967296)) (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (<= 4294967296 aux_mod_v_main_~x~0_40_31) (< aux_mod_v_main_~x~0_40_31 0) (and (not (= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)) (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296) v_it_4 1) main_~x~0) (<= 1 v_it_4))) (not (< 0 (mod main_~x~0 4294967296))) (not (< (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)))) (< (* aux_div_v_main_~x~0_41_31 4294967296) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))))} is VALID [2022-04-14 19:44:14,768 INFO L290 TraceCheckUtils]: 6: Hoare triple {1556#(or (<= (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ 2 (div (+ (- 1) main_~x~0) 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1549#(forall ((aux_div_v_main_~x~0_41_31 Int) (aux_div_v_main_~x~0_40_31 Int) (aux_mod_v_main_~x~0_40_31 Int)) (or (< (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) (* aux_div_v_main_~x~0_41_31 4294967296)) (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (<= 4294967296 aux_mod_v_main_~x~0_40_31) (< aux_mod_v_main_~x~0_40_31 0) (and (not (= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)) (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296) v_it_4 1) main_~x~0) (<= 1 v_it_4))) (not (< 0 (mod main_~x~0 4294967296))) (not (< (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)))) (< (* aux_div_v_main_~x~0_41_31 4294967296) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))))} is VALID [2022-04-14 19:44:14,769 INFO L290 TraceCheckUtils]: 5: Hoare triple {1449#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1556#(or (<= (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ 2 (div (+ (- 1) main_~x~0) 4294967296))))} is VALID [2022-04-14 19:44:14,769 INFO L272 TraceCheckUtils]: 4: Hoare triple {1449#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1449#true} is VALID [2022-04-14 19:44:14,769 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1449#true} {1449#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1449#true} is VALID [2022-04-14 19:44:14,769 INFO L290 TraceCheckUtils]: 2: Hoare triple {1449#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1449#true} is VALID [2022-04-14 19:44:14,770 INFO L290 TraceCheckUtils]: 1: Hoare triple {1449#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1449#true} is VALID [2022-04-14 19:44:14,770 INFO L272 TraceCheckUtils]: 0: Hoare triple {1449#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1449#true} is VALID [2022-04-14 19:44:14,770 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:44:14,770 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1728188651] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:44:14,770 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:44:14,770 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 7, 10] total 18 [2022-04-14 19:44:14,770 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [410639705] [2022-04-14 19:44:14,770 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:44:14,771 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 15 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:44:14,771 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:44:14,771 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 15 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:44:22,949 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 33 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2022-04-14 19:44:22,950 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-14 19:44:22,950 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:44:22,950 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-14 19:44:22,950 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=233, Unknown=9, NotChecked=0, Total=306 [2022-04-14 19:44:22,951 INFO L87 Difference]: Start difference. First operand 32 states and 47 transitions. Second operand has 18 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 15 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:44:23,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:44:23,669 INFO L93 Difference]: Finished difference Result 44 states and 66 transitions. [2022-04-14 19:44:23,669 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-14 19:44:23,669 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 15 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:44:23,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:44:23,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 15 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:44:23,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 45 transitions. [2022-04-14 19:44:23,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 15 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:44:23,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 45 transitions. [2022-04-14 19:44:23,673 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 45 transitions. [2022-04-14 19:44:23,714 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:44:23,715 INFO L225 Difference]: With dead ends: 44 [2022-04-14 19:44:23,715 INFO L226 Difference]: Without dead ends: 41 [2022-04-14 19:44:23,715 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 24 SyntacticMatches, 7 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 127 ImplicationChecksByTransitivity, 21.1s TimeCoverageRelationStatistics Valid=110, Invalid=387, Unknown=9, NotChecked=0, Total=506 [2022-04-14 19:44:23,716 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 37 mSDsluCounter, 46 mSDsCounter, 0 mSdLazyCounter, 57 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 61 SdHoareTripleChecker+Invalid, 127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 57 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 56 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:44:23,716 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [37 Valid, 61 Invalid, 127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 57 Invalid, 0 Unknown, 56 Unchecked, 0.1s Time] [2022-04-14 19:44:23,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2022-04-14 19:44:23,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 34. [2022-04-14 19:44:23,719 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:44:23,719 INFO L82 GeneralOperation]: Start isEquivalent. First operand 41 states. Second operand has 34 states, 29 states have (on average 1.5862068965517242) internal successors, (46), 29 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:44:23,719 INFO L74 IsIncluded]: Start isIncluded. First operand 41 states. Second operand has 34 states, 29 states have (on average 1.5862068965517242) internal successors, (46), 29 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:44:23,719 INFO L87 Difference]: Start difference. First operand 41 states. Second operand has 34 states, 29 states have (on average 1.5862068965517242) internal successors, (46), 29 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:44:23,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:44:23,721 INFO L93 Difference]: Finished difference Result 41 states and 63 transitions. [2022-04-14 19:44:23,721 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 63 transitions. [2022-04-14 19:44:23,721 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:44:23,721 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:44:23,721 INFO L74 IsIncluded]: Start isIncluded. First operand has 34 states, 29 states have (on average 1.5862068965517242) internal successors, (46), 29 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 41 states. [2022-04-14 19:44:23,722 INFO L87 Difference]: Start difference. First operand has 34 states, 29 states have (on average 1.5862068965517242) internal successors, (46), 29 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 41 states. [2022-04-14 19:44:23,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:44:23,723 INFO L93 Difference]: Finished difference Result 41 states and 63 transitions. [2022-04-14 19:44:23,723 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 63 transitions. [2022-04-14 19:44:23,723 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:44:23,724 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:44:23,724 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:44:23,724 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:44:23,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 29 states have (on average 1.5862068965517242) internal successors, (46), 29 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:44:23,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 50 transitions. [2022-04-14 19:44:23,725 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 50 transitions. Word has length 18 [2022-04-14 19:44:23,725 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:44:23,725 INFO L478 AbstractCegarLoop]: Abstraction has 34 states and 50 transitions. [2022-04-14 19:44:23,725 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 15 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:44:23,726 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 50 transitions. [2022-04-14 19:44:23,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-14 19:44:23,726 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:44:23,726 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:44:23,747 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-14 19:44:23,939 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:44:23,940 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:44:23,940 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:44:23,940 INFO L85 PathProgramCache]: Analyzing trace with hash 571694412, now seen corresponding path program 1 times [2022-04-14 19:44:23,940 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:44:23,940 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1291088765] [2022-04-14 19:44:23,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:44:23,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:44:23,954 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:44:23,956 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-04-14 19:44:23,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:44:23,973 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:44:23,984 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-04-14 19:44:24,135 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:44:24,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:44:24,141 INFO L290 TraceCheckUtils]: 0: Hoare triple {1759#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1748#true} is VALID [2022-04-14 19:44:24,141 INFO L290 TraceCheckUtils]: 1: Hoare triple {1748#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1748#true} is VALID [2022-04-14 19:44:24,141 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1748#true} {1748#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1748#true} is VALID [2022-04-14 19:44:24,142 INFO L272 TraceCheckUtils]: 0: Hoare triple {1748#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1759#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:44:24,142 INFO L290 TraceCheckUtils]: 1: Hoare triple {1759#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1748#true} is VALID [2022-04-14 19:44:24,142 INFO L290 TraceCheckUtils]: 2: Hoare triple {1748#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1748#true} is VALID [2022-04-14 19:44:24,142 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1748#true} {1748#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1748#true} is VALID [2022-04-14 19:44:24,142 INFO L272 TraceCheckUtils]: 4: Hoare triple {1748#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1748#true} is VALID [2022-04-14 19:44:24,143 INFO L290 TraceCheckUtils]: 5: Hoare triple {1748#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1753#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-14 19:44:24,143 INFO L290 TraceCheckUtils]: 6: Hoare triple {1753#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1753#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-14 19:44:24,144 INFO L290 TraceCheckUtils]: 7: Hoare triple {1753#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1754#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-14 19:44:24,144 INFO L290 TraceCheckUtils]: 8: Hoare triple {1754#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (= main_~y~0 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1754#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-14 19:44:24,145 INFO L290 TraceCheckUtils]: 9: Hoare triple {1754#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (= main_~y~0 0))} [101] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1755#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} is VALID [2022-04-14 19:44:24,146 INFO L290 TraceCheckUtils]: 10: Hoare triple {1755#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1755#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} is VALID [2022-04-14 19:44:24,146 INFO L290 TraceCheckUtils]: 11: Hoare triple {1755#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1755#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} is VALID [2022-04-14 19:44:24,149 INFO L290 TraceCheckUtils]: 12: Hoare triple {1755#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1756#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:44:24,150 INFO L290 TraceCheckUtils]: 13: Hoare triple {1756#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1756#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:44:24,152 INFO L272 TraceCheckUtils]: 14: Hoare triple {1756#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1757#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:44:24,152 INFO L290 TraceCheckUtils]: 15: Hoare triple {1757#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1758#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:44:24,153 INFO L290 TraceCheckUtils]: 16: Hoare triple {1758#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1749#false} is VALID [2022-04-14 19:44:24,153 INFO L290 TraceCheckUtils]: 17: Hoare triple {1749#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1749#false} is VALID [2022-04-14 19:44:24,153 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:44:24,153 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:44:24,153 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1291088765] [2022-04-14 19:44:24,153 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1291088765] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:44:24,153 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1729280025] [2022-04-14 19:44:24,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:44:24,154 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:44:24,154 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:44:24,156 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:44:24,183 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-14 19:44:24,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:44:24,200 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-14 19:44:24,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:44:24,216 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:44:24,557 INFO L272 TraceCheckUtils]: 0: Hoare triple {1748#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1748#true} is VALID [2022-04-14 19:44:24,557 INFO L290 TraceCheckUtils]: 1: Hoare triple {1748#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1748#true} is VALID [2022-04-14 19:44:24,557 INFO L290 TraceCheckUtils]: 2: Hoare triple {1748#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1748#true} is VALID [2022-04-14 19:44:24,557 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1748#true} {1748#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1748#true} is VALID [2022-04-14 19:44:24,557 INFO L272 TraceCheckUtils]: 4: Hoare triple {1748#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1748#true} is VALID [2022-04-14 19:44:24,558 INFO L290 TraceCheckUtils]: 5: Hoare triple {1748#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1753#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-14 19:44:24,558 INFO L290 TraceCheckUtils]: 6: Hoare triple {1753#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1753#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-14 19:44:24,558 INFO L290 TraceCheckUtils]: 7: Hoare triple {1753#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1754#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-14 19:44:24,559 INFO L290 TraceCheckUtils]: 8: Hoare triple {1754#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (= main_~y~0 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1754#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-14 19:44:24,560 INFO L290 TraceCheckUtils]: 9: Hoare triple {1754#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (= main_~y~0 0))} [101] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1755#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} is VALID [2022-04-14 19:44:24,560 INFO L290 TraceCheckUtils]: 10: Hoare triple {1755#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1755#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} is VALID [2022-04-14 19:44:24,560 INFO L290 TraceCheckUtils]: 11: Hoare triple {1755#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1755#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} is VALID [2022-04-14 19:44:24,562 INFO L290 TraceCheckUtils]: 12: Hoare triple {1755#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1799#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:44:24,562 INFO L290 TraceCheckUtils]: 13: Hoare triple {1799#(= main_~n~0 main_~x~0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1799#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:44:24,563 INFO L272 TraceCheckUtils]: 14: Hoare triple {1799#(= main_~n~0 main_~x~0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1806#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:44:24,563 INFO L290 TraceCheckUtils]: 15: Hoare triple {1806#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1810#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:44:24,564 INFO L290 TraceCheckUtils]: 16: Hoare triple {1810#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1749#false} is VALID [2022-04-14 19:44:24,564 INFO L290 TraceCheckUtils]: 17: Hoare triple {1749#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1749#false} is VALID [2022-04-14 19:44:24,564 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:44:24,564 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:44:41,597 WARN L833 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (> 0 aux_mod_v_main_~x~0_44_31) (= aux_mod_v_main_~x~0_44_31 (mod c_main_~n~0 4294967296)) (and (forall ((aux_mod_v_main_~z~0_39_31 Int) (aux_div_v_main_~x~0_44_31 Int)) (or (exists ((v_it_5 Int)) (and (<= (+ v_it_5 c_main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~z~0_39_31 (* v_it_5 4294967295)) 4294967296))))) (<= aux_mod_v_main_~z~0_39_31 0) (<= 4294967296 aux_mod_v_main_~z~0_39_31) (<= (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)) c_main_~x~0) (let ((.cse0 (< 0 (mod c_main_~y~0 4294967296)))) (and (or (not .cse0) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (exists ((v_it_3 Int)) (and (<= (+ v_it_3 c_main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= 1 v_it_3))) (not (< c_main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)))))) (or .cse0 (forall ((aux_div_v_main_~z~0_39_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31) c_main_~z~0)))))))) (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)) c_main_~x~0))) (forall ((aux_mod_v_main_~z~0_39_31 Int)) (or (< aux_mod_v_main_~z~0_39_31 0) (< 0 aux_mod_v_main_~z~0_39_31) (let ((.cse1 (< 0 (mod c_main_~y~0 4294967296)))) (and (or (not .cse1) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (exists ((v_it_3 Int)) (and (<= (+ v_it_3 c_main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= 1 v_it_3))) (not (< c_main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)))))) (or .cse1 (forall ((aux_div_v_main_~z~0_39_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31) c_main_~z~0)))))))))))) is different from false [2022-04-14 19:45:12,657 INFO L290 TraceCheckUtils]: 17: Hoare triple {1749#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1749#false} is VALID [2022-04-14 19:45:12,658 INFO L290 TraceCheckUtils]: 16: Hoare triple {1810#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1749#false} is VALID [2022-04-14 19:45:12,658 INFO L290 TraceCheckUtils]: 15: Hoare triple {1806#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1810#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:45:12,659 INFO L272 TraceCheckUtils]: 14: Hoare triple {1826#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1806#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:45:12,659 INFO L290 TraceCheckUtils]: 13: Hoare triple {1826#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1826#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-14 19:45:14,668 WARN L290 TraceCheckUtils]: 12: Hoare triple {1833#(forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (or (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))))) (> 0 aux_mod_v_main_~x~0_44_31) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1826#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is UNKNOWN [2022-04-14 19:45:16,685 WARN L290 TraceCheckUtils]: 11: Hoare triple {1833#(forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (or (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))))) (> 0 aux_mod_v_main_~x~0_44_31) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1833#(forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (or (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))))) (> 0 aux_mod_v_main_~x~0_44_31) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296))))} is UNKNOWN [2022-04-14 19:45:18,697 WARN L290 TraceCheckUtils]: 10: Hoare triple {1833#(forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (or (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))))) (> 0 aux_mod_v_main_~x~0_44_31) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1833#(forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (or (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))))) (> 0 aux_mod_v_main_~x~0_44_31) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296))))} is UNKNOWN [2022-04-14 19:45:20,714 WARN L290 TraceCheckUtils]: 9: Hoare triple {1843#(forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (> 0 aux_mod_v_main_~x~0_44_31) (and (forall ((aux_mod_v_main_~z~0_39_31 Int) (aux_div_v_main_~x~0_44_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_39_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~z~0_39_31 (* v_it_5 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)) main_~x~0) (<= aux_mod_v_main_~z~0_39_31 0) (<= 4294967296 aux_mod_v_main_~z~0_39_31))) (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))) (forall ((aux_mod_v_main_~z~0_39_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_39_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (< aux_mod_v_main_~z~0_39_31 0) (< 0 aux_mod_v_main_~z~0_39_31))))) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296))))} [101] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1833#(forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (or (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))))) (> 0 aux_mod_v_main_~x~0_44_31) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296))))} is UNKNOWN [2022-04-14 19:45:22,727 WARN L290 TraceCheckUtils]: 8: Hoare triple {1847#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (> 0 aux_mod_v_main_~x~0_44_31) (and (forall ((aux_mod_v_main_~z~0_39_31 Int) (aux_div_v_main_~x~0_44_31 Int)) (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~z~0_39_31 (* v_it_5 4294967295)) 4294967296))))) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))))) (<= (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)) main_~x~0) (<= aux_mod_v_main_~z~0_39_31 0) (<= 4294967296 aux_mod_v_main_~z~0_39_31))) (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))) (forall ((aux_mod_v_main_~z~0_39_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_39_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (< aux_mod_v_main_~z~0_39_31 0) (< 0 aux_mod_v_main_~z~0_39_31))))) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296)))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1843#(forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (> 0 aux_mod_v_main_~x~0_44_31) (and (forall ((aux_mod_v_main_~z~0_39_31 Int) (aux_div_v_main_~x~0_44_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_39_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~z~0_39_31 (* v_it_5 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)) main_~x~0) (<= aux_mod_v_main_~z~0_39_31 0) (<= 4294967296 aux_mod_v_main_~z~0_39_31))) (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))) (forall ((aux_mod_v_main_~z~0_39_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_39_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (< aux_mod_v_main_~z~0_39_31 0) (< 0 aux_mod_v_main_~z~0_39_31))))) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296))))} is UNKNOWN [2022-04-14 19:45:22,731 INFO L290 TraceCheckUtils]: 7: Hoare triple {1851#(or (and (<= (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (<= (div (+ (- 1) main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) (div (+ main_~x~0 (- 4294967296)) 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1847#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (> 0 aux_mod_v_main_~x~0_44_31) (and (forall ((aux_mod_v_main_~z~0_39_31 Int) (aux_div_v_main_~x~0_44_31 Int)) (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~z~0_39_31 (* v_it_5 4294967295)) 4294967296))))) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))))) (<= (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)) main_~x~0) (<= aux_mod_v_main_~z~0_39_31 0) (<= 4294967296 aux_mod_v_main_~z~0_39_31))) (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))) (forall ((aux_mod_v_main_~z~0_39_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_39_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (< aux_mod_v_main_~z~0_39_31 0) (< 0 aux_mod_v_main_~z~0_39_31))))) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296)))))} is VALID [2022-04-14 19:45:22,732 INFO L290 TraceCheckUtils]: 6: Hoare triple {1851#(or (and (<= (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (<= (div (+ (- 1) main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) (div (+ main_~x~0 (- 4294967296)) 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1851#(or (and (<= (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (<= (div (+ (- 1) main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) (div (+ main_~x~0 (- 4294967296)) 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:45:22,734 INFO L290 TraceCheckUtils]: 5: Hoare triple {1748#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1851#(or (and (<= (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (<= (div (+ (- 1) main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) (div (+ main_~x~0 (- 4294967296)) 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:45:22,734 INFO L272 TraceCheckUtils]: 4: Hoare triple {1748#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1748#true} is VALID [2022-04-14 19:45:22,735 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1748#true} {1748#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1748#true} is VALID [2022-04-14 19:45:22,735 INFO L290 TraceCheckUtils]: 2: Hoare triple {1748#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1748#true} is VALID [2022-04-14 19:45:22,735 INFO L290 TraceCheckUtils]: 1: Hoare triple {1748#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1748#true} is VALID [2022-04-14 19:45:22,735 INFO L272 TraceCheckUtils]: 0: Hoare triple {1748#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1748#true} is VALID [2022-04-14 19:45:22,735 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 1 not checked. [2022-04-14 19:45:22,735 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1729280025] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:45:22,735 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:45:22,735 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 9] total 17 [2022-04-14 19:45:22,735 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1164977817] [2022-04-14 19:45:22,736 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:45:22,736 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:45:22,736 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:45:22,737 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:45:31,192 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 31 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2022-04-14 19:45:31,192 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-14 19:45:31,192 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:45:31,193 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-14 19:45:31,193 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=174, Unknown=13, NotChecked=28, Total=272 [2022-04-14 19:45:31,193 INFO L87 Difference]: Start difference. First operand 34 states and 50 transitions. Second operand has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:45:42,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:45:42,216 INFO L93 Difference]: Finished difference Result 46 states and 69 transitions. [2022-04-14 19:45:42,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-14 19:45:42,216 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:45:42,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:45:42,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:45:42,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 45 transitions. [2022-04-14 19:45:42,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:45:42,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 45 transitions. [2022-04-14 19:45:42,219 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 45 transitions. [2022-04-14 19:45:42,266 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:45:42,267 INFO L225 Difference]: With dead ends: 46 [2022-04-14 19:45:42,267 INFO L226 Difference]: Without dead ends: 43 [2022-04-14 19:45:42,268 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 29 SyntacticMatches, 4 SemanticMatches, 21 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 40.0s TimeCoverageRelationStatistics Valid=112, Invalid=338, Unknown=16, NotChecked=40, Total=506 [2022-04-14 19:45:42,268 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 40 mSDsluCounter, 46 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 58 SdHoareTripleChecker+Invalid, 140 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 60 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:45:42,269 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [40 Valid, 58 Invalid, 140 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 68 Invalid, 0 Unknown, 60 Unchecked, 0.1s Time] [2022-04-14 19:45:42,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2022-04-14 19:45:42,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 36. [2022-04-14 19:45:42,271 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:45:42,272 INFO L82 GeneralOperation]: Start isEquivalent. First operand 43 states. Second operand has 36 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:45:42,272 INFO L74 IsIncluded]: Start isIncluded. First operand 43 states. Second operand has 36 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:45:42,272 INFO L87 Difference]: Start difference. First operand 43 states. Second operand has 36 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:45:42,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:45:42,274 INFO L93 Difference]: Finished difference Result 43 states and 66 transitions. [2022-04-14 19:45:42,274 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 66 transitions. [2022-04-14 19:45:42,274 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:45:42,274 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:45:42,274 INFO L74 IsIncluded]: Start isIncluded. First operand has 36 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 43 states. [2022-04-14 19:45:42,274 INFO L87 Difference]: Start difference. First operand has 36 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 43 states. [2022-04-14 19:45:42,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:45:42,276 INFO L93 Difference]: Finished difference Result 43 states and 66 transitions. [2022-04-14 19:45:42,276 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 66 transitions. [2022-04-14 19:45:42,276 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:45:42,277 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:45:42,277 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:45:42,277 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:45:42,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:45:42,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 54 transitions. [2022-04-14 19:45:42,278 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 54 transitions. Word has length 18 [2022-04-14 19:45:42,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:45:42,278 INFO L478 AbstractCegarLoop]: Abstraction has 36 states and 54 transitions. [2022-04-14 19:45:42,278 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:45:42,279 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 54 transitions. [2022-04-14 19:45:42,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-14 19:45:42,279 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:45:42,279 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:45:42,306 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-14 19:45:42,495 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:45:42,495 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:45:42,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:45:42,496 INFO L85 PathProgramCache]: Analyzing trace with hash -984935833, now seen corresponding path program 1 times [2022-04-14 19:45:42,496 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:45:42,496 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [145554726] [2022-04-14 19:45:42,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:45:42,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:45:42,508 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:45:42,510 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-14 19:45:42,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:45:42,532 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.2))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:45:42,536 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-14 19:45:42,699 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:45:42,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:45:42,706 INFO L290 TraceCheckUtils]: 0: Hoare triple {2071#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2058#true} is VALID [2022-04-14 19:45:42,706 INFO L290 TraceCheckUtils]: 1: Hoare triple {2058#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2058#true} is VALID [2022-04-14 19:45:42,707 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2058#true} {2058#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2058#true} is VALID [2022-04-14 19:45:42,707 INFO L272 TraceCheckUtils]: 0: Hoare triple {2058#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2071#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:45:42,707 INFO L290 TraceCheckUtils]: 1: Hoare triple {2071#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2058#true} is VALID [2022-04-14 19:45:42,708 INFO L290 TraceCheckUtils]: 2: Hoare triple {2058#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2058#true} is VALID [2022-04-14 19:45:42,708 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2058#true} {2058#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2058#true} is VALID [2022-04-14 19:45:42,708 INFO L272 TraceCheckUtils]: 4: Hoare triple {2058#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2058#true} is VALID [2022-04-14 19:45:42,708 INFO L290 TraceCheckUtils]: 5: Hoare triple {2058#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2063#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-14 19:45:42,709 INFO L290 TraceCheckUtils]: 6: Hoare triple {2063#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2064#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:45:42,710 INFO L290 TraceCheckUtils]: 7: Hoare triple {2064#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2064#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:45:42,711 INFO L290 TraceCheckUtils]: 8: Hoare triple {2064#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2065#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:45:42,711 INFO L290 TraceCheckUtils]: 9: Hoare triple {2065#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2066#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:45:42,712 INFO L290 TraceCheckUtils]: 10: Hoare triple {2066#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2066#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:45:42,713 INFO L290 TraceCheckUtils]: 11: Hoare triple {2066#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2067#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:45:42,715 INFO L290 TraceCheckUtils]: 12: Hoare triple {2067#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2068#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:45:42,716 INFO L290 TraceCheckUtils]: 13: Hoare triple {2068#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2068#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:45:42,717 INFO L272 TraceCheckUtils]: 14: Hoare triple {2068#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2069#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:45:42,718 INFO L290 TraceCheckUtils]: 15: Hoare triple {2069#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2070#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:45:42,718 INFO L290 TraceCheckUtils]: 16: Hoare triple {2070#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2059#false} is VALID [2022-04-14 19:45:42,718 INFO L290 TraceCheckUtils]: 17: Hoare triple {2059#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2059#false} is VALID [2022-04-14 19:45:42,718 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:45:42,718 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:45:42,719 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [145554726] [2022-04-14 19:45:42,719 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [145554726] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:45:42,719 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [882712075] [2022-04-14 19:45:42,719 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:45:42,719 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:45:42,719 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:45:42,720 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:45:42,720 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-14 19:45:42,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:45:42,751 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-14 19:45:42,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:45:42,761 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:45:44,551 INFO L272 TraceCheckUtils]: 0: Hoare triple {2058#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2058#true} is VALID [2022-04-14 19:45:44,551 INFO L290 TraceCheckUtils]: 1: Hoare triple {2058#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2058#true} is VALID [2022-04-14 19:45:44,551 INFO L290 TraceCheckUtils]: 2: Hoare triple {2058#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2058#true} is VALID [2022-04-14 19:45:44,551 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2058#true} {2058#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2058#true} is VALID [2022-04-14 19:45:44,552 INFO L272 TraceCheckUtils]: 4: Hoare triple {2058#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2058#true} is VALID [2022-04-14 19:45:44,552 INFO L290 TraceCheckUtils]: 5: Hoare triple {2058#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2063#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-14 19:45:44,553 INFO L290 TraceCheckUtils]: 6: Hoare triple {2063#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2065#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:45:44,553 INFO L290 TraceCheckUtils]: 7: Hoare triple {2065#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2065#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:45:44,553 INFO L290 TraceCheckUtils]: 8: Hoare triple {2065#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [98] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2065#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:45:44,554 INFO L290 TraceCheckUtils]: 9: Hoare triple {2065#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2066#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:45:44,554 INFO L290 TraceCheckUtils]: 10: Hoare triple {2066#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2066#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:45:44,555 INFO L290 TraceCheckUtils]: 11: Hoare triple {2066#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2067#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:45:44,561 INFO L290 TraceCheckUtils]: 12: Hoare triple {2067#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2111#(and (<= (div (- main_~x~0) (- 4294967296)) (div main_~x~0 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:45:44,562 INFO L290 TraceCheckUtils]: 13: Hoare triple {2111#(and (<= (div (- main_~x~0) (- 4294967296)) (div main_~x~0 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2111#(and (<= (div (- main_~x~0) (- 4294967296)) (div main_~x~0 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:45:44,563 INFO L272 TraceCheckUtils]: 14: Hoare triple {2111#(and (<= (div (- main_~x~0) (- 4294967296)) (div main_~x~0 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2118#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:45:44,563 INFO L290 TraceCheckUtils]: 15: Hoare triple {2118#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2122#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:45:44,564 INFO L290 TraceCheckUtils]: 16: Hoare triple {2122#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2059#false} is VALID [2022-04-14 19:45:44,564 INFO L290 TraceCheckUtils]: 17: Hoare triple {2059#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2059#false} is VALID [2022-04-14 19:45:44,564 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:45:44,564 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:46:06,059 INFO L290 TraceCheckUtils]: 17: Hoare triple {2059#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2059#false} is VALID [2022-04-14 19:46:06,060 INFO L290 TraceCheckUtils]: 16: Hoare triple {2122#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2059#false} is VALID [2022-04-14 19:46:06,060 INFO L290 TraceCheckUtils]: 15: Hoare triple {2118#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2122#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:46:06,061 INFO L272 TraceCheckUtils]: 14: Hoare triple {2068#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2118#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:46:06,062 INFO L290 TraceCheckUtils]: 13: Hoare triple {2068#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2068#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:46:08,070 WARN L290 TraceCheckUtils]: 12: Hoare triple {2144#(and (or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296))) (or (and (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int)) (or (<= (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (>= aux_mod_v_main_~x~0_47_31 4294967296) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))))))) (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int)) (or (> 0 aux_mod_v_main_~x~0_47_31) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))))) (< main_~n~0 (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296) 1))))) (not (< 0 (mod main_~z~0 4294967296)))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2068#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is UNKNOWN [2022-04-14 19:46:10,123 WARN L290 TraceCheckUtils]: 11: Hoare triple {2148#(forall ((aux_mod_main_~x~0_26 Int)) (or (< aux_mod_main_~x~0_26 0) (and (or (forall ((aux_div_main_~x~0_26 Int)) (< (+ main_~n~0 (* (div (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) 4294967296) 4294967296)) (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26) (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296))) (or (and (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int) (aux_div_main_~x~0_26 Int)) (or (not (< (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (< aux_mod_v_main_~x~0_47_31 0) (< main_~n~0 (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_main_~x~0_26 v_it_5 (* 4294967296 aux_div_main_~x~0_26) 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))))) (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int) (aux_div_main_~x~0_26 Int)) (or (<= (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (not (< (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (<= 4294967296 aux_mod_v_main_~x~0_47_31) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_main_~x~0_26 v_it_5 (* 4294967296 aux_div_main_~x~0_26) 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5)))))) (not (< 0 (mod main_~z~0 4294967296))))) (< 0 aux_mod_main_~x~0_26)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2144#(and (or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296))) (or (and (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int)) (or (<= (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (>= aux_mod_v_main_~x~0_47_31 4294967296) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))))))) (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int)) (or (> 0 aux_mod_v_main_~x~0_47_31) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))))) (< main_~n~0 (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296) 1))))) (not (< 0 (mod main_~z~0 4294967296)))))} is UNKNOWN [2022-04-14 19:46:12,174 WARN L290 TraceCheckUtils]: 10: Hoare triple {2148#(forall ((aux_mod_main_~x~0_26 Int)) (or (< aux_mod_main_~x~0_26 0) (and (or (forall ((aux_div_main_~x~0_26 Int)) (< (+ main_~n~0 (* (div (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) 4294967296) 4294967296)) (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26) (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296))) (or (and (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int) (aux_div_main_~x~0_26 Int)) (or (not (< (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (< aux_mod_v_main_~x~0_47_31 0) (< main_~n~0 (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_main_~x~0_26 v_it_5 (* 4294967296 aux_div_main_~x~0_26) 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))))) (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int) (aux_div_main_~x~0_26 Int)) (or (<= (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (not (< (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (<= 4294967296 aux_mod_v_main_~x~0_47_31) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_main_~x~0_26 v_it_5 (* 4294967296 aux_div_main_~x~0_26) 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5)))))) (not (< 0 (mod main_~z~0 4294967296))))) (< 0 aux_mod_main_~x~0_26)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2148#(forall ((aux_mod_main_~x~0_26 Int)) (or (< aux_mod_main_~x~0_26 0) (and (or (forall ((aux_div_main_~x~0_26 Int)) (< (+ main_~n~0 (* (div (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) 4294967296) 4294967296)) (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26) (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296))) (or (and (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int) (aux_div_main_~x~0_26 Int)) (or (not (< (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (< aux_mod_v_main_~x~0_47_31 0) (< main_~n~0 (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_main_~x~0_26 v_it_5 (* 4294967296 aux_div_main_~x~0_26) 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))))) (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int) (aux_div_main_~x~0_26 Int)) (or (<= (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (not (< (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (<= 4294967296 aux_mod_v_main_~x~0_47_31) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_main_~x~0_26 v_it_5 (* 4294967296 aux_div_main_~x~0_26) 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5)))))) (not (< 0 (mod main_~z~0 4294967296))))) (< 0 aux_mod_main_~x~0_26)))} is UNKNOWN [2022-04-14 19:46:12,178 INFO L290 TraceCheckUtils]: 9: Hoare triple {2065#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2148#(forall ((aux_mod_main_~x~0_26 Int)) (or (< aux_mod_main_~x~0_26 0) (and (or (forall ((aux_div_main_~x~0_26 Int)) (< (+ main_~n~0 (* (div (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) 4294967296) 4294967296)) (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26) (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296))) (or (and (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int) (aux_div_main_~x~0_26 Int)) (or (not (< (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (< aux_mod_v_main_~x~0_47_31 0) (< main_~n~0 (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_main_~x~0_26 v_it_5 (* 4294967296 aux_div_main_~x~0_26) 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))))) (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int) (aux_div_main_~x~0_26 Int)) (or (<= (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (not (< (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (<= 4294967296 aux_mod_v_main_~x~0_47_31) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_main_~x~0_26 v_it_5 (* 4294967296 aux_div_main_~x~0_26) 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5)))))) (not (< 0 (mod main_~z~0 4294967296))))) (< 0 aux_mod_main_~x~0_26)))} is VALID [2022-04-14 19:46:12,178 INFO L290 TraceCheckUtils]: 8: Hoare triple {2065#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [98] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2065#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:46:12,179 INFO L290 TraceCheckUtils]: 7: Hoare triple {2065#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2065#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:46:12,179 INFO L290 TraceCheckUtils]: 6: Hoare triple {2164#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (< 0 (mod main_~x~0 4294967296)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2065#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:46:12,180 INFO L290 TraceCheckUtils]: 5: Hoare triple {2058#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2164#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-14 19:46:12,180 INFO L272 TraceCheckUtils]: 4: Hoare triple {2058#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2058#true} is VALID [2022-04-14 19:46:12,180 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2058#true} {2058#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2058#true} is VALID [2022-04-14 19:46:12,180 INFO L290 TraceCheckUtils]: 2: Hoare triple {2058#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2058#true} is VALID [2022-04-14 19:46:12,180 INFO L290 TraceCheckUtils]: 1: Hoare triple {2058#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2058#true} is VALID [2022-04-14 19:46:12,180 INFO L272 TraceCheckUtils]: 0: Hoare triple {2058#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2058#true} is VALID [2022-04-14 19:46:12,180 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:46:12,180 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [882712075] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:46:12,180 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:46:12,181 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 17 [2022-04-14 19:46:12,181 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1793355650] [2022-04-14 19:46:12,181 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:46:12,182 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:46:12,182 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:46:12,182 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:16,298 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 33 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-14 19:46:16,298 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-14 19:46:16,298 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:46:16,298 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-14 19:46:16,299 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=212, Unknown=5, NotChecked=0, Total=272 [2022-04-14 19:46:16,299 INFO L87 Difference]: Start difference. First operand 36 states and 54 transitions. Second operand has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:16,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:16,955 INFO L93 Difference]: Finished difference Result 47 states and 71 transitions. [2022-04-14 19:46:16,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-14 19:46:16,955 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:46:16,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:46:16,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:16,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 47 transitions. [2022-04-14 19:46:16,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:16,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 47 transitions. [2022-04-14 19:46:16,958 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 47 transitions. [2022-04-14 19:46:17,006 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:46:17,007 INFO L225 Difference]: With dead ends: 47 [2022-04-14 19:46:17,007 INFO L226 Difference]: Without dead ends: 44 [2022-04-14 19:46:17,007 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 26 SyntacticMatches, 7 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 156 ImplicationChecksByTransitivity, 14.4s TimeCoverageRelationStatistics Valid=130, Invalid=465, Unknown=5, NotChecked=0, Total=600 [2022-04-14 19:46:17,008 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 31 mSDsluCounter, 68 mSDsCounter, 0 mSdLazyCounter, 99 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 85 SdHoareTripleChecker+Invalid, 154 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 99 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 42 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-14 19:46:17,008 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [31 Valid, 85 Invalid, 154 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 99 Invalid, 0 Unknown, 42 Unchecked, 0.2s Time] [2022-04-14 19:46:17,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2022-04-14 19:46:17,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 38. [2022-04-14 19:46:17,010 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:46:17,010 INFO L82 GeneralOperation]: Start isEquivalent. First operand 44 states. Second operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:17,011 INFO L74 IsIncluded]: Start isIncluded. First operand 44 states. Second operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:17,011 INFO L87 Difference]: Start difference. First operand 44 states. Second operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:17,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:17,012 INFO L93 Difference]: Finished difference Result 44 states and 68 transitions. [2022-04-14 19:46:17,012 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 68 transitions. [2022-04-14 19:46:17,013 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:46:17,013 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:46:17,013 INFO L74 IsIncluded]: Start isIncluded. First operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 44 states. [2022-04-14 19:46:17,013 INFO L87 Difference]: Start difference. First operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 44 states. [2022-04-14 19:46:17,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:17,015 INFO L93 Difference]: Finished difference Result 44 states and 68 transitions. [2022-04-14 19:46:17,015 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 68 transitions. [2022-04-14 19:46:17,015 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:46:17,015 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:46:17,015 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:46:17,015 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:46:17,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:17,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 58 transitions. [2022-04-14 19:46:17,017 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 58 transitions. Word has length 18 [2022-04-14 19:46:17,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:46:17,017 INFO L478 AbstractCegarLoop]: Abstraction has 38 states and 58 transitions. [2022-04-14 19:46:17,017 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:17,017 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 58 transitions. [2022-04-14 19:46:17,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-14 19:46:17,017 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:46:17,017 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:46:17,039 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-14 19:46:17,231 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-14 19:46:17,232 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:46:17,232 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:46:17,232 INFO L85 PathProgramCache]: Analyzing trace with hash -211948756, now seen corresponding path program 1 times [2022-04-14 19:46:17,232 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:46:17,232 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [96327004] [2022-04-14 19:46:17,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:46:17,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:46:17,241 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:17,242 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-04-14 19:46:17,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:17,255 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.2))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:17,257 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-04-14 19:46:17,414 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:46:17,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:17,418 INFO L290 TraceCheckUtils]: 0: Hoare triple {2387#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2375#true} is VALID [2022-04-14 19:46:17,419 INFO L290 TraceCheckUtils]: 1: Hoare triple {2375#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2375#true} is VALID [2022-04-14 19:46:17,419 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2375#true} {2375#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2375#true} is VALID [2022-04-14 19:46:17,419 INFO L272 TraceCheckUtils]: 0: Hoare triple {2375#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2387#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:46:17,419 INFO L290 TraceCheckUtils]: 1: Hoare triple {2387#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2375#true} is VALID [2022-04-14 19:46:17,420 INFO L290 TraceCheckUtils]: 2: Hoare triple {2375#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2375#true} is VALID [2022-04-14 19:46:17,420 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2375#true} {2375#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2375#true} is VALID [2022-04-14 19:46:17,420 INFO L272 TraceCheckUtils]: 4: Hoare triple {2375#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2375#true} is VALID [2022-04-14 19:46:17,420 INFO L290 TraceCheckUtils]: 5: Hoare triple {2375#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2380#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-14 19:46:17,421 INFO L290 TraceCheckUtils]: 6: Hoare triple {2380#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2381#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:46:17,421 INFO L290 TraceCheckUtils]: 7: Hoare triple {2381#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2381#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:46:17,422 INFO L290 TraceCheckUtils]: 8: Hoare triple {2381#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2382#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:46:17,423 INFO L290 TraceCheckUtils]: 9: Hoare triple {2382#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2382#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:46:17,423 INFO L290 TraceCheckUtils]: 10: Hoare triple {2382#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2382#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:46:17,424 INFO L290 TraceCheckUtils]: 11: Hoare triple {2382#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2383#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-14 19:46:17,425 INFO L290 TraceCheckUtils]: 12: Hoare triple {2383#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2384#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:46:17,426 INFO L290 TraceCheckUtils]: 13: Hoare triple {2384#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2384#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:46:17,427 INFO L272 TraceCheckUtils]: 14: Hoare triple {2384#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2385#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:46:17,428 INFO L290 TraceCheckUtils]: 15: Hoare triple {2385#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2386#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:46:17,428 INFO L290 TraceCheckUtils]: 16: Hoare triple {2386#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2376#false} is VALID [2022-04-14 19:46:17,428 INFO L290 TraceCheckUtils]: 17: Hoare triple {2376#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2376#false} is VALID [2022-04-14 19:46:17,428 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:46:17,428 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:46:17,429 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [96327004] [2022-04-14 19:46:17,429 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [96327004] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:46:17,429 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [914079922] [2022-04-14 19:46:17,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:46:17,429 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:46:17,429 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:46:17,432 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:46:17,436 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-14 19:46:17,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:17,474 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-14 19:46:17,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:17,482 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:46:17,995 INFO L272 TraceCheckUtils]: 0: Hoare triple {2375#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2375#true} is VALID [2022-04-14 19:46:17,995 INFO L290 TraceCheckUtils]: 1: Hoare triple {2375#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2375#true} is VALID [2022-04-14 19:46:17,995 INFO L290 TraceCheckUtils]: 2: Hoare triple {2375#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2375#true} is VALID [2022-04-14 19:46:17,995 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2375#true} {2375#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2375#true} is VALID [2022-04-14 19:46:17,995 INFO L272 TraceCheckUtils]: 4: Hoare triple {2375#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2375#true} is VALID [2022-04-14 19:46:17,996 INFO L290 TraceCheckUtils]: 5: Hoare triple {2375#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2380#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-14 19:46:17,997 INFO L290 TraceCheckUtils]: 6: Hoare triple {2380#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2382#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:46:17,997 INFO L290 TraceCheckUtils]: 7: Hoare triple {2382#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2382#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:46:17,998 INFO L290 TraceCheckUtils]: 8: Hoare triple {2382#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [98] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2382#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:46:17,998 INFO L290 TraceCheckUtils]: 9: Hoare triple {2382#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2382#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:46:17,998 INFO L290 TraceCheckUtils]: 10: Hoare triple {2382#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2382#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:46:17,998 INFO L290 TraceCheckUtils]: 11: Hoare triple {2382#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2382#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:46:17,999 INFO L290 TraceCheckUtils]: 12: Hoare triple {2382#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2427#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:46:17,999 INFO L290 TraceCheckUtils]: 13: Hoare triple {2427#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (not (< 0 (mod main_~x~0 4294967296))))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2427#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:46:18,000 INFO L272 TraceCheckUtils]: 14: Hoare triple {2427#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (not (< 0 (mod main_~x~0 4294967296))))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2434#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:46:18,001 INFO L290 TraceCheckUtils]: 15: Hoare triple {2434#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2438#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:46:18,001 INFO L290 TraceCheckUtils]: 16: Hoare triple {2438#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2376#false} is VALID [2022-04-14 19:46:18,001 INFO L290 TraceCheckUtils]: 17: Hoare triple {2376#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2376#false} is VALID [2022-04-14 19:46:18,001 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-14 19:46:18,001 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-14 19:46:18,001 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [914079922] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:46:18,001 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-14 19:46:18,001 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 13 [2022-04-14 19:46:18,002 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [748183533] [2022-04-14 19:46:18,002 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:46:18,002 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:46:18,002 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:46:18,002 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:18,016 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:46:18,017 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-14 19:46:18,017 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:46:18,017 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-14 19:46:18,017 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=119, Unknown=0, NotChecked=0, Total=156 [2022-04-14 19:46:18,017 INFO L87 Difference]: Start difference. First operand 38 states and 58 transitions. Second operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:18,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:18,154 INFO L93 Difference]: Finished difference Result 48 states and 71 transitions. [2022-04-14 19:46:18,154 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-14 19:46:18,154 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:46:18,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:46:18,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:18,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 42 transitions. [2022-04-14 19:46:18,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:18,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 42 transitions. [2022-04-14 19:46:18,157 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 42 transitions. [2022-04-14 19:46:18,207 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:46:18,208 INFO L225 Difference]: With dead ends: 48 [2022-04-14 19:46:18,208 INFO L226 Difference]: Without dead ends: 45 [2022-04-14 19:46:18,208 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 15 SyntacticMatches, 3 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2022-04-14 19:46:18,209 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 14 mSDsluCounter, 65 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 80 SdHoareTripleChecker+Invalid, 29 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 4 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:46:18,209 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [14 Valid, 80 Invalid, 29 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 24 Invalid, 0 Unknown, 4 Unchecked, 0.0s Time] [2022-04-14 19:46:18,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2022-04-14 19:46:18,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 35. [2022-04-14 19:46:18,212 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:46:18,212 INFO L82 GeneralOperation]: Start isEquivalent. First operand 45 states. Second operand has 35 states, 30 states have (on average 1.6) internal successors, (48), 30 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:18,212 INFO L74 IsIncluded]: Start isIncluded. First operand 45 states. Second operand has 35 states, 30 states have (on average 1.6) internal successors, (48), 30 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:18,212 INFO L87 Difference]: Start difference. First operand 45 states. Second operand has 35 states, 30 states have (on average 1.6) internal successors, (48), 30 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:18,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:18,214 INFO L93 Difference]: Finished difference Result 45 states and 68 transitions. [2022-04-14 19:46:18,214 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 68 transitions. [2022-04-14 19:46:18,214 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:46:18,214 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:46:18,214 INFO L74 IsIncluded]: Start isIncluded. First operand has 35 states, 30 states have (on average 1.6) internal successors, (48), 30 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 45 states. [2022-04-14 19:46:18,214 INFO L87 Difference]: Start difference. First operand has 35 states, 30 states have (on average 1.6) internal successors, (48), 30 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 45 states. [2022-04-14 19:46:18,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:18,219 INFO L93 Difference]: Finished difference Result 45 states and 68 transitions. [2022-04-14 19:46:18,219 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 68 transitions. [2022-04-14 19:46:18,219 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:46:18,219 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:46:18,219 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:46:18,220 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:46:18,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 30 states have (on average 1.6) internal successors, (48), 30 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:18,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 52 transitions. [2022-04-14 19:46:18,229 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 52 transitions. Word has length 18 [2022-04-14 19:46:18,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:46:18,229 INFO L478 AbstractCegarLoop]: Abstraction has 35 states and 52 transitions. [2022-04-14 19:46:18,230 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:18,230 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 52 transitions. [2022-04-14 19:46:18,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-14 19:46:18,230 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:46:18,230 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:46:18,255 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-14 19:46:18,454 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:46:18,455 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:46:18,455 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:46:18,455 INFO L85 PathProgramCache]: Analyzing trace with hash -967377177, now seen corresponding path program 1 times [2022-04-14 19:46:18,455 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:46:18,455 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2065559066] [2022-04-14 19:46:18,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:46:18,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:46:18,467 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:18,469 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:18,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:18,487 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.3))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:18,497 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.4))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:18,762 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:46:18,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:18,766 INFO L290 TraceCheckUtils]: 0: Hoare triple {2633#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2620#true} is VALID [2022-04-14 19:46:18,767 INFO L290 TraceCheckUtils]: 1: Hoare triple {2620#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2620#true} is VALID [2022-04-14 19:46:18,767 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2620#true} {2620#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2620#true} is VALID [2022-04-14 19:46:18,767 INFO L272 TraceCheckUtils]: 0: Hoare triple {2620#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2633#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:46:18,767 INFO L290 TraceCheckUtils]: 1: Hoare triple {2633#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2620#true} is VALID [2022-04-14 19:46:18,767 INFO L290 TraceCheckUtils]: 2: Hoare triple {2620#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2620#true} is VALID [2022-04-14 19:46:18,767 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2620#true} {2620#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2620#true} is VALID [2022-04-14 19:46:18,768 INFO L272 TraceCheckUtils]: 4: Hoare triple {2620#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2620#true} is VALID [2022-04-14 19:46:18,768 INFO L290 TraceCheckUtils]: 5: Hoare triple {2620#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2625#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:46:18,777 INFO L290 TraceCheckUtils]: 6: Hoare triple {2625#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2626#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:46:18,778 INFO L290 TraceCheckUtils]: 7: Hoare triple {2626#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2627#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:46:18,779 INFO L290 TraceCheckUtils]: 8: Hoare triple {2627#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2627#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:46:18,780 INFO L290 TraceCheckUtils]: 9: Hoare triple {2627#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2628#(and (or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:46:18,781 INFO L290 TraceCheckUtils]: 10: Hoare triple {2628#(and (or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2629#(and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:46:18,782 INFO L290 TraceCheckUtils]: 11: Hoare triple {2629#(and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2629#(and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:46:18,784 INFO L290 TraceCheckUtils]: 12: Hoare triple {2629#(and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2630#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:46:18,785 INFO L290 TraceCheckUtils]: 13: Hoare triple {2630#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2630#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:46:18,786 INFO L272 TraceCheckUtils]: 14: Hoare triple {2630#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2631#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:46:18,787 INFO L290 TraceCheckUtils]: 15: Hoare triple {2631#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2632#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:46:18,787 INFO L290 TraceCheckUtils]: 16: Hoare triple {2632#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2621#false} is VALID [2022-04-14 19:46:18,787 INFO L290 TraceCheckUtils]: 17: Hoare triple {2621#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2621#false} is VALID [2022-04-14 19:46:18,788 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:46:18,788 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:46:18,788 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2065559066] [2022-04-14 19:46:18,788 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2065559066] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:46:18,788 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1926647251] [2022-04-14 19:46:18,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:46:18,788 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:46:18,788 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:46:18,791 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:46:18,794 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-14 19:46:18,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:18,829 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-14 19:46:18,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:18,899 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:46:20,031 INFO L272 TraceCheckUtils]: 0: Hoare triple {2620#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2620#true} is VALID [2022-04-14 19:46:20,031 INFO L290 TraceCheckUtils]: 1: Hoare triple {2620#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2620#true} is VALID [2022-04-14 19:46:20,031 INFO L290 TraceCheckUtils]: 2: Hoare triple {2620#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2620#true} is VALID [2022-04-14 19:46:20,031 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2620#true} {2620#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2620#true} is VALID [2022-04-14 19:46:20,031 INFO L272 TraceCheckUtils]: 4: Hoare triple {2620#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2620#true} is VALID [2022-04-14 19:46:20,032 INFO L290 TraceCheckUtils]: 5: Hoare triple {2620#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2625#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:46:20,037 INFO L290 TraceCheckUtils]: 6: Hoare triple {2625#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2655#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-14 19:46:20,038 INFO L290 TraceCheckUtils]: 7: Hoare triple {2655#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2659#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-14 19:46:20,040 INFO L290 TraceCheckUtils]: 8: Hoare triple {2659#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2663#(and (or (and (= main_~z~0 0) (= main_~n~0 main_~x~0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:46:20,043 INFO L290 TraceCheckUtils]: 9: Hoare triple {2663#(and (or (and (= main_~z~0 0) (= main_~n~0 main_~x~0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0))) (not (< 0 (mod main_~x~0 4294967296))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2667#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} is VALID [2022-04-14 19:46:20,044 INFO L290 TraceCheckUtils]: 10: Hoare triple {2667#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2667#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} is VALID [2022-04-14 19:46:20,044 INFO L290 TraceCheckUtils]: 11: Hoare triple {2667#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2667#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} is VALID [2022-04-14 19:46:20,045 INFO L290 TraceCheckUtils]: 12: Hoare triple {2667#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2667#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} is VALID [2022-04-14 19:46:20,045 INFO L290 TraceCheckUtils]: 13: Hoare triple {2667#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2680#(and (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} is VALID [2022-04-14 19:46:20,046 INFO L272 TraceCheckUtils]: 14: Hoare triple {2680#(and (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2684#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:46:20,046 INFO L290 TraceCheckUtils]: 15: Hoare triple {2684#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2688#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:46:20,047 INFO L290 TraceCheckUtils]: 16: Hoare triple {2688#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2621#false} is VALID [2022-04-14 19:46:20,047 INFO L290 TraceCheckUtils]: 17: Hoare triple {2621#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2621#false} is VALID [2022-04-14 19:46:20,047 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:46:20,047 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:46:36,691 INFO L290 TraceCheckUtils]: 17: Hoare triple {2621#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2621#false} is VALID [2022-04-14 19:46:36,692 INFO L290 TraceCheckUtils]: 16: Hoare triple {2688#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2621#false} is VALID [2022-04-14 19:46:36,692 INFO L290 TraceCheckUtils]: 15: Hoare triple {2684#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2688#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:46:36,693 INFO L272 TraceCheckUtils]: 14: Hoare triple {2630#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2684#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:46:36,694 INFO L290 TraceCheckUtils]: 13: Hoare triple {2707#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2630#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:46:37,451 INFO L290 TraceCheckUtils]: 12: Hoare triple {2711#(forall ((aux_mod_v_main_~z~0_48_31 Int)) (or (< 0 aux_mod_v_main_~z~0_48_31) (< aux_mod_v_main_~z~0_48_31 0) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296)) (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (< (+ main_~z~0 main_~x~0) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296)))))) (or (<= (+ (div main_~n~0 4294967296) (div (+ main_~n~0 (* (- 1) main_~x~0)) (- 4294967296))) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1)) (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31))))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~x~0 (* (- 1) main_~n~0)) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (<= (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296))) (<= (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296) 4294967296) (+ main_~z~0 main_~x~0)))) (not (< 0 (mod main_~z~0 4294967296)))))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2707#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-14 19:46:39,514 WARN L290 TraceCheckUtils]: 11: Hoare triple {2711#(forall ((aux_mod_v_main_~z~0_48_31 Int)) (or (< 0 aux_mod_v_main_~z~0_48_31) (< aux_mod_v_main_~z~0_48_31 0) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296)) (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (< (+ main_~z~0 main_~x~0) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296)))))) (or (<= (+ (div main_~n~0 4294967296) (div (+ main_~n~0 (* (- 1) main_~x~0)) (- 4294967296))) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1)) (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31))))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~x~0 (* (- 1) main_~n~0)) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (<= (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296))) (<= (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296) 4294967296) (+ main_~z~0 main_~x~0)))) (not (< 0 (mod main_~z~0 4294967296)))))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2711#(forall ((aux_mod_v_main_~z~0_48_31 Int)) (or (< 0 aux_mod_v_main_~z~0_48_31) (< aux_mod_v_main_~z~0_48_31 0) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296)) (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (< (+ main_~z~0 main_~x~0) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296)))))) (or (<= (+ (div main_~n~0 4294967296) (div (+ main_~n~0 (* (- 1) main_~x~0)) (- 4294967296))) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1)) (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31))))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~x~0 (* (- 1) main_~n~0)) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (<= (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296))) (<= (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296) 4294967296) (+ main_~z~0 main_~x~0)))) (not (< 0 (mod main_~z~0 4294967296)))))))} is UNKNOWN [2022-04-14 19:46:41,521 WARN L290 TraceCheckUtils]: 10: Hoare triple {2711#(forall ((aux_mod_v_main_~z~0_48_31 Int)) (or (< 0 aux_mod_v_main_~z~0_48_31) (< aux_mod_v_main_~z~0_48_31 0) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296)) (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (< (+ main_~z~0 main_~x~0) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296)))))) (or (<= (+ (div main_~n~0 4294967296) (div (+ main_~n~0 (* (- 1) main_~x~0)) (- 4294967296))) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1)) (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31))))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~x~0 (* (- 1) main_~n~0)) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (<= (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296))) (<= (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296) 4294967296) (+ main_~z~0 main_~x~0)))) (not (< 0 (mod main_~z~0 4294967296)))))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2711#(forall ((aux_mod_v_main_~z~0_48_31 Int)) (or (< 0 aux_mod_v_main_~z~0_48_31) (< aux_mod_v_main_~z~0_48_31 0) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296)) (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (< (+ main_~z~0 main_~x~0) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296)))))) (or (<= (+ (div main_~n~0 4294967296) (div (+ main_~n~0 (* (- 1) main_~x~0)) (- 4294967296))) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1)) (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31))))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~x~0 (* (- 1) main_~n~0)) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (<= (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296))) (<= (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296) 4294967296) (+ main_~z~0 main_~x~0)))) (not (< 0 (mod main_~z~0 4294967296)))))))} is UNKNOWN [2022-04-14 19:46:41,529 INFO L290 TraceCheckUtils]: 9: Hoare triple {2707#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2711#(forall ((aux_mod_v_main_~z~0_48_31 Int)) (or (< 0 aux_mod_v_main_~z~0_48_31) (< aux_mod_v_main_~z~0_48_31 0) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296)) (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (< (+ main_~z~0 main_~x~0) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296)))))) (or (<= (+ (div main_~n~0 4294967296) (div (+ main_~n~0 (* (- 1) main_~x~0)) (- 4294967296))) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1)) (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31))))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~x~0 (* (- 1) main_~n~0)) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (<= (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296))) (<= (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296) 4294967296) (+ main_~z~0 main_~x~0)))) (not (< 0 (mod main_~z~0 4294967296)))))))} is VALID [2022-04-14 19:46:41,529 INFO L290 TraceCheckUtils]: 8: Hoare triple {2724#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2707#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-14 19:46:41,530 INFO L290 TraceCheckUtils]: 7: Hoare triple {2626#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2724#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:46:43,546 WARN L290 TraceCheckUtils]: 6: Hoare triple {2731#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (forall ((aux_mod_v_main_~y~0_33_31 Int)) (or (and (or (forall ((aux_div_v_main_~y~0_33_31 Int)) (not (= (+ aux_mod_v_main_~y~0_33_31 (* aux_div_v_main_~y~0_33_31 4294967296)) main_~y~0))) (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~x~0_53_31 Int)) (or (<= (+ (* aux_div_v_main_~x~0_53_31 4294967296) 1) (+ main_~x~0 aux_mod_v_main_~y~0_33_31)) (< main_~x~0 (* aux_div_v_main_~x~0_53_31 4294967296))))) (or (forall ((aux_div_v_main_~x~0_53_31 Int) (aux_div_v_main_~y~0_33_31 Int)) (or (exists ((v_it_1 Int)) (and (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_33_31 (* aux_div_v_main_~y~0_33_31 4294967296))) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))) (<= (+ (* aux_div_v_main_~y~0_33_31 4294967296) (* aux_div_v_main_~x~0_53_31 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ aux_mod_v_main_~y~0_33_31 (* aux_div_v_main_~y~0_33_31 4294967296) (* aux_div_v_main_~x~0_53_31 4294967296))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_33_31 (* aux_div_v_main_~y~0_33_31 4294967296)))))) (not (< 0 (mod main_~x~0 4294967296))))) (>= aux_mod_v_main_~y~0_33_31 4294967296) (> 0 aux_mod_v_main_~y~0_33_31))))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2626#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is UNKNOWN [2022-04-14 19:46:43,553 INFO L290 TraceCheckUtils]: 5: Hoare triple {2620#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2731#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (forall ((aux_mod_v_main_~y~0_33_31 Int)) (or (and (or (forall ((aux_div_v_main_~y~0_33_31 Int)) (not (= (+ aux_mod_v_main_~y~0_33_31 (* aux_div_v_main_~y~0_33_31 4294967296)) main_~y~0))) (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~x~0_53_31 Int)) (or (<= (+ (* aux_div_v_main_~x~0_53_31 4294967296) 1) (+ main_~x~0 aux_mod_v_main_~y~0_33_31)) (< main_~x~0 (* aux_div_v_main_~x~0_53_31 4294967296))))) (or (forall ((aux_div_v_main_~x~0_53_31 Int) (aux_div_v_main_~y~0_33_31 Int)) (or (exists ((v_it_1 Int)) (and (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_33_31 (* aux_div_v_main_~y~0_33_31 4294967296))) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))) (<= (+ (* aux_div_v_main_~y~0_33_31 4294967296) (* aux_div_v_main_~x~0_53_31 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ aux_mod_v_main_~y~0_33_31 (* aux_div_v_main_~y~0_33_31 4294967296) (* aux_div_v_main_~x~0_53_31 4294967296))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_33_31 (* aux_div_v_main_~y~0_33_31 4294967296)))))) (not (< 0 (mod main_~x~0 4294967296))))) (>= aux_mod_v_main_~y~0_33_31 4294967296) (> 0 aux_mod_v_main_~y~0_33_31))))} is VALID [2022-04-14 19:46:43,554 INFO L272 TraceCheckUtils]: 4: Hoare triple {2620#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2620#true} is VALID [2022-04-14 19:46:43,554 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2620#true} {2620#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2620#true} is VALID [2022-04-14 19:46:43,554 INFO L290 TraceCheckUtils]: 2: Hoare triple {2620#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2620#true} is VALID [2022-04-14 19:46:43,554 INFO L290 TraceCheckUtils]: 1: Hoare triple {2620#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2620#true} is VALID [2022-04-14 19:46:43,554 INFO L272 TraceCheckUtils]: 0: Hoare triple {2620#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2620#true} is VALID [2022-04-14 19:46:43,555 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:46:43,555 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1926647251] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:46:43,555 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:46:43,555 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 22 [2022-04-14 19:46:43,555 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1406994490] [2022-04-14 19:46:43,555 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:46:43,556 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 21 states have (on average 1.619047619047619) internal successors, (34), 19 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:46:43,556 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:46:43,556 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 21 states have (on average 1.619047619047619) internal successors, (34), 19 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:47,983 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 39 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-14 19:46:47,983 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-14 19:46:47,983 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:46:47,984 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-14 19:46:47,984 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=365, Unknown=4, NotChecked=0, Total=462 [2022-04-14 19:46:47,984 INFO L87 Difference]: Start difference. First operand 35 states and 52 transitions. Second operand has 22 states, 21 states have (on average 1.619047619047619) internal successors, (34), 19 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:53,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:53,345 INFO L93 Difference]: Finished difference Result 45 states and 67 transitions. [2022-04-14 19:46:53,345 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-14 19:46:53,345 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 21 states have (on average 1.619047619047619) internal successors, (34), 19 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:46:53,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:46:53,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 21 states have (on average 1.619047619047619) internal successors, (34), 19 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:53,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 47 transitions. [2022-04-14 19:46:53,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 21 states have (on average 1.619047619047619) internal successors, (34), 19 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:53,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 47 transitions. [2022-04-14 19:46:53,351 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 47 transitions. [2022-04-14 19:46:53,425 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:46:53,426 INFO L225 Difference]: With dead ends: 45 [2022-04-14 19:46:53,426 INFO L226 Difference]: Without dead ends: 40 [2022-04-14 19:46:53,426 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 24 SyntacticMatches, 7 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 15.2s TimeCoverageRelationStatistics Valid=176, Invalid=631, Unknown=5, NotChecked=0, Total=812 [2022-04-14 19:46:53,427 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 53 mSDsluCounter, 56 mSDsCounter, 0 mSdLazyCounter, 97 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 53 SdHoareTripleChecker+Valid, 68 SdHoareTripleChecker+Invalid, 163 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 97 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 53 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:46:53,427 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [53 Valid, 68 Invalid, 163 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 97 Invalid, 0 Unknown, 53 Unchecked, 0.1s Time] [2022-04-14 19:46:53,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2022-04-14 19:46:53,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 35. [2022-04-14 19:46:53,429 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:46:53,429 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand has 35 states, 30 states have (on average 1.5666666666666667) internal successors, (47), 30 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:53,429 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand has 35 states, 30 states have (on average 1.5666666666666667) internal successors, (47), 30 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:53,430 INFO L87 Difference]: Start difference. First operand 40 states. Second operand has 35 states, 30 states have (on average 1.5666666666666667) internal successors, (47), 30 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:53,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:53,431 INFO L93 Difference]: Finished difference Result 40 states and 61 transitions. [2022-04-14 19:46:53,431 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 61 transitions. [2022-04-14 19:46:53,431 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:46:53,431 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:46:53,431 INFO L74 IsIncluded]: Start isIncluded. First operand has 35 states, 30 states have (on average 1.5666666666666667) internal successors, (47), 30 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 40 states. [2022-04-14 19:46:53,431 INFO L87 Difference]: Start difference. First operand has 35 states, 30 states have (on average 1.5666666666666667) internal successors, (47), 30 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 40 states. [2022-04-14 19:46:53,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:53,432 INFO L93 Difference]: Finished difference Result 40 states and 61 transitions. [2022-04-14 19:46:53,432 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 61 transitions. [2022-04-14 19:46:53,432 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:46:53,433 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:46:53,433 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:46:53,433 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:46:53,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 30 states have (on average 1.5666666666666667) internal successors, (47), 30 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:53,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 51 transitions. [2022-04-14 19:46:53,434 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 51 transitions. Word has length 18 [2022-04-14 19:46:53,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:46:53,434 INFO L478 AbstractCegarLoop]: Abstraction has 35 states and 51 transitions. [2022-04-14 19:46:53,434 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 21 states have (on average 1.619047619047619) internal successors, (34), 19 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:53,434 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 51 transitions. [2022-04-14 19:46:53,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-14 19:46:53,435 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:46:53,435 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:46:53,459 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-14 19:46:53,647 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-14 19:46:53,648 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:46:53,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:46:53,648 INFO L85 PathProgramCache]: Analyzing trace with hash -194390100, now seen corresponding path program 1 times [2022-04-14 19:46:53,648 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:46:53,648 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [352968822] [2022-04-14 19:46:53,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:46:53,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:46:53,657 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:53,659 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_6 (* (- 4294967296) (div (+ .cse0 main_~x~0_6) 4294967296)))) 0)) [2022-04-14 19:46:53,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:53,674 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.2))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:53,694 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_6 (* (- 4294967296) (div (+ .cse0 main_~x~0_6) 4294967296)))) 0)) [2022-04-14 19:46:53,862 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:46:53,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:53,866 INFO L290 TraceCheckUtils]: 0: Hoare triple {2943#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2930#true} is VALID [2022-04-14 19:46:53,866 INFO L290 TraceCheckUtils]: 1: Hoare triple {2930#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2930#true} is VALID [2022-04-14 19:46:53,867 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2930#true} {2930#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2930#true} is VALID [2022-04-14 19:46:53,867 INFO L272 TraceCheckUtils]: 0: Hoare triple {2930#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2943#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:46:53,867 INFO L290 TraceCheckUtils]: 1: Hoare triple {2943#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2930#true} is VALID [2022-04-14 19:46:53,868 INFO L290 TraceCheckUtils]: 2: Hoare triple {2930#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2930#true} is VALID [2022-04-14 19:46:53,868 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2930#true} {2930#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2930#true} is VALID [2022-04-14 19:46:53,868 INFO L272 TraceCheckUtils]: 4: Hoare triple {2930#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2930#true} is VALID [2022-04-14 19:46:53,868 INFO L290 TraceCheckUtils]: 5: Hoare triple {2930#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2935#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:46:53,875 INFO L290 TraceCheckUtils]: 6: Hoare triple {2935#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2936#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:46:53,876 INFO L290 TraceCheckUtils]: 7: Hoare triple {2936#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2937#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:46:53,876 INFO L290 TraceCheckUtils]: 8: Hoare triple {2937#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2937#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:46:53,877 INFO L290 TraceCheckUtils]: 9: Hoare triple {2937#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2937#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:46:53,877 INFO L290 TraceCheckUtils]: 10: Hoare triple {2937#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2938#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:46:53,878 INFO L290 TraceCheckUtils]: 11: Hoare triple {2938#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2939#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-14 19:46:53,879 INFO L290 TraceCheckUtils]: 12: Hoare triple {2939#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2940#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:46:53,880 INFO L290 TraceCheckUtils]: 13: Hoare triple {2940#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2940#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:46:53,881 INFO L272 TraceCheckUtils]: 14: Hoare triple {2940#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2941#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:46:53,881 INFO L290 TraceCheckUtils]: 15: Hoare triple {2941#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2942#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:46:53,881 INFO L290 TraceCheckUtils]: 16: Hoare triple {2942#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2931#false} is VALID [2022-04-14 19:46:53,882 INFO L290 TraceCheckUtils]: 17: Hoare triple {2931#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2931#false} is VALID [2022-04-14 19:46:53,882 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:46:53,882 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:46:53,882 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [352968822] [2022-04-14 19:46:53,882 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [352968822] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:46:53,882 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1958378863] [2022-04-14 19:46:53,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:46:53,882 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:46:53,882 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:46:53,883 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:46:53,884 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-14 19:46:53,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:53,936 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-14 19:46:53,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:53,958 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:46:55,005 INFO L272 TraceCheckUtils]: 0: Hoare triple {2930#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2930#true} is VALID [2022-04-14 19:46:55,006 INFO L290 TraceCheckUtils]: 1: Hoare triple {2930#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2930#true} is VALID [2022-04-14 19:46:55,006 INFO L290 TraceCheckUtils]: 2: Hoare triple {2930#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2930#true} is VALID [2022-04-14 19:46:55,006 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2930#true} {2930#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2930#true} is VALID [2022-04-14 19:46:55,006 INFO L272 TraceCheckUtils]: 4: Hoare triple {2930#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2930#true} is VALID [2022-04-14 19:46:55,006 INFO L290 TraceCheckUtils]: 5: Hoare triple {2930#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2935#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:46:55,021 INFO L290 TraceCheckUtils]: 6: Hoare triple {2935#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2965#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-14 19:46:55,023 INFO L290 TraceCheckUtils]: 7: Hoare triple {2965#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2969#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-14 19:46:55,025 INFO L290 TraceCheckUtils]: 8: Hoare triple {2969#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2969#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-14 19:46:55,027 INFO L290 TraceCheckUtils]: 9: Hoare triple {2969#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2969#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-14 19:46:55,801 INFO L290 TraceCheckUtils]: 10: Hoare triple {2969#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2979#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:46:55,802 INFO L290 TraceCheckUtils]: 11: Hoare triple {2979#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))) (= main_~y~0 0))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2983#(and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-14 19:46:55,802 INFO L290 TraceCheckUtils]: 12: Hoare triple {2983#(and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2983#(and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-14 19:46:55,803 INFO L290 TraceCheckUtils]: 13: Hoare triple {2983#(and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2983#(and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-14 19:46:55,804 INFO L272 TraceCheckUtils]: 14: Hoare triple {2983#(and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2993#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:46:55,804 INFO L290 TraceCheckUtils]: 15: Hoare triple {2993#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2997#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:46:55,804 INFO L290 TraceCheckUtils]: 16: Hoare triple {2997#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2931#false} is VALID [2022-04-14 19:46:55,805 INFO L290 TraceCheckUtils]: 17: Hoare triple {2931#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2931#false} is VALID [2022-04-14 19:46:55,805 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:46:55,805 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:47:02,019 INFO L290 TraceCheckUtils]: 17: Hoare triple {2931#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2931#false} is VALID [2022-04-14 19:47:02,019 INFO L290 TraceCheckUtils]: 16: Hoare triple {2997#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2931#false} is VALID [2022-04-14 19:47:02,020 INFO L290 TraceCheckUtils]: 15: Hoare triple {2993#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2997#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:47:02,021 INFO L272 TraceCheckUtils]: 14: Hoare triple {2940#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2993#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:47:02,021 INFO L290 TraceCheckUtils]: 13: Hoare triple {2940#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2940#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:02,022 INFO L290 TraceCheckUtils]: 12: Hoare triple {3019#(or (< 0 (mod main_~x~0 4294967296)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2940#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:02,023 INFO L290 TraceCheckUtils]: 11: Hoare triple {2938#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3019#(or (< 0 (mod main_~x~0 4294967296)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:02,024 INFO L290 TraceCheckUtils]: 10: Hoare triple {2937#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2938#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:47:02,024 INFO L290 TraceCheckUtils]: 9: Hoare triple {2937#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2937#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:47:02,025 INFO L290 TraceCheckUtils]: 8: Hoare triple {2937#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2937#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:47:02,025 INFO L290 TraceCheckUtils]: 7: Hoare triple {2936#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2937#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:47:04,035 WARN L290 TraceCheckUtils]: 6: Hoare triple {3038#(or (forall ((aux_mod_v_main_~y~0_38_31 Int)) (or (and (or (forall ((aux_div_v_main_~x~0_58_31 Int)) (or (< main_~x~0 (* aux_div_v_main_~x~0_58_31 4294967296)) (<= (+ (* aux_div_v_main_~x~0_58_31 4294967296) 1) (+ main_~x~0 aux_mod_v_main_~y~0_38_31)))) (forall ((aux_div_v_main_~y~0_38_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_38_31 4294967296) aux_mod_v_main_~y~0_38_31)))) (< 0 (mod main_~x~0 4294967296))) (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~x~0_58_31 Int) (aux_div_v_main_~y~0_38_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_38_31 4294967296) aux_mod_v_main_~y~0_38_31))) (<= (+ (* aux_div_v_main_~x~0_58_31 4294967296) (* aux_div_v_main_~y~0_38_31 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ (* aux_div_v_main_~x~0_58_31 4294967296) (* aux_div_v_main_~y~0_38_31 4294967296) aux_mod_v_main_~y~0_38_31)) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1) (<= (+ v_it_1 main_~y~0 1) (+ (* aux_div_v_main_~y~0_38_31 4294967296) aux_mod_v_main_~y~0_38_31)))))))) (>= aux_mod_v_main_~y~0_38_31 4294967296) (> 0 aux_mod_v_main_~y~0_38_31))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2936#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is UNKNOWN [2022-04-14 19:47:04,068 INFO L290 TraceCheckUtils]: 5: Hoare triple {2930#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3038#(or (forall ((aux_mod_v_main_~y~0_38_31 Int)) (or (and (or (forall ((aux_div_v_main_~x~0_58_31 Int)) (or (< main_~x~0 (* aux_div_v_main_~x~0_58_31 4294967296)) (<= (+ (* aux_div_v_main_~x~0_58_31 4294967296) 1) (+ main_~x~0 aux_mod_v_main_~y~0_38_31)))) (forall ((aux_div_v_main_~y~0_38_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_38_31 4294967296) aux_mod_v_main_~y~0_38_31)))) (< 0 (mod main_~x~0 4294967296))) (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~x~0_58_31 Int) (aux_div_v_main_~y~0_38_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_38_31 4294967296) aux_mod_v_main_~y~0_38_31))) (<= (+ (* aux_div_v_main_~x~0_58_31 4294967296) (* aux_div_v_main_~y~0_38_31 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ (* aux_div_v_main_~x~0_58_31 4294967296) (* aux_div_v_main_~y~0_38_31 4294967296) aux_mod_v_main_~y~0_38_31)) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1) (<= (+ v_it_1 main_~y~0 1) (+ (* aux_div_v_main_~y~0_38_31 4294967296) aux_mod_v_main_~y~0_38_31)))))))) (>= aux_mod_v_main_~y~0_38_31 4294967296) (> 0 aux_mod_v_main_~y~0_38_31))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:47:04,069 INFO L272 TraceCheckUtils]: 4: Hoare triple {2930#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2930#true} is VALID [2022-04-14 19:47:04,069 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2930#true} {2930#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2930#true} is VALID [2022-04-14 19:47:04,069 INFO L290 TraceCheckUtils]: 2: Hoare triple {2930#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2930#true} is VALID [2022-04-14 19:47:04,069 INFO L290 TraceCheckUtils]: 1: Hoare triple {2930#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2930#true} is VALID [2022-04-14 19:47:04,069 INFO L272 TraceCheckUtils]: 0: Hoare triple {2930#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2930#true} is VALID [2022-04-14 19:47:04,069 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:47:04,070 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1958378863] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:47:04,070 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:47:04,070 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 10] total 19 [2022-04-14 19:47:04,070 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [667971350] [2022-04-14 19:47:04,070 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:47:04,071 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:47:04,071 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:47:04,071 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:47:06,218 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 35 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-14 19:47:06,218 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-14 19:47:06,219 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:47:06,219 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-14 19:47:06,219 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=261, Unknown=1, NotChecked=0, Total=342 [2022-04-14 19:47:06,219 INFO L87 Difference]: Start difference. First operand 35 states and 51 transitions. Second operand has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:47:07,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:47:07,091 INFO L93 Difference]: Finished difference Result 59 states and 90 transitions. [2022-04-14 19:47:07,091 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-04-14 19:47:07,091 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:47:07,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:47:07,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:47:07,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 65 transitions. [2022-04-14 19:47:07,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:47:07,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 65 transitions. [2022-04-14 19:47:07,094 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 17 states and 65 transitions. [2022-04-14 19:47:07,294 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 65 edges. 65 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:47:07,295 INFO L225 Difference]: With dead ends: 59 [2022-04-14 19:47:07,295 INFO L226 Difference]: Without dead ends: 55 [2022-04-14 19:47:07,296 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 25 SyntacticMatches, 7 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=173, Invalid=582, Unknown=1, NotChecked=0, Total=756 [2022-04-14 19:47:07,296 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 46 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 92 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 73 SdHoareTripleChecker+Invalid, 163 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 92 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 53 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-14 19:47:07,296 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [46 Valid, 73 Invalid, 163 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 92 Invalid, 0 Unknown, 53 Unchecked, 0.2s Time] [2022-04-14 19:47:07,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2022-04-14 19:47:07,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 41. [2022-04-14 19:47:07,299 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:47:07,299 INFO L82 GeneralOperation]: Start isEquivalent. First operand 55 states. Second operand has 41 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 36 states have internal predecessors, (58), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:47:07,299 INFO L74 IsIncluded]: Start isIncluded. First operand 55 states. Second operand has 41 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 36 states have internal predecessors, (58), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:47:07,299 INFO L87 Difference]: Start difference. First operand 55 states. Second operand has 41 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 36 states have internal predecessors, (58), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:47:07,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:47:07,301 INFO L93 Difference]: Finished difference Result 55 states and 85 transitions. [2022-04-14 19:47:07,301 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 85 transitions. [2022-04-14 19:47:07,301 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:47:07,301 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:47:07,301 INFO L74 IsIncluded]: Start isIncluded. First operand has 41 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 36 states have internal predecessors, (58), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 55 states. [2022-04-14 19:47:07,301 INFO L87 Difference]: Start difference. First operand has 41 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 36 states have internal predecessors, (58), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 55 states. [2022-04-14 19:47:07,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:47:07,303 INFO L93 Difference]: Finished difference Result 55 states and 85 transitions. [2022-04-14 19:47:07,303 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 85 transitions. [2022-04-14 19:47:07,303 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:47:07,303 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:47:07,303 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:47:07,303 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:47:07,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 36 states have internal predecessors, (58), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:47:07,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 62 transitions. [2022-04-14 19:47:07,304 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 62 transitions. Word has length 18 [2022-04-14 19:47:07,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:47:07,305 INFO L478 AbstractCegarLoop]: Abstraction has 41 states and 62 transitions. [2022-04-14 19:47:07,305 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:47:07,305 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 62 transitions. [2022-04-14 19:47:07,305 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-14 19:47:07,305 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:47:07,305 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:47:07,326 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2022-04-14 19:47:07,519 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-14 19:47:07,520 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:47:07,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:47:07,520 INFO L85 PathProgramCache]: Analyzing trace with hash -2001594489, now seen corresponding path program 1 times [2022-04-14 19:47:07,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:47:07,520 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2134072470] [2022-04-14 19:47:07,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:47:07,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:47:07,529 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:47:07,530 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_6 .cse0 (* (- 4294967296) (div (+ main_~y~0_6 .cse0) 4294967296)))) 0)) [2022-04-14 19:47:07,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:47:07,560 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.2))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:47:07,579 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.3))) (+ main_~y~0_6 .cse0 (* (- 4294967296) (div (+ main_~y~0_6 .cse0) 4294967296)))) 0)) [2022-04-14 19:47:07,833 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:47:07,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:47:07,838 INFO L290 TraceCheckUtils]: 0: Hoare triple {3301#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3289#true} is VALID [2022-04-14 19:47:07,838 INFO L290 TraceCheckUtils]: 1: Hoare triple {3289#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3289#true} is VALID [2022-04-14 19:47:07,839 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3289#true} {3289#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3289#true} is VALID [2022-04-14 19:47:07,839 INFO L272 TraceCheckUtils]: 0: Hoare triple {3289#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3301#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:47:07,839 INFO L290 TraceCheckUtils]: 1: Hoare triple {3301#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3289#true} is VALID [2022-04-14 19:47:07,839 INFO L290 TraceCheckUtils]: 2: Hoare triple {3289#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3289#true} is VALID [2022-04-14 19:47:07,839 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3289#true} {3289#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3289#true} is VALID [2022-04-14 19:47:07,839 INFO L272 TraceCheckUtils]: 4: Hoare triple {3289#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3289#true} is VALID [2022-04-14 19:47:07,840 INFO L290 TraceCheckUtils]: 5: Hoare triple {3289#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3294#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:47:07,865 INFO L290 TraceCheckUtils]: 6: Hoare triple {3294#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3295#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:07,866 INFO L290 TraceCheckUtils]: 7: Hoare triple {3295#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3296#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0))} is VALID [2022-04-14 19:47:07,867 INFO L290 TraceCheckUtils]: 8: Hoare triple {3296#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3297#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (and (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (= (+ main_~y~0 (* (- 1) main_~z~0)) 0)))} is VALID [2022-04-14 19:47:07,868 INFO L290 TraceCheckUtils]: 9: Hoare triple {3297#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (and (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (= (+ main_~y~0 (* (- 1) main_~z~0)) 0)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:07,868 INFO L290 TraceCheckUtils]: 10: Hoare triple {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:07,869 INFO L290 TraceCheckUtils]: 11: Hoare triple {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:07,869 INFO L290 TraceCheckUtils]: 12: Hoare triple {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:07,870 INFO L290 TraceCheckUtils]: 13: Hoare triple {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:07,871 INFO L272 TraceCheckUtils]: 14: Hoare triple {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3299#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:47:07,871 INFO L290 TraceCheckUtils]: 15: Hoare triple {3299#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3300#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:47:07,871 INFO L290 TraceCheckUtils]: 16: Hoare triple {3300#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3290#false} is VALID [2022-04-14 19:47:07,872 INFO L290 TraceCheckUtils]: 17: Hoare triple {3290#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#false} is VALID [2022-04-14 19:47:07,872 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:47:07,872 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:47:07,872 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2134072470] [2022-04-14 19:47:07,872 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2134072470] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:47:07,872 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [390777506] [2022-04-14 19:47:07,872 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:47:07,873 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:47:07,873 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:47:07,876 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:47:07,876 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-14 19:47:07,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:47:07,918 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-14 19:47:07,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:47:07,933 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:47:09,260 INFO L272 TraceCheckUtils]: 0: Hoare triple {3289#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3289#true} is VALID [2022-04-14 19:47:09,260 INFO L290 TraceCheckUtils]: 1: Hoare triple {3289#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3289#true} is VALID [2022-04-14 19:47:09,260 INFO L290 TraceCheckUtils]: 2: Hoare triple {3289#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3289#true} is VALID [2022-04-14 19:47:09,260 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3289#true} {3289#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3289#true} is VALID [2022-04-14 19:47:09,260 INFO L272 TraceCheckUtils]: 4: Hoare triple {3289#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3289#true} is VALID [2022-04-14 19:47:09,261 INFO L290 TraceCheckUtils]: 5: Hoare triple {3289#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3294#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:47:09,274 INFO L290 TraceCheckUtils]: 6: Hoare triple {3294#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3323#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-14 19:47:09,275 INFO L290 TraceCheckUtils]: 7: Hoare triple {3323#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3327#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-14 19:47:09,278 INFO L290 TraceCheckUtils]: 8: Hoare triple {3327#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3331#(and (or (and (= main_~z~0 0) (= main_~n~0 main_~x~0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:47:09,285 INFO L290 TraceCheckUtils]: 9: Hoare triple {3331#(and (or (and (= main_~z~0 0) (= main_~n~0 main_~x~0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0))) (not (< 0 (mod main_~x~0 4294967296))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3335#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:47:09,286 INFO L290 TraceCheckUtils]: 10: Hoare triple {3335#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [101] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3335#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:47:09,286 INFO L290 TraceCheckUtils]: 11: Hoare triple {3335#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3335#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:47:09,287 INFO L290 TraceCheckUtils]: 12: Hoare triple {3335#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3335#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:47:09,287 INFO L290 TraceCheckUtils]: 13: Hoare triple {3335#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3335#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:47:09,288 INFO L272 TraceCheckUtils]: 14: Hoare triple {3335#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3351#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:47:09,288 INFO L290 TraceCheckUtils]: 15: Hoare triple {3351#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3355#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:47:09,288 INFO L290 TraceCheckUtils]: 16: Hoare triple {3355#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3290#false} is VALID [2022-04-14 19:47:09,289 INFO L290 TraceCheckUtils]: 17: Hoare triple {3290#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#false} is VALID [2022-04-14 19:47:09,289 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:47:09,289 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:47:19,889 INFO L290 TraceCheckUtils]: 17: Hoare triple {3290#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#false} is VALID [2022-04-14 19:47:19,889 INFO L290 TraceCheckUtils]: 16: Hoare triple {3355#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3290#false} is VALID [2022-04-14 19:47:19,890 INFO L290 TraceCheckUtils]: 15: Hoare triple {3351#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3355#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:47:19,891 INFO L272 TraceCheckUtils]: 14: Hoare triple {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3351#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:47:19,891 INFO L290 TraceCheckUtils]: 13: Hoare triple {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:19,892 INFO L290 TraceCheckUtils]: 12: Hoare triple {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:19,892 INFO L290 TraceCheckUtils]: 11: Hoare triple {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:19,893 INFO L290 TraceCheckUtils]: 10: Hoare triple {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:19,894 INFO L290 TraceCheckUtils]: 9: Hoare triple {3386#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3298#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:19,894 INFO L290 TraceCheckUtils]: 8: Hoare triple {3296#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3386#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-14 19:47:19,895 INFO L290 TraceCheckUtils]: 7: Hoare triple {3295#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3296#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0))} is VALID [2022-04-14 19:47:21,916 WARN L290 TraceCheckUtils]: 6: Hoare triple {3396#(forall ((aux_mod_aux_mod_v_main_~x~0_61_31_87 Int) (aux_div_v_main_~x~0_61_31 Int) (aux_div_aux_mod_v_main_~x~0_61_31_87 Int)) (or (>= aux_mod_aux_mod_v_main_~x~0_61_31_87 4294967296) (> 0 aux_mod_aux_mod_v_main_~x~0_61_31_87) (and (or (forall ((aux_div_v_main_~y~0_42_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_42_31 4294967296) 1) (+ main_~y~0 aux_mod_aux_mod_v_main_~x~0_61_31_87)) (< main_~y~0 (* aux_div_v_main_~y~0_42_31 4294967296)))) (not (= main_~x~0 (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87)))) (or (forall ((aux_div_v_main_~y~0_42_31 Int)) (or (< (+ main_~y~0 main_~x~0) (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87)) (<= (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) (* aux_div_v_main_~y~0_42_31 4294967296) 1) (+ main_~y~0 main_~x~0)))) (not (< (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87) main_~x~0)) (not (< 0 (mod main_~x~0 4294967296))) (exists ((v_it_1 Int)) (and (<= (+ v_it_1 (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87 1) main_~x~0) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))))) (< (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87) (* aux_div_v_main_~x~0_61_31 4294967296)) (< (+ main_~n~0 (* aux_div_v_main_~x~0_61_31 4294967296)) (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) (* (div main_~n~0 4294967296) 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87 1))))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3295#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is UNKNOWN [2022-04-14 19:47:21,932 INFO L290 TraceCheckUtils]: 5: Hoare triple {3289#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3396#(forall ((aux_mod_aux_mod_v_main_~x~0_61_31_87 Int) (aux_div_v_main_~x~0_61_31 Int) (aux_div_aux_mod_v_main_~x~0_61_31_87 Int)) (or (>= aux_mod_aux_mod_v_main_~x~0_61_31_87 4294967296) (> 0 aux_mod_aux_mod_v_main_~x~0_61_31_87) (and (or (forall ((aux_div_v_main_~y~0_42_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_42_31 4294967296) 1) (+ main_~y~0 aux_mod_aux_mod_v_main_~x~0_61_31_87)) (< main_~y~0 (* aux_div_v_main_~y~0_42_31 4294967296)))) (not (= main_~x~0 (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87)))) (or (forall ((aux_div_v_main_~y~0_42_31 Int)) (or (< (+ main_~y~0 main_~x~0) (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87)) (<= (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) (* aux_div_v_main_~y~0_42_31 4294967296) 1) (+ main_~y~0 main_~x~0)))) (not (< (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87) main_~x~0)) (not (< 0 (mod main_~x~0 4294967296))) (exists ((v_it_1 Int)) (and (<= (+ v_it_1 (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87 1) main_~x~0) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))))) (< (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87) (* aux_div_v_main_~x~0_61_31 4294967296)) (< (+ main_~n~0 (* aux_div_v_main_~x~0_61_31 4294967296)) (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) (* (div main_~n~0 4294967296) 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87 1))))} is VALID [2022-04-14 19:47:21,932 INFO L272 TraceCheckUtils]: 4: Hoare triple {3289#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3289#true} is VALID [2022-04-14 19:47:21,932 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3289#true} {3289#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3289#true} is VALID [2022-04-14 19:47:21,932 INFO L290 TraceCheckUtils]: 2: Hoare triple {3289#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3289#true} is VALID [2022-04-14 19:47:21,932 INFO L290 TraceCheckUtils]: 1: Hoare triple {3289#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3289#true} is VALID [2022-04-14 19:47:21,932 INFO L272 TraceCheckUtils]: 0: Hoare triple {3289#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3289#true} is VALID [2022-04-14 19:47:21,933 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:47:21,933 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [390777506] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:47:21,933 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:47:21,933 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9] total 18 [2022-04-14 19:47:21,933 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1008780971] [2022-04-14 19:47:21,933 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:47:21,934 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.6111111111111112) internal successors, (29), 15 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:47:21,934 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:47:21,934 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.6111111111111112) internal successors, (29), 15 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:47:24,102 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 35 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-14 19:47:24,102 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-14 19:47:24,103 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:47:24,103 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-14 19:47:24,103 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=241, Unknown=2, NotChecked=0, Total=306 [2022-04-14 19:47:24,103 INFO L87 Difference]: Start difference. First operand 41 states and 62 transitions. Second operand has 18 states, 18 states have (on average 1.6111111111111112) internal successors, (29), 15 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:47:25,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:47:25,585 INFO L93 Difference]: Finished difference Result 58 states and 90 transitions. [2022-04-14 19:47:25,585 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-14 19:47:25,585 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.6111111111111112) internal successors, (29), 15 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:47:25,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:47:25,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.6111111111111112) internal successors, (29), 15 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:47:25,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 49 transitions. [2022-04-14 19:47:25,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.6111111111111112) internal successors, (29), 15 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:47:25,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 49 transitions. [2022-04-14 19:47:25,588 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 49 transitions. [2022-04-14 19:47:25,661 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:47:25,662 INFO L225 Difference]: With dead ends: 58 [2022-04-14 19:47:25,662 INFO L226 Difference]: Without dead ends: 55 [2022-04-14 19:47:25,662 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 26 SyntacticMatches, 6 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 158 ImplicationChecksByTransitivity, 8.5s TimeCoverageRelationStatistics Valid=139, Invalid=459, Unknown=2, NotChecked=0, Total=600 [2022-04-14 19:47:25,663 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 47 mSDsluCounter, 44 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 47 SdHoareTripleChecker+Valid, 56 SdHoareTripleChecker+Invalid, 139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 48 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:47:25,663 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [47 Valid, 56 Invalid, 139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 78 Invalid, 0 Unknown, 48 Unchecked, 0.1s Time] [2022-04-14 19:47:25,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2022-04-14 19:47:25,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 42. [2022-04-14 19:47:25,665 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:47:25,665 INFO L82 GeneralOperation]: Start isEquivalent. First operand 55 states. Second operand has 42 states, 37 states have (on average 1.6216216216216217) internal successors, (60), 37 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:47:25,665 INFO L74 IsIncluded]: Start isIncluded. First operand 55 states. Second operand has 42 states, 37 states have (on average 1.6216216216216217) internal successors, (60), 37 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:47:25,666 INFO L87 Difference]: Start difference. First operand 55 states. Second operand has 42 states, 37 states have (on average 1.6216216216216217) internal successors, (60), 37 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:47:25,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:47:25,667 INFO L93 Difference]: Finished difference Result 55 states and 87 transitions. [2022-04-14 19:47:25,667 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 87 transitions. [2022-04-14 19:47:25,667 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:47:25,667 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:47:25,668 INFO L74 IsIncluded]: Start isIncluded. First operand has 42 states, 37 states have (on average 1.6216216216216217) internal successors, (60), 37 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 55 states. [2022-04-14 19:47:25,668 INFO L87 Difference]: Start difference. First operand has 42 states, 37 states have (on average 1.6216216216216217) internal successors, (60), 37 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 55 states. [2022-04-14 19:47:25,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:47:25,669 INFO L93 Difference]: Finished difference Result 55 states and 87 transitions. [2022-04-14 19:47:25,669 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 87 transitions. [2022-04-14 19:47:25,669 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:47:25,669 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:47:25,669 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:47:25,669 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:47:25,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 37 states have (on average 1.6216216216216217) internal successors, (60), 37 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:47:25,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 64 transitions. [2022-04-14 19:47:25,670 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 64 transitions. Word has length 18 [2022-04-14 19:47:25,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:47:25,671 INFO L478 AbstractCegarLoop]: Abstraction has 42 states and 64 transitions. [2022-04-14 19:47:25,671 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.6111111111111112) internal successors, (29), 15 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:47:25,671 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 64 transitions. [2022-04-14 19:47:25,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-14 19:47:25,671 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:47:25,671 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:47:25,690 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2022-04-14 19:47:25,883 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-14 19:47:25,883 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:47:25,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:47:25,884 INFO L85 PathProgramCache]: Analyzing trace with hash 2104611596, now seen corresponding path program 1 times [2022-04-14 19:47:25,884 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:47:25,884 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2015506039] [2022-04-14 19:47:25,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:47:25,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:47:25,891 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:47:25,892 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.1))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-14 19:47:25,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:47:25,906 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.3))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:47:25,912 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.4))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-14 19:47:26,191 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:47:26,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:47:26,195 INFO L290 TraceCheckUtils]: 0: Hoare triple {3656#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3642#true} is VALID [2022-04-14 19:47:26,195 INFO L290 TraceCheckUtils]: 1: Hoare triple {3642#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3642#true} is VALID [2022-04-14 19:47:26,195 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3642#true} {3642#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3642#true} is VALID [2022-04-14 19:47:26,196 INFO L272 TraceCheckUtils]: 0: Hoare triple {3642#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3656#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:47:26,196 INFO L290 TraceCheckUtils]: 1: Hoare triple {3656#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3642#true} is VALID [2022-04-14 19:47:26,196 INFO L290 TraceCheckUtils]: 2: Hoare triple {3642#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3642#true} is VALID [2022-04-14 19:47:26,196 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3642#true} {3642#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3642#true} is VALID [2022-04-14 19:47:26,196 INFO L272 TraceCheckUtils]: 4: Hoare triple {3642#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3642#true} is VALID [2022-04-14 19:47:26,196 INFO L290 TraceCheckUtils]: 5: Hoare triple {3642#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3647#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:47:26,200 INFO L290 TraceCheckUtils]: 6: Hoare triple {3647#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3648#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ main_~y~0 main_~x~0) (+ (* 4294967296 (div (+ (- 1) main_~y~0 main_~x~0) 4294967296)) 4294967295)))} is VALID [2022-04-14 19:47:26,203 INFO L290 TraceCheckUtils]: 7: Hoare triple {3648#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ main_~y~0 main_~x~0) (+ (* 4294967296 (div (+ (- 1) main_~y~0 main_~x~0) 4294967296)) 4294967295)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3649#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296))) (+ 4294967295 (* (div (+ (- 1) main_~y~0 (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296))))} is VALID [2022-04-14 19:47:26,205 INFO L290 TraceCheckUtils]: 8: Hoare triple {3649#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296))) (+ 4294967295 (* (div (+ (- 1) main_~y~0 (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3650#(and (= (+ main_~y~0 (* (- 1) main_~z~0)) 0) (or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (< (* (div main_~z~0 4294967296) 4294967296) main_~z~0)))} is VALID [2022-04-14 19:47:26,207 INFO L290 TraceCheckUtils]: 9: Hoare triple {3650#(and (= (+ main_~y~0 (* (- 1) main_~z~0)) 0) (or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (< (* (div main_~z~0 4294967296) 4294967296) main_~z~0)))} [98] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3651#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:26,208 INFO L290 TraceCheckUtils]: 10: Hoare triple {3651#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3651#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:26,209 INFO L290 TraceCheckUtils]: 11: Hoare triple {3651#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3652#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-14 19:47:26,209 INFO L290 TraceCheckUtils]: 12: Hoare triple {3652#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3653#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:26,210 INFO L290 TraceCheckUtils]: 13: Hoare triple {3653#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3653#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:26,211 INFO L272 TraceCheckUtils]: 14: Hoare triple {3653#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3654#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:47:26,212 INFO L290 TraceCheckUtils]: 15: Hoare triple {3654#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3655#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:47:26,212 INFO L290 TraceCheckUtils]: 16: Hoare triple {3655#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3643#false} is VALID [2022-04-14 19:47:26,212 INFO L290 TraceCheckUtils]: 17: Hoare triple {3643#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3643#false} is VALID [2022-04-14 19:47:26,212 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:47:26,212 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:47:26,212 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2015506039] [2022-04-14 19:47:26,213 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2015506039] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:47:26,213 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [108332420] [2022-04-14 19:47:26,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:47:26,213 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:47:26,213 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:47:26,214 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:47:26,214 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-14 19:47:26,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:47:26,278 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-14 19:47:26,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:47:26,304 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:47:29,772 WARN L319 FreeRefinementEngine]: Global settings require throwing the following exception [2022-04-14 19:47:29,789 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-14 19:47:29,972 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-14 19:47:29,973 FATAL L? ?]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: not dual finite connective at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.tryToPushOverDualFiniteConnective2(QuantifierPusher.java:375) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.tryToPushOverDualFiniteConnective(QuantifierPusher.java:356) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.convert(QuantifierPushTermWalker.java:175) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.convert(QuantifierPushTermWalker.java:1) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine$ApplicationTermTask.doStep(TermContextTransformationEngine.java:169) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:77) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:61) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.eliminate(QuantifierPushTermWalker.java:264) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.tryToPushOverDualFiniteConnective2(QuantifierPusher.java:503) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.tryToPushOverDualFiniteConnective(QuantifierPusher.java:356) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.convert(QuantifierPushTermWalker.java:175) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.convert(QuantifierPushTermWalker.java:1) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:65) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:61) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.eliminate(QuantifierPushTermWalker.java:264) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.doit(QuantifierPusher.java:642) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.tryToPushOverDualFiniteConnective2(QuantifierPusher.java:453) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.tryToPushOverDualFiniteConnective(QuantifierPusher.java:356) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.convert(QuantifierPushTermWalker.java:175) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.convert(QuantifierPushTermWalker.java:1) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:65) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:61) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.eliminate(QuantifierPushTermWalker.java:264) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.eliminate(QuantifierPushTermWalker.java:250) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.PartialQuantifierElimination.eliminate(PartialQuantifierElimination.java:92) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:238) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:420) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeStrongestPostconditionSequence(IterativePredicateTransformer.java:199) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:299) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:185) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:163) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:108) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:266) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:147) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:595) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:414) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:349) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:331) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopUtils.getCegarLoopResult(CegarLoopUtils.java:56) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:411) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:301) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:261) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:153) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2022-04-14 19:47:29,977 INFO L158 Benchmark]: Toolchain (without parser) took 361041.90ms. Allocated memory was 175.1MB in the beginning and 323.0MB in the end (delta: 147.8MB). Free memory was 120.8MB in the beginning and 207.5MB in the end (delta: -86.7MB). Peak memory consumption was 167.5MB. Max. memory is 8.0GB. [2022-04-14 19:47:29,977 INFO L158 Benchmark]: CDTParser took 0.11ms. Allocated memory is still 175.1MB. Free memory is still 136.8MB. There was no memory consumed. Max. memory is 8.0GB. [2022-04-14 19:47:29,977 INFO L158 Benchmark]: CACSL2BoogieTranslator took 209.51ms. Allocated memory was 175.1MB in the beginning and 268.4MB in the end (delta: 93.3MB). Free memory was 120.6MB in the beginning and 241.5MB in the end (delta: -120.9MB). Peak memory consumption was 9.7MB. Max. memory is 8.0GB. [2022-04-14 19:47:29,977 INFO L158 Benchmark]: Boogie Preprocessor took 26.70ms. Allocated memory is still 268.4MB. Free memory was 241.5MB in the beginning and 240.2MB in the end (delta: 1.3MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-04-14 19:47:29,977 INFO L158 Benchmark]: RCFGBuilder took 334.84ms. Allocated memory is still 268.4MB. Free memory was 240.2MB in the beginning and 227.6MB in the end (delta: 12.6MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. [2022-04-14 19:47:29,978 INFO L158 Benchmark]: IcfgTransformer took 1753.15ms. Allocated memory is still 268.4MB. Free memory was 227.6MB in the beginning and 194.6MB in the end (delta: 33.0MB). Peak memory consumption was 48.2MB. Max. memory is 8.0GB. [2022-04-14 19:47:29,978 INFO L158 Benchmark]: TraceAbstraction took 358712.42ms. Allocated memory was 268.4MB in the beginning and 323.0MB in the end (delta: 54.5MB). Free memory was 194.1MB in the beginning and 207.5MB in the end (delta: -13.4MB). Peak memory consumption was 148.4MB. Max. memory is 8.0GB. [2022-04-14 19:47:29,979 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from IcfgTransformer: - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult * Results from de.uni_freiburg.informatik.ultimate.core: - AssertionsEnabledResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11ms. Allocated memory is still 175.1MB. Free memory is still 136.8MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 209.51ms. Allocated memory was 175.1MB in the beginning and 268.4MB in the end (delta: 93.3MB). Free memory was 120.6MB in the beginning and 241.5MB in the end (delta: -120.9MB). Peak memory consumption was 9.7MB. Max. memory is 8.0GB. * Boogie Preprocessor took 26.70ms. Allocated memory is still 268.4MB. Free memory was 241.5MB in the beginning and 240.2MB in the end (delta: 1.3MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 334.84ms. Allocated memory is still 268.4MB. Free memory was 240.2MB in the beginning and 227.6MB in the end (delta: 12.6MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. * IcfgTransformer took 1753.15ms. Allocated memory is still 268.4MB. Free memory was 227.6MB in the beginning and 194.6MB in the end (delta: 33.0MB). Peak memory consumption was 48.2MB. Max. memory is 8.0GB. * TraceAbstraction took 358712.42ms. Allocated memory was 268.4MB in the beginning and 323.0MB in the end (delta: 54.5MB). Free memory was 194.1MB in the beginning and 207.5MB in the end (delta: -13.4MB). Peak memory consumption was 148.4MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: not dual finite connective de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: not dual finite connective: de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.tryToPushOverDualFiniteConnective2(QuantifierPusher.java:375) RESULT: Ultimate could not prove your program: Toolchain returned no result. [2022-04-14 19:47:30,098 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request...