/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de61.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-e106359-m [2022-04-14 19:41:53,871 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-14 19:41:53,873 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-14 19:41:53,923 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-14 19:41:53,971 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-14 19:41:53,971 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-14 19:41:53,973 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-14 19:41:53,973 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-14 19:41:53,986 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-14 19:41:53,987 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-14 19:41:53,988 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-14 19:41:53,988 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-14 19:41:53,988 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-14 19:41:53,989 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-14 19:41:53,989 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-14 19:41:53,989 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-14 19:41:53,989 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-14 19:41:53,990 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-14 19:41:53,990 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-14 19:41:53,990 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-14 19:41:53,990 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-14 19:41:53,990 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-14 19:41:53,991 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-14 19:41:53,991 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-14 19:41:53,991 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-14 19:41:53,991 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-14 19:41:53,991 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-14 19:41:53,991 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-14 19:41:53,991 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-14 19:41:53,992 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-14 19:41:53,992 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-14 19:41:54,245 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-14 19:41:54,265 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-14 19:41:54,267 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-14 19:41:54,268 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-14 19:41:54,268 INFO L275 PluginConnector]: CDTParser initialized [2022-04-14 19:41:54,270 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de61.c [2022-04-14 19:41:54,326 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b939602fd/17af3f20d6ce45e6a9a6023f38ad6b03/FLAG26f0fde79 [2022-04-14 19:41:54,735 INFO L306 CDTParser]: Found 1 translation units. [2022-04-14 19:41:54,735 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de61.c [2022-04-14 19:41:54,740 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b939602fd/17af3f20d6ce45e6a9a6023f38ad6b03/FLAG26f0fde79 [2022-04-14 19:41:54,754 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b939602fd/17af3f20d6ce45e6a9a6023f38ad6b03 [2022-04-14 19:41:54,756 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-14 19:41:54,757 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-14 19:41:54,760 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-14 19:41:54,760 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-14 19:41:54,762 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-14 19:41:54,763 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.04 07:41:54" (1/1) ... [2022-04-14 19:41:54,764 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@58ad23ba and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:54, skipping insertion in model container [2022-04-14 19:41:54,764 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.04 07:41:54" (1/1) ... [2022-04-14 19:41:54,771 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-14 19:41:54,780 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-14 19:41:54,976 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de61.c[368,381] [2022-04-14 19:41:55,004 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-14 19:41:55,012 INFO L203 MainTranslator]: Completed pre-run [2022-04-14 19:41:55,029 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de61.c[368,381] [2022-04-14 19:41:55,044 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-14 19:41:55,055 INFO L208 MainTranslator]: Completed translation [2022-04-14 19:41:55,057 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:55 WrapperNode [2022-04-14 19:41:55,057 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-14 19:41:55,058 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-14 19:41:55,058 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-14 19:41:55,059 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-14 19:41:55,068 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:55" (1/1) ... [2022-04-14 19:41:55,068 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:55" (1/1) ... [2022-04-14 19:41:55,074 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:55" (1/1) ... [2022-04-14 19:41:55,074 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:55" (1/1) ... [2022-04-14 19:41:55,091 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:55" (1/1) ... [2022-04-14 19:41:55,099 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:55" (1/1) ... [2022-04-14 19:41:55,102 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:55" (1/1) ... [2022-04-14 19:41:55,106 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-14 19:41:55,107 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-14 19:41:55,107 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-14 19:41:55,107 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-14 19:41:55,108 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:55" (1/1) ... [2022-04-14 19:41:55,123 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-14 19:41:55,132 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:41:55,149 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-14 19:41:55,175 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-14 19:41:55,189 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-14 19:41:55,189 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-14 19:41:55,189 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-14 19:41:55,189 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-14 19:41:55,190 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-14 19:41:55,190 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-14 19:41:55,190 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-14 19:41:55,190 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-14 19:41:55,190 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-14 19:41:55,190 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-14 19:41:55,190 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-14 19:41:55,191 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-14 19:41:55,191 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-14 19:41:55,191 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-14 19:41:55,192 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-14 19:41:55,192 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-14 19:41:55,193 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-14 19:41:55,193 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-14 19:41:55,254 INFO L234 CfgBuilder]: Building ICFG [2022-04-14 19:41:55,255 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-14 19:41:55,499 INFO L275 CfgBuilder]: Performing block encoding [2022-04-14 19:41:55,513 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-14 19:41:55,513 INFO L299 CfgBuilder]: Removed 6 assume(true) statements. [2022-04-14 19:41:55,514 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 07:41:55 BoogieIcfgContainer [2022-04-14 19:41:55,514 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-14 19:41:55,515 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-14 19:41:55,515 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-14 19:41:55,516 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-14 19:41:55,519 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 07:41:55" (1/1) ... [2022-04-14 19:41:55,521 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-14 19:41:56,168 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-14 19:41:56,168 INFO L91 elerationTransformer]: Accelerated Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_8 (+ v_main_~y~0_9 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_9} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] to Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] [2022-04-14 19:41:56,645 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-14 19:41:56,646 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_11 4294967296)) (= v_main_~z~0_11 (+ v_main_~z~0_10 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_11} OutVars{main_~x~0=v_main_~x~0_8, main_~z~0=v_main_~z~0_10, main_#t~post8=|v_main_#t~post8_1|, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] to Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] [2022-04-14 19:41:56,948 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-14 19:41:56,948 INFO L91 elerationTransformer]: Accelerated Formula: (and (< 0 (mod v_main_~y~0_5 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_5 (+ v_main_~y~0_4 1))) InVars {main_~z~0=v_main_~z~0_3, main_~y~0=v_main_~y~0_5} OutVars{main_#t~post10=|v_main_#t~post10_1|, main_~z~0=v_main_~z~0_2, main_~y~0=v_main_~y~0_4, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] to Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] [2022-04-14 19:41:57,253 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-14 19:41:57,254 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_10 (+ v_main_~y~0_11 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_11} OutVars{main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_10, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] to Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] [2022-04-14 19:41:57,534 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-14 19:41:57,535 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~z~0_13 (+ v_main_~z~0_12 1)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1)) (< 0 (mod v_main_~z~0_13 4294967296))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] to Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] [2022-04-14 19:41:57,828 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-14 19:41:57,828 INFO L91 elerationTransformer]: Accelerated Formula: (and (< 0 (mod v_main_~y~0_7 4294967296)) (= v_main_~y~0_7 (+ v_main_~y~0_6 1)) (= v_main_~z~0_4 (+ v_main_~z~0_5 1))) InVars {main_~z~0=v_main_~z~0_5, main_~y~0=v_main_~y~0_7} OutVars{main_~z~0=v_main_~z~0_4, main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] to Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] [2022-04-14 19:41:57,832 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 14.04 07:41:57 BasicIcfg [2022-04-14 19:41:57,832 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-14 19:41:57,833 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-14 19:41:57,833 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-14 19:41:57,837 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-14 19:41:57,838 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.04 07:41:54" (1/4) ... [2022-04-14 19:41:57,839 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@257af7f8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.04 07:41:57, skipping insertion in model container [2022-04-14 19:41:57,839 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 07:41:55" (2/4) ... [2022-04-14 19:41:57,841 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@257af7f8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.04 07:41:57, skipping insertion in model container [2022-04-14 19:41:57,841 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 07:41:55" (3/4) ... [2022-04-14 19:41:57,842 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@257af7f8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.04 07:41:57, skipping insertion in model container [2022-04-14 19:41:57,842 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 14.04 07:41:57" (4/4) ... [2022-04-14 19:41:57,843 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de61.cJordan [2022-04-14 19:41:57,847 INFO L202 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-14 19:41:57,847 INFO L161 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-14 19:41:57,879 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-14 19:41:57,883 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-14 19:41:57,884 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-14 19:41:57,896 INFO L276 IsEmpty]: Start isEmpty. Operand has 25 states, 17 states have (on average 1.8235294117647058) internal successors, (31), 18 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 19:41:57,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-14 19:41:57,902 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:41:57,903 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:41:57,903 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:41:57,907 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:41:57,908 INFO L85 PathProgramCache]: Analyzing trace with hash 430051023, now seen corresponding path program 1 times [2022-04-14 19:41:57,916 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:41:57,916 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2020661805] [2022-04-14 19:41:57,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:41:57,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:41:57,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:58,017 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:41:58,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:58,030 INFO L290 TraceCheckUtils]: 0: Hoare triple {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28#true} is VALID [2022-04-14 19:41:58,031 INFO L290 TraceCheckUtils]: 1: Hoare triple {28#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-14 19:41:58,031 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28#true} {28#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-14 19:41:58,033 INFO L272 TraceCheckUtils]: 0: Hoare triple {28#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:41:58,033 INFO L290 TraceCheckUtils]: 1: Hoare triple {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28#true} is VALID [2022-04-14 19:41:58,033 INFO L290 TraceCheckUtils]: 2: Hoare triple {28#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-14 19:41:58,033 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28#true} {28#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-14 19:41:58,033 INFO L272 TraceCheckUtils]: 4: Hoare triple {28#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-14 19:41:58,034 INFO L290 TraceCheckUtils]: 5: Hoare triple {28#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {28#true} is VALID [2022-04-14 19:41:58,034 INFO L290 TraceCheckUtils]: 6: Hoare triple {28#true} [103] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-14 19:41:58,034 INFO L290 TraceCheckUtils]: 7: Hoare triple {29#false} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {29#false} is VALID [2022-04-14 19:41:58,034 INFO L290 TraceCheckUtils]: 8: Hoare triple {29#false} [107] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-14 19:41:58,035 INFO L290 TraceCheckUtils]: 9: Hoare triple {29#false} [110] L29-1-->L35-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-14 19:41:58,035 INFO L290 TraceCheckUtils]: 10: Hoare triple {29#false} [113] L35-1-->L41-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-14 19:41:58,035 INFO L290 TraceCheckUtils]: 11: Hoare triple {29#false} [116] L41-1-->L47-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-14 19:41:58,035 INFO L290 TraceCheckUtils]: 12: Hoare triple {29#false} [119] L47-1-->L47-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-14 19:41:58,035 INFO L272 TraceCheckUtils]: 13: Hoare triple {29#false} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {29#false} is VALID [2022-04-14 19:41:58,036 INFO L290 TraceCheckUtils]: 14: Hoare triple {29#false} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {29#false} is VALID [2022-04-14 19:41:58,036 INFO L290 TraceCheckUtils]: 15: Hoare triple {29#false} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-14 19:41:58,036 INFO L290 TraceCheckUtils]: 16: Hoare triple {29#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-14 19:41:58,036 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:41:58,037 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:41:58,037 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2020661805] [2022-04-14 19:41:58,038 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2020661805] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:41:58,038 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 19:41:58,038 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-14 19:41:58,039 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1364186574] [2022-04-14 19:41:58,040 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:41:58,044 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:41:58,045 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:41:58,047 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:58,066 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:41:58,066 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-14 19:41:58,066 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:41:58,082 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-14 19:41:58,083 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-14 19:41:58,085 INFO L87 Difference]: Start difference. First operand has 25 states, 17 states have (on average 1.8235294117647058) internal successors, (31), 18 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:58,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:58,183 INFO L93 Difference]: Finished difference Result 25 states and 30 transitions. [2022-04-14 19:41:58,183 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-14 19:41:58,184 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:41:58,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:41:58,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:58,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 37 transitions. [2022-04-14 19:41:58,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:58,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 37 transitions. [2022-04-14 19:41:58,201 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 37 transitions. [2022-04-14 19:41:58,243 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:41:58,251 INFO L225 Difference]: With dead ends: 25 [2022-04-14 19:41:58,251 INFO L226 Difference]: Without dead ends: 18 [2022-04-14 19:41:58,253 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-14 19:41:58,257 INFO L913 BasicCegarLoop]: 29 mSDtfsCounter, 21 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 32 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:41:58,259 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [22 Valid, 32 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-14 19:41:58,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2022-04-14 19:41:58,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2022-04-14 19:41:58,294 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:41:58,295 INFO L82 GeneralOperation]: Start isEquivalent. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:58,295 INFO L74 IsIncluded]: Start isIncluded. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:58,297 INFO L87 Difference]: Start difference. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:58,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:58,303 INFO L93 Difference]: Finished difference Result 18 states and 23 transitions. [2022-04-14 19:41:58,303 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 23 transitions. [2022-04-14 19:41:58,303 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:41:58,304 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:41:58,309 INFO L74 IsIncluded]: Start isIncluded. First operand has 18 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18 states. [2022-04-14 19:41:58,310 INFO L87 Difference]: Start difference. First operand has 18 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18 states. [2022-04-14 19:41:58,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:58,317 INFO L93 Difference]: Finished difference Result 18 states and 23 transitions. [2022-04-14 19:41:58,317 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 23 transitions. [2022-04-14 19:41:58,322 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:41:58,322 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:41:58,323 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:41:58,323 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:41:58,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:58,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 23 transitions. [2022-04-14 19:41:58,329 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 23 transitions. Word has length 17 [2022-04-14 19:41:58,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:41:58,329 INFO L478 AbstractCegarLoop]: Abstraction has 18 states and 23 transitions. [2022-04-14 19:41:58,329 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:58,329 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 23 transitions. [2022-04-14 19:41:58,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-14 19:41:58,330 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:41:58,330 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:41:58,330 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-14 19:41:58,330 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:41:58,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:41:58,331 INFO L85 PathProgramCache]: Analyzing trace with hash -514488111, now seen corresponding path program 1 times [2022-04-14 19:41:58,331 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:41:58,331 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [471496498] [2022-04-14 19:41:58,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:41:58,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:41:58,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:58,628 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:41:58,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:58,649 INFO L290 TraceCheckUtils]: 0: Hoare triple {126#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {115#true} is VALID [2022-04-14 19:41:58,650 INFO L290 TraceCheckUtils]: 1: Hoare triple {115#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-14 19:41:58,650 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {115#true} {115#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-14 19:41:58,651 INFO L272 TraceCheckUtils]: 0: Hoare triple {115#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {126#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:41:58,651 INFO L290 TraceCheckUtils]: 1: Hoare triple {126#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {115#true} is VALID [2022-04-14 19:41:58,651 INFO L290 TraceCheckUtils]: 2: Hoare triple {115#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-14 19:41:58,651 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {115#true} {115#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-14 19:41:58,652 INFO L272 TraceCheckUtils]: 4: Hoare triple {115#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-14 19:41:58,652 INFO L290 TraceCheckUtils]: 5: Hoare triple {115#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {120#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:41:58,662 INFO L290 TraceCheckUtils]: 6: Hoare triple {120#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {121#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:41:58,663 INFO L290 TraceCheckUtils]: 7: Hoare triple {121#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {122#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:58,664 INFO L290 TraceCheckUtils]: 8: Hoare triple {122#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {122#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:58,664 INFO L290 TraceCheckUtils]: 9: Hoare triple {122#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {122#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:58,665 INFO L290 TraceCheckUtils]: 10: Hoare triple {122#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {123#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:58,666 INFO L290 TraceCheckUtils]: 11: Hoare triple {123#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {123#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:58,666 INFO L290 TraceCheckUtils]: 12: Hoare triple {123#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {123#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:58,667 INFO L272 TraceCheckUtils]: 13: Hoare triple {123#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {124#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:41:58,668 INFO L290 TraceCheckUtils]: 14: Hoare triple {124#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {125#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:41:58,668 INFO L290 TraceCheckUtils]: 15: Hoare triple {125#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {116#false} is VALID [2022-04-14 19:41:58,668 INFO L290 TraceCheckUtils]: 16: Hoare triple {116#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {116#false} is VALID [2022-04-14 19:41:58,669 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:41:58,669 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:41:58,669 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [471496498] [2022-04-14 19:41:58,669 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [471496498] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:41:58,669 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 19:41:58,669 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-04-14 19:41:58,670 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1211228868] [2022-04-14 19:41:58,670 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:41:58,671 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:41:58,671 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:41:58,671 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:58,686 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:41:58,687 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-04-14 19:41:58,687 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:41:58,687 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-04-14 19:41:58,688 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2022-04-14 19:41:58,688 INFO L87 Difference]: Start difference. First operand 18 states and 23 transitions. Second operand has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:58,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:58,965 INFO L93 Difference]: Finished difference Result 33 states and 48 transitions. [2022-04-14 19:41:58,965 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-14 19:41:58,965 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 19:41:58,965 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:41:58,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:58,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 49 transitions. [2022-04-14 19:41:58,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:58,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 49 transitions. [2022-04-14 19:41:58,969 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 49 transitions. [2022-04-14 19:41:59,024 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:41:59,025 INFO L225 Difference]: With dead ends: 33 [2022-04-14 19:41:59,025 INFO L226 Difference]: Without dead ends: 30 [2022-04-14 19:41:59,025 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2022-04-14 19:41:59,026 INFO L913 BasicCegarLoop]: 9 mSDtfsCounter, 35 mSDsluCounter, 30 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:41:59,027 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [35 Valid, 39 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 72 Invalid, 0 Unknown, 6 Unchecked, 0.1s Time] [2022-04-14 19:41:59,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-14 19:41:59,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 25. [2022-04-14 19:41:59,030 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:41:59,030 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:59,030 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:59,031 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:59,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:59,032 INFO L93 Difference]: Finished difference Result 30 states and 45 transitions. [2022-04-14 19:41:59,033 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 45 transitions. [2022-04-14 19:41:59,033 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:41:59,033 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:41:59,033 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 30 states. [2022-04-14 19:41:59,034 INFO L87 Difference]: Start difference. First operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 30 states. [2022-04-14 19:41:59,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:41:59,036 INFO L93 Difference]: Finished difference Result 30 states and 45 transitions. [2022-04-14 19:41:59,036 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 45 transitions. [2022-04-14 19:41:59,036 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:41:59,037 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:41:59,037 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:41:59,037 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:41:59,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:59,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 35 transitions. [2022-04-14 19:41:59,039 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 35 transitions. Word has length 17 [2022-04-14 19:41:59,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:41:59,040 INFO L478 AbstractCegarLoop]: Abstraction has 25 states and 35 transitions. [2022-04-14 19:41:59,040 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:41:59,040 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 35 transitions. [2022-04-14 19:41:59,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-14 19:41:59,041 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:41:59,041 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:41:59,041 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-14 19:41:59,042 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:41:59,042 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:41:59,042 INFO L85 PathProgramCache]: Analyzing trace with hash 34479891, now seen corresponding path program 1 times [2022-04-14 19:41:59,042 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:41:59,043 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1264229434] [2022-04-14 19:41:59,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:41:59,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:41:59,071 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:41:59,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:59,130 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:41:59,315 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:41:59,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:59,323 INFO L290 TraceCheckUtils]: 0: Hoare triple {269#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {257#true} is VALID [2022-04-14 19:41:59,323 INFO L290 TraceCheckUtils]: 1: Hoare triple {257#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-14 19:41:59,323 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {257#true} {257#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-14 19:41:59,324 INFO L272 TraceCheckUtils]: 0: Hoare triple {257#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {269#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:41:59,324 INFO L290 TraceCheckUtils]: 1: Hoare triple {269#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {257#true} is VALID [2022-04-14 19:41:59,324 INFO L290 TraceCheckUtils]: 2: Hoare triple {257#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-14 19:41:59,325 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {257#true} {257#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-14 19:41:59,325 INFO L272 TraceCheckUtils]: 4: Hoare triple {257#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-14 19:41:59,325 INFO L290 TraceCheckUtils]: 5: Hoare triple {257#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {262#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-14 19:41:59,326 INFO L290 TraceCheckUtils]: 6: Hoare triple {262#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {263#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:41:59,327 INFO L290 TraceCheckUtils]: 7: Hoare triple {263#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {264#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:41:59,328 INFO L290 TraceCheckUtils]: 8: Hoare triple {264#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {264#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:41:59,328 INFO L290 TraceCheckUtils]: 9: Hoare triple {264#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:41:59,329 INFO L290 TraceCheckUtils]: 10: Hoare triple {265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:41:59,330 INFO L290 TraceCheckUtils]: 11: Hoare triple {265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {266#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:59,331 INFO L290 TraceCheckUtils]: 12: Hoare triple {266#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {266#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:59,331 INFO L290 TraceCheckUtils]: 13: Hoare triple {266#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {266#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:41:59,332 INFO L272 TraceCheckUtils]: 14: Hoare triple {266#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {267#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:41:59,333 INFO L290 TraceCheckUtils]: 15: Hoare triple {267#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {268#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:41:59,333 INFO L290 TraceCheckUtils]: 16: Hoare triple {268#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {258#false} is VALID [2022-04-14 19:41:59,334 INFO L290 TraceCheckUtils]: 17: Hoare triple {258#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#false} is VALID [2022-04-14 19:41:59,334 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:41:59,334 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:41:59,334 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1264229434] [2022-04-14 19:41:59,334 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1264229434] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:41:59,335 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [561070147] [2022-04-14 19:41:59,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:41:59,335 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:41:59,335 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:41:59,336 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:41:59,358 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-14 19:41:59,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:59,391 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-14 19:41:59,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:41:59,421 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:42:00,043 INFO L272 TraceCheckUtils]: 0: Hoare triple {257#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-14 19:42:00,044 INFO L290 TraceCheckUtils]: 1: Hoare triple {257#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {257#true} is VALID [2022-04-14 19:42:00,044 INFO L290 TraceCheckUtils]: 2: Hoare triple {257#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-14 19:42:00,044 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {257#true} {257#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-14 19:42:00,044 INFO L272 TraceCheckUtils]: 4: Hoare triple {257#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-14 19:42:00,045 INFO L290 TraceCheckUtils]: 5: Hoare triple {257#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {288#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:42:00,045 INFO L290 TraceCheckUtils]: 6: Hoare triple {288#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {292#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:00,045 INFO L290 TraceCheckUtils]: 7: Hoare triple {292#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {292#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:00,046 INFO L290 TraceCheckUtils]: 8: Hoare triple {292#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {292#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:00,046 INFO L290 TraceCheckUtils]: 9: Hoare triple {292#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {292#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:00,047 INFO L290 TraceCheckUtils]: 10: Hoare triple {292#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {292#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:00,047 INFO L290 TraceCheckUtils]: 11: Hoare triple {292#(not (< 0 (mod main_~n~0 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {292#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:00,047 INFO L290 TraceCheckUtils]: 12: Hoare triple {292#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {311#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:00,048 INFO L290 TraceCheckUtils]: 13: Hoare triple {311#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {311#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:00,051 INFO L272 TraceCheckUtils]: 14: Hoare triple {311#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {318#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:42:00,052 INFO L290 TraceCheckUtils]: 15: Hoare triple {318#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {322#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:42:00,052 INFO L290 TraceCheckUtils]: 16: Hoare triple {322#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {258#false} is VALID [2022-04-14 19:42:00,053 INFO L290 TraceCheckUtils]: 17: Hoare triple {258#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#false} is VALID [2022-04-14 19:42:00,053 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:42:00,053 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-14 19:42:00,053 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [561070147] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:42:00,053 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-14 19:42:00,053 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 15 [2022-04-14 19:42:00,053 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [837871111] [2022-04-14 19:42:00,054 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:42:00,054 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:42:00,054 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:42:00,054 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:00,069 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:00,070 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-14 19:42:00,070 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:42:00,070 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-14 19:42:00,070 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=163, Unknown=0, NotChecked=0, Total=210 [2022-04-14 19:42:00,071 INFO L87 Difference]: Start difference. First operand 25 states and 35 transitions. Second operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:00,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:00,192 INFO L93 Difference]: Finished difference Result 32 states and 45 transitions. [2022-04-14 19:42:00,192 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-14 19:42:00,192 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:42:00,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:42:00,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:00,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 46 transitions. [2022-04-14 19:42:00,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:00,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 46 transitions. [2022-04-14 19:42:00,195 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 46 transitions. [2022-04-14 19:42:00,241 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:00,242 INFO L225 Difference]: With dead ends: 32 [2022-04-14 19:42:00,242 INFO L226 Difference]: Without dead ends: 29 [2022-04-14 19:42:00,242 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=68, Invalid=238, Unknown=0, NotChecked=0, Total=306 [2022-04-14 19:42:00,243 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 12 mSDsluCounter, 51 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 31 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:42:00,244 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [12 Valid, 64 Invalid, 31 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 24 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-14 19:42:00,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2022-04-14 19:42:00,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 25. [2022-04-14 19:42:00,246 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:42:00,247 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:00,247 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:00,247 INFO L87 Difference]: Start difference. First operand 29 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:00,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:00,249 INFO L93 Difference]: Finished difference Result 29 states and 42 transitions. [2022-04-14 19:42:00,249 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 42 transitions. [2022-04-14 19:42:00,249 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:00,249 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:00,249 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-14 19:42:00,250 INFO L87 Difference]: Start difference. First operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-14 19:42:00,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:00,251 INFO L93 Difference]: Finished difference Result 29 states and 42 transitions. [2022-04-14 19:42:00,251 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 42 transitions. [2022-04-14 19:42:00,251 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:00,251 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:00,251 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:42:00,252 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:42:00,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:00,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 35 transitions. [2022-04-14 19:42:00,275 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 35 transitions. Word has length 18 [2022-04-14 19:42:00,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:42:00,276 INFO L478 AbstractCegarLoop]: Abstraction has 25 states and 35 transitions. [2022-04-14 19:42:00,276 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:00,276 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 35 transitions. [2022-04-14 19:42:00,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-14 19:42:00,276 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:42:00,277 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:42:00,301 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-04-14 19:42:00,477 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:00,478 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:42:00,478 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:42:00,479 INFO L85 PathProgramCache]: Analyzing trace with hash 1257458414, now seen corresponding path program 1 times [2022-04-14 19:42:00,479 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:42:00,479 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1854551005] [2022-04-14 19:42:00,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:00,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:42:00,491 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:00,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:00,514 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:00,662 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:42:00,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:00,668 INFO L290 TraceCheckUtils]: 0: Hoare triple {462#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {449#true} is VALID [2022-04-14 19:42:00,668 INFO L290 TraceCheckUtils]: 1: Hoare triple {449#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-14 19:42:00,669 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {449#true} {449#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-14 19:42:00,669 INFO L272 TraceCheckUtils]: 0: Hoare triple {449#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {462#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:42:00,670 INFO L290 TraceCheckUtils]: 1: Hoare triple {462#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {449#true} is VALID [2022-04-14 19:42:00,670 INFO L290 TraceCheckUtils]: 2: Hoare triple {449#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-14 19:42:00,670 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {449#true} {449#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-14 19:42:00,670 INFO L272 TraceCheckUtils]: 4: Hoare triple {449#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-14 19:42:00,671 INFO L290 TraceCheckUtils]: 5: Hoare triple {449#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {454#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:00,671 INFO L290 TraceCheckUtils]: 6: Hoare triple {454#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {455#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:00,673 INFO L290 TraceCheckUtils]: 7: Hoare triple {455#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {456#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:00,673 INFO L290 TraceCheckUtils]: 8: Hoare triple {456#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {456#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:00,674 INFO L290 TraceCheckUtils]: 9: Hoare triple {456#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {457#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:00,675 INFO L290 TraceCheckUtils]: 10: Hoare triple {457#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {458#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:42:00,675 INFO L290 TraceCheckUtils]: 11: Hoare triple {458#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {458#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:42:00,677 INFO L290 TraceCheckUtils]: 12: Hoare triple {458#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {459#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:00,677 INFO L290 TraceCheckUtils]: 13: Hoare triple {459#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {459#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:00,678 INFO L272 TraceCheckUtils]: 14: Hoare triple {459#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {460#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:42:00,679 INFO L290 TraceCheckUtils]: 15: Hoare triple {460#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {461#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:42:00,679 INFO L290 TraceCheckUtils]: 16: Hoare triple {461#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {450#false} is VALID [2022-04-14 19:42:00,680 INFO L290 TraceCheckUtils]: 17: Hoare triple {450#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {450#false} is VALID [2022-04-14 19:42:00,680 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:42:00,680 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:42:00,680 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1854551005] [2022-04-14 19:42:00,680 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1854551005] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:42:00,680 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [859617635] [2022-04-14 19:42:00,681 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:00,681 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:00,681 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:42:00,682 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:42:00,684 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-14 19:42:00,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:00,719 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-14 19:42:00,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:00,739 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:42:01,476 INFO L272 TraceCheckUtils]: 0: Hoare triple {449#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-14 19:42:01,477 INFO L290 TraceCheckUtils]: 1: Hoare triple {449#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {449#true} is VALID [2022-04-14 19:42:01,477 INFO L290 TraceCheckUtils]: 2: Hoare triple {449#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-14 19:42:01,477 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {449#true} {449#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-14 19:42:01,478 INFO L272 TraceCheckUtils]: 4: Hoare triple {449#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-14 19:42:01,480 INFO L290 TraceCheckUtils]: 5: Hoare triple {449#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {481#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:42:01,481 INFO L290 TraceCheckUtils]: 6: Hoare triple {481#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {485#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:01,482 INFO L290 TraceCheckUtils]: 7: Hoare triple {485#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {485#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:01,482 INFO L290 TraceCheckUtils]: 8: Hoare triple {485#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {492#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:01,483 INFO L290 TraceCheckUtils]: 9: Hoare triple {492#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {496#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:01,483 INFO L290 TraceCheckUtils]: 10: Hoare triple {496#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {496#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:01,484 INFO L290 TraceCheckUtils]: 11: Hoare triple {496#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {496#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:01,485 INFO L290 TraceCheckUtils]: 12: Hoare triple {496#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {492#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:01,486 INFO L290 TraceCheckUtils]: 13: Hoare triple {492#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {492#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:01,488 INFO L272 TraceCheckUtils]: 14: Hoare triple {492#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {512#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:42:01,489 INFO L290 TraceCheckUtils]: 15: Hoare triple {512#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {516#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:42:01,490 INFO L290 TraceCheckUtils]: 16: Hoare triple {516#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {450#false} is VALID [2022-04-14 19:42:01,491 INFO L290 TraceCheckUtils]: 17: Hoare triple {450#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {450#false} is VALID [2022-04-14 19:42:01,491 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:42:01,491 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:42:06,293 INFO L290 TraceCheckUtils]: 17: Hoare triple {450#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {450#false} is VALID [2022-04-14 19:42:06,302 INFO L290 TraceCheckUtils]: 16: Hoare triple {516#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {450#false} is VALID [2022-04-14 19:42:06,303 INFO L290 TraceCheckUtils]: 15: Hoare triple {512#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {516#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:42:06,306 INFO L272 TraceCheckUtils]: 14: Hoare triple {532#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {512#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:42:06,307 INFO L290 TraceCheckUtils]: 13: Hoare triple {532#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {532#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-14 19:42:08,334 WARN L290 TraceCheckUtils]: 12: Hoare triple {539#(forall ((aux_mod_v_main_~z~0_28_31 Int)) (or (> 0 aux_mod_v_main_~z~0_28_31) (>= aux_mod_v_main_~z~0_28_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_28_31) (and (or (forall ((aux_div_v_main_~z~0_28_31 Int)) (not (= (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_28_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))))))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {532#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is UNKNOWN [2022-04-14 19:42:10,348 WARN L290 TraceCheckUtils]: 11: Hoare triple {539#(forall ((aux_mod_v_main_~z~0_28_31 Int)) (or (> 0 aux_mod_v_main_~z~0_28_31) (>= aux_mod_v_main_~z~0_28_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_28_31) (and (or (forall ((aux_div_v_main_~z~0_28_31 Int)) (not (= (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_28_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))))))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {539#(forall ((aux_mod_v_main_~z~0_28_31 Int)) (or (> 0 aux_mod_v_main_~z~0_28_31) (>= aux_mod_v_main_~z~0_28_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_28_31) (and (or (forall ((aux_div_v_main_~z~0_28_31 Int)) (not (= (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_28_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))))))))} is UNKNOWN [2022-04-14 19:42:12,366 WARN L290 TraceCheckUtils]: 10: Hoare triple {539#(forall ((aux_mod_v_main_~z~0_28_31 Int)) (or (> 0 aux_mod_v_main_~z~0_28_31) (>= aux_mod_v_main_~z~0_28_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_28_31) (and (or (forall ((aux_div_v_main_~z~0_28_31 Int)) (not (= (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_28_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))))))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {539#(forall ((aux_mod_v_main_~z~0_28_31 Int)) (or (> 0 aux_mod_v_main_~z~0_28_31) (>= aux_mod_v_main_~z~0_28_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_28_31) (and (or (forall ((aux_div_v_main_~z~0_28_31 Int)) (not (= (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_28_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))))))))} is UNKNOWN [2022-04-14 19:42:12,368 INFO L290 TraceCheckUtils]: 9: Hoare triple {532#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {539#(forall ((aux_mod_v_main_~z~0_28_31 Int)) (or (> 0 aux_mod_v_main_~z~0_28_31) (>= aux_mod_v_main_~z~0_28_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_28_31) (and (or (forall ((aux_div_v_main_~z~0_28_31 Int)) (not (= (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_28_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))))))))} is VALID [2022-04-14 19:42:12,369 INFO L290 TraceCheckUtils]: 8: Hoare triple {485#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {532#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-14 19:42:12,369 INFO L290 TraceCheckUtils]: 7: Hoare triple {485#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {485#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:12,370 INFO L290 TraceCheckUtils]: 6: Hoare triple {558#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {485#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:12,371 INFO L290 TraceCheckUtils]: 5: Hoare triple {449#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {558#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:12,371 INFO L272 TraceCheckUtils]: 4: Hoare triple {449#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-14 19:42:12,371 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {449#true} {449#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-14 19:42:12,371 INFO L290 TraceCheckUtils]: 2: Hoare triple {449#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-14 19:42:12,371 INFO L290 TraceCheckUtils]: 1: Hoare triple {449#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {449#true} is VALID [2022-04-14 19:42:12,371 INFO L272 TraceCheckUtils]: 0: Hoare triple {449#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-14 19:42:12,372 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:42:12,372 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [859617635] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:42:12,372 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:42:12,372 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 8] total 20 [2022-04-14 19:42:12,372 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [196708386] [2022-04-14 19:42:12,372 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:42:12,373 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:42:12,374 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:42:12,374 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:18,459 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 38 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:18,459 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-14 19:42:18,459 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:42:18,460 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-14 19:42:18,460 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=297, Unknown=1, NotChecked=0, Total=380 [2022-04-14 19:42:18,460 INFO L87 Difference]: Start difference. First operand 25 states and 35 transitions. Second operand has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:18,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:18,867 INFO L93 Difference]: Finished difference Result 38 states and 56 transitions. [2022-04-14 19:42:18,867 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-14 19:42:18,867 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:42:18,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:42:18,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:18,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-14 19:42:18,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:18,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-14 19:42:18,871 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 50 transitions. [2022-04-14 19:42:18,940 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:18,941 INFO L225 Difference]: With dead ends: 38 [2022-04-14 19:42:18,941 INFO L226 Difference]: Without dead ends: 35 [2022-04-14 19:42:18,942 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 25 SyntacticMatches, 4 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 161 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=140, Invalid=509, Unknown=1, NotChecked=0, Total=650 [2022-04-14 19:42:18,943 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 40 mSDsluCounter, 56 mSDsCounter, 0 mSdLazyCounter, 93 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 67 SdHoareTripleChecker+Invalid, 129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 93 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 23 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:42:18,943 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [40 Valid, 67 Invalid, 129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 93 Invalid, 0 Unknown, 23 Unchecked, 0.1s Time] [2022-04-14 19:42:18,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2022-04-14 19:42:18,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 29. [2022-04-14 19:42:18,946 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:42:18,946 INFO L82 GeneralOperation]: Start isEquivalent. First operand 35 states. Second operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:18,946 INFO L74 IsIncluded]: Start isIncluded. First operand 35 states. Second operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:18,946 INFO L87 Difference]: Start difference. First operand 35 states. Second operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:18,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:18,952 INFO L93 Difference]: Finished difference Result 35 states and 53 transitions. [2022-04-14 19:42:18,952 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 53 transitions. [2022-04-14 19:42:18,954 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:18,954 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:18,954 INFO L74 IsIncluded]: Start isIncluded. First operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 35 states. [2022-04-14 19:42:18,954 INFO L87 Difference]: Start difference. First operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 35 states. [2022-04-14 19:42:18,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:18,956 INFO L93 Difference]: Finished difference Result 35 states and 53 transitions. [2022-04-14 19:42:18,956 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 53 transitions. [2022-04-14 19:42:18,956 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:18,956 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:18,956 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:42:18,956 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:42:18,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:18,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 42 transitions. [2022-04-14 19:42:18,958 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 42 transitions. Word has length 18 [2022-04-14 19:42:18,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:42:18,958 INFO L478 AbstractCegarLoop]: Abstraction has 29 states and 42 transitions. [2022-04-14 19:42:18,958 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:18,958 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 42 transitions. [2022-04-14 19:42:18,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-14 19:42:18,961 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:42:18,961 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:42:18,988 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-14 19:42:19,175 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-14 19:42:19,176 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:42:19,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:42:19,177 INFO L85 PathProgramCache]: Analyzing trace with hash 2030445491, now seen corresponding path program 1 times [2022-04-14 19:42:19,177 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:42:19,177 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1222573386] [2022-04-14 19:42:19,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:19,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:42:19,188 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:19,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:19,218 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:19,362 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:42:19,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:19,368 INFO L290 TraceCheckUtils]: 0: Hoare triple {740#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {728#true} is VALID [2022-04-14 19:42:19,368 INFO L290 TraceCheckUtils]: 1: Hoare triple {728#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {728#true} is VALID [2022-04-14 19:42:19,369 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {728#true} {728#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {728#true} is VALID [2022-04-14 19:42:19,369 INFO L272 TraceCheckUtils]: 0: Hoare triple {728#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {740#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:42:19,370 INFO L290 TraceCheckUtils]: 1: Hoare triple {740#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {728#true} is VALID [2022-04-14 19:42:19,370 INFO L290 TraceCheckUtils]: 2: Hoare triple {728#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {728#true} is VALID [2022-04-14 19:42:19,370 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {728#true} {728#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {728#true} is VALID [2022-04-14 19:42:19,370 INFO L272 TraceCheckUtils]: 4: Hoare triple {728#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {728#true} is VALID [2022-04-14 19:42:19,371 INFO L290 TraceCheckUtils]: 5: Hoare triple {728#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {733#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:19,371 INFO L290 TraceCheckUtils]: 6: Hoare triple {733#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {734#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:19,372 INFO L290 TraceCheckUtils]: 7: Hoare triple {734#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {735#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:19,372 INFO L290 TraceCheckUtils]: 8: Hoare triple {735#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {735#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:19,373 INFO L290 TraceCheckUtils]: 9: Hoare triple {735#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {735#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:19,373 INFO L290 TraceCheckUtils]: 10: Hoare triple {735#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {735#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:19,375 INFO L290 TraceCheckUtils]: 11: Hoare triple {735#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {736#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-14 19:42:19,375 INFO L290 TraceCheckUtils]: 12: Hoare triple {736#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {737#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:19,376 INFO L290 TraceCheckUtils]: 13: Hoare triple {737#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {737#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:19,377 INFO L272 TraceCheckUtils]: 14: Hoare triple {737#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {738#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:42:19,378 INFO L290 TraceCheckUtils]: 15: Hoare triple {738#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {739#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:42:19,378 INFO L290 TraceCheckUtils]: 16: Hoare triple {739#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {729#false} is VALID [2022-04-14 19:42:19,379 INFO L290 TraceCheckUtils]: 17: Hoare triple {729#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {729#false} is VALID [2022-04-14 19:42:19,379 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:42:19,379 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:42:19,379 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1222573386] [2022-04-14 19:42:19,379 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1222573386] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:42:19,380 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [592927322] [2022-04-14 19:42:19,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:19,380 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:19,380 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:42:19,384 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:42:19,391 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-14 19:42:19,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:19,423 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-14 19:42:19,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:19,435 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:42:20,017 INFO L272 TraceCheckUtils]: 0: Hoare triple {728#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {728#true} is VALID [2022-04-14 19:42:20,018 INFO L290 TraceCheckUtils]: 1: Hoare triple {728#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {728#true} is VALID [2022-04-14 19:42:20,018 INFO L290 TraceCheckUtils]: 2: Hoare triple {728#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {728#true} is VALID [2022-04-14 19:42:20,018 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {728#true} {728#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {728#true} is VALID [2022-04-14 19:42:20,018 INFO L272 TraceCheckUtils]: 4: Hoare triple {728#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {728#true} is VALID [2022-04-14 19:42:20,018 INFO L290 TraceCheckUtils]: 5: Hoare triple {728#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {759#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:42:20,019 INFO L290 TraceCheckUtils]: 6: Hoare triple {759#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {763#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:20,019 INFO L290 TraceCheckUtils]: 7: Hoare triple {763#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {763#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:20,020 INFO L290 TraceCheckUtils]: 8: Hoare triple {763#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {763#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:20,020 INFO L290 TraceCheckUtils]: 9: Hoare triple {763#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {763#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:20,021 INFO L290 TraceCheckUtils]: 10: Hoare triple {763#(not (< 0 (mod main_~n~0 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {763#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:20,021 INFO L290 TraceCheckUtils]: 11: Hoare triple {763#(not (< 0 (mod main_~n~0 4294967296)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {763#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:20,022 INFO L290 TraceCheckUtils]: 12: Hoare triple {763#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {782#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:20,023 INFO L290 TraceCheckUtils]: 13: Hoare triple {782#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {782#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:20,024 INFO L272 TraceCheckUtils]: 14: Hoare triple {782#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {789#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:42:20,024 INFO L290 TraceCheckUtils]: 15: Hoare triple {789#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {793#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:42:20,025 INFO L290 TraceCheckUtils]: 16: Hoare triple {793#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {729#false} is VALID [2022-04-14 19:42:20,025 INFO L290 TraceCheckUtils]: 17: Hoare triple {729#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {729#false} is VALID [2022-04-14 19:42:20,025 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:42:20,025 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-14 19:42:20,025 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [592927322] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:42:20,026 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-14 19:42:20,026 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 15 [2022-04-14 19:42:20,026 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1114287410] [2022-04-14 19:42:20,026 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:42:20,026 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:42:20,027 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:42:20,027 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:20,043 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:20,043 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-14 19:42:20,043 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:42:20,044 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-14 19:42:20,044 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2022-04-14 19:42:20,044 INFO L87 Difference]: Start difference. First operand 29 states and 42 transitions. Second operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:20,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:20,176 INFO L93 Difference]: Finished difference Result 34 states and 48 transitions. [2022-04-14 19:42:20,177 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-14 19:42:20,177 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:42:20,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:42:20,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:20,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 42 transitions. [2022-04-14 19:42:20,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:20,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 42 transitions. [2022-04-14 19:42:20,180 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 42 transitions. [2022-04-14 19:42:20,216 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:20,216 INFO L225 Difference]: With dead ends: 34 [2022-04-14 19:42:20,217 INFO L226 Difference]: Without dead ends: 31 [2022-04-14 19:42:20,217 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-04-14 19:42:20,218 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 12 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 73 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:42:20,218 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [12 Valid, 73 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 29 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-14 19:42:20,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2022-04-14 19:42:20,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 30. [2022-04-14 19:42:20,220 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:42:20,221 INFO L82 GeneralOperation]: Start isEquivalent. First operand 31 states. Second operand has 30 states, 25 states have (on average 1.6) internal successors, (40), 25 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:20,221 INFO L74 IsIncluded]: Start isIncluded. First operand 31 states. Second operand has 30 states, 25 states have (on average 1.6) internal successors, (40), 25 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:20,221 INFO L87 Difference]: Start difference. First operand 31 states. Second operand has 30 states, 25 states have (on average 1.6) internal successors, (40), 25 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:20,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:20,223 INFO L93 Difference]: Finished difference Result 31 states and 45 transitions. [2022-04-14 19:42:20,223 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 45 transitions. [2022-04-14 19:42:20,223 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:20,224 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:20,224 INFO L74 IsIncluded]: Start isIncluded. First operand has 30 states, 25 states have (on average 1.6) internal successors, (40), 25 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31 states. [2022-04-14 19:42:20,224 INFO L87 Difference]: Start difference. First operand has 30 states, 25 states have (on average 1.6) internal successors, (40), 25 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31 states. [2022-04-14 19:42:20,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:20,225 INFO L93 Difference]: Finished difference Result 31 states and 45 transitions. [2022-04-14 19:42:20,225 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 45 transitions. [2022-04-14 19:42:20,225 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:20,226 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:20,226 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:42:20,226 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:42:20,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 25 states have (on average 1.6) internal successors, (40), 25 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:20,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 44 transitions. [2022-04-14 19:42:20,227 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 44 transitions. Word has length 18 [2022-04-14 19:42:20,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:42:20,227 INFO L478 AbstractCegarLoop]: Abstraction has 30 states and 44 transitions. [2022-04-14 19:42:20,227 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:20,227 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 44 transitions. [2022-04-14 19:42:20,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-14 19:42:20,228 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:42:20,228 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:42:20,248 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-14 19:42:20,439 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:20,440 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:42:20,440 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:42:20,440 INFO L85 PathProgramCache]: Analyzing trace with hash 223241102, now seen corresponding path program 1 times [2022-04-14 19:42:20,440 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:42:20,440 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [241627982] [2022-04-14 19:42:20,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:20,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:42:20,452 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-14 19:42:20,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:20,472 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-14 19:42:20,638 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:42:20,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:20,646 INFO L290 TraceCheckUtils]: 0: Hoare triple {942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {931#true} is VALID [2022-04-14 19:42:20,646 INFO L290 TraceCheckUtils]: 1: Hoare triple {931#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-14 19:42:20,646 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {931#true} {931#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-14 19:42:20,647 INFO L272 TraceCheckUtils]: 0: Hoare triple {931#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:42:20,647 INFO L290 TraceCheckUtils]: 1: Hoare triple {942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {931#true} is VALID [2022-04-14 19:42:20,647 INFO L290 TraceCheckUtils]: 2: Hoare triple {931#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-14 19:42:20,647 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {931#true} {931#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-14 19:42:20,647 INFO L272 TraceCheckUtils]: 4: Hoare triple {931#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-14 19:42:20,648 INFO L290 TraceCheckUtils]: 5: Hoare triple {931#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {936#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:20,648 INFO L290 TraceCheckUtils]: 6: Hoare triple {936#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {937#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:20,649 INFO L290 TraceCheckUtils]: 7: Hoare triple {937#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {938#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:20,650 INFO L290 TraceCheckUtils]: 8: Hoare triple {938#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {938#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:20,650 INFO L290 TraceCheckUtils]: 9: Hoare triple {938#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {938#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:20,651 INFO L290 TraceCheckUtils]: 10: Hoare triple {938#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {939#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:20,652 INFO L290 TraceCheckUtils]: 11: Hoare triple {939#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {939#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:20,652 INFO L290 TraceCheckUtils]: 12: Hoare triple {939#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {939#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:20,653 INFO L290 TraceCheckUtils]: 13: Hoare triple {939#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {939#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:20,654 INFO L272 TraceCheckUtils]: 14: Hoare triple {939#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {940#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:42:20,654 INFO L290 TraceCheckUtils]: 15: Hoare triple {940#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {941#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:42:20,655 INFO L290 TraceCheckUtils]: 16: Hoare triple {941#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-14 19:42:20,655 INFO L290 TraceCheckUtils]: 17: Hoare triple {932#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-14 19:42:20,655 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:42:20,655 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:42:20,655 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [241627982] [2022-04-14 19:42:20,655 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [241627982] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:42:20,656 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2096620461] [2022-04-14 19:42:20,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:20,656 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:20,656 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:42:20,660 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:42:20,662 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-14 19:42:20,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:20,690 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-14 19:42:20,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:20,711 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:42:21,337 INFO L272 TraceCheckUtils]: 0: Hoare triple {931#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-14 19:42:21,337 INFO L290 TraceCheckUtils]: 1: Hoare triple {931#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {931#true} is VALID [2022-04-14 19:42:21,337 INFO L290 TraceCheckUtils]: 2: Hoare triple {931#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-14 19:42:21,337 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {931#true} {931#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-14 19:42:21,337 INFO L272 TraceCheckUtils]: 4: Hoare triple {931#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-14 19:42:21,339 INFO L290 TraceCheckUtils]: 5: Hoare triple {931#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {961#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:42:21,340 INFO L290 TraceCheckUtils]: 6: Hoare triple {961#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {965#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:21,340 INFO L290 TraceCheckUtils]: 7: Hoare triple {965#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {965#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:21,341 INFO L290 TraceCheckUtils]: 8: Hoare triple {965#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {972#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:21,342 INFO L290 TraceCheckUtils]: 9: Hoare triple {972#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {972#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:21,343 INFO L290 TraceCheckUtils]: 10: Hoare triple {972#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {972#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:21,343 INFO L290 TraceCheckUtils]: 11: Hoare triple {972#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {982#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:21,343 INFO L290 TraceCheckUtils]: 12: Hoare triple {982#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {982#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:21,344 INFO L290 TraceCheckUtils]: 13: Hoare triple {982#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {982#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:21,345 INFO L272 TraceCheckUtils]: 14: Hoare triple {982#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {992#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:42:21,345 INFO L290 TraceCheckUtils]: 15: Hoare triple {992#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {996#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:42:21,345 INFO L290 TraceCheckUtils]: 16: Hoare triple {996#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-14 19:42:21,345 INFO L290 TraceCheckUtils]: 17: Hoare triple {932#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-14 19:42:21,346 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:42:21,346 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-14 19:42:21,346 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2096620461] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:42:21,346 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-14 19:42:21,346 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [9] total 15 [2022-04-14 19:42:21,346 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2077710630] [2022-04-14 19:42:21,346 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:42:21,346 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:42:21,347 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:42:21,347 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:21,361 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:21,361 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-14 19:42:21,361 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:42:21,362 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-14 19:42:21,362 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=167, Unknown=0, NotChecked=0, Total=210 [2022-04-14 19:42:21,362 INFO L87 Difference]: Start difference. First operand 30 states and 44 transitions. Second operand has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:21,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:21,441 INFO L93 Difference]: Finished difference Result 36 states and 52 transitions. [2022-04-14 19:42:21,441 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-14 19:42:21,441 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:42:21,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:42:21,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:21,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 39 transitions. [2022-04-14 19:42:21,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:21,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 39 transitions. [2022-04-14 19:42:21,458 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 39 transitions. [2022-04-14 19:42:21,489 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:21,490 INFO L225 Difference]: With dead ends: 36 [2022-04-14 19:42:21,490 INFO L226 Difference]: Without dead ends: 33 [2022-04-14 19:42:21,490 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 14 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=191, Unknown=0, NotChecked=0, Total=240 [2022-04-14 19:42:21,491 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 14 mSDsluCounter, 45 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 58 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:42:21,492 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [14 Valid, 58 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 27 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-14 19:42:21,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2022-04-14 19:42:21,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 31. [2022-04-14 19:42:21,494 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:42:21,494 INFO L82 GeneralOperation]: Start isEquivalent. First operand 33 states. Second operand has 31 states, 26 states have (on average 1.6153846153846154) internal successors, (42), 26 states have internal predecessors, (42), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:21,494 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand has 31 states, 26 states have (on average 1.6153846153846154) internal successors, (42), 26 states have internal predecessors, (42), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:21,495 INFO L87 Difference]: Start difference. First operand 33 states. Second operand has 31 states, 26 states have (on average 1.6153846153846154) internal successors, (42), 26 states have internal predecessors, (42), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:21,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:21,496 INFO L93 Difference]: Finished difference Result 33 states and 49 transitions. [2022-04-14 19:42:21,496 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 49 transitions. [2022-04-14 19:42:21,496 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:21,497 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:21,497 INFO L74 IsIncluded]: Start isIncluded. First operand has 31 states, 26 states have (on average 1.6153846153846154) internal successors, (42), 26 states have internal predecessors, (42), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 33 states. [2022-04-14 19:42:21,497 INFO L87 Difference]: Start difference. First operand has 31 states, 26 states have (on average 1.6153846153846154) internal successors, (42), 26 states have internal predecessors, (42), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 33 states. [2022-04-14 19:42:21,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:21,498 INFO L93 Difference]: Finished difference Result 33 states and 49 transitions. [2022-04-14 19:42:21,499 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 49 transitions. [2022-04-14 19:42:21,499 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:21,499 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:21,499 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:42:21,499 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:42:21,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 26 states have (on average 1.6153846153846154) internal successors, (42), 26 states have internal predecessors, (42), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:21,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 46 transitions. [2022-04-14 19:42:21,500 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 46 transitions. Word has length 18 [2022-04-14 19:42:21,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:42:21,501 INFO L478 AbstractCegarLoop]: Abstraction has 31 states and 46 transitions. [2022-04-14 19:42:21,501 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:21,501 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 46 transitions. [2022-04-14 19:42:21,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-14 19:42:21,501 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:42:21,501 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:42:21,522 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-14 19:42:21,715 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:21,716 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:42:21,716 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:42:21,716 INFO L85 PathProgramCache]: Analyzing trace with hash -1522150354, now seen corresponding path program 1 times [2022-04-14 19:42:21,716 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:42:21,716 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [436246570] [2022-04-14 19:42:21,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:21,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:42:21,724 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:21,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:21,740 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:21,855 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:42:21,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:21,863 INFO L290 TraceCheckUtils]: 0: Hoare triple {1149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1137#true} is VALID [2022-04-14 19:42:21,863 INFO L290 TraceCheckUtils]: 1: Hoare triple {1137#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1137#true} is VALID [2022-04-14 19:42:21,863 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1137#true} {1137#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1137#true} is VALID [2022-04-14 19:42:21,864 INFO L272 TraceCheckUtils]: 0: Hoare triple {1137#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:42:21,864 INFO L290 TraceCheckUtils]: 1: Hoare triple {1149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1137#true} is VALID [2022-04-14 19:42:21,864 INFO L290 TraceCheckUtils]: 2: Hoare triple {1137#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1137#true} is VALID [2022-04-14 19:42:21,864 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1137#true} {1137#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1137#true} is VALID [2022-04-14 19:42:21,864 INFO L272 TraceCheckUtils]: 4: Hoare triple {1137#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1137#true} is VALID [2022-04-14 19:42:21,865 INFO L290 TraceCheckUtils]: 5: Hoare triple {1137#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1142#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:21,871 INFO L290 TraceCheckUtils]: 6: Hoare triple {1142#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1143#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:21,873 INFO L290 TraceCheckUtils]: 7: Hoare triple {1143#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1144#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:42:21,874 INFO L290 TraceCheckUtils]: 8: Hoare triple {1144#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1145#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-14 19:42:21,876 INFO L290 TraceCheckUtils]: 9: Hoare triple {1145#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:21,876 INFO L290 TraceCheckUtils]: 10: Hoare triple {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:21,877 INFO L290 TraceCheckUtils]: 11: Hoare triple {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:21,878 INFO L290 TraceCheckUtils]: 12: Hoare triple {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:21,878 INFO L290 TraceCheckUtils]: 13: Hoare triple {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:21,880 INFO L272 TraceCheckUtils]: 14: Hoare triple {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1147#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:42:21,880 INFO L290 TraceCheckUtils]: 15: Hoare triple {1147#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1148#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:42:21,880 INFO L290 TraceCheckUtils]: 16: Hoare triple {1148#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1138#false} is VALID [2022-04-14 19:42:21,881 INFO L290 TraceCheckUtils]: 17: Hoare triple {1138#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#false} is VALID [2022-04-14 19:42:21,881 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:42:21,881 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:42:21,881 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [436246570] [2022-04-14 19:42:21,881 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [436246570] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:42:21,881 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [222675582] [2022-04-14 19:42:21,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:21,881 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:21,881 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:42:21,882 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:42:21,883 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-14 19:42:21,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:21,915 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-14 19:42:21,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:21,922 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:42:22,497 INFO L272 TraceCheckUtils]: 0: Hoare triple {1137#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1137#true} is VALID [2022-04-14 19:42:22,497 INFO L290 TraceCheckUtils]: 1: Hoare triple {1137#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1137#true} is VALID [2022-04-14 19:42:22,497 INFO L290 TraceCheckUtils]: 2: Hoare triple {1137#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1137#true} is VALID [2022-04-14 19:42:22,497 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1137#true} {1137#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1137#true} is VALID [2022-04-14 19:42:22,498 INFO L272 TraceCheckUtils]: 4: Hoare triple {1137#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1137#true} is VALID [2022-04-14 19:42:22,498 INFO L290 TraceCheckUtils]: 5: Hoare triple {1137#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1168#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:42:22,498 INFO L290 TraceCheckUtils]: 6: Hoare triple {1168#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1172#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:22,499 INFO L290 TraceCheckUtils]: 7: Hoare triple {1172#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1172#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:22,504 INFO L290 TraceCheckUtils]: 8: Hoare triple {1172#(not (< 0 (mod main_~n~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1172#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:22,505 INFO L290 TraceCheckUtils]: 9: Hoare triple {1172#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:22,506 INFO L290 TraceCheckUtils]: 10: Hoare triple {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:22,506 INFO L290 TraceCheckUtils]: 11: Hoare triple {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:22,507 INFO L290 TraceCheckUtils]: 12: Hoare triple {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:22,507 INFO L290 TraceCheckUtils]: 13: Hoare triple {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:22,508 INFO L272 TraceCheckUtils]: 14: Hoare triple {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1198#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:42:22,509 INFO L290 TraceCheckUtils]: 15: Hoare triple {1198#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1202#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:42:22,509 INFO L290 TraceCheckUtils]: 16: Hoare triple {1202#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1138#false} is VALID [2022-04-14 19:42:22,510 INFO L290 TraceCheckUtils]: 17: Hoare triple {1138#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#false} is VALID [2022-04-14 19:42:22,510 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:42:22,510 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-14 19:42:22,510 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [222675582] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:42:22,510 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-14 19:42:22,510 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 15 [2022-04-14 19:42:22,510 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [82894920] [2022-04-14 19:42:22,510 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:42:22,511 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:42:22,511 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:42:22,511 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:22,524 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:22,525 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-14 19:42:22,525 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:42:22,525 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-14 19:42:22,525 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2022-04-14 19:42:22,526 INFO L87 Difference]: Start difference. First operand 31 states and 46 transitions. Second operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:22,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:22,641 INFO L93 Difference]: Finished difference Result 39 states and 58 transitions. [2022-04-14 19:42:22,642 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-14 19:42:22,642 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:42:22,642 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:42:22,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:22,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 48 transitions. [2022-04-14 19:42:22,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:22,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 48 transitions. [2022-04-14 19:42:22,645 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 48 transitions. [2022-04-14 19:42:22,694 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:22,695 INFO L225 Difference]: With dead ends: 39 [2022-04-14 19:42:22,695 INFO L226 Difference]: Without dead ends: 36 [2022-04-14 19:42:22,695 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-04-14 19:42:22,696 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 16 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 73 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:42:22,696 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [16 Valid, 73 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 31 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-14 19:42:22,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2022-04-14 19:42:22,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 33. [2022-04-14 19:42:22,698 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:42:22,699 INFO L82 GeneralOperation]: Start isEquivalent. First operand 36 states. Second operand has 33 states, 28 states have (on average 1.6428571428571428) internal successors, (46), 28 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:22,699 INFO L74 IsIncluded]: Start isIncluded. First operand 36 states. Second operand has 33 states, 28 states have (on average 1.6428571428571428) internal successors, (46), 28 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:22,699 INFO L87 Difference]: Start difference. First operand 36 states. Second operand has 33 states, 28 states have (on average 1.6428571428571428) internal successors, (46), 28 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:22,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:22,701 INFO L93 Difference]: Finished difference Result 36 states and 55 transitions. [2022-04-14 19:42:22,701 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 55 transitions. [2022-04-14 19:42:22,701 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:22,701 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:22,701 INFO L74 IsIncluded]: Start isIncluded. First operand has 33 states, 28 states have (on average 1.6428571428571428) internal successors, (46), 28 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 36 states. [2022-04-14 19:42:22,702 INFO L87 Difference]: Start difference. First operand has 33 states, 28 states have (on average 1.6428571428571428) internal successors, (46), 28 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 36 states. [2022-04-14 19:42:22,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:22,703 INFO L93 Difference]: Finished difference Result 36 states and 55 transitions. [2022-04-14 19:42:22,703 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 55 transitions. [2022-04-14 19:42:22,704 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:22,704 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:22,704 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:42:22,704 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:42:22,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 28 states have (on average 1.6428571428571428) internal successors, (46), 28 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:22,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 50 transitions. [2022-04-14 19:42:22,705 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 50 transitions. Word has length 18 [2022-04-14 19:42:22,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:42:22,706 INFO L478 AbstractCegarLoop]: Abstraction has 33 states and 50 transitions. [2022-04-14 19:42:22,706 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:22,706 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 50 transitions. [2022-04-14 19:42:22,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-14 19:42:22,706 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:42:22,706 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:42:22,730 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2022-04-14 19:42:22,927 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:22,928 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:42:22,928 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:42:22,928 INFO L85 PathProgramCache]: Analyzing trace with hash -1504591698, now seen corresponding path program 1 times [2022-04-14 19:42:22,928 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:42:22,928 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2007716851] [2022-04-14 19:42:22,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:22,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:42:22,941 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:22,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:22,962 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.1))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:23,158 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:42:23,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:23,165 INFO L290 TraceCheckUtils]: 0: Hoare triple {1371#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1358#true} is VALID [2022-04-14 19:42:23,165 INFO L290 TraceCheckUtils]: 1: Hoare triple {1358#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-14 19:42:23,166 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1358#true} {1358#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-14 19:42:23,166 INFO L272 TraceCheckUtils]: 0: Hoare triple {1358#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1371#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:42:23,166 INFO L290 TraceCheckUtils]: 1: Hoare triple {1371#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1358#true} is VALID [2022-04-14 19:42:23,167 INFO L290 TraceCheckUtils]: 2: Hoare triple {1358#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-14 19:42:23,167 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1358#true} {1358#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-14 19:42:23,167 INFO L272 TraceCheckUtils]: 4: Hoare triple {1358#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-14 19:42:23,167 INFO L290 TraceCheckUtils]: 5: Hoare triple {1358#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1363#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:23,172 INFO L290 TraceCheckUtils]: 6: Hoare triple {1363#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1364#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:42:23,173 INFO L290 TraceCheckUtils]: 7: Hoare triple {1364#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1365#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:42:23,174 INFO L290 TraceCheckUtils]: 8: Hoare triple {1365#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1366#(or (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:42:23,174 INFO L290 TraceCheckUtils]: 9: Hoare triple {1366#(or (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1367#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:42:23,175 INFO L290 TraceCheckUtils]: 10: Hoare triple {1367#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:23,176 INFO L290 TraceCheckUtils]: 11: Hoare triple {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:23,176 INFO L290 TraceCheckUtils]: 12: Hoare triple {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:23,176 INFO L290 TraceCheckUtils]: 13: Hoare triple {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:23,177 INFO L272 TraceCheckUtils]: 14: Hoare triple {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1369#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:42:23,178 INFO L290 TraceCheckUtils]: 15: Hoare triple {1369#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1370#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:42:23,178 INFO L290 TraceCheckUtils]: 16: Hoare triple {1370#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1359#false} is VALID [2022-04-14 19:42:23,178 INFO L290 TraceCheckUtils]: 17: Hoare triple {1359#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1359#false} is VALID [2022-04-14 19:42:23,179 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:42:23,179 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:42:23,179 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2007716851] [2022-04-14 19:42:23,179 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2007716851] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:42:23,179 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1575369560] [2022-04-14 19:42:23,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:23,179 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:23,179 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:42:23,180 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:42:23,192 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-14 19:42:23,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:23,228 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 11 conjunts are in the unsatisfiable core [2022-04-14 19:42:23,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:23,248 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:42:24,118 INFO L272 TraceCheckUtils]: 0: Hoare triple {1358#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-14 19:42:24,119 INFO L290 TraceCheckUtils]: 1: Hoare triple {1358#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1358#true} is VALID [2022-04-14 19:42:24,119 INFO L290 TraceCheckUtils]: 2: Hoare triple {1358#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-14 19:42:24,119 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1358#true} {1358#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-14 19:42:24,119 INFO L272 TraceCheckUtils]: 4: Hoare triple {1358#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-14 19:42:24,131 INFO L290 TraceCheckUtils]: 5: Hoare triple {1358#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1363#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:24,135 INFO L290 TraceCheckUtils]: 6: Hoare triple {1363#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1393#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-14 19:42:24,136 INFO L290 TraceCheckUtils]: 7: Hoare triple {1393#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1393#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-14 19:42:24,137 INFO L290 TraceCheckUtils]: 8: Hoare triple {1393#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1400#(or (and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:24,140 INFO L290 TraceCheckUtils]: 9: Hoare triple {1400#(or (and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-14 19:42:24,140 INFO L290 TraceCheckUtils]: 10: Hoare triple {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-14 19:42:24,141 INFO L290 TraceCheckUtils]: 11: Hoare triple {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-14 19:42:24,141 INFO L290 TraceCheckUtils]: 12: Hoare triple {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-14 19:42:24,141 INFO L290 TraceCheckUtils]: 13: Hoare triple {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-14 19:42:24,142 INFO L272 TraceCheckUtils]: 14: Hoare triple {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1420#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:42:24,143 INFO L290 TraceCheckUtils]: 15: Hoare triple {1420#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1424#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:42:24,143 INFO L290 TraceCheckUtils]: 16: Hoare triple {1424#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1359#false} is VALID [2022-04-14 19:42:24,143 INFO L290 TraceCheckUtils]: 17: Hoare triple {1359#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1359#false} is VALID [2022-04-14 19:42:24,143 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:42:24,143 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:42:25,504 INFO L290 TraceCheckUtils]: 17: Hoare triple {1359#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1359#false} is VALID [2022-04-14 19:42:25,505 INFO L290 TraceCheckUtils]: 16: Hoare triple {1424#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1359#false} is VALID [2022-04-14 19:42:25,505 INFO L290 TraceCheckUtils]: 15: Hoare triple {1420#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1424#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:42:25,507 INFO L272 TraceCheckUtils]: 14: Hoare triple {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1420#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:42:25,507 INFO L290 TraceCheckUtils]: 13: Hoare triple {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:25,508 INFO L290 TraceCheckUtils]: 12: Hoare triple {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:25,508 INFO L290 TraceCheckUtils]: 11: Hoare triple {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:25,509 INFO L290 TraceCheckUtils]: 10: Hoare triple {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:25,510 INFO L290 TraceCheckUtils]: 9: Hoare triple {1455#(or (< 0 (mod main_~z~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:25,511 INFO L290 TraceCheckUtils]: 8: Hoare triple {1365#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1455#(or (< 0 (mod main_~z~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:25,511 INFO L290 TraceCheckUtils]: 7: Hoare triple {1365#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1365#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:42:25,609 INFO L290 TraceCheckUtils]: 6: Hoare triple {1465#(or (forall ((aux_mod_v_main_~y~0_30_31 Int)) (or (< aux_mod_v_main_~y~0_30_31 0) (<= 1 aux_mod_v_main_~y~0_30_31) (and (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= (+ v_it_1 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (<= 1 v_it_1)))))) (or (forall ((aux_div_v_main_~y~0_30_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)))) (< 0 (mod main_~x~0 4294967296)))))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1365#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-14 19:42:25,615 INFO L290 TraceCheckUtils]: 5: Hoare triple {1358#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1465#(or (forall ((aux_mod_v_main_~y~0_30_31 Int)) (or (< aux_mod_v_main_~y~0_30_31 0) (<= 1 aux_mod_v_main_~y~0_30_31) (and (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= (+ v_it_1 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (<= 1 v_it_1)))))) (or (forall ((aux_div_v_main_~y~0_30_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)))) (< 0 (mod main_~x~0 4294967296)))))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:42:25,616 INFO L272 TraceCheckUtils]: 4: Hoare triple {1358#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-14 19:42:25,616 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1358#true} {1358#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-14 19:42:25,616 INFO L290 TraceCheckUtils]: 2: Hoare triple {1358#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-14 19:42:25,616 INFO L290 TraceCheckUtils]: 1: Hoare triple {1358#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1358#true} is VALID [2022-04-14 19:42:25,616 INFO L272 TraceCheckUtils]: 0: Hoare triple {1358#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-14 19:42:25,616 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:42:25,617 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1575369560] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:42:25,617 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:42:25,617 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 8] total 18 [2022-04-14 19:42:25,617 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [706847578] [2022-04-14 19:42:25,617 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:42:25,618 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:42:25,618 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:42:25,619 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:25,959 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:25,959 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-14 19:42:25,959 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:42:25,959 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-14 19:42:25,959 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=250, Unknown=0, NotChecked=0, Total=306 [2022-04-14 19:42:25,960 INFO L87 Difference]: Start difference. First operand 33 states and 50 transitions. Second operand has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:28,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:28,542 INFO L93 Difference]: Finished difference Result 49 states and 76 transitions. [2022-04-14 19:42:28,542 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-14 19:42:28,542 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-14 19:42:28,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:42:28,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:28,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 61 transitions. [2022-04-14 19:42:28,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:28,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 61 transitions. [2022-04-14 19:42:28,545 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 61 transitions. [2022-04-14 19:42:28,668 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:28,669 INFO L225 Difference]: With dead ends: 49 [2022-04-14 19:42:28,670 INFO L226 Difference]: Without dead ends: 46 [2022-04-14 19:42:28,670 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 28 SyntacticMatches, 4 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 136 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=125, Invalid=474, Unknown=1, NotChecked=0, Total=600 [2022-04-14 19:42:28,671 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 69 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 103 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 69 SdHoareTripleChecker+Valid, 63 SdHoareTripleChecker+Invalid, 154 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 103 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 36 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:42:28,671 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [69 Valid, 63 Invalid, 154 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 103 Invalid, 0 Unknown, 36 Unchecked, 0.1s Time] [2022-04-14 19:42:28,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2022-04-14 19:42:28,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 36. [2022-04-14 19:42:28,673 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:42:28,674 INFO L82 GeneralOperation]: Start isEquivalent. First operand 46 states. Second operand has 36 states, 31 states have (on average 1.6451612903225807) internal successors, (51), 31 states have internal predecessors, (51), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:28,674 INFO L74 IsIncluded]: Start isIncluded. First operand 46 states. Second operand has 36 states, 31 states have (on average 1.6451612903225807) internal successors, (51), 31 states have internal predecessors, (51), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:28,674 INFO L87 Difference]: Start difference. First operand 46 states. Second operand has 36 states, 31 states have (on average 1.6451612903225807) internal successors, (51), 31 states have internal predecessors, (51), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:28,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:28,676 INFO L93 Difference]: Finished difference Result 46 states and 73 transitions. [2022-04-14 19:42:28,676 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 73 transitions. [2022-04-14 19:42:28,676 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:28,676 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:28,677 INFO L74 IsIncluded]: Start isIncluded. First operand has 36 states, 31 states have (on average 1.6451612903225807) internal successors, (51), 31 states have internal predecessors, (51), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 46 states. [2022-04-14 19:42:28,677 INFO L87 Difference]: Start difference. First operand has 36 states, 31 states have (on average 1.6451612903225807) internal successors, (51), 31 states have internal predecessors, (51), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 46 states. [2022-04-14 19:42:28,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:28,679 INFO L93 Difference]: Finished difference Result 46 states and 73 transitions. [2022-04-14 19:42:28,679 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 73 transitions. [2022-04-14 19:42:28,679 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:28,679 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:28,679 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:42:28,679 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:42:28,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 31 states have (on average 1.6451612903225807) internal successors, (51), 31 states have internal predecessors, (51), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:28,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 55 transitions. [2022-04-14 19:42:28,681 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 55 transitions. Word has length 18 [2022-04-14 19:42:28,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:42:28,681 INFO L478 AbstractCegarLoop]: Abstraction has 36 states and 55 transitions. [2022-04-14 19:42:28,682 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:28,682 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 55 transitions. [2022-04-14 19:42:28,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-14 19:42:28,682 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:42:28,682 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:42:28,700 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-14 19:42:28,891 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:28,892 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:42:28,892 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:42:28,892 INFO L85 PathProgramCache]: Analyzing trace with hash 1095597292, now seen corresponding path program 1 times [2022-04-14 19:42:28,892 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:42:28,892 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [191637786] [2022-04-14 19:42:28,892 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:28,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:42:28,911 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:28,913 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.1))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:28,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:28,939 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.3))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:28,945 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.4))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:29,151 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:42:29,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:29,162 INFO L290 TraceCheckUtils]: 0: Hoare triple {1692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1678#true} is VALID [2022-04-14 19:42:29,162 INFO L290 TraceCheckUtils]: 1: Hoare triple {1678#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-14 19:42:29,162 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1678#true} {1678#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-14 19:42:29,163 INFO L272 TraceCheckUtils]: 0: Hoare triple {1678#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:42:29,163 INFO L290 TraceCheckUtils]: 1: Hoare triple {1692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1678#true} is VALID [2022-04-14 19:42:29,163 INFO L290 TraceCheckUtils]: 2: Hoare triple {1678#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-14 19:42:29,163 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1678#true} {1678#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-14 19:42:29,163 INFO L272 TraceCheckUtils]: 4: Hoare triple {1678#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-14 19:42:29,164 INFO L290 TraceCheckUtils]: 5: Hoare triple {1678#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1683#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-14 19:42:29,164 INFO L290 TraceCheckUtils]: 6: Hoare triple {1683#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1684#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:29,165 INFO L290 TraceCheckUtils]: 7: Hoare triple {1684#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1685#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:29,165 INFO L290 TraceCheckUtils]: 8: Hoare triple {1685#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1685#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:29,166 INFO L290 TraceCheckUtils]: 9: Hoare triple {1685#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1686#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:29,167 INFO L290 TraceCheckUtils]: 10: Hoare triple {1686#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1687#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:29,167 INFO L290 TraceCheckUtils]: 11: Hoare triple {1687#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1688#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:42:29,168 INFO L290 TraceCheckUtils]: 12: Hoare triple {1688#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1688#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:42:29,169 INFO L290 TraceCheckUtils]: 13: Hoare triple {1688#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {1689#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-14 19:42:29,170 INFO L290 TraceCheckUtils]: 14: Hoare triple {1689#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1689#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-14 19:42:29,171 INFO L272 TraceCheckUtils]: 15: Hoare triple {1689#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1690#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:42:29,171 INFO L290 TraceCheckUtils]: 16: Hoare triple {1690#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1691#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:42:29,171 INFO L290 TraceCheckUtils]: 17: Hoare triple {1691#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1679#false} is VALID [2022-04-14 19:42:29,171 INFO L290 TraceCheckUtils]: 18: Hoare triple {1679#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1679#false} is VALID [2022-04-14 19:42:29,172 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:42:29,172 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:42:29,172 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [191637786] [2022-04-14 19:42:29,172 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [191637786] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:42:29,172 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1291541469] [2022-04-14 19:42:29,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:29,172 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:29,173 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:42:29,173 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:42:29,174 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-14 19:42:29,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:29,205 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-14 19:42:29,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:29,214 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:42:29,919 INFO L272 TraceCheckUtils]: 0: Hoare triple {1678#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-14 19:42:29,919 INFO L290 TraceCheckUtils]: 1: Hoare triple {1678#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1678#true} is VALID [2022-04-14 19:42:29,920 INFO L290 TraceCheckUtils]: 2: Hoare triple {1678#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-14 19:42:29,920 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1678#true} {1678#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-14 19:42:29,920 INFO L272 TraceCheckUtils]: 4: Hoare triple {1678#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-14 19:42:29,923 INFO L290 TraceCheckUtils]: 5: Hoare triple {1678#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1711#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:42:29,923 INFO L290 TraceCheckUtils]: 6: Hoare triple {1711#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1715#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:29,924 INFO L290 TraceCheckUtils]: 7: Hoare triple {1715#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1715#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:29,924 INFO L290 TraceCheckUtils]: 8: Hoare triple {1715#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1715#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:29,924 INFO L290 TraceCheckUtils]: 9: Hoare triple {1715#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1715#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:29,925 INFO L290 TraceCheckUtils]: 10: Hoare triple {1715#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1728#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:29,925 INFO L290 TraceCheckUtils]: 11: Hoare triple {1728#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1728#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:29,927 INFO L290 TraceCheckUtils]: 12: Hoare triple {1728#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1735#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:29,928 INFO L290 TraceCheckUtils]: 13: Hoare triple {1735#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {1739#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-14 19:42:29,928 INFO L290 TraceCheckUtils]: 14: Hoare triple {1739#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1739#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-14 19:42:29,929 INFO L272 TraceCheckUtils]: 15: Hoare triple {1739#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1746#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:42:29,930 INFO L290 TraceCheckUtils]: 16: Hoare triple {1746#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1750#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:42:29,930 INFO L290 TraceCheckUtils]: 17: Hoare triple {1750#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1679#false} is VALID [2022-04-14 19:42:29,930 INFO L290 TraceCheckUtils]: 18: Hoare triple {1679#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1679#false} is VALID [2022-04-14 19:42:29,930 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:42:29,930 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:42:43,943 INFO L290 TraceCheckUtils]: 18: Hoare triple {1679#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1679#false} is VALID [2022-04-14 19:42:43,944 INFO L290 TraceCheckUtils]: 17: Hoare triple {1750#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1679#false} is VALID [2022-04-14 19:42:43,944 INFO L290 TraceCheckUtils]: 16: Hoare triple {1746#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1750#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:42:43,945 INFO L272 TraceCheckUtils]: 15: Hoare triple {1766#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1746#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:42:43,945 INFO L290 TraceCheckUtils]: 14: Hoare triple {1766#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1766#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-14 19:42:45,957 WARN L290 TraceCheckUtils]: 13: Hoare triple {1773#(forall ((aux_mod_v_main_~z~0_34_31 Int)) (or (and (or (forall ((aux_div_v_main_~z~0_34_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_34_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))))) (>= aux_mod_v_main_~z~0_34_31 4294967296) (> 0 aux_mod_v_main_~z~0_34_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_34_31)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {1766#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is UNKNOWN [2022-04-14 19:42:47,982 WARN L290 TraceCheckUtils]: 12: Hoare triple {1777#(forall ((aux_mod_v_main_~z~0_34_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_34_31) (< aux_mod_v_main_~z~0_34_31 0) (and (or (forall ((aux_div_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31))))))) (<= 4294967296 aux_mod_v_main_~z~0_34_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1773#(forall ((aux_mod_v_main_~z~0_34_31 Int)) (or (and (or (forall ((aux_div_v_main_~z~0_34_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_34_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))))) (>= aux_mod_v_main_~z~0_34_31 4294967296) (> 0 aux_mod_v_main_~z~0_34_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_34_31)))} is UNKNOWN [2022-04-14 19:42:49,996 WARN L290 TraceCheckUtils]: 11: Hoare triple {1777#(forall ((aux_mod_v_main_~z~0_34_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_34_31) (< aux_mod_v_main_~z~0_34_31 0) (and (or (forall ((aux_div_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31))))))) (<= 4294967296 aux_mod_v_main_~z~0_34_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1777#(forall ((aux_mod_v_main_~z~0_34_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_34_31) (< aux_mod_v_main_~z~0_34_31 0) (and (or (forall ((aux_div_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31))))))) (<= 4294967296 aux_mod_v_main_~z~0_34_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0)))} is UNKNOWN [2022-04-14 19:42:50,005 INFO L290 TraceCheckUtils]: 10: Hoare triple {1715#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1777#(forall ((aux_mod_v_main_~z~0_34_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_34_31) (< aux_mod_v_main_~z~0_34_31 0) (and (or (forall ((aux_div_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31))))))) (<= 4294967296 aux_mod_v_main_~z~0_34_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0)))} is VALID [2022-04-14 19:42:50,006 INFO L290 TraceCheckUtils]: 9: Hoare triple {1715#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1715#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:50,006 INFO L290 TraceCheckUtils]: 8: Hoare triple {1715#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1715#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:50,006 INFO L290 TraceCheckUtils]: 7: Hoare triple {1715#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1715#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:50,007 INFO L290 TraceCheckUtils]: 6: Hoare triple {1796#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1715#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:50,007 INFO L290 TraceCheckUtils]: 5: Hoare triple {1678#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1796#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:50,007 INFO L272 TraceCheckUtils]: 4: Hoare triple {1678#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-14 19:42:50,007 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1678#true} {1678#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-14 19:42:50,007 INFO L290 TraceCheckUtils]: 2: Hoare triple {1678#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-14 19:42:50,008 INFO L290 TraceCheckUtils]: 1: Hoare triple {1678#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1678#true} is VALID [2022-04-14 19:42:50,008 INFO L272 TraceCheckUtils]: 0: Hoare triple {1678#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-14 19:42:50,008 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:42:50,008 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1291541469] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:42:50,008 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:42:50,008 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9, 9] total 23 [2022-04-14 19:42:50,008 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1626855673] [2022-04-14 19:42:50,009 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:42:50,009 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:42:50,009 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:42:50,010 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:54,120 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 40 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:54,120 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-14 19:42:54,120 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:42:54,121 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-14 19:42:54,121 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=111, Invalid=391, Unknown=4, NotChecked=0, Total=506 [2022-04-14 19:42:54,121 INFO L87 Difference]: Start difference. First operand 36 states and 55 transitions. Second operand has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:54,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:54,778 INFO L93 Difference]: Finished difference Result 55 states and 85 transitions. [2022-04-14 19:42:54,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-14 19:42:54,779 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:42:54,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:42:54,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:54,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 67 transitions. [2022-04-14 19:42:54,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:54,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 67 transitions. [2022-04-14 19:42:54,783 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 67 transitions. [2022-04-14 19:42:54,862 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 67 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:54,863 INFO L225 Difference]: With dead ends: 55 [2022-04-14 19:42:54,863 INFO L226 Difference]: Without dead ends: 51 [2022-04-14 19:42:54,864 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 30 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 270 ImplicationChecksByTransitivity, 9.0s TimeCoverageRelationStatistics Valid=233, Invalid=819, Unknown=4, NotChecked=0, Total=1056 [2022-04-14 19:42:54,864 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 60 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 60 SdHoareTripleChecker+Valid, 93 SdHoareTripleChecker+Invalid, 197 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 44 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-14 19:42:54,864 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [60 Valid, 93 Invalid, 197 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 130 Invalid, 0 Unknown, 44 Unchecked, 0.2s Time] [2022-04-14 19:42:54,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-04-14 19:42:54,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 38. [2022-04-14 19:42:54,867 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:42:54,867 INFO L82 GeneralOperation]: Start isEquivalent. First operand 51 states. Second operand has 38 states, 33 states have (on average 1.6666666666666667) internal successors, (55), 33 states have internal predecessors, (55), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:54,868 INFO L74 IsIncluded]: Start isIncluded. First operand 51 states. Second operand has 38 states, 33 states have (on average 1.6666666666666667) internal successors, (55), 33 states have internal predecessors, (55), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:54,868 INFO L87 Difference]: Start difference. First operand 51 states. Second operand has 38 states, 33 states have (on average 1.6666666666666667) internal successors, (55), 33 states have internal predecessors, (55), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:54,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:54,870 INFO L93 Difference]: Finished difference Result 51 states and 80 transitions. [2022-04-14 19:42:54,870 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 80 transitions. [2022-04-14 19:42:54,870 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:54,870 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:54,870 INFO L74 IsIncluded]: Start isIncluded. First operand has 38 states, 33 states have (on average 1.6666666666666667) internal successors, (55), 33 states have internal predecessors, (55), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 51 states. [2022-04-14 19:42:54,870 INFO L87 Difference]: Start difference. First operand has 38 states, 33 states have (on average 1.6666666666666667) internal successors, (55), 33 states have internal predecessors, (55), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 51 states. [2022-04-14 19:42:54,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:54,872 INFO L93 Difference]: Finished difference Result 51 states and 80 transitions. [2022-04-14 19:42:54,872 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 80 transitions. [2022-04-14 19:42:54,872 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:54,873 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:54,873 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:42:54,873 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:42:54,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 33 states have (on average 1.6666666666666667) internal successors, (55), 33 states have internal predecessors, (55), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:54,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 59 transitions. [2022-04-14 19:42:54,874 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 59 transitions. Word has length 19 [2022-04-14 19:42:54,874 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:42:54,874 INFO L478 AbstractCegarLoop]: Abstraction has 38 states and 59 transitions. [2022-04-14 19:42:54,875 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:54,875 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 59 transitions. [2022-04-14 19:42:54,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-14 19:42:54,875 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:42:54,875 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:42:54,899 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-14 19:42:55,090 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:55,090 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:42:55,091 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:42:55,091 INFO L85 PathProgramCache]: Analyzing trace with hash 1868584369, now seen corresponding path program 1 times [2022-04-14 19:42:55,091 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:42:55,091 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [432143] [2022-04-14 19:42:55,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:55,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:42:55,106 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:55,112 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:55,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:55,152 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:55,155 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:55,353 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:42:55,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:55,360 INFO L290 TraceCheckUtils]: 0: Hoare triple {2048#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2035#true} is VALID [2022-04-14 19:42:55,360 INFO L290 TraceCheckUtils]: 1: Hoare triple {2035#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2035#true} is VALID [2022-04-14 19:42:55,360 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2035#true} {2035#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2035#true} is VALID [2022-04-14 19:42:55,361 INFO L272 TraceCheckUtils]: 0: Hoare triple {2035#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2048#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:42:55,361 INFO L290 TraceCheckUtils]: 1: Hoare triple {2048#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2035#true} is VALID [2022-04-14 19:42:55,361 INFO L290 TraceCheckUtils]: 2: Hoare triple {2035#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2035#true} is VALID [2022-04-14 19:42:55,361 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2035#true} {2035#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2035#true} is VALID [2022-04-14 19:42:55,361 INFO L272 TraceCheckUtils]: 4: Hoare triple {2035#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2035#true} is VALID [2022-04-14 19:42:55,362 INFO L290 TraceCheckUtils]: 5: Hoare triple {2035#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2040#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-14 19:42:55,362 INFO L290 TraceCheckUtils]: 6: Hoare triple {2040#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2041#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:55,363 INFO L290 TraceCheckUtils]: 7: Hoare triple {2041#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2042#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:55,364 INFO L290 TraceCheckUtils]: 8: Hoare triple {2042#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2042#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:55,365 INFO L290 TraceCheckUtils]: 9: Hoare triple {2042#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2043#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:55,365 INFO L290 TraceCheckUtils]: 10: Hoare triple {2043#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2043#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:55,366 INFO L290 TraceCheckUtils]: 11: Hoare triple {2043#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2043#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:55,367 INFO L290 TraceCheckUtils]: 12: Hoare triple {2043#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2044#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-14 19:42:55,368 INFO L290 TraceCheckUtils]: 13: Hoare triple {2044#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2045#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:55,369 INFO L290 TraceCheckUtils]: 14: Hoare triple {2045#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2045#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:42:55,369 INFO L272 TraceCheckUtils]: 15: Hoare triple {2045#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2046#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:42:55,370 INFO L290 TraceCheckUtils]: 16: Hoare triple {2046#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2047#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:42:55,370 INFO L290 TraceCheckUtils]: 17: Hoare triple {2047#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2036#false} is VALID [2022-04-14 19:42:55,370 INFO L290 TraceCheckUtils]: 18: Hoare triple {2036#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2036#false} is VALID [2022-04-14 19:42:55,370 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:42:55,371 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:42:55,371 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [432143] [2022-04-14 19:42:55,371 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [432143] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:42:55,371 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1990994025] [2022-04-14 19:42:55,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:55,371 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:55,371 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:42:55,372 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:42:55,374 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-14 19:42:55,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:55,407 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-14 19:42:55,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:55,414 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:42:55,903 INFO L272 TraceCheckUtils]: 0: Hoare triple {2035#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2035#true} is VALID [2022-04-14 19:42:55,903 INFO L290 TraceCheckUtils]: 1: Hoare triple {2035#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2035#true} is VALID [2022-04-14 19:42:55,903 INFO L290 TraceCheckUtils]: 2: Hoare triple {2035#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2035#true} is VALID [2022-04-14 19:42:55,903 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2035#true} {2035#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2035#true} is VALID [2022-04-14 19:42:55,903 INFO L272 TraceCheckUtils]: 4: Hoare triple {2035#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2035#true} is VALID [2022-04-14 19:42:55,904 INFO L290 TraceCheckUtils]: 5: Hoare triple {2035#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2067#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:42:55,904 INFO L290 TraceCheckUtils]: 6: Hoare triple {2067#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2071#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:55,904 INFO L290 TraceCheckUtils]: 7: Hoare triple {2071#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2071#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:55,905 INFO L290 TraceCheckUtils]: 8: Hoare triple {2071#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2071#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:55,905 INFO L290 TraceCheckUtils]: 9: Hoare triple {2071#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2071#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:55,905 INFO L290 TraceCheckUtils]: 10: Hoare triple {2071#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2071#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:55,907 INFO L290 TraceCheckUtils]: 11: Hoare triple {2071#(not (< 0 (mod main_~n~0 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2071#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:55,908 INFO L290 TraceCheckUtils]: 12: Hoare triple {2071#(not (< 0 (mod main_~n~0 4294967296)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2071#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:55,908 INFO L290 TraceCheckUtils]: 13: Hoare triple {2071#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2093#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:55,909 INFO L290 TraceCheckUtils]: 14: Hoare triple {2093#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2093#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:55,910 INFO L272 TraceCheckUtils]: 15: Hoare triple {2093#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2100#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:42:55,910 INFO L290 TraceCheckUtils]: 16: Hoare triple {2100#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2104#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:42:55,911 INFO L290 TraceCheckUtils]: 17: Hoare triple {2104#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2036#false} is VALID [2022-04-14 19:42:55,911 INFO L290 TraceCheckUtils]: 18: Hoare triple {2036#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2036#false} is VALID [2022-04-14 19:42:55,911 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-14 19:42:55,911 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-14 19:42:55,911 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1990994025] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:42:55,911 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-14 19:42:55,911 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [11] total 16 [2022-04-14 19:42:55,911 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [924051069] [2022-04-14 19:42:55,911 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:42:55,912 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:42:55,912 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:42:55,912 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:55,926 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:55,927 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-14 19:42:55,927 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:42:55,927 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-14 19:42:55,927 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2022-04-14 19:42:55,927 INFO L87 Difference]: Start difference. First operand 38 states and 59 transitions. Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:56,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:56,059 INFO L93 Difference]: Finished difference Result 45 states and 67 transitions. [2022-04-14 19:42:56,059 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-14 19:42:56,059 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:42:56,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:42:56,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:56,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 46 transitions. [2022-04-14 19:42:56,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:56,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 46 transitions. [2022-04-14 19:42:56,062 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 46 transitions. [2022-04-14 19:42:56,105 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:56,106 INFO L225 Difference]: With dead ends: 45 [2022-04-14 19:42:56,106 INFO L226 Difference]: Without dead ends: 42 [2022-04-14 19:42:56,107 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=78, Invalid=264, Unknown=0, NotChecked=0, Total=342 [2022-04-14 19:42:56,107 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 12 mSDsluCounter, 59 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 72 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:42:56,108 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [12 Valid, 72 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 29 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-14 19:42:56,108 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2022-04-14 19:42:56,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 37. [2022-04-14 19:42:56,110 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:42:56,110 INFO L82 GeneralOperation]: Start isEquivalent. First operand 42 states. Second operand has 37 states, 32 states have (on average 1.65625) internal successors, (53), 32 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:56,110 INFO L74 IsIncluded]: Start isIncluded. First operand 42 states. Second operand has 37 states, 32 states have (on average 1.65625) internal successors, (53), 32 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:56,111 INFO L87 Difference]: Start difference. First operand 42 states. Second operand has 37 states, 32 states have (on average 1.65625) internal successors, (53), 32 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:56,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:56,113 INFO L93 Difference]: Finished difference Result 42 states and 64 transitions. [2022-04-14 19:42:56,113 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 64 transitions. [2022-04-14 19:42:56,113 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:56,113 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:56,113 INFO L74 IsIncluded]: Start isIncluded. First operand has 37 states, 32 states have (on average 1.65625) internal successors, (53), 32 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 42 states. [2022-04-14 19:42:56,113 INFO L87 Difference]: Start difference. First operand has 37 states, 32 states have (on average 1.65625) internal successors, (53), 32 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 42 states. [2022-04-14 19:42:56,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:56,115 INFO L93 Difference]: Finished difference Result 42 states and 64 transitions. [2022-04-14 19:42:56,115 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 64 transitions. [2022-04-14 19:42:56,115 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:56,115 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:56,115 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:42:56,115 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:42:56,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 32 states have (on average 1.65625) internal successors, (53), 32 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:56,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 57 transitions. [2022-04-14 19:42:56,116 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 57 transitions. Word has length 19 [2022-04-14 19:42:56,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:42:56,116 INFO L478 AbstractCegarLoop]: Abstraction has 37 states and 57 transitions. [2022-04-14 19:42:56,116 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:56,117 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 57 transitions. [2022-04-14 19:42:56,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-14 19:42:56,117 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:42:56,117 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:42:56,134 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-14 19:42:56,319 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-14 19:42:56,320 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:42:56,320 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:42:56,320 INFO L85 PathProgramCache]: Analyzing trace with hash 61379980, now seen corresponding path program 1 times [2022-04-14 19:42:56,320 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:42:56,320 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [152499639] [2022-04-14 19:42:56,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:56,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:42:56,335 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:56,337 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-14 19:42:56,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:56,369 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:56,373 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-14 19:42:56,571 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:42:56,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:56,576 INFO L290 TraceCheckUtils]: 0: Hoare triple {2294#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2282#true} is VALID [2022-04-14 19:42:56,576 INFO L290 TraceCheckUtils]: 1: Hoare triple {2282#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#true} is VALID [2022-04-14 19:42:56,576 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2282#true} {2282#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#true} is VALID [2022-04-14 19:42:56,577 INFO L272 TraceCheckUtils]: 0: Hoare triple {2282#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2294#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:42:56,577 INFO L290 TraceCheckUtils]: 1: Hoare triple {2294#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2282#true} is VALID [2022-04-14 19:42:56,577 INFO L290 TraceCheckUtils]: 2: Hoare triple {2282#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#true} is VALID [2022-04-14 19:42:56,577 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2282#true} {2282#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#true} is VALID [2022-04-14 19:42:56,577 INFO L272 TraceCheckUtils]: 4: Hoare triple {2282#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#true} is VALID [2022-04-14 19:42:56,578 INFO L290 TraceCheckUtils]: 5: Hoare triple {2282#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2287#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-14 19:42:56,579 INFO L290 TraceCheckUtils]: 6: Hoare triple {2287#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2288#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:56,579 INFO L290 TraceCheckUtils]: 7: Hoare triple {2288#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2289#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:56,580 INFO L290 TraceCheckUtils]: 8: Hoare triple {2289#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2289#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:56,581 INFO L290 TraceCheckUtils]: 9: Hoare triple {2289#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2290#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:42:56,582 INFO L290 TraceCheckUtils]: 10: Hoare triple {2290#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2290#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:42:56,583 INFO L290 TraceCheckUtils]: 11: Hoare triple {2290#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2291#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:56,584 INFO L290 TraceCheckUtils]: 12: Hoare triple {2291#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2291#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:56,584 INFO L290 TraceCheckUtils]: 13: Hoare triple {2291#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2291#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:56,585 INFO L290 TraceCheckUtils]: 14: Hoare triple {2291#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2291#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:56,586 INFO L272 TraceCheckUtils]: 15: Hoare triple {2291#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2292#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:42:56,586 INFO L290 TraceCheckUtils]: 16: Hoare triple {2292#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2293#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:42:56,587 INFO L290 TraceCheckUtils]: 17: Hoare triple {2293#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2283#false} is VALID [2022-04-14 19:42:56,587 INFO L290 TraceCheckUtils]: 18: Hoare triple {2283#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2283#false} is VALID [2022-04-14 19:42:56,587 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:42:56,587 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:42:56,587 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [152499639] [2022-04-14 19:42:56,587 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [152499639] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:42:56,588 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [644289606] [2022-04-14 19:42:56,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:56,588 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:56,588 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:42:56,592 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:42:56,593 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-14 19:42:56,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:56,627 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-14 19:42:56,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:56,638 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:42:57,266 INFO L272 TraceCheckUtils]: 0: Hoare triple {2282#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#true} is VALID [2022-04-14 19:42:57,266 INFO L290 TraceCheckUtils]: 1: Hoare triple {2282#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2282#true} is VALID [2022-04-14 19:42:57,266 INFO L290 TraceCheckUtils]: 2: Hoare triple {2282#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#true} is VALID [2022-04-14 19:42:57,267 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2282#true} {2282#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#true} is VALID [2022-04-14 19:42:57,267 INFO L272 TraceCheckUtils]: 4: Hoare triple {2282#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#true} is VALID [2022-04-14 19:42:57,267 INFO L290 TraceCheckUtils]: 5: Hoare triple {2282#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2313#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:42:57,268 INFO L290 TraceCheckUtils]: 6: Hoare triple {2313#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:57,268 INFO L290 TraceCheckUtils]: 7: Hoare triple {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:57,268 INFO L290 TraceCheckUtils]: 8: Hoare triple {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:57,269 INFO L290 TraceCheckUtils]: 9: Hoare triple {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:57,270 INFO L290 TraceCheckUtils]: 10: Hoare triple {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:57,271 INFO L290 TraceCheckUtils]: 11: Hoare triple {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:42:57,271 INFO L290 TraceCheckUtils]: 12: Hoare triple {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2336#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:42:57,272 INFO L290 TraceCheckUtils]: 13: Hoare triple {2336#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2340#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:57,272 INFO L290 TraceCheckUtils]: 14: Hoare triple {2340#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2340#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:42:57,273 INFO L272 TraceCheckUtils]: 15: Hoare triple {2340#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2347#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:42:57,274 INFO L290 TraceCheckUtils]: 16: Hoare triple {2347#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2351#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:42:57,274 INFO L290 TraceCheckUtils]: 17: Hoare triple {2351#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2283#false} is VALID [2022-04-14 19:42:57,274 INFO L290 TraceCheckUtils]: 18: Hoare triple {2283#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2283#false} is VALID [2022-04-14 19:42:57,274 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-14 19:42:57,274 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-14 19:42:57,275 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [644289606] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:42:57,275 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-14 19:42:57,275 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [10] total 16 [2022-04-14 19:42:57,275 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1669870227] [2022-04-14 19:42:57,275 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:42:57,276 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:42:57,276 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:42:57,276 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:57,293 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:57,293 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-14 19:42:57,293 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:42:57,294 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-14 19:42:57,294 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2022-04-14 19:42:57,294 INFO L87 Difference]: Start difference. First operand 37 states and 57 transitions. Second operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:57,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:57,388 INFO L93 Difference]: Finished difference Result 46 states and 70 transitions. [2022-04-14 19:42:57,388 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-14 19:42:57,388 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:42:57,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:42:57,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:57,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 45 transitions. [2022-04-14 19:42:57,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:57,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 45 transitions. [2022-04-14 19:42:57,391 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 45 transitions. [2022-04-14 19:42:57,433 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:42:57,434 INFO L225 Difference]: With dead ends: 46 [2022-04-14 19:42:57,434 INFO L226 Difference]: Without dead ends: 43 [2022-04-14 19:42:57,434 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 15 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=68, Invalid=238, Unknown=0, NotChecked=0, Total=306 [2022-04-14 19:42:57,434 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 20 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 25 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 63 SdHoareTripleChecker+Invalid, 33 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 25 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:42:57,434 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [20 Valid, 63 Invalid, 33 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 25 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-14 19:42:57,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2022-04-14 19:42:57,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 35. [2022-04-14 19:42:57,437 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:42:57,438 INFO L82 GeneralOperation]: Start isEquivalent. First operand 43 states. Second operand has 35 states, 30 states have (on average 1.6333333333333333) internal successors, (49), 30 states have internal predecessors, (49), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:57,438 INFO L74 IsIncluded]: Start isIncluded. First operand 43 states. Second operand has 35 states, 30 states have (on average 1.6333333333333333) internal successors, (49), 30 states have internal predecessors, (49), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:57,438 INFO L87 Difference]: Start difference. First operand 43 states. Second operand has 35 states, 30 states have (on average 1.6333333333333333) internal successors, (49), 30 states have internal predecessors, (49), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:57,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:57,439 INFO L93 Difference]: Finished difference Result 43 states and 67 transitions. [2022-04-14 19:42:57,439 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 67 transitions. [2022-04-14 19:42:57,439 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:57,439 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:57,440 INFO L74 IsIncluded]: Start isIncluded. First operand has 35 states, 30 states have (on average 1.6333333333333333) internal successors, (49), 30 states have internal predecessors, (49), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 43 states. [2022-04-14 19:42:57,440 INFO L87 Difference]: Start difference. First operand has 35 states, 30 states have (on average 1.6333333333333333) internal successors, (49), 30 states have internal predecessors, (49), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 43 states. [2022-04-14 19:42:57,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:42:57,441 INFO L93 Difference]: Finished difference Result 43 states and 67 transitions. [2022-04-14 19:42:57,441 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 67 transitions. [2022-04-14 19:42:57,441 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:42:57,441 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:42:57,441 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:42:57,442 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:42:57,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 30 states have (on average 1.6333333333333333) internal successors, (49), 30 states have internal predecessors, (49), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:57,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 53 transitions. [2022-04-14 19:42:57,443 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 53 transitions. Word has length 19 [2022-04-14 19:42:57,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:42:57,443 INFO L478 AbstractCegarLoop]: Abstraction has 35 states and 53 transitions. [2022-04-14 19:42:57,443 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:42:57,443 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 53 transitions. [2022-04-14 19:42:57,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-14 19:42:57,443 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:42:57,444 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:42:57,467 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2022-04-14 19:42:57,663 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:57,664 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:42:57,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:42:57,664 INFO L85 PathProgramCache]: Analyzing trace with hash 353225841, now seen corresponding path program 2 times [2022-04-14 19:42:57,664 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:42:57,664 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2027045306] [2022-04-14 19:42:57,664 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:42:57,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:42:57,674 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:57,675 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.1))) (+ main_~y~0_12 .cse0 (* (- 4294967296) (div (+ main_~y~0_12 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:57,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:57,692 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.3))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:57,693 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.4))) (+ main_~y~0_12 .cse0 (* (- 4294967296) (div (+ main_~y~0_12 .cse0) 4294967296)))) 0)) [2022-04-14 19:42:57,858 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:42:57,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:57,863 INFO L290 TraceCheckUtils]: 0: Hoare triple {2540#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2528#true} is VALID [2022-04-14 19:42:57,863 INFO L290 TraceCheckUtils]: 1: Hoare triple {2528#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-14 19:42:57,864 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2528#true} {2528#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-14 19:42:57,864 INFO L272 TraceCheckUtils]: 0: Hoare triple {2528#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2540#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:42:57,864 INFO L290 TraceCheckUtils]: 1: Hoare triple {2540#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2528#true} is VALID [2022-04-14 19:42:57,864 INFO L290 TraceCheckUtils]: 2: Hoare triple {2528#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-14 19:42:57,864 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2528#true} {2528#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-14 19:42:57,864 INFO L272 TraceCheckUtils]: 4: Hoare triple {2528#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-14 19:42:57,865 INFO L290 TraceCheckUtils]: 5: Hoare triple {2528#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2533#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:57,866 INFO L290 TraceCheckUtils]: 6: Hoare triple {2533#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2534#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:57,866 INFO L290 TraceCheckUtils]: 7: Hoare triple {2534#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2535#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:57,866 INFO L290 TraceCheckUtils]: 8: Hoare triple {2535#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2535#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:57,867 INFO L290 TraceCheckUtils]: 9: Hoare triple {2535#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2535#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:57,868 INFO L290 TraceCheckUtils]: 10: Hoare triple {2535#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-14 19:42:57,869 INFO L290 TraceCheckUtils]: 11: Hoare triple {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-14 19:42:57,870 INFO L290 TraceCheckUtils]: 12: Hoare triple {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-14 19:42:57,872 INFO L290 TraceCheckUtils]: 13: Hoare triple {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2537#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:57,873 INFO L290 TraceCheckUtils]: 14: Hoare triple {2537#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2537#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:57,874 INFO L272 TraceCheckUtils]: 15: Hoare triple {2537#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2538#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:42:57,874 INFO L290 TraceCheckUtils]: 16: Hoare triple {2538#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2539#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:42:57,875 INFO L290 TraceCheckUtils]: 17: Hoare triple {2539#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2529#false} is VALID [2022-04-14 19:42:57,875 INFO L290 TraceCheckUtils]: 18: Hoare triple {2529#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2529#false} is VALID [2022-04-14 19:42:57,875 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:42:57,875 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:42:57,875 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2027045306] [2022-04-14 19:42:57,875 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2027045306] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:42:57,875 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [370040583] [2022-04-14 19:42:57,876 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-14 19:42:57,876 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:42:57,876 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:42:57,877 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:42:57,878 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-14 19:42:57,906 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-14 19:42:57,907 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-14 19:42:57,907 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-14 19:42:57,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:42:57,918 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:42:58,218 INFO L272 TraceCheckUtils]: 0: Hoare triple {2528#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-14 19:42:58,218 INFO L290 TraceCheckUtils]: 1: Hoare triple {2528#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2528#true} is VALID [2022-04-14 19:42:58,218 INFO L290 TraceCheckUtils]: 2: Hoare triple {2528#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-14 19:42:58,218 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2528#true} {2528#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-14 19:42:58,218 INFO L272 TraceCheckUtils]: 4: Hoare triple {2528#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-14 19:42:58,219 INFO L290 TraceCheckUtils]: 5: Hoare triple {2528#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2533#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:58,220 INFO L290 TraceCheckUtils]: 6: Hoare triple {2533#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2562#(and (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:42:58,220 INFO L290 TraceCheckUtils]: 7: Hoare triple {2562#(and (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-14 19:42:58,221 INFO L290 TraceCheckUtils]: 8: Hoare triple {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-14 19:42:58,221 INFO L290 TraceCheckUtils]: 9: Hoare triple {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-14 19:42:58,221 INFO L290 TraceCheckUtils]: 10: Hoare triple {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-14 19:42:58,222 INFO L290 TraceCheckUtils]: 11: Hoare triple {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-14 19:42:58,223 INFO L290 TraceCheckUtils]: 12: Hoare triple {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-14 19:42:58,223 INFO L290 TraceCheckUtils]: 13: Hoare triple {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2537#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:58,224 INFO L290 TraceCheckUtils]: 14: Hoare triple {2537#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2537#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:42:58,225 INFO L272 TraceCheckUtils]: 15: Hoare triple {2537#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2590#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:42:58,225 INFO L290 TraceCheckUtils]: 16: Hoare triple {2590#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2594#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:42:58,225 INFO L290 TraceCheckUtils]: 17: Hoare triple {2594#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2529#false} is VALID [2022-04-14 19:42:58,225 INFO L290 TraceCheckUtils]: 18: Hoare triple {2529#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2529#false} is VALID [2022-04-14 19:42:58,226 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:42:58,226 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:43:33,418 INFO L290 TraceCheckUtils]: 18: Hoare triple {2529#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2529#false} is VALID [2022-04-14 19:43:33,419 INFO L290 TraceCheckUtils]: 17: Hoare triple {2594#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2529#false} is VALID [2022-04-14 19:43:33,419 INFO L290 TraceCheckUtils]: 16: Hoare triple {2590#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2594#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:43:33,420 INFO L272 TraceCheckUtils]: 15: Hoare triple {2610#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2590#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:43:33,420 INFO L290 TraceCheckUtils]: 14: Hoare triple {2610#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2610#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-14 19:43:35,427 WARN L290 TraceCheckUtils]: 13: Hoare triple {2617#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))))) (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (> 0 aux_mod_v_main_~z~0_40_31)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2610#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is UNKNOWN [2022-04-14 19:43:37,442 WARN L290 TraceCheckUtils]: 12: Hoare triple {2621#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~y~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31) (+ main_~z~0 main_~y~0)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) v_it_6 aux_mod_v_main_~y~0_40_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (<= main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ aux_mod_v_main_~y~0_40_31 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (< 0 (mod (+ (* aux_mod_v_main_~z~0_40_31 4294967295) main_~z~0 main_~y~0) 4294967296)))))) (> 0 aux_mod_v_main_~z~0_40_31)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2617#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))))) (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (> 0 aux_mod_v_main_~z~0_40_31)))} is UNKNOWN [2022-04-14 19:43:39,453 WARN L290 TraceCheckUtils]: 11: Hoare triple {2621#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~y~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31) (+ main_~z~0 main_~y~0)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) v_it_6 aux_mod_v_main_~y~0_40_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (<= main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ aux_mod_v_main_~y~0_40_31 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (< 0 (mod (+ (* aux_mod_v_main_~z~0_40_31 4294967295) main_~z~0 main_~y~0) 4294967296)))))) (> 0 aux_mod_v_main_~z~0_40_31)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2621#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~y~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31) (+ main_~z~0 main_~y~0)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) v_it_6 aux_mod_v_main_~y~0_40_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (<= main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ aux_mod_v_main_~y~0_40_31 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (< 0 (mod (+ (* aux_mod_v_main_~z~0_40_31 4294967295) main_~z~0 main_~y~0) 4294967296)))))) (> 0 aux_mod_v_main_~z~0_40_31)))} is UNKNOWN [2022-04-14 19:43:41,486 WARN L290 TraceCheckUtils]: 10: Hoare triple {2621#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~y~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31) (+ main_~z~0 main_~y~0)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) v_it_6 aux_mod_v_main_~y~0_40_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (<= main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ aux_mod_v_main_~y~0_40_31 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (< 0 (mod (+ (* aux_mod_v_main_~z~0_40_31 4294967295) main_~z~0 main_~y~0) 4294967296)))))) (> 0 aux_mod_v_main_~z~0_40_31)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2621#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~y~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31) (+ main_~z~0 main_~y~0)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) v_it_6 aux_mod_v_main_~y~0_40_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (<= main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ aux_mod_v_main_~y~0_40_31 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (< 0 (mod (+ (* aux_mod_v_main_~z~0_40_31 4294967295) main_~z~0 main_~y~0) 4294967296)))))) (> 0 aux_mod_v_main_~z~0_40_31)))} is UNKNOWN [2022-04-14 19:43:41,498 INFO L290 TraceCheckUtils]: 9: Hoare triple {2631#(or (and (<= (div (+ (- 1) (* (- 1) main_~z~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296))) (<= (div (+ (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296)) (+ (div (+ main_~z~0 (- 4294967296)) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2621#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~y~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31) (+ main_~z~0 main_~y~0)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) v_it_6 aux_mod_v_main_~y~0_40_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (<= main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ aux_mod_v_main_~y~0_40_31 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (< 0 (mod (+ (* aux_mod_v_main_~z~0_40_31 4294967295) main_~z~0 main_~y~0) 4294967296)))))) (> 0 aux_mod_v_main_~z~0_40_31)))} is VALID [2022-04-14 19:43:41,500 INFO L290 TraceCheckUtils]: 8: Hoare triple {2631#(or (and (<= (div (+ (- 1) (* (- 1) main_~z~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296))) (<= (div (+ (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296)) (+ (div (+ main_~z~0 (- 4294967296)) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2631#(or (and (<= (div (+ (- 1) (* (- 1) main_~z~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296))) (<= (div (+ (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296)) (+ (div (+ main_~z~0 (- 4294967296)) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:43:41,502 INFO L290 TraceCheckUtils]: 7: Hoare triple {2638#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2631#(or (and (<= (div (+ (- 1) (* (- 1) main_~z~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296))) (<= (div (+ (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296)) (+ (div (+ main_~z~0 (- 4294967296)) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:43:41,502 INFO L290 TraceCheckUtils]: 6: Hoare triple {2642#(or (< 0 (mod main_~x~0 4294967296)) (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2638#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:43:41,503 INFO L290 TraceCheckUtils]: 5: Hoare triple {2528#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2642#(or (< 0 (mod main_~x~0 4294967296)) (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:43:41,503 INFO L272 TraceCheckUtils]: 4: Hoare triple {2528#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-14 19:43:41,504 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2528#true} {2528#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-14 19:43:41,504 INFO L290 TraceCheckUtils]: 2: Hoare triple {2528#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-14 19:43:41,504 INFO L290 TraceCheckUtils]: 1: Hoare triple {2528#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2528#true} is VALID [2022-04-14 19:43:41,504 INFO L272 TraceCheckUtils]: 0: Hoare triple {2528#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-14 19:43:41,504 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 1 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:43:41,504 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [370040583] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:43:41,505 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:43:41,505 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 10] total 19 [2022-04-14 19:43:41,505 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1888975225] [2022-04-14 19:43:41,505 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:43:41,505 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:43:41,506 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:43:41,506 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:43:49,725 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 36 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2022-04-14 19:43:49,725 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-14 19:43:49,725 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:43:49,726 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-14 19:43:49,726 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=261, Unknown=10, NotChecked=0, Total=342 [2022-04-14 19:43:49,726 INFO L87 Difference]: Start difference. First operand 35 states and 53 transitions. Second operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:43:50,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:43:50,204 INFO L93 Difference]: Finished difference Result 50 states and 76 transitions. [2022-04-14 19:43:50,204 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-14 19:43:50,204 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:43:50,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:43:50,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:43:50,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-14 19:43:50,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:43:50,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-14 19:43:50,207 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 50 transitions. [2022-04-14 19:43:50,267 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:43:50,268 INFO L225 Difference]: With dead ends: 50 [2022-04-14 19:43:50,268 INFO L226 Difference]: Without dead ends: 44 [2022-04-14 19:43:50,269 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 30 SyntacticMatches, 4 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 106 ImplicationChecksByTransitivity, 22.1s TimeCoverageRelationStatistics Valid=128, Invalid=462, Unknown=10, NotChecked=0, Total=600 [2022-04-14 19:43:50,269 INFO L913 BasicCegarLoop]: 10 mSDtfsCounter, 46 mSDsluCounter, 65 mSDsCounter, 0 mSdLazyCounter, 129 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 75 SdHoareTripleChecker+Invalid, 176 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 129 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 36 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-14 19:43:50,269 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [46 Valid, 75 Invalid, 176 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 129 Invalid, 0 Unknown, 36 Unchecked, 0.2s Time] [2022-04-14 19:43:50,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2022-04-14 19:43:50,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 38. [2022-04-14 19:43:50,272 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:43:50,272 INFO L82 GeneralOperation]: Start isEquivalent. First operand 44 states. Second operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:43:50,272 INFO L74 IsIncluded]: Start isIncluded. First operand 44 states. Second operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:43:50,272 INFO L87 Difference]: Start difference. First operand 44 states. Second operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:43:50,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:43:50,274 INFO L93 Difference]: Finished difference Result 44 states and 69 transitions. [2022-04-14 19:43:50,274 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 69 transitions. [2022-04-14 19:43:50,274 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:43:50,274 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:43:50,275 INFO L74 IsIncluded]: Start isIncluded. First operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 44 states. [2022-04-14 19:43:50,275 INFO L87 Difference]: Start difference. First operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 44 states. [2022-04-14 19:43:50,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:43:50,276 INFO L93 Difference]: Finished difference Result 44 states and 69 transitions. [2022-04-14 19:43:50,276 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 69 transitions. [2022-04-14 19:43:50,276 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:43:50,276 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:43:50,276 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:43:50,277 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:43:50,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:43:50,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 58 transitions. [2022-04-14 19:43:50,278 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 58 transitions. Word has length 19 [2022-04-14 19:43:50,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:43:50,278 INFO L478 AbstractCegarLoop]: Abstraction has 38 states and 58 transitions. [2022-04-14 19:43:50,278 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:43:50,278 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 58 transitions. [2022-04-14 19:43:50,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-14 19:43:50,279 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:43:50,279 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:43:50,306 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-14 19:43:50,499 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-14 19:43:50,499 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:43:50,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:43:50,500 INFO L85 PathProgramCache]: Analyzing trace with hash -1453978548, now seen corresponding path program 1 times [2022-04-14 19:43:50,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:43:50,500 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [18593211] [2022-04-14 19:43:50,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:43:50,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:43:50,513 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:43:50,516 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.1))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:43:50,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:43:50,534 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:43:50,544 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.4))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:43:50,729 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:43:50,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:43:50,735 INFO L290 TraceCheckUtils]: 0: Hoare triple {2865#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2852#true} is VALID [2022-04-14 19:43:50,736 INFO L290 TraceCheckUtils]: 1: Hoare triple {2852#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-14 19:43:50,736 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2852#true} {2852#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-14 19:43:50,736 INFO L272 TraceCheckUtils]: 0: Hoare triple {2852#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2865#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:43:50,736 INFO L290 TraceCheckUtils]: 1: Hoare triple {2865#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2852#true} is VALID [2022-04-14 19:43:50,737 INFO L290 TraceCheckUtils]: 2: Hoare triple {2852#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-14 19:43:50,737 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2852#true} {2852#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-14 19:43:50,737 INFO L272 TraceCheckUtils]: 4: Hoare triple {2852#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-14 19:43:50,737 INFO L290 TraceCheckUtils]: 5: Hoare triple {2852#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2857#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:43:50,738 INFO L290 TraceCheckUtils]: 6: Hoare triple {2857#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2858#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:43:50,739 INFO L290 TraceCheckUtils]: 7: Hoare triple {2858#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2859#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:43:50,739 INFO L290 TraceCheckUtils]: 8: Hoare triple {2859#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2859#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:43:50,740 INFO L290 TraceCheckUtils]: 9: Hoare triple {2859#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2860#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:43:50,741 INFO L290 TraceCheckUtils]: 10: Hoare triple {2860#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2860#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:43:50,742 INFO L290 TraceCheckUtils]: 11: Hoare triple {2860#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2861#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} is VALID [2022-04-14 19:43:50,742 INFO L290 TraceCheckUtils]: 12: Hoare triple {2861#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2861#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} is VALID [2022-04-14 19:43:50,744 INFO L290 TraceCheckUtils]: 13: Hoare triple {2861#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2862#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-14 19:43:50,745 INFO L290 TraceCheckUtils]: 14: Hoare triple {2862#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2862#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-14 19:43:50,746 INFO L272 TraceCheckUtils]: 15: Hoare triple {2862#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2863#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:43:50,746 INFO L290 TraceCheckUtils]: 16: Hoare triple {2863#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2864#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:43:50,747 INFO L290 TraceCheckUtils]: 17: Hoare triple {2864#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2853#false} is VALID [2022-04-14 19:43:50,747 INFO L290 TraceCheckUtils]: 18: Hoare triple {2853#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2853#false} is VALID [2022-04-14 19:43:50,747 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:43:50,747 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:43:50,747 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [18593211] [2022-04-14 19:43:50,747 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [18593211] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:43:50,747 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1423683606] [2022-04-14 19:43:50,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:43:50,747 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:43:50,748 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:43:50,749 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:43:50,749 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-14 19:43:50,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:43:50,781 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-14 19:43:50,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:43:50,795 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:43:51,468 INFO L272 TraceCheckUtils]: 0: Hoare triple {2852#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-14 19:43:51,468 INFO L290 TraceCheckUtils]: 1: Hoare triple {2852#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2852#true} is VALID [2022-04-14 19:43:51,468 INFO L290 TraceCheckUtils]: 2: Hoare triple {2852#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-14 19:43:51,468 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2852#true} {2852#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-14 19:43:51,468 INFO L272 TraceCheckUtils]: 4: Hoare triple {2852#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-14 19:43:51,469 INFO L290 TraceCheckUtils]: 5: Hoare triple {2852#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2884#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:43:51,469 INFO L290 TraceCheckUtils]: 6: Hoare triple {2884#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2888#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:43:51,469 INFO L290 TraceCheckUtils]: 7: Hoare triple {2888#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2888#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:43:51,470 INFO L290 TraceCheckUtils]: 8: Hoare triple {2888#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2888#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:43:51,470 INFO L290 TraceCheckUtils]: 9: Hoare triple {2888#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2898#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:43:51,470 INFO L290 TraceCheckUtils]: 10: Hoare triple {2898#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2898#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:43:51,471 INFO L290 TraceCheckUtils]: 11: Hoare triple {2898#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2898#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:43:51,471 INFO L290 TraceCheckUtils]: 12: Hoare triple {2898#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2908#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:43:51,472 INFO L290 TraceCheckUtils]: 13: Hoare triple {2908#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2912#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-14 19:43:51,473 INFO L290 TraceCheckUtils]: 14: Hoare triple {2912#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2912#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-14 19:43:51,474 INFO L272 TraceCheckUtils]: 15: Hoare triple {2912#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2919#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:43:51,474 INFO L290 TraceCheckUtils]: 16: Hoare triple {2919#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2923#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:43:51,474 INFO L290 TraceCheckUtils]: 17: Hoare triple {2923#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2853#false} is VALID [2022-04-14 19:43:51,474 INFO L290 TraceCheckUtils]: 18: Hoare triple {2853#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2853#false} is VALID [2022-04-14 19:43:51,475 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:43:51,475 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:44:07,234 INFO L290 TraceCheckUtils]: 18: Hoare triple {2853#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2853#false} is VALID [2022-04-14 19:44:07,234 INFO L290 TraceCheckUtils]: 17: Hoare triple {2923#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2853#false} is VALID [2022-04-14 19:44:07,235 INFO L290 TraceCheckUtils]: 16: Hoare triple {2919#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2923#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:44:07,235 INFO L272 TraceCheckUtils]: 15: Hoare triple {2939#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2919#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:44:07,236 INFO L290 TraceCheckUtils]: 14: Hoare triple {2939#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2939#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-14 19:44:09,262 WARN L290 TraceCheckUtils]: 13: Hoare triple {2946#(forall ((aux_mod_v_main_~z~0_45_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (and (or (forall ((aux_div_v_main_~z~0_45_31 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int)) (or (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)))))))) (> 0 aux_mod_v_main_~z~0_45_31) (>= aux_mod_v_main_~z~0_45_31 4294967296)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2939#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is UNKNOWN [2022-04-14 19:44:11,274 WARN L290 TraceCheckUtils]: 12: Hoare triple {2950#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (<= 4294967296 aux_mod_v_main_~z~0_45_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))))))) (or (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296)))) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_45_31 0)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2946#(forall ((aux_mod_v_main_~z~0_45_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (and (or (forall ((aux_div_v_main_~z~0_45_31 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int)) (or (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)))))))) (> 0 aux_mod_v_main_~z~0_45_31) (>= aux_mod_v_main_~z~0_45_31 4294967296)))} is UNKNOWN [2022-04-14 19:44:13,289 WARN L290 TraceCheckUtils]: 11: Hoare triple {2950#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (<= 4294967296 aux_mod_v_main_~z~0_45_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))))))) (or (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296)))) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_45_31 0)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2950#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (<= 4294967296 aux_mod_v_main_~z~0_45_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))))))) (or (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296)))) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_45_31 0)))} is UNKNOWN [2022-04-14 19:44:15,300 WARN L290 TraceCheckUtils]: 10: Hoare triple {2950#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (<= 4294967296 aux_mod_v_main_~z~0_45_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))))))) (or (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296)))) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_45_31 0)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2950#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (<= 4294967296 aux_mod_v_main_~z~0_45_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))))))) (or (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296)))) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_45_31 0)))} is UNKNOWN [2022-04-14 19:44:15,301 INFO L290 TraceCheckUtils]: 9: Hoare triple {2888#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2950#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (<= 4294967296 aux_mod_v_main_~z~0_45_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))))))) (or (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296)))) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_45_31 0)))} is VALID [2022-04-14 19:44:15,302 INFO L290 TraceCheckUtils]: 8: Hoare triple {2888#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2888#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:44:15,302 INFO L290 TraceCheckUtils]: 7: Hoare triple {2888#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2888#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:44:15,302 INFO L290 TraceCheckUtils]: 6: Hoare triple {2969#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2888#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:44:15,303 INFO L290 TraceCheckUtils]: 5: Hoare triple {2852#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2969#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:44:15,303 INFO L272 TraceCheckUtils]: 4: Hoare triple {2852#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-14 19:44:15,303 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2852#true} {2852#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-14 19:44:15,303 INFO L290 TraceCheckUtils]: 2: Hoare triple {2852#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-14 19:44:15,303 INFO L290 TraceCheckUtils]: 1: Hoare triple {2852#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2852#true} is VALID [2022-04-14 19:44:15,303 INFO L272 TraceCheckUtils]: 0: Hoare triple {2852#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-14 19:44:15,304 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:44:15,304 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1423683606] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:44:15,304 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:44:15,304 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 22 [2022-04-14 19:44:15,304 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [777178301] [2022-04-14 19:44:15,304 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:44:15,305 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:44:15,305 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:44:15,305 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:44:23,424 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 39 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2022-04-14 19:44:23,424 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-14 19:44:23,424 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:44:23,425 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-14 19:44:23,425 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=364, Unknown=4, NotChecked=0, Total=462 [2022-04-14 19:44:23,425 INFO L87 Difference]: Start difference. First operand 38 states and 58 transitions. Second operand has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:44:24,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:44:24,058 INFO L93 Difference]: Finished difference Result 52 states and 79 transitions. [2022-04-14 19:44:24,058 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-14 19:44:24,058 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:44:24,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:44:24,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:44:24,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 55 transitions. [2022-04-14 19:44:24,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:44:24,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 55 transitions. [2022-04-14 19:44:24,061 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 55 transitions. [2022-04-14 19:44:24,121 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:44:24,122 INFO L225 Difference]: With dead ends: 52 [2022-04-14 19:44:24,122 INFO L226 Difference]: Without dead ends: 48 [2022-04-14 19:44:24,122 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 29 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 225 ImplicationChecksByTransitivity, 9.5s TimeCoverageRelationStatistics Valid=209, Invalid=779, Unknown=4, NotChecked=0, Total=992 [2022-04-14 19:44:24,123 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 46 mSDsluCounter, 53 mSDsCounter, 0 mSdLazyCounter, 90 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 65 SdHoareTripleChecker+Invalid, 148 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 90 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 40 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:44:24,123 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [46 Valid, 65 Invalid, 148 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 90 Invalid, 0 Unknown, 40 Unchecked, 0.1s Time] [2022-04-14 19:44:24,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-04-14 19:44:24,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 39. [2022-04-14 19:44:24,126 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:44:24,126 INFO L82 GeneralOperation]: Start isEquivalent. First operand 48 states. Second operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:44:24,126 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:44:24,127 INFO L87 Difference]: Start difference. First operand 48 states. Second operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:44:24,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:44:24,128 INFO L93 Difference]: Finished difference Result 48 states and 74 transitions. [2022-04-14 19:44:24,128 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 74 transitions. [2022-04-14 19:44:24,142 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:44:24,142 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:44:24,143 INFO L74 IsIncluded]: Start isIncluded. First operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-14 19:44:24,143 INFO L87 Difference]: Start difference. First operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-14 19:44:24,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:44:24,144 INFO L93 Difference]: Finished difference Result 48 states and 74 transitions. [2022-04-14 19:44:24,144 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 74 transitions. [2022-04-14 19:44:24,144 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:44:24,144 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:44:24,145 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:44:24,145 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:44:24,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:44:24,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 60 transitions. [2022-04-14 19:44:24,146 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 60 transitions. Word has length 19 [2022-04-14 19:44:24,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:44:24,146 INFO L478 AbstractCegarLoop]: Abstraction has 39 states and 60 transitions. [2022-04-14 19:44:24,146 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:44:24,146 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 60 transitions. [2022-04-14 19:44:24,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-14 19:44:24,147 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:44:24,147 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:44:24,171 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-14 19:44:24,347 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-14 19:44:24,347 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:44:24,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:44:24,349 INFO L85 PathProgramCache]: Analyzing trace with hash -1642739759, now seen corresponding path program 1 times [2022-04-14 19:44:24,349 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:44:24,349 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1046250578] [2022-04-14 19:44:24,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:44:24,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:44:24,358 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-14 19:44:24,359 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.1))) (+ main_~y~0_10 .cse0 (* (- 4294967296) (div (+ main_~y~0_10 .cse0) 4294967296)))) 0)) [2022-04-14 19:44:24,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:44:24,374 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-14 19:44:24,378 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.4))) (+ main_~y~0_10 .cse0 (* (- 4294967296) (div (+ main_~y~0_10 .cse0) 4294967296)))) 0)) [2022-04-14 19:44:24,516 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:44:24,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:44:24,529 INFO L290 TraceCheckUtils]: 0: Hoare triple {3210#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3198#true} is VALID [2022-04-14 19:44:24,529 INFO L290 TraceCheckUtils]: 1: Hoare triple {3198#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-14 19:44:24,529 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3198#true} {3198#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-14 19:44:24,530 INFO L272 TraceCheckUtils]: 0: Hoare triple {3198#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3210#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:44:24,530 INFO L290 TraceCheckUtils]: 1: Hoare triple {3210#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3198#true} is VALID [2022-04-14 19:44:24,530 INFO L290 TraceCheckUtils]: 2: Hoare triple {3198#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-14 19:44:24,530 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3198#true} {3198#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-14 19:44:24,530 INFO L272 TraceCheckUtils]: 4: Hoare triple {3198#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-14 19:44:24,531 INFO L290 TraceCheckUtils]: 5: Hoare triple {3198#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3203#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:44:24,532 INFO L290 TraceCheckUtils]: 6: Hoare triple {3203#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3204#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:44:24,533 INFO L290 TraceCheckUtils]: 7: Hoare triple {3204#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:44:24,533 INFO L290 TraceCheckUtils]: 8: Hoare triple {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:44:24,534 INFO L290 TraceCheckUtils]: 9: Hoare triple {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:44:24,535 INFO L290 TraceCheckUtils]: 10: Hoare triple {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-14 19:44:24,536 INFO L290 TraceCheckUtils]: 11: Hoare triple {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-14 19:44:24,536 INFO L290 TraceCheckUtils]: 12: Hoare triple {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-14 19:44:24,538 INFO L290 TraceCheckUtils]: 13: Hoare triple {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {3207#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:44:24,539 INFO L290 TraceCheckUtils]: 14: Hoare triple {3207#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3207#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:44:24,540 INFO L272 TraceCheckUtils]: 15: Hoare triple {3207#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3208#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:44:24,540 INFO L290 TraceCheckUtils]: 16: Hoare triple {3208#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3209#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:44:24,540 INFO L290 TraceCheckUtils]: 17: Hoare triple {3209#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3199#false} is VALID [2022-04-14 19:44:24,541 INFO L290 TraceCheckUtils]: 18: Hoare triple {3199#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3199#false} is VALID [2022-04-14 19:44:24,541 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:44:24,541 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:44:24,541 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1046250578] [2022-04-14 19:44:24,541 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1046250578] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:44:24,541 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1797801785] [2022-04-14 19:44:24,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:44:24,542 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:44:24,542 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:44:24,544 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:44:24,571 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-14 19:44:24,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:44:24,590 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-14 19:44:24,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:44:24,601 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:44:25,470 INFO L272 TraceCheckUtils]: 0: Hoare triple {3198#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-14 19:44:25,471 INFO L290 TraceCheckUtils]: 1: Hoare triple {3198#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3198#true} is VALID [2022-04-14 19:44:25,471 INFO L290 TraceCheckUtils]: 2: Hoare triple {3198#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-14 19:44:25,471 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3198#true} {3198#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-14 19:44:25,471 INFO L272 TraceCheckUtils]: 4: Hoare triple {3198#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-14 19:44:25,471 INFO L290 TraceCheckUtils]: 5: Hoare triple {3198#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3203#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:44:25,472 INFO L290 TraceCheckUtils]: 6: Hoare triple {3203#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3204#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:44:25,473 INFO L290 TraceCheckUtils]: 7: Hoare triple {3204#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:44:25,473 INFO L290 TraceCheckUtils]: 8: Hoare triple {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:44:25,473 INFO L290 TraceCheckUtils]: 9: Hoare triple {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:44:25,475 INFO L290 TraceCheckUtils]: 10: Hoare triple {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-14 19:44:25,475 INFO L290 TraceCheckUtils]: 11: Hoare triple {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-14 19:44:25,476 INFO L290 TraceCheckUtils]: 12: Hoare triple {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-14 19:44:25,477 INFO L290 TraceCheckUtils]: 13: Hoare triple {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {3207#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:44:25,477 INFO L290 TraceCheckUtils]: 14: Hoare triple {3207#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3207#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:44:25,478 INFO L272 TraceCheckUtils]: 15: Hoare triple {3207#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3259#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:44:25,478 INFO L290 TraceCheckUtils]: 16: Hoare triple {3259#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3263#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:44:25,479 INFO L290 TraceCheckUtils]: 17: Hoare triple {3263#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3199#false} is VALID [2022-04-14 19:44:25,479 INFO L290 TraceCheckUtils]: 18: Hoare triple {3199#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3199#false} is VALID [2022-04-14 19:44:25,479 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:44:25,479 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:45:32,385 INFO L290 TraceCheckUtils]: 18: Hoare triple {3199#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3199#false} is VALID [2022-04-14 19:45:32,386 INFO L290 TraceCheckUtils]: 17: Hoare triple {3263#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3199#false} is VALID [2022-04-14 19:45:32,386 INFO L290 TraceCheckUtils]: 16: Hoare triple {3259#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3263#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:45:32,387 INFO L272 TraceCheckUtils]: 15: Hoare triple {3279#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3259#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:45:32,387 INFO L290 TraceCheckUtils]: 14: Hoare triple {3279#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3279#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-14 19:45:32,533 INFO L290 TraceCheckUtils]: 13: Hoare triple {3286#(forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {3279#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-14 19:45:34,544 WARN L290 TraceCheckUtils]: 12: Hoare triple {3286#(forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3286#(forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} is UNKNOWN [2022-04-14 19:45:34,642 INFO L290 TraceCheckUtils]: 11: Hoare triple {3286#(forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3286#(forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} is VALID [2022-04-14 19:45:36,680 WARN L290 TraceCheckUtils]: 10: Hoare triple {3296#(forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (and (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (< 0 (mod main_~x~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3286#(forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} is UNKNOWN [2022-04-14 19:45:38,800 WARN L290 TraceCheckUtils]: 9: Hoare triple {3300#(or (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (and (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31))) (< 0 (mod main_~y~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3296#(forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (and (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (< 0 (mod main_~x~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} is UNKNOWN [2022-04-14 19:45:40,972 WARN L290 TraceCheckUtils]: 8: Hoare triple {3300#(or (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (and (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31))) (< 0 (mod main_~y~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3300#(or (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (and (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31))) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-14 19:45:43,129 WARN L290 TraceCheckUtils]: 7: Hoare triple {3307#(or (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31) (and (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~y~0))) (< 0 (mod main_~x~0 4294967296))) (or (not (< 0 (mod main_~x~0 4294967296))) (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~y~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~y~0) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~y~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))))))) (< 0 (mod main_~y~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3300#(or (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (and (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31))) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-14 19:45:43,136 INFO L290 TraceCheckUtils]: 6: Hoare triple {3311#(or (< 0 (mod main_~x~0 4294967296)) (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3307#(or (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31) (and (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~y~0))) (< 0 (mod main_~x~0 4294967296))) (or (not (< 0 (mod main_~x~0 4294967296))) (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~y~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~y~0) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~y~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))))))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:45:43,137 INFO L290 TraceCheckUtils]: 5: Hoare triple {3198#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3311#(or (< 0 (mod main_~x~0 4294967296)) (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:45:43,137 INFO L272 TraceCheckUtils]: 4: Hoare triple {3198#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-14 19:45:43,137 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3198#true} {3198#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-14 19:45:43,137 INFO L290 TraceCheckUtils]: 2: Hoare triple {3198#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-14 19:45:43,137 INFO L290 TraceCheckUtils]: 1: Hoare triple {3198#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3198#true} is VALID [2022-04-14 19:45:43,137 INFO L272 TraceCheckUtils]: 0: Hoare triple {3198#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-14 19:45:43,137 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 1 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:45:43,138 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1797801785] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:45:43,138 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:45:43,138 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 10] total 18 [2022-04-14 19:45:43,138 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1024749407] [2022-04-14 19:45:43,138 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:45:43,138 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:45:43,139 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:45:43,139 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:45:57,607 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 28 inductive. 0 not inductive. 7 times theorem prover too weak to decide inductivity. [2022-04-14 19:45:57,608 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-14 19:45:57,608 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:45:57,608 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-14 19:45:57,608 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=228, Unknown=21, NotChecked=0, Total=306 [2022-04-14 19:45:57,608 INFO L87 Difference]: Start difference. First operand 39 states and 60 transitions. Second operand has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:14,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:14,342 INFO L93 Difference]: Finished difference Result 50 states and 77 transitions. [2022-04-14 19:46:14,342 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-14 19:46:14,343 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:46:14,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:46:14,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:14,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 51 transitions. [2022-04-14 19:46:14,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:14,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 51 transitions. [2022-04-14 19:46:14,345 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 51 transitions. [2022-04-14 19:46:14,405 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:46:14,406 INFO L225 Difference]: With dead ends: 50 [2022-04-14 19:46:14,406 INFO L226 Difference]: Without dead ends: 47 [2022-04-14 19:46:14,406 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 27 SyntacticMatches, 6 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 110 ImplicationChecksByTransitivity, 65.0s TimeCoverageRelationStatistics Valid=116, Invalid=457, Unknown=27, NotChecked=0, Total=600 [2022-04-14 19:46:14,407 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 33 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 112 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 79 SdHoareTripleChecker+Invalid, 197 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 112 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 74 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-14 19:46:14,407 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [33 Valid, 79 Invalid, 197 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 112 Invalid, 0 Unknown, 74 Unchecked, 0.2s Time] [2022-04-14 19:46:14,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2022-04-14 19:46:14,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 41. [2022-04-14 19:46:14,409 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:46:14,409 INFO L82 GeneralOperation]: Start isEquivalent. First operand 47 states. Second operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:14,410 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:14,410 INFO L87 Difference]: Start difference. First operand 47 states. Second operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:14,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:14,411 INFO L93 Difference]: Finished difference Result 47 states and 74 transitions. [2022-04-14 19:46:14,411 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 74 transitions. [2022-04-14 19:46:14,411 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:46:14,411 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:46:14,411 INFO L74 IsIncluded]: Start isIncluded. First operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 47 states. [2022-04-14 19:46:14,411 INFO L87 Difference]: Start difference. First operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 47 states. [2022-04-14 19:46:14,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:14,412 INFO L93 Difference]: Finished difference Result 47 states and 74 transitions. [2022-04-14 19:46:14,412 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 74 transitions. [2022-04-14 19:46:14,413 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:46:14,413 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:46:14,413 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:46:14,413 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:46:14,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:14,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 64 transitions. [2022-04-14 19:46:14,414 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 64 transitions. Word has length 19 [2022-04-14 19:46:14,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:46:14,414 INFO L478 AbstractCegarLoop]: Abstraction has 41 states and 64 transitions. [2022-04-14 19:46:14,414 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:14,414 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 64 transitions. [2022-04-14 19:46:14,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-14 19:46:14,415 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:46:14,415 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:46:14,440 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-14 19:46:14,625 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-14 19:46:14,626 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:46:14,626 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:46:14,626 INFO L85 PathProgramCache]: Analyzing trace with hash -869752682, now seen corresponding path program 1 times [2022-04-14 19:46:14,627 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:46:14,627 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2121463157] [2022-04-14 19:46:14,627 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:46:14,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:46:14,634 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-14 19:46:14,636 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:14,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:14,660 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-14 19:46:14,665 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.4))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:14,834 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:46:14,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:14,839 INFO L290 TraceCheckUtils]: 0: Hoare triple {3545#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3532#true} is VALID [2022-04-14 19:46:14,839 INFO L290 TraceCheckUtils]: 1: Hoare triple {3532#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3532#true} is VALID [2022-04-14 19:46:14,839 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3532#true} {3532#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3532#true} is VALID [2022-04-14 19:46:14,840 INFO L272 TraceCheckUtils]: 0: Hoare triple {3532#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3545#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:46:14,840 INFO L290 TraceCheckUtils]: 1: Hoare triple {3545#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3532#true} is VALID [2022-04-14 19:46:14,840 INFO L290 TraceCheckUtils]: 2: Hoare triple {3532#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3532#true} is VALID [2022-04-14 19:46:14,840 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3532#true} {3532#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3532#true} is VALID [2022-04-14 19:46:14,840 INFO L272 TraceCheckUtils]: 4: Hoare triple {3532#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3532#true} is VALID [2022-04-14 19:46:14,840 INFO L290 TraceCheckUtils]: 5: Hoare triple {3532#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3537#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:46:14,841 INFO L290 TraceCheckUtils]: 6: Hoare triple {3537#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3538#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:46:14,842 INFO L290 TraceCheckUtils]: 7: Hoare triple {3538#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3539#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:46:14,842 INFO L290 TraceCheckUtils]: 8: Hoare triple {3539#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3539#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:46:14,842 INFO L290 TraceCheckUtils]: 9: Hoare triple {3539#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3539#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-14 19:46:14,843 INFO L290 TraceCheckUtils]: 10: Hoare triple {3539#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3540#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:46:14,844 INFO L290 TraceCheckUtils]: 11: Hoare triple {3540#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3540#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:46:14,844 INFO L290 TraceCheckUtils]: 12: Hoare triple {3540#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {3541#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-14 19:46:14,845 INFO L290 TraceCheckUtils]: 13: Hoare triple {3541#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3542#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:46:14,846 INFO L290 TraceCheckUtils]: 14: Hoare triple {3542#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3542#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:46:14,847 INFO L272 TraceCheckUtils]: 15: Hoare triple {3542#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3543#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:46:14,847 INFO L290 TraceCheckUtils]: 16: Hoare triple {3543#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3544#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:46:14,847 INFO L290 TraceCheckUtils]: 17: Hoare triple {3544#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3533#false} is VALID [2022-04-14 19:46:14,847 INFO L290 TraceCheckUtils]: 18: Hoare triple {3533#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3533#false} is VALID [2022-04-14 19:46:14,848 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:46:14,848 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:46:14,848 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2121463157] [2022-04-14 19:46:14,848 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2121463157] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:46:14,848 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1447855506] [2022-04-14 19:46:14,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:46:14,848 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:46:14,848 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:46:14,849 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:46:14,849 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-14 19:46:14,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:14,881 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-14 19:46:14,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:14,892 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:46:15,493 INFO L272 TraceCheckUtils]: 0: Hoare triple {3532#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3532#true} is VALID [2022-04-14 19:46:15,494 INFO L290 TraceCheckUtils]: 1: Hoare triple {3532#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3532#true} is VALID [2022-04-14 19:46:15,494 INFO L290 TraceCheckUtils]: 2: Hoare triple {3532#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3532#true} is VALID [2022-04-14 19:46:15,494 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3532#true} {3532#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3532#true} is VALID [2022-04-14 19:46:15,494 INFO L272 TraceCheckUtils]: 4: Hoare triple {3532#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3532#true} is VALID [2022-04-14 19:46:15,494 INFO L290 TraceCheckUtils]: 5: Hoare triple {3532#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3564#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:46:15,495 INFO L290 TraceCheckUtils]: 6: Hoare triple {3564#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3568#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:46:15,495 INFO L290 TraceCheckUtils]: 7: Hoare triple {3568#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3568#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:46:15,496 INFO L290 TraceCheckUtils]: 8: Hoare triple {3568#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3568#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:46:15,496 INFO L290 TraceCheckUtils]: 9: Hoare triple {3568#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3568#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:46:15,498 INFO L290 TraceCheckUtils]: 10: Hoare triple {3568#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3568#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-14 19:46:15,498 INFO L290 TraceCheckUtils]: 11: Hoare triple {3568#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3584#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:15,499 INFO L290 TraceCheckUtils]: 12: Hoare triple {3584#(not (< 0 (mod main_~n~0 4294967296)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {3584#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:15,499 INFO L290 TraceCheckUtils]: 13: Hoare triple {3584#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3591#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:46:15,500 INFO L290 TraceCheckUtils]: 14: Hoare triple {3591#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3591#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:46:15,501 INFO L272 TraceCheckUtils]: 15: Hoare triple {3591#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3598#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:46:15,502 INFO L290 TraceCheckUtils]: 16: Hoare triple {3598#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3602#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:46:15,502 INFO L290 TraceCheckUtils]: 17: Hoare triple {3602#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3533#false} is VALID [2022-04-14 19:46:15,502 INFO L290 TraceCheckUtils]: 18: Hoare triple {3533#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3533#false} is VALID [2022-04-14 19:46:15,502 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-14 19:46:15,502 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-14 19:46:15,503 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1447855506] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:46:15,503 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-14 19:46:15,503 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [11] total 17 [2022-04-14 19:46:15,503 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1677268327] [2022-04-14 19:46:15,503 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:46:15,503 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:46:15,504 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:46:15,504 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:15,524 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:46:15,524 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-14 19:46:15,524 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:46:15,524 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-14 19:46:15,525 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=214, Unknown=0, NotChecked=0, Total=272 [2022-04-14 19:46:15,525 INFO L87 Difference]: Start difference. First operand 41 states and 64 transitions. Second operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:15,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:15,679 INFO L93 Difference]: Finished difference Result 51 states and 77 transitions. [2022-04-14 19:46:15,679 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-14 19:46:15,679 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:46:15,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:46:15,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:15,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 45 transitions. [2022-04-14 19:46:15,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:15,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 45 transitions. [2022-04-14 19:46:15,681 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 45 transitions. [2022-04-14 19:46:15,727 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:46:15,728 INFO L225 Difference]: With dead ends: 51 [2022-04-14 19:46:15,728 INFO L226 Difference]: Without dead ends: 48 [2022-04-14 19:46:15,728 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 15 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=73, Invalid=269, Unknown=0, NotChecked=0, Total=342 [2022-04-14 19:46:15,729 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 15 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 79 SdHoareTripleChecker+Invalid, 35 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 11 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:46:15,729 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [15 Valid, 79 Invalid, 35 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 22 Invalid, 0 Unknown, 11 Unchecked, 0.0s Time] [2022-04-14 19:46:15,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-04-14 19:46:15,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 41. [2022-04-14 19:46:15,731 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:46:15,731 INFO L82 GeneralOperation]: Start isEquivalent. First operand 48 states. Second operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:15,731 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:15,732 INFO L87 Difference]: Start difference. First operand 48 states. Second operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:15,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:15,736 INFO L93 Difference]: Finished difference Result 48 states and 74 transitions. [2022-04-14 19:46:15,736 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 74 transitions. [2022-04-14 19:46:15,736 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:46:15,736 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:46:15,737 INFO L74 IsIncluded]: Start isIncluded. First operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-14 19:46:15,737 INFO L87 Difference]: Start difference. First operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-14 19:46:15,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:15,738 INFO L93 Difference]: Finished difference Result 48 states and 74 transitions. [2022-04-14 19:46:15,738 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 74 transitions. [2022-04-14 19:46:15,738 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:46:15,738 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:46:15,738 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:46:15,738 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:46:15,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:15,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 64 transitions. [2022-04-14 19:46:15,739 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 64 transitions. Word has length 19 [2022-04-14 19:46:15,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:46:15,739 INFO L478 AbstractCegarLoop]: Abstraction has 41 states and 64 transitions. [2022-04-14 19:46:15,740 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:15,740 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 64 transitions. [2022-04-14 19:46:15,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-14 19:46:15,740 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:46:15,740 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:46:15,765 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-14 19:46:15,963 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-14 19:46:15,963 INFO L403 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:46:15,964 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:46:15,964 INFO L85 PathProgramCache]: Analyzing trace with hash -1138278570, now seen corresponding path program 1 times [2022-04-14 19:46:15,964 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:46:15,964 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [578398728] [2022-04-14 19:46:15,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:46:15,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:46:15,971 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:15,972 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:15,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:15,984 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:15,987 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.4))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:16,132 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:46:16,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:16,140 INFO L290 TraceCheckUtils]: 0: Hoare triple {3813#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3800#true} is VALID [2022-04-14 19:46:16,140 INFO L290 TraceCheckUtils]: 1: Hoare triple {3800#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3800#true} is VALID [2022-04-14 19:46:16,141 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3800#true} {3800#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3800#true} is VALID [2022-04-14 19:46:16,141 INFO L272 TraceCheckUtils]: 0: Hoare triple {3800#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3813#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:46:16,141 INFO L290 TraceCheckUtils]: 1: Hoare triple {3813#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3800#true} is VALID [2022-04-14 19:46:16,141 INFO L290 TraceCheckUtils]: 2: Hoare triple {3800#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3800#true} is VALID [2022-04-14 19:46:16,142 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3800#true} {3800#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3800#true} is VALID [2022-04-14 19:46:16,142 INFO L272 TraceCheckUtils]: 4: Hoare triple {3800#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3800#true} is VALID [2022-04-14 19:46:16,142 INFO L290 TraceCheckUtils]: 5: Hoare triple {3800#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3805#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:46:16,143 INFO L290 TraceCheckUtils]: 6: Hoare triple {3805#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3806#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:46:16,144 INFO L290 TraceCheckUtils]: 7: Hoare triple {3806#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3807#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:46:16,145 INFO L290 TraceCheckUtils]: 8: Hoare triple {3807#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3808#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:46:16,146 INFO L290 TraceCheckUtils]: 9: Hoare triple {3808#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3808#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:46:16,147 INFO L290 TraceCheckUtils]: 10: Hoare triple {3808#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (= main_~y~0 0))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3809#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-14 19:46:16,148 INFO L290 TraceCheckUtils]: 11: Hoare triple {3809#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3809#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-14 19:46:16,148 INFO L290 TraceCheckUtils]: 12: Hoare triple {3809#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3809#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-14 19:46:16,149 INFO L290 TraceCheckUtils]: 13: Hoare triple {3809#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3810#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:46:16,150 INFO L290 TraceCheckUtils]: 14: Hoare triple {3810#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3810#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:46:16,151 INFO L272 TraceCheckUtils]: 15: Hoare triple {3810#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3811#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:46:16,152 INFO L290 TraceCheckUtils]: 16: Hoare triple {3811#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3812#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:46:16,152 INFO L290 TraceCheckUtils]: 17: Hoare triple {3812#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3801#false} is VALID [2022-04-14 19:46:16,152 INFO L290 TraceCheckUtils]: 18: Hoare triple {3801#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3801#false} is VALID [2022-04-14 19:46:16,152 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:46:16,152 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:46:16,153 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [578398728] [2022-04-14 19:46:16,153 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [578398728] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:46:16,153 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [704972967] [2022-04-14 19:46:16,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:46:16,153 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:46:16,153 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:46:16,155 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:46:16,155 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-14 19:46:16,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:16,184 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-14 19:46:16,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:16,190 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:46:16,747 INFO L272 TraceCheckUtils]: 0: Hoare triple {3800#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3800#true} is VALID [2022-04-14 19:46:16,747 INFO L290 TraceCheckUtils]: 1: Hoare triple {3800#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3800#true} is VALID [2022-04-14 19:46:16,747 INFO L290 TraceCheckUtils]: 2: Hoare triple {3800#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3800#true} is VALID [2022-04-14 19:46:16,747 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3800#true} {3800#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3800#true} is VALID [2022-04-14 19:46:16,747 INFO L272 TraceCheckUtils]: 4: Hoare triple {3800#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3800#true} is VALID [2022-04-14 19:46:16,747 INFO L290 TraceCheckUtils]: 5: Hoare triple {3800#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3832#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:46:16,748 INFO L290 TraceCheckUtils]: 6: Hoare triple {3832#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3836#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:16,748 INFO L290 TraceCheckUtils]: 7: Hoare triple {3836#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3836#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:16,748 INFO L290 TraceCheckUtils]: 8: Hoare triple {3836#(not (< 0 (mod main_~n~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3836#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:16,749 INFO L290 TraceCheckUtils]: 9: Hoare triple {3836#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3836#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:16,749 INFO L290 TraceCheckUtils]: 10: Hoare triple {3836#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3836#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:16,757 INFO L290 TraceCheckUtils]: 11: Hoare triple {3836#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3836#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:16,757 INFO L290 TraceCheckUtils]: 12: Hoare triple {3836#(not (< 0 (mod main_~n~0 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3836#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:16,758 INFO L290 TraceCheckUtils]: 13: Hoare triple {3836#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3858#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:46:16,758 INFO L290 TraceCheckUtils]: 14: Hoare triple {3858#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3858#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:46:16,759 INFO L272 TraceCheckUtils]: 15: Hoare triple {3858#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3865#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:46:16,760 INFO L290 TraceCheckUtils]: 16: Hoare triple {3865#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3869#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:46:16,760 INFO L290 TraceCheckUtils]: 17: Hoare triple {3869#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3801#false} is VALID [2022-04-14 19:46:16,761 INFO L290 TraceCheckUtils]: 18: Hoare triple {3801#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3801#false} is VALID [2022-04-14 19:46:16,761 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-14 19:46:16,761 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-14 19:46:16,761 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [704972967] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:46:16,761 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-14 19:46:16,761 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [11] total 16 [2022-04-14 19:46:16,761 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [537258303] [2022-04-14 19:46:16,761 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:46:16,762 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:46:16,762 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:46:16,762 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:16,777 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:46:16,777 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-14 19:46:16,777 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:46:16,778 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-14 19:46:16,778 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=189, Unknown=0, NotChecked=0, Total=240 [2022-04-14 19:46:16,778 INFO L87 Difference]: Start difference. First operand 41 states and 64 transitions. Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:16,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:16,903 INFO L93 Difference]: Finished difference Result 54 states and 84 transitions. [2022-04-14 19:46:16,903 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-14 19:46:16,903 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:46:16,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:46:16,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:16,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 52 transitions. [2022-04-14 19:46:16,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:16,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 52 transitions. [2022-04-14 19:46:16,905 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 52 transitions. [2022-04-14 19:46:16,963 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:46:16,963 INFO L225 Difference]: With dead ends: 54 [2022-04-14 19:46:16,964 INFO L226 Difference]: Without dead ends: 51 [2022-04-14 19:46:16,964 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=73, Invalid=269, Unknown=0, NotChecked=0, Total=342 [2022-04-14 19:46:16,964 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 12 mSDsluCounter, 54 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 68 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:46:16,965 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [12 Valid, 68 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 26 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-14 19:46:16,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-04-14 19:46:16,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 42. [2022-04-14 19:46:16,967 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:46:16,967 INFO L82 GeneralOperation]: Start isEquivalent. First operand 51 states. Second operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:16,967 INFO L74 IsIncluded]: Start isIncluded. First operand 51 states. Second operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:16,967 INFO L87 Difference]: Start difference. First operand 51 states. Second operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:16,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:16,968 INFO L93 Difference]: Finished difference Result 51 states and 81 transitions. [2022-04-14 19:46:16,968 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 81 transitions. [2022-04-14 19:46:16,969 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:46:16,969 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:46:16,969 INFO L74 IsIncluded]: Start isIncluded. First operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 51 states. [2022-04-14 19:46:16,969 INFO L87 Difference]: Start difference. First operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 51 states. [2022-04-14 19:46:16,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:16,970 INFO L93 Difference]: Finished difference Result 51 states and 81 transitions. [2022-04-14 19:46:16,970 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 81 transitions. [2022-04-14 19:46:16,970 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:46:16,970 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:46:16,970 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:46:16,971 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:46:16,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:16,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 66 transitions. [2022-04-14 19:46:16,972 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 66 transitions. Word has length 19 [2022-04-14 19:46:16,972 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:46:16,972 INFO L478 AbstractCegarLoop]: Abstraction has 42 states and 66 transitions. [2022-04-14 19:46:16,972 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:16,972 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 66 transitions. [2022-04-14 19:46:16,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-14 19:46:16,972 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:46:16,972 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:46:16,999 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-04-14 19:46:17,196 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:46:17,197 INFO L403 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:46:17,197 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:46:17,197 INFO L85 PathProgramCache]: Analyzing trace with hash 84699953, now seen corresponding path program 1 times [2022-04-14 19:46:17,197 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:46:17,197 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [364476252] [2022-04-14 19:46:17,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:46:17,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:46:17,206 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:17,208 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.1))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:17,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:17,218 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:17,222 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.4))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:17,411 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:46:17,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:17,420 INFO L290 TraceCheckUtils]: 0: Hoare triple {4092#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4079#true} is VALID [2022-04-14 19:46:17,421 INFO L290 TraceCheckUtils]: 1: Hoare triple {4079#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4079#true} is VALID [2022-04-14 19:46:17,421 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4079#true} {4079#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4079#true} is VALID [2022-04-14 19:46:17,421 INFO L272 TraceCheckUtils]: 0: Hoare triple {4079#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4092#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:46:17,422 INFO L290 TraceCheckUtils]: 1: Hoare triple {4092#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4079#true} is VALID [2022-04-14 19:46:17,422 INFO L290 TraceCheckUtils]: 2: Hoare triple {4079#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4079#true} is VALID [2022-04-14 19:46:17,422 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4079#true} {4079#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4079#true} is VALID [2022-04-14 19:46:17,422 INFO L272 TraceCheckUtils]: 4: Hoare triple {4079#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4079#true} is VALID [2022-04-14 19:46:17,422 INFO L290 TraceCheckUtils]: 5: Hoare triple {4079#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4084#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:46:17,423 INFO L290 TraceCheckUtils]: 6: Hoare triple {4084#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4085#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:46:17,424 INFO L290 TraceCheckUtils]: 7: Hoare triple {4085#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4086#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:46:17,426 INFO L290 TraceCheckUtils]: 8: Hoare triple {4086#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4087#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-14 19:46:17,426 INFO L290 TraceCheckUtils]: 9: Hoare triple {4087#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= 0 main_~z~0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4087#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-14 19:46:17,427 INFO L290 TraceCheckUtils]: 10: Hoare triple {4087#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= 0 main_~z~0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4088#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} is VALID [2022-04-14 19:46:17,428 INFO L290 TraceCheckUtils]: 11: Hoare triple {4088#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4088#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} is VALID [2022-04-14 19:46:17,429 INFO L290 TraceCheckUtils]: 12: Hoare triple {4088#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4088#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} is VALID [2022-04-14 19:46:17,431 INFO L290 TraceCheckUtils]: 13: Hoare triple {4088#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {4089#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-14 19:46:17,432 INFO L290 TraceCheckUtils]: 14: Hoare triple {4089#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4089#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-14 19:46:17,434 INFO L272 TraceCheckUtils]: 15: Hoare triple {4089#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4090#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:46:17,434 INFO L290 TraceCheckUtils]: 16: Hoare triple {4090#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4091#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:46:17,435 INFO L290 TraceCheckUtils]: 17: Hoare triple {4091#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4080#false} is VALID [2022-04-14 19:46:17,435 INFO L290 TraceCheckUtils]: 18: Hoare triple {4080#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4080#false} is VALID [2022-04-14 19:46:17,435 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:46:17,435 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:46:17,435 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [364476252] [2022-04-14 19:46:17,436 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [364476252] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:46:17,436 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2079634588] [2022-04-14 19:46:17,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:46:17,436 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:46:17,436 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:46:17,437 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:46:17,439 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-14 19:46:17,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:17,477 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-14 19:46:17,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:17,486 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:46:18,198 INFO L272 TraceCheckUtils]: 0: Hoare triple {4079#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4079#true} is VALID [2022-04-14 19:46:18,198 INFO L290 TraceCheckUtils]: 1: Hoare triple {4079#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4079#true} is VALID [2022-04-14 19:46:18,199 INFO L290 TraceCheckUtils]: 2: Hoare triple {4079#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4079#true} is VALID [2022-04-14 19:46:18,199 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4079#true} {4079#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4079#true} is VALID [2022-04-14 19:46:18,199 INFO L272 TraceCheckUtils]: 4: Hoare triple {4079#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4079#true} is VALID [2022-04-14 19:46:18,202 INFO L290 TraceCheckUtils]: 5: Hoare triple {4079#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4111#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:46:18,203 INFO L290 TraceCheckUtils]: 6: Hoare triple {4111#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4115#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:18,203 INFO L290 TraceCheckUtils]: 7: Hoare triple {4115#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4115#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:18,203 INFO L290 TraceCheckUtils]: 8: Hoare triple {4115#(not (< 0 (mod main_~n~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4115#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:18,204 INFO L290 TraceCheckUtils]: 9: Hoare triple {4115#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4125#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:46:18,204 INFO L290 TraceCheckUtils]: 10: Hoare triple {4125#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4129#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:46:18,205 INFO L290 TraceCheckUtils]: 11: Hoare triple {4129#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4129#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:46:18,205 INFO L290 TraceCheckUtils]: 12: Hoare triple {4129#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4129#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:46:18,206 INFO L290 TraceCheckUtils]: 13: Hoare triple {4129#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {4125#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:46:18,206 INFO L290 TraceCheckUtils]: 14: Hoare triple {4125#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4125#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:46:18,207 INFO L272 TraceCheckUtils]: 15: Hoare triple {4125#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4145#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:46:18,208 INFO L290 TraceCheckUtils]: 16: Hoare triple {4145#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4149#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:46:18,208 INFO L290 TraceCheckUtils]: 17: Hoare triple {4149#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4080#false} is VALID [2022-04-14 19:46:18,208 INFO L290 TraceCheckUtils]: 18: Hoare triple {4080#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4080#false} is VALID [2022-04-14 19:46:18,208 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:46:18,208 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:46:22,603 INFO L290 TraceCheckUtils]: 18: Hoare triple {4080#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4080#false} is VALID [2022-04-14 19:46:22,604 INFO L290 TraceCheckUtils]: 17: Hoare triple {4149#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4080#false} is VALID [2022-04-14 19:46:22,604 INFO L290 TraceCheckUtils]: 16: Hoare triple {4145#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4149#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:46:22,605 INFO L272 TraceCheckUtils]: 15: Hoare triple {4165#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4145#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:46:22,605 INFO L290 TraceCheckUtils]: 14: Hoare triple {4165#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4165#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-14 19:46:24,380 INFO L290 TraceCheckUtils]: 13: Hoare triple {4172#(forall ((aux_mod_v_main_~z~0_54_31 Int)) (or (> 0 aux_mod_v_main_~z~0_54_31) (>= aux_mod_v_main_~z~0_54_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_54_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_54_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))))) (or (forall ((aux_div_v_main_~z~0_54_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))) (< 0 (mod main_~y~0 4294967296))))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {4165#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-14 19:46:26,393 WARN L290 TraceCheckUtils]: 12: Hoare triple {4172#(forall ((aux_mod_v_main_~z~0_54_31 Int)) (or (> 0 aux_mod_v_main_~z~0_54_31) (>= aux_mod_v_main_~z~0_54_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_54_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_54_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))))) (or (forall ((aux_div_v_main_~z~0_54_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))) (< 0 (mod main_~y~0 4294967296))))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4172#(forall ((aux_mod_v_main_~z~0_54_31 Int)) (or (> 0 aux_mod_v_main_~z~0_54_31) (>= aux_mod_v_main_~z~0_54_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_54_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_54_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))))) (or (forall ((aux_div_v_main_~z~0_54_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))) (< 0 (mod main_~y~0 4294967296))))))} is UNKNOWN [2022-04-14 19:46:28,419 WARN L290 TraceCheckUtils]: 11: Hoare triple {4172#(forall ((aux_mod_v_main_~z~0_54_31 Int)) (or (> 0 aux_mod_v_main_~z~0_54_31) (>= aux_mod_v_main_~z~0_54_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_54_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_54_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))))) (or (forall ((aux_div_v_main_~z~0_54_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))) (< 0 (mod main_~y~0 4294967296))))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4172#(forall ((aux_mod_v_main_~z~0_54_31 Int)) (or (> 0 aux_mod_v_main_~z~0_54_31) (>= aux_mod_v_main_~z~0_54_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_54_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_54_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))))) (or (forall ((aux_div_v_main_~z~0_54_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))) (< 0 (mod main_~y~0 4294967296))))))} is UNKNOWN [2022-04-14 19:46:28,422 INFO L290 TraceCheckUtils]: 10: Hoare triple {4165#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4172#(forall ((aux_mod_v_main_~z~0_54_31 Int)) (or (> 0 aux_mod_v_main_~z~0_54_31) (>= aux_mod_v_main_~z~0_54_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_54_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_54_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))))) (or (forall ((aux_div_v_main_~z~0_54_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))) (< 0 (mod main_~y~0 4294967296))))))} is VALID [2022-04-14 19:46:28,423 INFO L290 TraceCheckUtils]: 9: Hoare triple {4115#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4165#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-14 19:46:28,423 INFO L290 TraceCheckUtils]: 8: Hoare triple {4115#(not (< 0 (mod main_~n~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4115#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:28,424 INFO L290 TraceCheckUtils]: 7: Hoare triple {4115#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4115#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:28,424 INFO L290 TraceCheckUtils]: 6: Hoare triple {4194#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4115#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:28,424 INFO L290 TraceCheckUtils]: 5: Hoare triple {4079#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4194#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:46:28,424 INFO L272 TraceCheckUtils]: 4: Hoare triple {4079#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4079#true} is VALID [2022-04-14 19:46:28,425 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4079#true} {4079#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4079#true} is VALID [2022-04-14 19:46:28,425 INFO L290 TraceCheckUtils]: 2: Hoare triple {4079#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4079#true} is VALID [2022-04-14 19:46:28,425 INFO L290 TraceCheckUtils]: 1: Hoare triple {4079#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4079#true} is VALID [2022-04-14 19:46:28,425 INFO L272 TraceCheckUtils]: 0: Hoare triple {4079#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4079#true} is VALID [2022-04-14 19:46:28,425 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:46:28,425 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2079634588] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 19:46:28,425 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 19:46:28,425 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 8] total 20 [2022-04-14 19:46:28,425 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1802235759] [2022-04-14 19:46:28,425 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 19:46:28,426 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:46:28,426 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:46:28,426 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:34,549 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 40 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-14 19:46:34,549 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-14 19:46:34,549 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:46:34,550 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-14 19:46:34,550 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=303, Unknown=1, NotChecked=0, Total=380 [2022-04-14 19:46:34,550 INFO L87 Difference]: Start difference. First operand 42 states and 66 transitions. Second operand has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:35,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:35,119 INFO L93 Difference]: Finished difference Result 62 states and 99 transitions. [2022-04-14 19:46:35,119 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-14 19:46:35,119 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:46:35,120 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:46:35,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:35,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 67 transitions. [2022-04-14 19:46:35,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:35,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 67 transitions. [2022-04-14 19:46:35,122 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 67 transitions. [2022-04-14 19:46:35,197 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 67 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:46:35,198 INFO L225 Difference]: With dead ends: 62 [2022-04-14 19:46:35,198 INFO L226 Difference]: Without dead ends: 58 [2022-04-14 19:46:35,199 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 29 SyntacticMatches, 4 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=180, Invalid=689, Unknown=1, NotChecked=0, Total=870 [2022-04-14 19:46:35,199 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 53 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 109 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 53 SdHoareTripleChecker+Valid, 62 SdHoareTripleChecker+Invalid, 152 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 109 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 30 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 19:46:35,200 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [53 Valid, 62 Invalid, 152 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 109 Invalid, 0 Unknown, 30 Unchecked, 0.1s Time] [2022-04-14 19:46:35,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2022-04-14 19:46:35,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 45. [2022-04-14 19:46:35,202 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:46:35,202 INFO L82 GeneralOperation]: Start isEquivalent. First operand 58 states. Second operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:35,202 INFO L74 IsIncluded]: Start isIncluded. First operand 58 states. Second operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:35,202 INFO L87 Difference]: Start difference. First operand 58 states. Second operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:35,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:35,203 INFO L93 Difference]: Finished difference Result 58 states and 94 transitions. [2022-04-14 19:46:35,203 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 94 transitions. [2022-04-14 19:46:35,204 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:46:35,204 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:46:35,204 INFO L74 IsIncluded]: Start isIncluded. First operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 58 states. [2022-04-14 19:46:35,204 INFO L87 Difference]: Start difference. First operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 58 states. [2022-04-14 19:46:35,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:35,205 INFO L93 Difference]: Finished difference Result 58 states and 94 transitions. [2022-04-14 19:46:35,205 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 94 transitions. [2022-04-14 19:46:35,206 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:46:35,206 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:46:35,206 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:46:35,206 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:46:35,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:35,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 72 transitions. [2022-04-14 19:46:35,207 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 72 transitions. Word has length 19 [2022-04-14 19:46:35,207 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:46:35,207 INFO L478 AbstractCegarLoop]: Abstraction has 45 states and 72 transitions. [2022-04-14 19:46:35,207 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:35,207 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 72 transitions. [2022-04-14 19:46:35,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-14 19:46:35,208 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:46:35,208 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:46:35,234 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-14 19:46:35,422 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-14 19:46:35,423 INFO L403 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:46:35,423 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:46:35,423 INFO L85 PathProgramCache]: Analyzing trace with hash 857687030, now seen corresponding path program 1 times [2022-04-14 19:46:35,423 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:46:35,423 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [11511920] [2022-04-14 19:46:35,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:46:35,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:46:35,432 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:35,434 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:35,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:35,445 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:35,448 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.4))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:35,597 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:46:35,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:35,601 INFO L290 TraceCheckUtils]: 0: Hoare triple {4473#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4460#true} is VALID [2022-04-14 19:46:35,601 INFO L290 TraceCheckUtils]: 1: Hoare triple {4460#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4460#true} is VALID [2022-04-14 19:46:35,601 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4460#true} {4460#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4460#true} is VALID [2022-04-14 19:46:35,602 INFO L272 TraceCheckUtils]: 0: Hoare triple {4460#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4473#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:46:35,602 INFO L290 TraceCheckUtils]: 1: Hoare triple {4473#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4460#true} is VALID [2022-04-14 19:46:35,602 INFO L290 TraceCheckUtils]: 2: Hoare triple {4460#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4460#true} is VALID [2022-04-14 19:46:35,602 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4460#true} {4460#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4460#true} is VALID [2022-04-14 19:46:35,602 INFO L272 TraceCheckUtils]: 4: Hoare triple {4460#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4460#true} is VALID [2022-04-14 19:46:35,603 INFO L290 TraceCheckUtils]: 5: Hoare triple {4460#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4465#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:46:35,604 INFO L290 TraceCheckUtils]: 6: Hoare triple {4465#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4466#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:46:35,604 INFO L290 TraceCheckUtils]: 7: Hoare triple {4466#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4467#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:46:35,606 INFO L290 TraceCheckUtils]: 8: Hoare triple {4467#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4468#(<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)))} is VALID [2022-04-14 19:46:35,607 INFO L290 TraceCheckUtils]: 9: Hoare triple {4468#(<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4469#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:46:35,607 INFO L290 TraceCheckUtils]: 10: Hoare triple {4469#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4469#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:46:35,608 INFO L290 TraceCheckUtils]: 11: Hoare triple {4469#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4469#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:46:35,611 INFO L290 TraceCheckUtils]: 12: Hoare triple {4469#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {4470#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-14 19:46:35,612 INFO L290 TraceCheckUtils]: 13: Hoare triple {4470#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4468#(<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)))} is VALID [2022-04-14 19:46:35,613 INFO L290 TraceCheckUtils]: 14: Hoare triple {4468#(<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4468#(<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)))} is VALID [2022-04-14 19:46:35,615 INFO L272 TraceCheckUtils]: 15: Hoare triple {4468#(<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4471#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:46:35,616 INFO L290 TraceCheckUtils]: 16: Hoare triple {4471#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4472#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:46:35,616 INFO L290 TraceCheckUtils]: 17: Hoare triple {4472#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4461#false} is VALID [2022-04-14 19:46:35,616 INFO L290 TraceCheckUtils]: 18: Hoare triple {4461#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4461#false} is VALID [2022-04-14 19:46:35,616 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:46:35,616 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:46:35,616 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [11511920] [2022-04-14 19:46:35,617 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [11511920] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:46:35,617 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1239540943] [2022-04-14 19:46:35,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:46:35,617 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:46:35,617 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:46:35,618 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:46:35,619 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-14 19:46:35,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:35,649 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-14 19:46:35,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:35,655 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:46:56,911 INFO L272 TraceCheckUtils]: 0: Hoare triple {4460#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4460#true} is VALID [2022-04-14 19:46:56,912 INFO L290 TraceCheckUtils]: 1: Hoare triple {4460#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4460#true} is VALID [2022-04-14 19:46:56,912 INFO L290 TraceCheckUtils]: 2: Hoare triple {4460#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4460#true} is VALID [2022-04-14 19:46:56,912 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4460#true} {4460#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4460#true} is VALID [2022-04-14 19:46:56,912 INFO L272 TraceCheckUtils]: 4: Hoare triple {4460#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4460#true} is VALID [2022-04-14 19:46:56,912 INFO L290 TraceCheckUtils]: 5: Hoare triple {4460#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4492#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:46:56,913 INFO L290 TraceCheckUtils]: 6: Hoare triple {4492#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4496#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:56,913 INFO L290 TraceCheckUtils]: 7: Hoare triple {4496#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4496#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:56,913 INFO L290 TraceCheckUtils]: 8: Hoare triple {4496#(not (< 0 (mod main_~n~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4496#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:56,913 INFO L290 TraceCheckUtils]: 9: Hoare triple {4496#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4496#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:56,914 INFO L290 TraceCheckUtils]: 10: Hoare triple {4496#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4496#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:56,914 INFO L290 TraceCheckUtils]: 11: Hoare triple {4496#(not (< 0 (mod main_~n~0 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4496#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:56,914 INFO L290 TraceCheckUtils]: 12: Hoare triple {4496#(not (< 0 (mod main_~n~0 4294967296)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {4496#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:56,916 INFO L290 TraceCheckUtils]: 13: Hoare triple {4496#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4469#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:46:56,916 INFO L290 TraceCheckUtils]: 14: Hoare triple {4469#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4469#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:46:56,918 INFO L272 TraceCheckUtils]: 15: Hoare triple {4469#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4524#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:46:56,918 INFO L290 TraceCheckUtils]: 16: Hoare triple {4524#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4528#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:46:56,918 INFO L290 TraceCheckUtils]: 17: Hoare triple {4528#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4461#false} is VALID [2022-04-14 19:46:56,918 INFO L290 TraceCheckUtils]: 18: Hoare triple {4461#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4461#false} is VALID [2022-04-14 19:46:56,918 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-14 19:46:56,919 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-14 19:46:56,919 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1239540943] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:46:56,919 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-14 19:46:56,919 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [11] total 15 [2022-04-14 19:46:56,919 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [205820611] [2022-04-14 19:46:56,919 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:46:56,919 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:46:56,920 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:46:56,920 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:56,936 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:46:56,936 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-14 19:46:56,936 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:46:56,936 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-14 19:46:56,936 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2022-04-14 19:46:56,936 INFO L87 Difference]: Start difference. First operand 45 states and 72 transitions. Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:57,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:57,106 INFO L93 Difference]: Finished difference Result 51 states and 79 transitions. [2022-04-14 19:46:57,106 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-14 19:46:57,106 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:46:57,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:46:57,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:57,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 48 transitions. [2022-04-14 19:46:57,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:57,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 48 transitions. [2022-04-14 19:46:57,108 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 48 transitions. [2022-04-14 19:46:57,151 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:46:57,152 INFO L225 Difference]: With dead ends: 51 [2022-04-14 19:46:57,152 INFO L226 Difference]: Without dead ends: 48 [2022-04-14 19:46:57,152 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 16 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-04-14 19:46:57,153 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 12 mSDsluCounter, 68 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 7 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:46:57,153 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [12 Valid, 84 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 31 Invalid, 0 Unknown, 7 Unchecked, 0.0s Time] [2022-04-14 19:46:57,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-04-14 19:46:57,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 44. [2022-04-14 19:46:57,154 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:46:57,154 INFO L82 GeneralOperation]: Start isEquivalent. First operand 48 states. Second operand has 44 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:57,155 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand has 44 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:57,155 INFO L87 Difference]: Start difference. First operand 48 states. Second operand has 44 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:57,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:57,156 INFO L93 Difference]: Finished difference Result 48 states and 76 transitions. [2022-04-14 19:46:57,156 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 76 transitions. [2022-04-14 19:46:57,156 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:46:57,156 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:46:57,156 INFO L74 IsIncluded]: Start isIncluded. First operand has 44 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-14 19:46:57,157 INFO L87 Difference]: Start difference. First operand has 44 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-14 19:46:57,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:57,158 INFO L93 Difference]: Finished difference Result 48 states and 76 transitions. [2022-04-14 19:46:57,158 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 76 transitions. [2022-04-14 19:46:57,158 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:46:57,158 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:46:57,158 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:46:57,158 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:46:57,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:57,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 70 transitions. [2022-04-14 19:46:57,159 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 70 transitions. Word has length 19 [2022-04-14 19:46:57,159 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:46:57,159 INFO L478 AbstractCegarLoop]: Abstraction has 44 states and 70 transitions. [2022-04-14 19:46:57,159 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:57,159 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 70 transitions. [2022-04-14 19:46:57,160 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-14 19:46:57,160 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:46:57,160 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:46:57,177 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-14 19:46:57,363 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-14 19:46:57,363 INFO L403 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:46:57,364 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:46:57,364 INFO L85 PathProgramCache]: Analyzing trace with hash -949517359, now seen corresponding path program 1 times [2022-04-14 19:46:57,364 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:46:57,364 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1492036572] [2022-04-14 19:46:57,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:46:57,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:46:57,372 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:57,373 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-04-14 19:46:57,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:57,387 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.2))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:57,394 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-04-14 19:46:57,513 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:46:57,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:57,525 INFO L290 TraceCheckUtils]: 0: Hoare triple {4743#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4731#true} is VALID [2022-04-14 19:46:57,525 INFO L290 TraceCheckUtils]: 1: Hoare triple {4731#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4731#true} is VALID [2022-04-14 19:46:57,525 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4731#true} {4731#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4731#true} is VALID [2022-04-14 19:46:57,526 INFO L272 TraceCheckUtils]: 0: Hoare triple {4731#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4743#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:46:57,526 INFO L290 TraceCheckUtils]: 1: Hoare triple {4743#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4731#true} is VALID [2022-04-14 19:46:57,526 INFO L290 TraceCheckUtils]: 2: Hoare triple {4731#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4731#true} is VALID [2022-04-14 19:46:57,526 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4731#true} {4731#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4731#true} is VALID [2022-04-14 19:46:57,526 INFO L272 TraceCheckUtils]: 4: Hoare triple {4731#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4731#true} is VALID [2022-04-14 19:46:57,527 INFO L290 TraceCheckUtils]: 5: Hoare triple {4731#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4736#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:46:57,528 INFO L290 TraceCheckUtils]: 6: Hoare triple {4736#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4737#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-14 19:46:57,528 INFO L290 TraceCheckUtils]: 7: Hoare triple {4737#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4738#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-14 19:46:57,530 INFO L290 TraceCheckUtils]: 8: Hoare triple {4738#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4739#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-14 19:46:57,531 INFO L290 TraceCheckUtils]: 9: Hoare triple {4739#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4740#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:46:57,531 INFO L290 TraceCheckUtils]: 10: Hoare triple {4740#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4740#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:46:57,532 INFO L290 TraceCheckUtils]: 11: Hoare triple {4740#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4740#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:46:57,533 INFO L290 TraceCheckUtils]: 12: Hoare triple {4740#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4740#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:46:57,533 INFO L290 TraceCheckUtils]: 13: Hoare triple {4740#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4740#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:46:57,534 INFO L290 TraceCheckUtils]: 14: Hoare triple {4740#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4740#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:46:57,535 INFO L272 TraceCheckUtils]: 15: Hoare triple {4740#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4741#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:46:57,535 INFO L290 TraceCheckUtils]: 16: Hoare triple {4741#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4742#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:46:57,536 INFO L290 TraceCheckUtils]: 17: Hoare triple {4742#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4732#false} is VALID [2022-04-14 19:46:57,536 INFO L290 TraceCheckUtils]: 18: Hoare triple {4732#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4732#false} is VALID [2022-04-14 19:46:57,536 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:46:57,536 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:46:57,536 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1492036572] [2022-04-14 19:46:57,537 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1492036572] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:46:57,537 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [52101779] [2022-04-14 19:46:57,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:46:57,537 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:46:57,537 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:46:57,538 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:46:57,567 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-14 19:46:57,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:57,586 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-14 19:46:57,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:57,592 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:46:58,135 INFO L272 TraceCheckUtils]: 0: Hoare triple {4731#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4731#true} is VALID [2022-04-14 19:46:58,135 INFO L290 TraceCheckUtils]: 1: Hoare triple {4731#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4731#true} is VALID [2022-04-14 19:46:58,135 INFO L290 TraceCheckUtils]: 2: Hoare triple {4731#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4731#true} is VALID [2022-04-14 19:46:58,135 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4731#true} {4731#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4731#true} is VALID [2022-04-14 19:46:58,135 INFO L272 TraceCheckUtils]: 4: Hoare triple {4731#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4731#true} is VALID [2022-04-14 19:46:58,136 INFO L290 TraceCheckUtils]: 5: Hoare triple {4731#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4762#(= main_~n~0 main_~x~0)} is VALID [2022-04-14 19:46:58,136 INFO L290 TraceCheckUtils]: 6: Hoare triple {4762#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4766#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:58,136 INFO L290 TraceCheckUtils]: 7: Hoare triple {4766#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4766#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:58,137 INFO L290 TraceCheckUtils]: 8: Hoare triple {4766#(not (< 0 (mod main_~n~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4766#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-14 19:46:58,137 INFO L290 TraceCheckUtils]: 9: Hoare triple {4766#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4776#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:46:58,137 INFO L290 TraceCheckUtils]: 10: Hoare triple {4776#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4776#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:46:58,138 INFO L290 TraceCheckUtils]: 11: Hoare triple {4776#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4776#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:46:58,138 INFO L290 TraceCheckUtils]: 12: Hoare triple {4776#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4776#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:46:58,139 INFO L290 TraceCheckUtils]: 13: Hoare triple {4776#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4776#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:46:58,139 INFO L290 TraceCheckUtils]: 14: Hoare triple {4776#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4776#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:46:58,140 INFO L272 TraceCheckUtils]: 15: Hoare triple {4776#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4795#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:46:58,140 INFO L290 TraceCheckUtils]: 16: Hoare triple {4795#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4799#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:46:58,141 INFO L290 TraceCheckUtils]: 17: Hoare triple {4799#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4732#false} is VALID [2022-04-14 19:46:58,141 INFO L290 TraceCheckUtils]: 18: Hoare triple {4732#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4732#false} is VALID [2022-04-14 19:46:58,141 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-14 19:46:58,141 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-14 19:46:58,141 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [52101779] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 19:46:58,141 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-14 19:46:58,141 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 15 [2022-04-14 19:46:58,141 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1771015518] [2022-04-14 19:46:58,142 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 19:46:58,142 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:46:58,142 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 19:46:58,142 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:58,157 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:46:58,157 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-14 19:46:58,157 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 19:46:58,157 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-14 19:46:58,157 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2022-04-14 19:46:58,158 INFO L87 Difference]: Start difference. First operand 44 states and 70 transitions. Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:58,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:58,297 INFO L93 Difference]: Finished difference Result 54 states and 84 transitions. [2022-04-14 19:46:58,297 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-14 19:46:58,297 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 19:46:58,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 19:46:58,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:58,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 46 transitions. [2022-04-14 19:46:58,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:58,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 46 transitions. [2022-04-14 19:46:58,298 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 46 transitions. [2022-04-14 19:46:58,336 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 19:46:58,336 INFO L225 Difference]: With dead ends: 54 [2022-04-14 19:46:58,336 INFO L226 Difference]: Without dead ends: 51 [2022-04-14 19:46:58,337 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-04-14 19:46:58,337 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 14 mSDsluCounter, 65 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 80 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 10 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 19:46:58,337 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [14 Valid, 80 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 31 Invalid, 0 Unknown, 10 Unchecked, 0.0s Time] [2022-04-14 19:46:58,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-04-14 19:46:58,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 43. [2022-04-14 19:46:58,339 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 19:46:58,339 INFO L82 GeneralOperation]: Start isEquivalent. First operand 51 states. Second operand has 43 states, 38 states have (on average 1.6842105263157894) internal successors, (64), 38 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:58,339 INFO L74 IsIncluded]: Start isIncluded. First operand 51 states. Second operand has 43 states, 38 states have (on average 1.6842105263157894) internal successors, (64), 38 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:58,339 INFO L87 Difference]: Start difference. First operand 51 states. Second operand has 43 states, 38 states have (on average 1.6842105263157894) internal successors, (64), 38 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:58,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:58,340 INFO L93 Difference]: Finished difference Result 51 states and 81 transitions. [2022-04-14 19:46:58,341 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 81 transitions. [2022-04-14 19:46:58,341 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:46:58,341 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:46:58,341 INFO L74 IsIncluded]: Start isIncluded. First operand has 43 states, 38 states have (on average 1.6842105263157894) internal successors, (64), 38 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 51 states. [2022-04-14 19:46:58,341 INFO L87 Difference]: Start difference. First operand has 43 states, 38 states have (on average 1.6842105263157894) internal successors, (64), 38 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 51 states. [2022-04-14 19:46:58,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 19:46:58,342 INFO L93 Difference]: Finished difference Result 51 states and 81 transitions. [2022-04-14 19:46:58,342 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 81 transitions. [2022-04-14 19:46:58,342 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 19:46:58,343 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 19:46:58,343 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 19:46:58,343 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 19:46:58,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 38 states have (on average 1.6842105263157894) internal successors, (64), 38 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:58,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 68 transitions. [2022-04-14 19:46:58,344 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 68 transitions. Word has length 19 [2022-04-14 19:46:58,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 19:46:58,344 INFO L478 AbstractCegarLoop]: Abstraction has 43 states and 68 transitions. [2022-04-14 19:46:58,344 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 19:46:58,344 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 68 transitions. [2022-04-14 19:46:58,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-14 19:46:58,344 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 19:46:58,345 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 19:46:58,365 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-04-14 19:46:58,555 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:46:58,556 INFO L403 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 19:46:58,556 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 19:46:58,556 INFO L85 PathProgramCache]: Analyzing trace with hash -593960234, now seen corresponding path program 1 times [2022-04-14 19:46:58,556 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 19:46:58,556 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1304335180] [2022-04-14 19:46:58,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:46:58,556 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 19:46:58,564 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:58,565 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_6 .cse0 (* (- 4294967296) (div (+ main_~y~0_6 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:58,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:58,585 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.2))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:58,590 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.3))) (+ main_~y~0_6 .cse0 (* (- 4294967296) (div (+ main_~y~0_6 .cse0) 4294967296)))) 0)) [2022-04-14 19:46:58,821 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 19:46:58,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:58,825 INFO L290 TraceCheckUtils]: 0: Hoare triple {5024#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5010#true} is VALID [2022-04-14 19:46:58,825 INFO L290 TraceCheckUtils]: 1: Hoare triple {5010#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5010#true} is VALID [2022-04-14 19:46:58,825 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5010#true} {5010#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5010#true} is VALID [2022-04-14 19:46:58,826 INFO L272 TraceCheckUtils]: 0: Hoare triple {5010#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5024#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 19:46:58,826 INFO L290 TraceCheckUtils]: 1: Hoare triple {5024#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5010#true} is VALID [2022-04-14 19:46:58,826 INFO L290 TraceCheckUtils]: 2: Hoare triple {5010#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5010#true} is VALID [2022-04-14 19:46:58,826 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5010#true} {5010#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5010#true} is VALID [2022-04-14 19:46:58,826 INFO L272 TraceCheckUtils]: 4: Hoare triple {5010#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5010#true} is VALID [2022-04-14 19:46:58,827 INFO L290 TraceCheckUtils]: 5: Hoare triple {5010#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5015#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:46:58,830 INFO L290 TraceCheckUtils]: 6: Hoare triple {5015#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5016#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:46:58,831 INFO L290 TraceCheckUtils]: 7: Hoare triple {5016#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5017#(or (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:46:58,832 INFO L290 TraceCheckUtils]: 8: Hoare triple {5017#(or (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5018#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (and (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (= (+ main_~y~0 (* (- 1) main_~z~0)) 0)))} is VALID [2022-04-14 19:46:58,833 INFO L290 TraceCheckUtils]: 9: Hoare triple {5018#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (and (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (= (+ main_~y~0 (* (- 1) main_~z~0)) 0)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5019#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:46:58,834 INFO L290 TraceCheckUtils]: 10: Hoare triple {5019#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5020#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-14 19:46:58,834 INFO L290 TraceCheckUtils]: 11: Hoare triple {5020#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5020#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-14 19:46:58,834 INFO L290 TraceCheckUtils]: 12: Hoare triple {5020#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5020#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-14 19:46:58,835 INFO L290 TraceCheckUtils]: 13: Hoare triple {5020#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5021#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:46:58,836 INFO L290 TraceCheckUtils]: 14: Hoare triple {5021#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5021#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:46:58,837 INFO L272 TraceCheckUtils]: 15: Hoare triple {5021#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5022#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 19:46:58,837 INFO L290 TraceCheckUtils]: 16: Hoare triple {5022#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5023#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 19:46:58,837 INFO L290 TraceCheckUtils]: 17: Hoare triple {5023#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5011#false} is VALID [2022-04-14 19:46:58,837 INFO L290 TraceCheckUtils]: 18: Hoare triple {5011#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5011#false} is VALID [2022-04-14 19:46:58,838 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 19:46:58,838 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 19:46:58,838 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1304335180] [2022-04-14 19:46:58,838 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1304335180] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 19:46:58,838 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [625365678] [2022-04-14 19:46:58,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 19:46:58,838 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:46:58,838 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 19:46:58,840 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 19:46:58,840 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-14 19:46:58,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:58,909 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-14 19:46:58,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 19:46:58,928 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 19:47:00,195 INFO L272 TraceCheckUtils]: 0: Hoare triple {5010#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5010#true} is VALID [2022-04-14 19:47:00,196 INFO L290 TraceCheckUtils]: 1: Hoare triple {5010#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5010#true} is VALID [2022-04-14 19:47:00,196 INFO L290 TraceCheckUtils]: 2: Hoare triple {5010#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5010#true} is VALID [2022-04-14 19:47:00,196 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5010#true} {5010#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5010#true} is VALID [2022-04-14 19:47:00,196 INFO L272 TraceCheckUtils]: 4: Hoare triple {5010#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5010#true} is VALID [2022-04-14 19:47:00,196 INFO L290 TraceCheckUtils]: 5: Hoare triple {5010#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5015#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-14 19:47:00,202 INFO L290 TraceCheckUtils]: 6: Hoare triple {5015#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5046#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-14 19:47:00,203 INFO L290 TraceCheckUtils]: 7: Hoare triple {5046#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5046#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-14 19:47:00,204 INFO L290 TraceCheckUtils]: 8: Hoare triple {5046#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5053#(or (and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-14 19:47:00,206 INFO L290 TraceCheckUtils]: 9: Hoare triple {5053#(or (and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5019#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:47:00,206 INFO L290 TraceCheckUtils]: 10: Hoare triple {5019#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5019#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:47:00,207 INFO L290 TraceCheckUtils]: 11: Hoare triple {5019#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5019#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:47:00,207 INFO L290 TraceCheckUtils]: 12: Hoare triple {5019#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5019#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-14 19:47:00,207 INFO L290 TraceCheckUtils]: 13: Hoare triple {5019#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5069#(and (not (< 0 (mod main_~z~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:47:00,208 INFO L290 TraceCheckUtils]: 14: Hoare triple {5069#(and (not (< 0 (mod main_~z~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5069#(and (not (< 0 (mod main_~z~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-14 19:47:00,209 INFO L272 TraceCheckUtils]: 15: Hoare triple {5069#(and (not (< 0 (mod main_~z~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5076#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:47:00,209 INFO L290 TraceCheckUtils]: 16: Hoare triple {5076#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5080#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:47:00,209 INFO L290 TraceCheckUtils]: 17: Hoare triple {5080#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5011#false} is VALID [2022-04-14 19:47:00,209 INFO L290 TraceCheckUtils]: 18: Hoare triple {5011#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5011#false} is VALID [2022-04-14 19:47:00,210 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 19:47:00,210 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 19:47:03,537 INFO L290 TraceCheckUtils]: 18: Hoare triple {5011#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5011#false} is VALID [2022-04-14 19:47:03,537 INFO L290 TraceCheckUtils]: 17: Hoare triple {5080#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5011#false} is VALID [2022-04-14 19:47:03,538 INFO L290 TraceCheckUtils]: 16: Hoare triple {5076#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5080#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 19:47:03,539 INFO L272 TraceCheckUtils]: 15: Hoare triple {5021#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5076#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 19:47:03,539 INFO L290 TraceCheckUtils]: 14: Hoare triple {5021#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5021#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:47:03,540 INFO L290 TraceCheckUtils]: 13: Hoare triple {5102#(and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5021#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-14 19:47:03,541 INFO L290 TraceCheckUtils]: 12: Hoare triple {5102#(and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5102#(and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:03,541 INFO L290 TraceCheckUtils]: 11: Hoare triple {5102#(and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5102#(and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:03,542 INFO L290 TraceCheckUtils]: 10: Hoare triple {5102#(and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5102#(and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:03,542 INFO L290 TraceCheckUtils]: 9: Hoare triple {5115#(or (and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5102#(and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-14 19:47:03,542 INFO L290 TraceCheckUtils]: 8: Hoare triple {5119#(or (and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5115#(or (and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-14 19:47:03,543 INFO L290 TraceCheckUtils]: 7: Hoare triple {5119#(or (and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5119#(or (and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:47:03,603 INFO L290 TraceCheckUtils]: 6: Hoare triple {5126#(or (and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1))) (forall ((aux_mod_v_main_~y~0_56_31 Int)) (or (< 0 aux_mod_v_main_~y~0_56_31) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_56_31 Int)) (not (= main_~y~0 (+ aux_mod_v_main_~y~0_56_31 (* aux_div_v_main_~y~0_56_31 4294967296)))))) (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_56_31 Int)) (or (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1) (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_56_31 (* aux_div_v_main_~y~0_56_31 4294967296))))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_56_31 (* aux_div_v_main_~y~0_56_31 4294967296)))))))) (< aux_mod_v_main_~y~0_56_31 0))))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5119#(or (and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-14 19:47:03,603 INFO L290 TraceCheckUtils]: 5: Hoare triple {5011#false} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5126#(or (and (<= 0 (div main_~n~0 4294967296)) (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1))) (forall ((aux_mod_v_main_~y~0_56_31 Int)) (or (< 0 aux_mod_v_main_~y~0_56_31) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_56_31 Int)) (not (= main_~y~0 (+ aux_mod_v_main_~y~0_56_31 (* aux_div_v_main_~y~0_56_31 4294967296)))))) (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_56_31 Int)) (or (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1) (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_56_31 (* aux_div_v_main_~y~0_56_31 4294967296))))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_56_31 (* aux_div_v_main_~y~0_56_31 4294967296)))))))) (< aux_mod_v_main_~y~0_56_31 0))))} is VALID [2022-04-14 19:47:03,603 INFO L272 TraceCheckUtils]: 4: Hoare triple {5011#false} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5011#false} is VALID [2022-04-14 19:47:03,604 ERROR L284 TraceCheckUtils]: 3: Hoare quadruple {5010#true} {5010#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5011#false} is INVALID [2022-04-14 19:47:03,605 WARN L319 FreeRefinementEngine]: Global settings require throwing the following exception [2022-04-14 19:47:03,624 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-04-14 19:47:03,805 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 19:47:03,806 FATAL L? ?]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: invalid Hoare triple in BP at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckUtils.checkInterpolantsInductivityBackward(TraceCheckUtils.java:254) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:345) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:185) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:163) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:108) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:266) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:147) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:595) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:414) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:349) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:331) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopUtils.getCegarLoopResult(CegarLoopUtils.java:56) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:411) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:301) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:261) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:153) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2022-04-14 19:47:03,810 INFO L158 Benchmark]: Toolchain (without parser) took 309052.23ms. Allocated memory was 206.6MB in the beginning and 318.8MB in the end (delta: 112.2MB). Free memory was 150.4MB in the beginning and 229.5MB in the end (delta: -79.1MB). Peak memory consumption was 32.3MB. Max. memory is 8.0GB. [2022-04-14 19:47:03,810 INFO L158 Benchmark]: CDTParser took 0.15ms. Allocated memory is still 206.6MB. Free memory is still 166.4MB. There was no memory consumed. Max. memory is 8.0GB. [2022-04-14 19:47:03,810 INFO L158 Benchmark]: CACSL2BoogieTranslator took 297.52ms. Allocated memory was 206.6MB in the beginning and 265.3MB in the end (delta: 58.7MB). Free memory was 150.1MB in the beginning and 235.4MB in the end (delta: -85.2MB). Peak memory consumption was 7.6MB. Max. memory is 8.0GB. [2022-04-14 19:47:03,810 INFO L158 Benchmark]: Boogie Preprocessor took 48.30ms. Allocated memory is still 265.3MB. Free memory was 235.4MB in the beginning and 233.8MB in the end (delta: 1.6MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-04-14 19:47:03,810 INFO L158 Benchmark]: RCFGBuilder took 407.67ms. Allocated memory is still 265.3MB. Free memory was 233.8MB in the beginning and 219.6MB in the end (delta: 14.2MB). Peak memory consumption was 14.7MB. Max. memory is 8.0GB. [2022-04-14 19:47:03,811 INFO L158 Benchmark]: IcfgTransformer took 2316.77ms. Allocated memory is still 265.3MB. Free memory was 219.6MB in the beginning and 106.9MB in the end (delta: 112.7MB). Peak memory consumption was 112.2MB. Max. memory is 8.0GB. [2022-04-14 19:47:03,811 INFO L158 Benchmark]: TraceAbstraction took 305975.36ms. Allocated memory was 265.3MB in the beginning and 318.8MB in the end (delta: 53.5MB). Free memory was 106.4MB in the beginning and 229.5MB in the end (delta: -123.1MB). There was no memory consumed. Max. memory is 8.0GB. [2022-04-14 19:47:03,812 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from IcfgTransformer: - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult * Results from de.uni_freiburg.informatik.ultimate.core: - AssertionsEnabledResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15ms. Allocated memory is still 206.6MB. Free memory is still 166.4MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 297.52ms. Allocated memory was 206.6MB in the beginning and 265.3MB in the end (delta: 58.7MB). Free memory was 150.1MB in the beginning and 235.4MB in the end (delta: -85.2MB). Peak memory consumption was 7.6MB. Max. memory is 8.0GB. * Boogie Preprocessor took 48.30ms. Allocated memory is still 265.3MB. Free memory was 235.4MB in the beginning and 233.8MB in the end (delta: 1.6MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 407.67ms. Allocated memory is still 265.3MB. Free memory was 233.8MB in the beginning and 219.6MB in the end (delta: 14.2MB). Peak memory consumption was 14.7MB. Max. memory is 8.0GB. * IcfgTransformer took 2316.77ms. Allocated memory is still 265.3MB. Free memory was 219.6MB in the beginning and 106.9MB in the end (delta: 112.7MB). Peak memory consumption was 112.2MB. Max. memory is 8.0GB. * TraceAbstraction took 305975.36ms. Allocated memory was 265.3MB in the beginning and 318.8MB in the end (delta: 53.5MB). Free memory was 106.4MB in the beginning and 229.5MB in the end (delta: -123.1MB). There was no memory consumed. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: invalid Hoare triple in BP de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: invalid Hoare triple in BP: de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckUtils.checkInterpolantsInductivityBackward(TraceCheckUtils.java:254) RESULT: Ultimate could not prove your program: Toolchain returned no result. [2022-04-14 19:47:03,924 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request...