/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loops/invert_string-1.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-e106359-m [2022-04-14 18:56:04,118 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-14 18:56:04,120 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-14 18:56:04,181 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-14 18:56:04,181 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-14 18:56:04,182 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-14 18:56:04,187 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-14 18:56:04,189 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-14 18:56:04,190 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-14 18:56:04,191 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-14 18:56:04,191 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-14 18:56:04,192 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-14 18:56:04,193 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-14 18:56:04,194 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-14 18:56:04,194 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-14 18:56:04,195 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-14 18:56:04,200 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-14 18:56:04,205 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-14 18:56:04,207 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-14 18:56:04,208 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-14 18:56:04,209 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-14 18:56:04,216 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-14 18:56:04,216 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-14 18:56:04,217 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-14 18:56:04,218 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-14 18:56:04,220 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-14 18:56:04,226 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-14 18:56:04,227 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-14 18:56:04,232 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-14 18:56:04,232 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-14 18:56:04,247 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-14 18:56:04,248 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-14 18:56:04,249 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-14 18:56:04,249 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-14 18:56:04,249 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-14 18:56:04,249 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-14 18:56:04,249 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-14 18:56:04,249 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-14 18:56:04,249 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-14 18:56:04,250 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-14 18:56:04,250 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-14 18:56:04,250 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-14 18:56:04,251 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-14 18:56:04,251 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-14 18:56:04,251 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-14 18:56:04,251 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-14 18:56:04,252 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-14 18:56:04,252 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-14 18:56:04,252 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-14 18:56:04,252 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-14 18:56:04,252 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-14 18:56:04,253 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-14 18:56:04,253 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-14 18:56:04,484 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-14 18:56:04,506 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-14 18:56:04,508 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-14 18:56:04,509 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-14 18:56:04,511 INFO L275 PluginConnector]: CDTParser initialized [2022-04-14 18:56:04,512 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops/invert_string-1.c [2022-04-14 18:56:04,570 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6792ddc4d/1678f24849094af98582a2fbf0d1a6d8/FLAG559ab13b8 [2022-04-14 18:56:04,971 INFO L306 CDTParser]: Found 1 translation units. [2022-04-14 18:56:04,972 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops/invert_string-1.c [2022-04-14 18:56:04,977 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6792ddc4d/1678f24849094af98582a2fbf0d1a6d8/FLAG559ab13b8 [2022-04-14 18:56:04,995 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6792ddc4d/1678f24849094af98582a2fbf0d1a6d8 [2022-04-14 18:56:04,997 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-14 18:56:04,999 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-14 18:56:05,000 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-14 18:56:05,000 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-14 18:56:05,004 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-14 18:56:05,008 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.04 06:56:04" (1/1) ... [2022-04-14 18:56:05,009 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2d0b1072 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05, skipping insertion in model container [2022-04-14 18:56:05,010 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.04 06:56:04" (1/1) ... [2022-04-14 18:56:05,016 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-14 18:56:05,031 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-14 18:56:05,173 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops/invert_string-1.c[352,365] [2022-04-14 18:56:05,208 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-14 18:56:05,225 INFO L203 MainTranslator]: Completed pre-run [2022-04-14 18:56:05,240 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops/invert_string-1.c[352,365] [2022-04-14 18:56:05,247 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-14 18:56:05,258 INFO L208 MainTranslator]: Completed translation [2022-04-14 18:56:05,258 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05 WrapperNode [2022-04-14 18:56:05,258 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-14 18:56:05,259 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-14 18:56:05,259 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-14 18:56:05,260 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-14 18:56:05,270 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,270 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,277 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,277 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,299 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,304 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,305 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,306 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-14 18:56:05,307 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-14 18:56:05,307 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-14 18:56:05,307 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-14 18:56:05,314 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,320 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-14 18:56:05,329 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 18:56:05,338 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-14 18:56:05,340 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-14 18:56:05,371 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-14 18:56:05,371 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-14 18:56:05,371 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-14 18:56:05,371 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-14 18:56:05,371 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-14 18:56:05,371 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-14 18:56:05,371 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-14 18:56:05,371 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-14 18:56:05,371 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-14 18:56:05,371 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-14 18:56:05,372 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_char [2022-04-14 18:56:05,372 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-14 18:56:05,372 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-14 18:56:05,372 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-04-14 18:56:05,372 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-14 18:56:05,372 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-14 18:56:05,372 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-14 18:56:05,372 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-14 18:56:05,372 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-14 18:56:05,373 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-14 18:56:05,461 INFO L234 CfgBuilder]: Building ICFG [2022-04-14 18:56:05,462 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-14 18:56:05,708 INFO L275 CfgBuilder]: Performing block encoding [2022-04-14 18:56:05,715 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-14 18:56:05,716 INFO L299 CfgBuilder]: Removed 3 assume(true) statements. [2022-04-14 18:56:05,717 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 06:56:05 BoogieIcfgContainer [2022-04-14 18:56:05,717 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-14 18:56:05,718 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-14 18:56:05,718 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-14 18:56:05,719 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-14 18:56:05,723 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,725 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-14 18:56:05,757 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 14.04 06:56:05 BasicIcfg [2022-04-14 18:56:05,757 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-14 18:56:05,759 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-14 18:56:05,759 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-14 18:56:05,761 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-14 18:56:05,761 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.04 06:56:04" (1/4) ... [2022-04-14 18:56:05,762 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@51eecd9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.04 06:56:05, skipping insertion in model container [2022-04-14 18:56:05,762 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05" (2/4) ... [2022-04-14 18:56:05,762 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@51eecd9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.04 06:56:05, skipping insertion in model container [2022-04-14 18:56:05,763 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 06:56:05" (3/4) ... [2022-04-14 18:56:05,763 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@51eecd9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.04 06:56:05, skipping insertion in model container [2022-04-14 18:56:05,763 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 14.04 06:56:05" (4/4) ... [2022-04-14 18:56:05,764 INFO L111 eAbstractionObserver]: Analyzing ICFG invert_string-1.cJordan [2022-04-14 18:56:05,768 INFO L202 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-14 18:56:05,769 INFO L161 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-14 18:56:05,815 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-14 18:56:05,832 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-14 18:56:05,832 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-14 18:56:05,848 INFO L276 IsEmpty]: Start isEmpty. Operand has 29 states, 21 states have (on average 1.4285714285714286) internal successors, (30), 22 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:05,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-14 18:56:05,856 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 18:56:05,856 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 18:56:05,857 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 18:56:05,862 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 18:56:05,862 INFO L85 PathProgramCache]: Analyzing trace with hash 1459888189, now seen corresponding path program 1 times [2022-04-14 18:56:05,870 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 18:56:05,871 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031028584] [2022-04-14 18:56:05,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:05,873 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 18:56:05,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:06,047 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 18:56:06,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:06,076 INFO L290 TraceCheckUtils]: 0: Hoare triple {37#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32#true} is VALID [2022-04-14 18:56:06,077 INFO L290 TraceCheckUtils]: 1: Hoare triple {32#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#true} is VALID [2022-04-14 18:56:06,077 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {32#true} {32#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#true} is VALID [2022-04-14 18:56:06,079 INFO L272 TraceCheckUtils]: 0: Hoare triple {32#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {37#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 18:56:06,080 INFO L290 TraceCheckUtils]: 1: Hoare triple {37#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32#true} is VALID [2022-04-14 18:56:06,080 INFO L290 TraceCheckUtils]: 2: Hoare triple {32#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#true} is VALID [2022-04-14 18:56:06,080 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {32#true} {32#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#true} is VALID [2022-04-14 18:56:06,081 INFO L272 TraceCheckUtils]: 4: Hoare triple {32#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#true} is VALID [2022-04-14 18:56:06,082 INFO L290 TraceCheckUtils]: 5: Hoare triple {32#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {32#true} is VALID [2022-04-14 18:56:06,087 INFO L290 TraceCheckUtils]: 6: Hoare triple {32#true} [83] L17-->L17-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {33#false} is VALID [2022-04-14 18:56:06,088 INFO L290 TraceCheckUtils]: 7: Hoare triple {33#false} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {33#false} is VALID [2022-04-14 18:56:06,088 INFO L290 TraceCheckUtils]: 8: Hoare triple {33#false} [86] L22-3-->L22-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {33#false} is VALID [2022-04-14 18:56:06,088 INFO L290 TraceCheckUtils]: 9: Hoare triple {33#false} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {33#false} is VALID [2022-04-14 18:56:06,089 INFO L290 TraceCheckUtils]: 10: Hoare triple {33#false} [91] L29-3-->L29-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {33#false} is VALID [2022-04-14 18:56:06,090 INFO L290 TraceCheckUtils]: 11: Hoare triple {33#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {33#false} is VALID [2022-04-14 18:56:06,091 INFO L290 TraceCheckUtils]: 12: Hoare triple {33#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {33#false} is VALID [2022-04-14 18:56:06,091 INFO L272 TraceCheckUtils]: 13: Hoare triple {33#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {33#false} is VALID [2022-04-14 18:56:06,091 INFO L290 TraceCheckUtils]: 14: Hoare triple {33#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {33#false} is VALID [2022-04-14 18:56:06,091 INFO L290 TraceCheckUtils]: 15: Hoare triple {33#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {33#false} is VALID [2022-04-14 18:56:06,092 INFO L290 TraceCheckUtils]: 16: Hoare triple {33#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33#false} is VALID [2022-04-14 18:56:06,092 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 18:56:06,093 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 18:56:06,093 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031028584] [2022-04-14 18:56:06,094 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2031028584] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 18:56:06,094 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 18:56:06,094 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-14 18:56:06,095 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [25982133] [2022-04-14 18:56:06,096 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 18:56:06,101 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 18:56:06,102 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 18:56:06,105 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,131 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:06,131 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-14 18:56:06,132 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 18:56:06,152 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-14 18:56:06,153 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-14 18:56:06,156 INFO L87 Difference]: Start difference. First operand has 29 states, 21 states have (on average 1.4285714285714286) internal successors, (30), 22 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:06,242 INFO L93 Difference]: Finished difference Result 29 states and 31 transitions. [2022-04-14 18:56:06,242 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-14 18:56:06,242 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 18:56:06,243 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 18:56:06,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 36 transitions. [2022-04-14 18:56:06,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 36 transitions. [2022-04-14 18:56:06,262 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 36 transitions. [2022-04-14 18:56:06,315 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:06,323 INFO L225 Difference]: With dead ends: 29 [2022-04-14 18:56:06,323 INFO L226 Difference]: Without dead ends: 24 [2022-04-14 18:56:06,325 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-14 18:56:06,328 INFO L913 BasicCegarLoop]: 30 mSDtfsCounter, 22 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 33 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 18:56:06,329 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [23 Valid, 33 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-14 18:56:06,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2022-04-14 18:56:06,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2022-04-14 18:56:06,355 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 18:56:06,356 INFO L82 GeneralOperation]: Start isEquivalent. First operand 24 states. Second operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:06,357 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:06,358 INFO L87 Difference]: Start difference. First operand 24 states. Second operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:06,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:06,364 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2022-04-14 18:56:06,364 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2022-04-14 18:56:06,364 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:06,364 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:06,365 INFO L74 IsIncluded]: Start isIncluded. First operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 24 states. [2022-04-14 18:56:06,365 INFO L87 Difference]: Start difference. First operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 24 states. [2022-04-14 18:56:06,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:06,369 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2022-04-14 18:56:06,369 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2022-04-14 18:56:06,370 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:06,370 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:06,370 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 18:56:06,370 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 18:56:06,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:06,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 26 transitions. [2022-04-14 18:56:06,380 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 26 transitions. Word has length 17 [2022-04-14 18:56:06,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 18:56:06,383 INFO L478 AbstractCegarLoop]: Abstraction has 24 states and 26 transitions. [2022-04-14 18:56:06,383 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,387 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2022-04-14 18:56:06,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-14 18:56:06,387 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 18:56:06,387 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 18:56:06,388 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-14 18:56:06,388 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 18:56:06,388 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 18:56:06,388 INFO L85 PathProgramCache]: Analyzing trace with hash -1257013952, now seen corresponding path program 1 times [2022-04-14 18:56:06,389 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 18:56:06,389 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [297418650] [2022-04-14 18:56:06,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:06,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 18:56:06,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:06,570 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 18:56:06,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:06,602 INFO L290 TraceCheckUtils]: 0: Hoare triple {148#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {141#true} is VALID [2022-04-14 18:56:06,602 INFO L290 TraceCheckUtils]: 1: Hoare triple {141#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {141#true} is VALID [2022-04-14 18:56:06,602 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {141#true} {141#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {141#true} is VALID [2022-04-14 18:56:06,605 INFO L272 TraceCheckUtils]: 0: Hoare triple {141#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {148#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 18:56:06,605 INFO L290 TraceCheckUtils]: 1: Hoare triple {148#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {141#true} is VALID [2022-04-14 18:56:06,605 INFO L290 TraceCheckUtils]: 2: Hoare triple {141#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {141#true} is VALID [2022-04-14 18:56:06,605 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {141#true} {141#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {141#true} is VALID [2022-04-14 18:56:06,605 INFO L272 TraceCheckUtils]: 4: Hoare triple {141#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {141#true} is VALID [2022-04-14 18:56:06,606 INFO L290 TraceCheckUtils]: 5: Hoare triple {141#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {141#true} is VALID [2022-04-14 18:56:06,606 INFO L290 TraceCheckUtils]: 6: Hoare triple {141#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {146#(<= 1 main_~MAX~0)} is VALID [2022-04-14 18:56:06,607 INFO L290 TraceCheckUtils]: 7: Hoare triple {146#(<= 1 main_~MAX~0)} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {147#(and (<= 1 main_~MAX~0) (= main_~i~0 0))} is VALID [2022-04-14 18:56:06,608 INFO L290 TraceCheckUtils]: 8: Hoare triple {147#(and (<= 1 main_~MAX~0) (= main_~i~0 0))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {142#false} is VALID [2022-04-14 18:56:06,608 INFO L290 TraceCheckUtils]: 9: Hoare triple {142#false} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {142#false} is VALID [2022-04-14 18:56:06,608 INFO L290 TraceCheckUtils]: 10: Hoare triple {142#false} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {142#false} is VALID [2022-04-14 18:56:06,609 INFO L290 TraceCheckUtils]: 11: Hoare triple {142#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {142#false} is VALID [2022-04-14 18:56:06,609 INFO L290 TraceCheckUtils]: 12: Hoare triple {142#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {142#false} is VALID [2022-04-14 18:56:06,609 INFO L272 TraceCheckUtils]: 13: Hoare triple {142#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {142#false} is VALID [2022-04-14 18:56:06,609 INFO L290 TraceCheckUtils]: 14: Hoare triple {142#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {142#false} is VALID [2022-04-14 18:56:06,609 INFO L290 TraceCheckUtils]: 15: Hoare triple {142#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {142#false} is VALID [2022-04-14 18:56:06,610 INFO L290 TraceCheckUtils]: 16: Hoare triple {142#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {142#false} is VALID [2022-04-14 18:56:06,610 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 18:56:06,610 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 18:56:06,610 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [297418650] [2022-04-14 18:56:06,610 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [297418650] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 18:56:06,627 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 18:56:06,627 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-14 18:56:06,628 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1858504144] [2022-04-14 18:56:06,628 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 18:56:06,629 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 18:56:06,630 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 18:56:06,630 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,647 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:06,648 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-14 18:56:06,648 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 18:56:06,649 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-14 18:56:06,649 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-04-14 18:56:06,650 INFO L87 Difference]: Start difference. First operand 24 states and 26 transitions. Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:06,881 INFO L93 Difference]: Finished difference Result 30 states and 33 transitions. [2022-04-14 18:56:06,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-14 18:56:06,881 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 18:56:06,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 18:56:06,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 34 transitions. [2022-04-14 18:56:06,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 34 transitions. [2022-04-14 18:56:06,909 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 34 transitions. [2022-04-14 18:56:06,974 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:06,976 INFO L225 Difference]: With dead ends: 30 [2022-04-14 18:56:06,977 INFO L226 Difference]: Without dead ends: 30 [2022-04-14 18:56:06,980 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2022-04-14 18:56:06,981 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 40 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 24 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 18:56:06,982 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [40 Valid, 24 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 18:56:06,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-14 18:56:06,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 25. [2022-04-14 18:56:06,985 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 18:56:06,985 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 25 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:06,985 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 25 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:06,986 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 25 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:07,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:07,005 INFO L93 Difference]: Finished difference Result 30 states and 33 transitions. [2022-04-14 18:56:07,005 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 33 transitions. [2022-04-14 18:56:07,006 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:07,006 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:07,007 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 30 states. [2022-04-14 18:56:07,007 INFO L87 Difference]: Start difference. First operand has 25 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 30 states. [2022-04-14 18:56:07,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:07,011 INFO L93 Difference]: Finished difference Result 30 states and 33 transitions. [2022-04-14 18:56:07,012 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 33 transitions. [2022-04-14 18:56:07,012 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:07,012 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:07,012 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 18:56:07,012 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 18:56:07,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:07,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 27 transitions. [2022-04-14 18:56:07,016 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 27 transitions. Word has length 17 [2022-04-14 18:56:07,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 18:56:07,016 INFO L478 AbstractCegarLoop]: Abstraction has 25 states and 27 transitions. [2022-04-14 18:56:07,016 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:07,017 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 27 transitions. [2022-04-14 18:56:07,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-14 18:56:07,017 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 18:56:07,017 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 18:56:07,017 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-14 18:56:07,018 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 18:56:07,039 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 18:56:07,039 INFO L85 PathProgramCache]: Analyzing trace with hash 313528638, now seen corresponding path program 1 times [2022-04-14 18:56:07,040 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 18:56:07,040 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1153173895] [2022-04-14 18:56:07,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:07,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 18:56:07,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:07,167 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 18:56:07,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:07,193 INFO L290 TraceCheckUtils]: 0: Hoare triple {277#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {270#true} is VALID [2022-04-14 18:56:07,193 INFO L290 TraceCheckUtils]: 1: Hoare triple {270#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {270#true} is VALID [2022-04-14 18:56:07,193 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {270#true} {270#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {270#true} is VALID [2022-04-14 18:56:07,194 INFO L272 TraceCheckUtils]: 0: Hoare triple {270#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {277#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 18:56:07,195 INFO L290 TraceCheckUtils]: 1: Hoare triple {277#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {270#true} is VALID [2022-04-14 18:56:07,195 INFO L290 TraceCheckUtils]: 2: Hoare triple {270#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {270#true} is VALID [2022-04-14 18:56:07,195 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {270#true} {270#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {270#true} is VALID [2022-04-14 18:56:07,195 INFO L272 TraceCheckUtils]: 4: Hoare triple {270#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {270#true} is VALID [2022-04-14 18:56:07,198 INFO L290 TraceCheckUtils]: 5: Hoare triple {270#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {270#true} is VALID [2022-04-14 18:56:07,199 INFO L290 TraceCheckUtils]: 6: Hoare triple {270#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {275#(<= 1 main_~MAX~0)} is VALID [2022-04-14 18:56:07,200 INFO L290 TraceCheckUtils]: 7: Hoare triple {275#(<= 1 main_~MAX~0)} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {275#(<= 1 main_~MAX~0)} is VALID [2022-04-14 18:56:07,201 INFO L290 TraceCheckUtils]: 8: Hoare triple {275#(<= 1 main_~MAX~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {275#(<= 1 main_~MAX~0)} is VALID [2022-04-14 18:56:07,202 INFO L290 TraceCheckUtils]: 9: Hoare triple {275#(<= 1 main_~MAX~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {275#(<= 1 main_~MAX~0)} is VALID [2022-04-14 18:56:07,203 INFO L290 TraceCheckUtils]: 10: Hoare triple {275#(<= 1 main_~MAX~0)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {275#(<= 1 main_~MAX~0)} is VALID [2022-04-14 18:56:07,204 INFO L290 TraceCheckUtils]: 11: Hoare triple {275#(<= 1 main_~MAX~0)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {276#(<= 0 main_~i~0)} is VALID [2022-04-14 18:56:07,205 INFO L290 TraceCheckUtils]: 12: Hoare triple {276#(<= 0 main_~i~0)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {271#false} is VALID [2022-04-14 18:56:07,208 INFO L290 TraceCheckUtils]: 13: Hoare triple {271#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {271#false} is VALID [2022-04-14 18:56:07,209 INFO L290 TraceCheckUtils]: 14: Hoare triple {271#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {271#false} is VALID [2022-04-14 18:56:07,209 INFO L272 TraceCheckUtils]: 15: Hoare triple {271#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {271#false} is VALID [2022-04-14 18:56:07,210 INFO L290 TraceCheckUtils]: 16: Hoare triple {271#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {271#false} is VALID [2022-04-14 18:56:07,210 INFO L290 TraceCheckUtils]: 17: Hoare triple {271#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {271#false} is VALID [2022-04-14 18:56:07,211 INFO L290 TraceCheckUtils]: 18: Hoare triple {271#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {271#false} is VALID [2022-04-14 18:56:07,212 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 18:56:07,212 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 18:56:07,212 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1153173895] [2022-04-14 18:56:07,213 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1153173895] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 18:56:07,213 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 18:56:07,213 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-14 18:56:07,213 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [906140506] [2022-04-14 18:56:07,213 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 18:56:07,215 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 18:56:07,215 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 18:56:07,215 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:07,246 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:07,246 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-14 18:56:07,246 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 18:56:07,247 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-14 18:56:07,247 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-14 18:56:07,248 INFO L87 Difference]: Start difference. First operand 25 states and 27 transitions. Second operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:07,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:07,421 INFO L93 Difference]: Finished difference Result 26 states and 28 transitions. [2022-04-14 18:56:07,421 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-14 18:56:07,421 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 18:56:07,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 18:56:07,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:07,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 28 transitions. [2022-04-14 18:56:07,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:07,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 28 transitions. [2022-04-14 18:56:07,424 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 28 transitions. [2022-04-14 18:56:07,457 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:07,458 INFO L225 Difference]: With dead ends: 26 [2022-04-14 18:56:07,458 INFO L226 Difference]: Without dead ends: 26 [2022-04-14 18:56:07,458 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-04-14 18:56:07,459 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 27 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 27 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 18:56:07,460 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [27 Valid, 27 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 29 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 18:56:07,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2022-04-14 18:56:07,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2022-04-14 18:56:07,462 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 18:56:07,462 INFO L82 GeneralOperation]: Start isEquivalent. First operand 26 states. Second operand has 26 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:07,463 INFO L74 IsIncluded]: Start isIncluded. First operand 26 states. Second operand has 26 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:07,463 INFO L87 Difference]: Start difference. First operand 26 states. Second operand has 26 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:07,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:07,464 INFO L93 Difference]: Finished difference Result 26 states and 28 transitions. [2022-04-14 18:56:07,464 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 28 transitions. [2022-04-14 18:56:07,465 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:07,465 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:07,465 INFO L74 IsIncluded]: Start isIncluded. First operand has 26 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 26 states. [2022-04-14 18:56:07,465 INFO L87 Difference]: Start difference. First operand has 26 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 26 states. [2022-04-14 18:56:07,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:07,467 INFO L93 Difference]: Finished difference Result 26 states and 28 transitions. [2022-04-14 18:56:07,467 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 28 transitions. [2022-04-14 18:56:07,467 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:07,467 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:07,467 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 18:56:07,468 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 18:56:07,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:07,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 28 transitions. [2022-04-14 18:56:07,469 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 28 transitions. Word has length 19 [2022-04-14 18:56:07,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 18:56:07,469 INFO L478 AbstractCegarLoop]: Abstraction has 26 states and 28 transitions. [2022-04-14 18:56:07,470 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:07,470 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 28 transitions. [2022-04-14 18:56:07,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-14 18:56:07,470 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 18:56:07,470 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 18:56:07,470 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-14 18:56:07,471 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 18:56:07,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 18:56:07,471 INFO L85 PathProgramCache]: Analyzing trace with hash -617930468, now seen corresponding path program 1 times [2022-04-14 18:56:07,471 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 18:56:07,471 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [567195637] [2022-04-14 18:56:07,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:07,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 18:56:07,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:07,869 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 18:56:07,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:07,884 INFO L290 TraceCheckUtils]: 0: Hoare triple {403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {388#true} is VALID [2022-04-14 18:56:07,884 INFO L290 TraceCheckUtils]: 1: Hoare triple {388#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-14 18:56:07,884 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {388#true} {388#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-14 18:56:07,885 INFO L272 TraceCheckUtils]: 0: Hoare triple {388#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 18:56:07,885 INFO L290 TraceCheckUtils]: 1: Hoare triple {403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {388#true} is VALID [2022-04-14 18:56:07,886 INFO L290 TraceCheckUtils]: 2: Hoare triple {388#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-14 18:56:07,886 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {388#true} {388#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-14 18:56:07,886 INFO L272 TraceCheckUtils]: 4: Hoare triple {388#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-14 18:56:07,886 INFO L290 TraceCheckUtils]: 5: Hoare triple {388#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {388#true} is VALID [2022-04-14 18:56:07,887 INFO L290 TraceCheckUtils]: 6: Hoare triple {388#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {393#(<= 1 main_~MAX~0)} is VALID [2022-04-14 18:56:07,888 INFO L290 TraceCheckUtils]: 7: Hoare triple {393#(<= 1 main_~MAX~0)} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {394#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:07,889 INFO L290 TraceCheckUtils]: 8: Hoare triple {394#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {394#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:07,889 INFO L290 TraceCheckUtils]: 9: Hoare triple {394#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {395#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:07,890 INFO L290 TraceCheckUtils]: 10: Hoare triple {395#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {396#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-14 18:56:07,891 INFO L290 TraceCheckUtils]: 11: Hoare triple {396#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {397#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-14 18:56:07,892 INFO L290 TraceCheckUtils]: 12: Hoare triple {397#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-14 18:56:07,892 INFO L290 TraceCheckUtils]: 13: Hoare triple {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-14 18:56:07,893 INFO L290 TraceCheckUtils]: 14: Hoare triple {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-14 18:56:07,894 INFO L290 TraceCheckUtils]: 15: Hoare triple {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {399#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= (+ main_~j~0 |main_~#str2~0.offset|) 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:07,895 INFO L290 TraceCheckUtils]: 16: Hoare triple {399#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= (+ main_~j~0 |main_~#str2~0.offset|) 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {400#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-14 18:56:07,895 INFO L272 TraceCheckUtils]: 17: Hoare triple {400#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {401#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 18:56:07,896 INFO L290 TraceCheckUtils]: 18: Hoare triple {401#(not (= |__VERIFIER_assert_#in~cond| 0))} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {402#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 18:56:07,896 INFO L290 TraceCheckUtils]: 19: Hoare triple {402#(not (= __VERIFIER_assert_~cond 0))} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {389#false} is VALID [2022-04-14 18:56:07,897 INFO L290 TraceCheckUtils]: 20: Hoare triple {389#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {389#false} is VALID [2022-04-14 18:56:07,898 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 18:56:07,898 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 18:56:07,898 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [567195637] [2022-04-14 18:56:07,898 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [567195637] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 18:56:07,898 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1971917700] [2022-04-14 18:56:07,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:07,899 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:07,899 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 18:56:07,903 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 18:56:07,925 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-14 18:56:07,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:07,971 INFO L263 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 31 conjunts are in the unsatisfiable core [2022-04-14 18:56:07,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:07,992 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 18:56:08,122 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-14 18:56:08,358 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 15 [2022-04-14 18:56:08,582 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 10 [2022-04-14 18:56:08,637 INFO L272 TraceCheckUtils]: 0: Hoare triple {388#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-14 18:56:08,638 INFO L290 TraceCheckUtils]: 1: Hoare triple {388#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {388#true} is VALID [2022-04-14 18:56:08,638 INFO L290 TraceCheckUtils]: 2: Hoare triple {388#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-14 18:56:08,638 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {388#true} {388#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-14 18:56:08,638 INFO L272 TraceCheckUtils]: 4: Hoare triple {388#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-14 18:56:08,638 INFO L290 TraceCheckUtils]: 5: Hoare triple {388#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {388#true} is VALID [2022-04-14 18:56:08,639 INFO L290 TraceCheckUtils]: 6: Hoare triple {388#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {393#(<= 1 main_~MAX~0)} is VALID [2022-04-14 18:56:08,640 INFO L290 TraceCheckUtils]: 7: Hoare triple {393#(<= 1 main_~MAX~0)} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {428#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (<= main_~i~0 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:08,641 INFO L290 TraceCheckUtils]: 8: Hoare triple {428#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (<= main_~i~0 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {428#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (<= main_~i~0 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:08,642 INFO L290 TraceCheckUtils]: 9: Hoare triple {428#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (<= main_~i~0 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {395#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:08,643 INFO L290 TraceCheckUtils]: 10: Hoare triple {395#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {396#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-14 18:56:08,644 INFO L290 TraceCheckUtils]: 11: Hoare triple {396#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {397#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-14 18:56:08,645 INFO L290 TraceCheckUtils]: 12: Hoare triple {397#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-14 18:56:08,645 INFO L290 TraceCheckUtils]: 13: Hoare triple {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-14 18:56:08,646 INFO L290 TraceCheckUtils]: 14: Hoare triple {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-14 18:56:08,647 INFO L290 TraceCheckUtils]: 15: Hoare triple {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {399#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= (+ main_~j~0 |main_~#str2~0.offset|) 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:08,648 INFO L290 TraceCheckUtils]: 16: Hoare triple {399#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= (+ main_~j~0 |main_~#str2~0.offset|) 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {400#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-14 18:56:08,649 INFO L272 TraceCheckUtils]: 17: Hoare triple {400#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {459#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 18:56:08,651 INFO L290 TraceCheckUtils]: 18: Hoare triple {459#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {463#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 18:56:08,651 INFO L290 TraceCheckUtils]: 19: Hoare triple {463#(<= 1 __VERIFIER_assert_~cond)} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {389#false} is VALID [2022-04-14 18:56:08,652 INFO L290 TraceCheckUtils]: 20: Hoare triple {389#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {389#false} is VALID [2022-04-14 18:56:08,652 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 18:56:08,652 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 18:56:08,784 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-14 18:56:08,788 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 26 [2022-04-14 18:56:08,801 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2022-04-14 18:56:08,816 INFO L356 Elim1Store]: treesize reduction 4, result has 63.6 percent of original size [2022-04-14 18:56:08,817 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 29 [2022-04-14 18:56:09,121 INFO L290 TraceCheckUtils]: 20: Hoare triple {389#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {389#false} is VALID [2022-04-14 18:56:09,124 INFO L290 TraceCheckUtils]: 19: Hoare triple {463#(<= 1 __VERIFIER_assert_~cond)} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {389#false} is VALID [2022-04-14 18:56:09,125 INFO L290 TraceCheckUtils]: 18: Hoare triple {459#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {463#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 18:56:09,126 INFO L272 TraceCheckUtils]: 17: Hoare triple {400#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {459#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 18:56:09,128 INFO L290 TraceCheckUtils]: 16: Hoare triple {482#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {400#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-14 18:56:09,129 INFO L290 TraceCheckUtils]: 15: Hoare triple {486#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {482#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-14 18:56:09,130 INFO L290 TraceCheckUtils]: 14: Hoare triple {486#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {486#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is VALID [2022-04-14 18:56:09,131 INFO L290 TraceCheckUtils]: 13: Hoare triple {486#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {486#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is VALID [2022-04-14 18:56:09,132 INFO L290 TraceCheckUtils]: 12: Hoare triple {496#(and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 (+ main_~j~0 1))) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 (+ main_~j~0 1))))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {486#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is VALID [2022-04-14 18:56:09,141 INFO L290 TraceCheckUtils]: 11: Hoare triple {500#(and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1)))} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {496#(and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 (+ main_~j~0 1))) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 (+ main_~j~0 1))))} is VALID [2022-04-14 18:56:09,142 INFO L290 TraceCheckUtils]: 10: Hoare triple {504#(or (and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1))) (< main_~i~0 main_~MAX~0))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {500#(and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1)))} is VALID [2022-04-14 18:56:09,145 INFO L290 TraceCheckUtils]: 9: Hoare triple {508#(or (< (+ main_~i~0 1) main_~MAX~0) (and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1))))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {504#(or (and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1))) (< main_~i~0 main_~MAX~0))} is VALID [2022-04-14 18:56:09,146 INFO L290 TraceCheckUtils]: 8: Hoare triple {508#(or (< (+ main_~i~0 1) main_~MAX~0) (and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1))))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {508#(or (< (+ main_~i~0 1) main_~MAX~0) (and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1))))} is VALID [2022-04-14 18:56:09,147 INFO L290 TraceCheckUtils]: 7: Hoare triple {393#(<= 1 main_~MAX~0)} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {508#(or (< (+ main_~i~0 1) main_~MAX~0) (and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1))))} is VALID [2022-04-14 18:56:09,150 INFO L290 TraceCheckUtils]: 6: Hoare triple {388#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {393#(<= 1 main_~MAX~0)} is VALID [2022-04-14 18:56:09,150 INFO L290 TraceCheckUtils]: 5: Hoare triple {388#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {388#true} is VALID [2022-04-14 18:56:09,150 INFO L272 TraceCheckUtils]: 4: Hoare triple {388#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-14 18:56:09,150 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {388#true} {388#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-14 18:56:09,150 INFO L290 TraceCheckUtils]: 2: Hoare triple {388#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-14 18:56:09,151 INFO L290 TraceCheckUtils]: 1: Hoare triple {388#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {388#true} is VALID [2022-04-14 18:56:09,151 INFO L272 TraceCheckUtils]: 0: Hoare triple {388#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-14 18:56:09,151 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 18:56:09,151 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1971917700] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 18:56:09,151 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 18:56:09,151 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 22 [2022-04-14 18:56:09,152 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1023675676] [2022-04-14 18:56:09,152 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 18:56:09,152 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-14 18:56:09,153 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 18:56:09,153 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:09,192 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:09,193 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-14 18:56:09,193 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 18:56:09,194 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-14 18:56:09,195 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=388, Unknown=0, NotChecked=0, Total=462 [2022-04-14 18:56:09,195 INFO L87 Difference]: Start difference. First operand 26 states and 28 transitions. Second operand has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:10,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:10,711 INFO L93 Difference]: Finished difference Result 52 states and 58 transitions. [2022-04-14 18:56:10,712 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-04-14 18:56:10,712 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-14 18:56:10,712 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 18:56:10,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:10,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 59 transitions. [2022-04-14 18:56:10,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:10,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 59 transitions. [2022-04-14 18:56:10,722 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 59 transitions. [2022-04-14 18:56:10,785 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:10,789 INFO L225 Difference]: With dead ends: 52 [2022-04-14 18:56:10,789 INFO L226 Difference]: Without dead ends: 52 [2022-04-14 18:56:10,791 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 30 SyntacticMatches, 5 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 316 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=287, Invalid=1119, Unknown=0, NotChecked=0, Total=1406 [2022-04-14 18:56:10,793 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 73 mSDsluCounter, 59 mSDsCounter, 0 mSdLazyCounter, 339 mSolverCounterSat, 105 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 73 SdHoareTripleChecker+Valid, 70 SdHoareTripleChecker+Invalid, 444 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 105 IncrementalHoareTripleChecker+Valid, 339 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-14 18:56:10,794 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [73 Valid, 70 Invalid, 444 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [105 Valid, 339 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-14 18:56:10,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2022-04-14 18:56:10,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 39. [2022-04-14 18:56:10,802 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 18:56:10,802 INFO L82 GeneralOperation]: Start isEquivalent. First operand 52 states. Second operand has 39 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:10,803 INFO L74 IsIncluded]: Start isIncluded. First operand 52 states. Second operand has 39 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:10,803 INFO L87 Difference]: Start difference. First operand 52 states. Second operand has 39 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:10,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:10,807 INFO L93 Difference]: Finished difference Result 52 states and 58 transitions. [2022-04-14 18:56:10,807 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 58 transitions. [2022-04-14 18:56:10,810 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:10,810 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:10,811 INFO L74 IsIncluded]: Start isIncluded. First operand has 39 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 52 states. [2022-04-14 18:56:10,811 INFO L87 Difference]: Start difference. First operand has 39 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 52 states. [2022-04-14 18:56:10,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:10,815 INFO L93 Difference]: Finished difference Result 52 states and 58 transitions. [2022-04-14 18:56:10,815 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 58 transitions. [2022-04-14 18:56:10,817 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:10,817 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:10,817 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 18:56:10,818 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 18:56:10,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:10,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 43 transitions. [2022-04-14 18:56:10,821 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 43 transitions. Word has length 21 [2022-04-14 18:56:10,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 18:56:10,822 INFO L478 AbstractCegarLoop]: Abstraction has 39 states and 43 transitions. [2022-04-14 18:56:10,822 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:10,822 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 43 transitions. [2022-04-14 18:56:10,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-14 18:56:10,823 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 18:56:10,823 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 18:56:10,855 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-14 18:56:11,051 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:11,052 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 18:56:11,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 18:56:11,052 INFO L85 PathProgramCache]: Analyzing trace with hash 809600538, now seen corresponding path program 2 times [2022-04-14 18:56:11,052 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 18:56:11,052 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [42042034] [2022-04-14 18:56:11,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:11,052 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 18:56:11,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:11,119 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 18:56:11,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:11,125 INFO L290 TraceCheckUtils]: 0: Hoare triple {774#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {765#true} is VALID [2022-04-14 18:56:11,125 INFO L290 TraceCheckUtils]: 1: Hoare triple {765#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-14 18:56:11,125 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {765#true} {765#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-14 18:56:11,126 INFO L272 TraceCheckUtils]: 0: Hoare triple {765#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 18:56:11,126 INFO L290 TraceCheckUtils]: 1: Hoare triple {774#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {765#true} is VALID [2022-04-14 18:56:11,126 INFO L290 TraceCheckUtils]: 2: Hoare triple {765#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-14 18:56:11,127 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {765#true} {765#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-14 18:56:11,127 INFO L272 TraceCheckUtils]: 4: Hoare triple {765#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-14 18:56:11,127 INFO L290 TraceCheckUtils]: 5: Hoare triple {765#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {765#true} is VALID [2022-04-14 18:56:11,127 INFO L290 TraceCheckUtils]: 6: Hoare triple {765#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-14 18:56:11,127 INFO L290 TraceCheckUtils]: 7: Hoare triple {765#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {770#(= main_~i~0 0)} is VALID [2022-04-14 18:56:11,128 INFO L290 TraceCheckUtils]: 8: Hoare triple {770#(= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {770#(= main_~i~0 0)} is VALID [2022-04-14 18:56:11,128 INFO L290 TraceCheckUtils]: 9: Hoare triple {770#(= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {771#(<= 1 main_~i~0)} is VALID [2022-04-14 18:56:11,129 INFO L290 TraceCheckUtils]: 10: Hoare triple {771#(<= 1 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {772#(<= 2 main_~MAX~0)} is VALID [2022-04-14 18:56:11,129 INFO L290 TraceCheckUtils]: 11: Hoare triple {772#(<= 2 main_~MAX~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {772#(<= 2 main_~MAX~0)} is VALID [2022-04-14 18:56:11,130 INFO L290 TraceCheckUtils]: 12: Hoare triple {772#(<= 2 main_~MAX~0)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {772#(<= 2 main_~MAX~0)} is VALID [2022-04-14 18:56:11,130 INFO L290 TraceCheckUtils]: 13: Hoare triple {772#(<= 2 main_~MAX~0)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {771#(<= 1 main_~i~0)} is VALID [2022-04-14 18:56:11,130 INFO L290 TraceCheckUtils]: 14: Hoare triple {771#(<= 1 main_~i~0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {771#(<= 1 main_~i~0)} is VALID [2022-04-14 18:56:11,131 INFO L290 TraceCheckUtils]: 15: Hoare triple {771#(<= 1 main_~i~0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {773#(<= 0 main_~i~0)} is VALID [2022-04-14 18:56:11,131 INFO L290 TraceCheckUtils]: 16: Hoare triple {773#(<= 0 main_~i~0)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {766#false} is VALID [2022-04-14 18:56:11,131 INFO L290 TraceCheckUtils]: 17: Hoare triple {766#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {766#false} is VALID [2022-04-14 18:56:11,132 INFO L290 TraceCheckUtils]: 18: Hoare triple {766#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {766#false} is VALID [2022-04-14 18:56:11,132 INFO L272 TraceCheckUtils]: 19: Hoare triple {766#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {766#false} is VALID [2022-04-14 18:56:11,132 INFO L290 TraceCheckUtils]: 20: Hoare triple {766#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {766#false} is VALID [2022-04-14 18:56:11,132 INFO L290 TraceCheckUtils]: 21: Hoare triple {766#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {766#false} is VALID [2022-04-14 18:56:11,132 INFO L290 TraceCheckUtils]: 22: Hoare triple {766#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {766#false} is VALID [2022-04-14 18:56:11,132 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 18:56:11,133 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 18:56:11,133 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [42042034] [2022-04-14 18:56:11,133 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [42042034] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 18:56:11,133 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [813683886] [2022-04-14 18:56:11,133 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-14 18:56:11,133 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:11,133 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 18:56:11,134 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 18:56:11,164 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-14 18:56:11,200 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-14 18:56:11,200 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-14 18:56:11,201 INFO L263 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-14 18:56:11,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:11,214 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 18:56:11,311 INFO L272 TraceCheckUtils]: 0: Hoare triple {765#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-14 18:56:11,311 INFO L290 TraceCheckUtils]: 1: Hoare triple {765#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {765#true} is VALID [2022-04-14 18:56:11,311 INFO L290 TraceCheckUtils]: 2: Hoare triple {765#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-14 18:56:11,312 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {765#true} {765#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-14 18:56:11,312 INFO L272 TraceCheckUtils]: 4: Hoare triple {765#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-14 18:56:11,312 INFO L290 TraceCheckUtils]: 5: Hoare triple {765#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {765#true} is VALID [2022-04-14 18:56:11,312 INFO L290 TraceCheckUtils]: 6: Hoare triple {765#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-14 18:56:11,313 INFO L290 TraceCheckUtils]: 7: Hoare triple {765#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {773#(<= 0 main_~i~0)} is VALID [2022-04-14 18:56:11,313 INFO L290 TraceCheckUtils]: 8: Hoare triple {773#(<= 0 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {773#(<= 0 main_~i~0)} is VALID [2022-04-14 18:56:11,314 INFO L290 TraceCheckUtils]: 9: Hoare triple {773#(<= 0 main_~i~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {771#(<= 1 main_~i~0)} is VALID [2022-04-14 18:56:11,314 INFO L290 TraceCheckUtils]: 10: Hoare triple {771#(<= 1 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {772#(<= 2 main_~MAX~0)} is VALID [2022-04-14 18:56:11,315 INFO L290 TraceCheckUtils]: 11: Hoare triple {772#(<= 2 main_~MAX~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {772#(<= 2 main_~MAX~0)} is VALID [2022-04-14 18:56:11,315 INFO L290 TraceCheckUtils]: 12: Hoare triple {772#(<= 2 main_~MAX~0)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {772#(<= 2 main_~MAX~0)} is VALID [2022-04-14 18:56:11,315 INFO L290 TraceCheckUtils]: 13: Hoare triple {772#(<= 2 main_~MAX~0)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {771#(<= 1 main_~i~0)} is VALID [2022-04-14 18:56:11,316 INFO L290 TraceCheckUtils]: 14: Hoare triple {771#(<= 1 main_~i~0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {771#(<= 1 main_~i~0)} is VALID [2022-04-14 18:56:11,316 INFO L290 TraceCheckUtils]: 15: Hoare triple {771#(<= 1 main_~i~0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {773#(<= 0 main_~i~0)} is VALID [2022-04-14 18:56:11,317 INFO L290 TraceCheckUtils]: 16: Hoare triple {773#(<= 0 main_~i~0)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {766#false} is VALID [2022-04-14 18:56:11,317 INFO L290 TraceCheckUtils]: 17: Hoare triple {766#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {766#false} is VALID [2022-04-14 18:56:11,317 INFO L290 TraceCheckUtils]: 18: Hoare triple {766#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {766#false} is VALID [2022-04-14 18:56:11,317 INFO L272 TraceCheckUtils]: 19: Hoare triple {766#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {766#false} is VALID [2022-04-14 18:56:11,317 INFO L290 TraceCheckUtils]: 20: Hoare triple {766#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {766#false} is VALID [2022-04-14 18:56:11,318 INFO L290 TraceCheckUtils]: 21: Hoare triple {766#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {766#false} is VALID [2022-04-14 18:56:11,319 INFO L290 TraceCheckUtils]: 22: Hoare triple {766#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {766#false} is VALID [2022-04-14 18:56:11,319 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 18:56:11,319 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 18:56:11,438 INFO L290 TraceCheckUtils]: 22: Hoare triple {766#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {766#false} is VALID [2022-04-14 18:56:11,438 INFO L290 TraceCheckUtils]: 21: Hoare triple {766#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {766#false} is VALID [2022-04-14 18:56:11,438 INFO L290 TraceCheckUtils]: 20: Hoare triple {766#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {766#false} is VALID [2022-04-14 18:56:11,438 INFO L272 TraceCheckUtils]: 19: Hoare triple {766#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {766#false} is VALID [2022-04-14 18:56:11,439 INFO L290 TraceCheckUtils]: 18: Hoare triple {766#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {766#false} is VALID [2022-04-14 18:56:11,439 INFO L290 TraceCheckUtils]: 17: Hoare triple {766#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {766#false} is VALID [2022-04-14 18:56:11,439 INFO L290 TraceCheckUtils]: 16: Hoare triple {773#(<= 0 main_~i~0)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {766#false} is VALID [2022-04-14 18:56:11,440 INFO L290 TraceCheckUtils]: 15: Hoare triple {771#(<= 1 main_~i~0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {773#(<= 0 main_~i~0)} is VALID [2022-04-14 18:56:11,440 INFO L290 TraceCheckUtils]: 14: Hoare triple {771#(<= 1 main_~i~0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {771#(<= 1 main_~i~0)} is VALID [2022-04-14 18:56:11,441 INFO L290 TraceCheckUtils]: 13: Hoare triple {772#(<= 2 main_~MAX~0)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {771#(<= 1 main_~i~0)} is VALID [2022-04-14 18:56:11,442 INFO L290 TraceCheckUtils]: 12: Hoare triple {772#(<= 2 main_~MAX~0)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {772#(<= 2 main_~MAX~0)} is VALID [2022-04-14 18:56:11,442 INFO L290 TraceCheckUtils]: 11: Hoare triple {772#(<= 2 main_~MAX~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {772#(<= 2 main_~MAX~0)} is VALID [2022-04-14 18:56:11,442 INFO L290 TraceCheckUtils]: 10: Hoare triple {771#(<= 1 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {772#(<= 2 main_~MAX~0)} is VALID [2022-04-14 18:56:11,443 INFO L290 TraceCheckUtils]: 9: Hoare triple {773#(<= 0 main_~i~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {771#(<= 1 main_~i~0)} is VALID [2022-04-14 18:56:11,443 INFO L290 TraceCheckUtils]: 8: Hoare triple {773#(<= 0 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {773#(<= 0 main_~i~0)} is VALID [2022-04-14 18:56:11,444 INFO L290 TraceCheckUtils]: 7: Hoare triple {765#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {773#(<= 0 main_~i~0)} is VALID [2022-04-14 18:56:11,444 INFO L290 TraceCheckUtils]: 6: Hoare triple {765#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-14 18:56:11,444 INFO L290 TraceCheckUtils]: 5: Hoare triple {765#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {765#true} is VALID [2022-04-14 18:56:11,444 INFO L272 TraceCheckUtils]: 4: Hoare triple {765#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-14 18:56:11,445 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {765#true} {765#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-14 18:56:11,445 INFO L290 TraceCheckUtils]: 2: Hoare triple {765#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-14 18:56:11,445 INFO L290 TraceCheckUtils]: 1: Hoare triple {765#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {765#true} is VALID [2022-04-14 18:56:11,445 INFO L272 TraceCheckUtils]: 0: Hoare triple {765#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-14 18:56:11,445 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 18:56:11,445 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [813683886] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 18:56:11,445 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 18:56:11,446 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5, 5] total 7 [2022-04-14 18:56:11,446 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [896918102] [2022-04-14 18:56:11,446 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 18:56:11,446 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-14 18:56:11,447 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 18:56:11,447 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:11,468 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:11,468 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-14 18:56:11,468 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 18:56:11,468 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-14 18:56:11,469 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-04-14 18:56:11,469 INFO L87 Difference]: Start difference. First operand 39 states and 43 transitions. Second operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:11,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:11,765 INFO L93 Difference]: Finished difference Result 48 states and 53 transitions. [2022-04-14 18:56:11,765 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-14 18:56:11,765 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-14 18:56:11,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 18:56:11,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:11,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-14 18:56:11,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:11,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-14 18:56:11,769 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 50 transitions. [2022-04-14 18:56:11,812 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:11,812 INFO L225 Difference]: With dead ends: 48 [2022-04-14 18:56:11,813 INFO L226 Difference]: Without dead ends: 48 [2022-04-14 18:56:11,813 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 48 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2022-04-14 18:56:11,813 INFO L913 BasicCegarLoop]: 24 mSDtfsCounter, 38 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 91 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 38 SdHoareTripleChecker+Valid, 36 SdHoareTripleChecker+Invalid, 126 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 91 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 18:56:11,814 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [38 Valid, 36 Invalid, 126 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 91 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 18:56:11,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-04-14 18:56:11,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 41. [2022-04-14 18:56:11,818 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 18:56:11,818 INFO L82 GeneralOperation]: Start isEquivalent. First operand 48 states. Second operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:11,818 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:11,819 INFO L87 Difference]: Start difference. First operand 48 states. Second operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:11,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:11,821 INFO L93 Difference]: Finished difference Result 48 states and 53 transitions. [2022-04-14 18:56:11,821 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 53 transitions. [2022-04-14 18:56:11,822 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:11,822 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:11,822 INFO L74 IsIncluded]: Start isIncluded. First operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 48 states. [2022-04-14 18:56:11,822 INFO L87 Difference]: Start difference. First operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 48 states. [2022-04-14 18:56:11,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:11,824 INFO L93 Difference]: Finished difference Result 48 states and 53 transitions. [2022-04-14 18:56:11,824 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 53 transitions. [2022-04-14 18:56:11,824 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:11,825 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:11,825 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 18:56:11,825 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 18:56:11,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:11,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 45 transitions. [2022-04-14 18:56:11,826 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 45 transitions. Word has length 23 [2022-04-14 18:56:11,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 18:56:11,826 INFO L478 AbstractCegarLoop]: Abstraction has 41 states and 45 transitions. [2022-04-14 18:56:11,827 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:11,827 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 45 transitions. [2022-04-14 18:56:11,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-14 18:56:11,827 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 18:56:11,827 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 18:56:11,851 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-14 18:56:12,047 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:12,048 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 18:56:12,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 18:56:12,048 INFO L85 PathProgramCache]: Analyzing trace with hash -634204424, now seen corresponding path program 3 times [2022-04-14 18:56:12,048 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 18:56:12,048 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1988633479] [2022-04-14 18:56:12,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:12,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 18:56:12,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:12,502 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 18:56:12,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:12,511 INFO L290 TraceCheckUtils]: 0: Hoare triple {1128#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1111#true} is VALID [2022-04-14 18:56:12,511 INFO L290 TraceCheckUtils]: 1: Hoare triple {1111#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-14 18:56:12,511 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1111#true} {1111#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-14 18:56:12,515 INFO L272 TraceCheckUtils]: 0: Hoare triple {1111#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1128#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 18:56:12,516 INFO L290 TraceCheckUtils]: 1: Hoare triple {1128#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1111#true} is VALID [2022-04-14 18:56:12,516 INFO L290 TraceCheckUtils]: 2: Hoare triple {1111#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-14 18:56:12,516 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1111#true} {1111#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-14 18:56:12,516 INFO L272 TraceCheckUtils]: 4: Hoare triple {1111#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-14 18:56:12,516 INFO L290 TraceCheckUtils]: 5: Hoare triple {1111#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {1111#true} is VALID [2022-04-14 18:56:12,516 INFO L290 TraceCheckUtils]: 6: Hoare triple {1111#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-14 18:56:12,517 INFO L290 TraceCheckUtils]: 7: Hoare triple {1111#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {1116#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:12,518 INFO L290 TraceCheckUtils]: 8: Hoare triple {1116#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1116#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:12,519 INFO L290 TraceCheckUtils]: 9: Hoare triple {1116#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1117#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} is VALID [2022-04-14 18:56:12,520 INFO L290 TraceCheckUtils]: 10: Hoare triple {1117#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1118#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:12,520 INFO L290 TraceCheckUtils]: 11: Hoare triple {1118#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1119#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} is VALID [2022-04-14 18:56:12,521 INFO L290 TraceCheckUtils]: 12: Hoare triple {1119#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {1120#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-14 18:56:12,522 INFO L290 TraceCheckUtils]: 13: Hoare triple {1120#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1121#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-14 18:56:12,522 INFO L290 TraceCheckUtils]: 14: Hoare triple {1121#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1122#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (<= 1 main_~j~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (<= main_~j~0 1))} is VALID [2022-04-14 18:56:12,523 INFO L290 TraceCheckUtils]: 15: Hoare triple {1122#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (<= 1 main_~j~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (<= main_~j~0 1))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1122#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (<= 1 main_~j~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (<= main_~j~0 1))} is VALID [2022-04-14 18:56:12,524 INFO L290 TraceCheckUtils]: 16: Hoare triple {1122#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (<= 1 main_~j~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (<= main_~j~0 1))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1123#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))} is VALID [2022-04-14 18:56:12,524 INFO L290 TraceCheckUtils]: 17: Hoare triple {1123#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1123#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))} is VALID [2022-04-14 18:56:12,525 INFO L290 TraceCheckUtils]: 18: Hoare triple {1123#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {1123#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))} is VALID [2022-04-14 18:56:12,526 INFO L290 TraceCheckUtils]: 19: Hoare triple {1123#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1124#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ main_~j~0 |main_~#str2~0.offset|) 1))} is VALID [2022-04-14 18:56:12,526 INFO L290 TraceCheckUtils]: 20: Hoare triple {1124#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ main_~j~0 |main_~#str2~0.offset|) 1))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {1125#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-14 18:56:12,527 INFO L272 TraceCheckUtils]: 21: Hoare triple {1125#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {1126#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 18:56:12,528 INFO L290 TraceCheckUtils]: 22: Hoare triple {1126#(not (= |__VERIFIER_assert_#in~cond| 0))} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1127#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 18:56:12,528 INFO L290 TraceCheckUtils]: 23: Hoare triple {1127#(not (= __VERIFIER_assert_~cond 0))} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1112#false} is VALID [2022-04-14 18:56:12,529 INFO L290 TraceCheckUtils]: 24: Hoare triple {1112#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1112#false} is VALID [2022-04-14 18:56:12,529 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 18:56:12,529 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 18:56:12,529 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1988633479] [2022-04-14 18:56:12,529 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1988633479] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 18:56:12,529 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1919226441] [2022-04-14 18:56:12,529 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-14 18:56:12,530 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:12,530 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 18:56:12,532 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 18:56:12,566 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-14 18:56:12,602 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-14 18:56:12,602 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-14 18:56:12,603 INFO L263 TraceCheckSpWp]: Trace formula consists of 138 conjuncts, 33 conjunts are in the unsatisfiable core [2022-04-14 18:56:12,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:12,621 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 18:56:12,647 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-14 18:56:12,902 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-04-14 18:56:12,993 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2022-04-14 18:56:13,337 INFO L356 Elim1Store]: treesize reduction 9, result has 25.0 percent of original size [2022-04-14 18:56:13,338 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 13 [2022-04-14 18:56:13,427 INFO L272 TraceCheckUtils]: 0: Hoare triple {1111#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-14 18:56:13,428 INFO L290 TraceCheckUtils]: 1: Hoare triple {1111#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1111#true} is VALID [2022-04-14 18:56:13,428 INFO L290 TraceCheckUtils]: 2: Hoare triple {1111#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-14 18:56:13,428 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1111#true} {1111#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-14 18:56:13,428 INFO L272 TraceCheckUtils]: 4: Hoare triple {1111#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-14 18:56:13,428 INFO L290 TraceCheckUtils]: 5: Hoare triple {1111#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {1111#true} is VALID [2022-04-14 18:56:13,429 INFO L290 TraceCheckUtils]: 6: Hoare triple {1111#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-14 18:56:13,430 INFO L290 TraceCheckUtils]: 7: Hoare triple {1111#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {1153#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:13,431 INFO L290 TraceCheckUtils]: 8: Hoare triple {1153#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1153#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:13,431 INFO L290 TraceCheckUtils]: 9: Hoare triple {1153#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1160#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} is VALID [2022-04-14 18:56:13,432 INFO L290 TraceCheckUtils]: 10: Hoare triple {1160#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1164#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0) (< main_~i~0 main_~MAX~0))} is VALID [2022-04-14 18:56:13,434 INFO L290 TraceCheckUtils]: 11: Hoare triple {1164#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0) (< main_~i~0 main_~MAX~0))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1168#(and (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} is VALID [2022-04-14 18:56:13,440 INFO L290 TraceCheckUtils]: 12: Hoare triple {1168#(and (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {1172#(and (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-14 18:56:13,441 INFO L290 TraceCheckUtils]: 13: Hoare triple {1172#(and (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1176#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-14 18:56:13,441 INFO L290 TraceCheckUtils]: 14: Hoare triple {1176#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1180#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-14 18:56:13,442 INFO L290 TraceCheckUtils]: 15: Hoare triple {1180#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1180#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-14 18:56:13,443 INFO L290 TraceCheckUtils]: 16: Hoare triple {1180#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1187#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-14 18:56:13,444 INFO L290 TraceCheckUtils]: 17: Hoare triple {1187#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1187#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-14 18:56:13,444 INFO L290 TraceCheckUtils]: 18: Hoare triple {1187#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {1187#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-14 18:56:13,445 INFO L290 TraceCheckUtils]: 19: Hoare triple {1187#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1197#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 0 main_~j~0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~j~0 1))} is VALID [2022-04-14 18:56:13,446 INFO L290 TraceCheckUtils]: 20: Hoare triple {1197#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 0 main_~j~0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~j~0 1))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {1125#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-14 18:56:13,447 INFO L272 TraceCheckUtils]: 21: Hoare triple {1125#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {1204#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 18:56:13,447 INFO L290 TraceCheckUtils]: 22: Hoare triple {1204#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1208#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 18:56:13,448 INFO L290 TraceCheckUtils]: 23: Hoare triple {1208#(<= 1 __VERIFIER_assert_~cond)} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1112#false} is VALID [2022-04-14 18:56:13,448 INFO L290 TraceCheckUtils]: 24: Hoare triple {1112#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1112#false} is VALID [2022-04-14 18:56:13,448 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 18:56:13,448 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 18:56:15,578 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 108 [2022-04-14 18:56:15,602 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-14 18:56:15,603 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 201 treesize of output 179 [2022-04-14 18:56:16,093 INFO L290 TraceCheckUtils]: 24: Hoare triple {1112#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1112#false} is VALID [2022-04-14 18:56:16,094 INFO L290 TraceCheckUtils]: 23: Hoare triple {1208#(<= 1 __VERIFIER_assert_~cond)} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1112#false} is VALID [2022-04-14 18:56:16,095 INFO L290 TraceCheckUtils]: 22: Hoare triple {1204#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1208#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 18:56:16,099 INFO L272 TraceCheckUtils]: 21: Hoare triple {1125#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {1204#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 18:56:16,100 INFO L290 TraceCheckUtils]: 20: Hoare triple {1227#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {1125#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-14 18:56:16,101 INFO L290 TraceCheckUtils]: 19: Hoare triple {1231#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1227#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-14 18:56:16,101 INFO L290 TraceCheckUtils]: 18: Hoare triple {1231#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {1231#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is VALID [2022-04-14 18:56:16,102 INFO L290 TraceCheckUtils]: 17: Hoare triple {1231#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1231#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is VALID [2022-04-14 18:56:16,649 WARN L290 TraceCheckUtils]: 16: Hoare triple {1241#(forall ((|main_~#str2~0.offset| Int)) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) |main_~#str1~0.base|) |main_~#str1~0.offset|)))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1231#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is UNKNOWN [2022-04-14 18:56:16,651 INFO L290 TraceCheckUtils]: 15: Hoare triple {1241#(forall ((|main_~#str2~0.offset| Int)) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) |main_~#str1~0.base|) |main_~#str1~0.offset|)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1241#(forall ((|main_~#str2~0.offset| Int)) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) |main_~#str1~0.base|) |main_~#str1~0.offset|)))} is VALID [2022-04-14 18:56:16,651 INFO L290 TraceCheckUtils]: 14: Hoare triple {1248#(= main_~MAX~0 (+ main_~j~0 2))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1241#(forall ((|main_~#str2~0.offset| Int)) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) |main_~#str1~0.base|) |main_~#str1~0.offset|)))} is VALID [2022-04-14 18:56:16,652 INFO L290 TraceCheckUtils]: 13: Hoare triple {1252#(= main_~MAX~0 2)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1248#(= main_~MAX~0 (+ main_~j~0 2))} is VALID [2022-04-14 18:56:16,652 INFO L290 TraceCheckUtils]: 12: Hoare triple {1256#(or (= main_~MAX~0 2) (< main_~i~0 main_~MAX~0))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {1252#(= main_~MAX~0 2)} is VALID [2022-04-14 18:56:16,653 INFO L290 TraceCheckUtils]: 11: Hoare triple {1260#(or (< (+ main_~i~0 1) main_~MAX~0) (= main_~MAX~0 2))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1256#(or (= main_~MAX~0 2) (< main_~i~0 main_~MAX~0))} is VALID [2022-04-14 18:56:16,653 INFO L290 TraceCheckUtils]: 10: Hoare triple {1264#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1260#(or (< (+ main_~i~0 1) main_~MAX~0) (= main_~MAX~0 2))} is VALID [2022-04-14 18:56:16,654 INFO L290 TraceCheckUtils]: 9: Hoare triple {1268#(and (<= main_~i~0 0) (<= 0 main_~i~0))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1264#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-14 18:56:16,654 INFO L290 TraceCheckUtils]: 8: Hoare triple {1268#(and (<= main_~i~0 0) (<= 0 main_~i~0))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1268#(and (<= main_~i~0 0) (<= 0 main_~i~0))} is VALID [2022-04-14 18:56:16,655 INFO L290 TraceCheckUtils]: 7: Hoare triple {1111#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {1268#(and (<= main_~i~0 0) (<= 0 main_~i~0))} is VALID [2022-04-14 18:56:16,655 INFO L290 TraceCheckUtils]: 6: Hoare triple {1111#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-14 18:56:16,655 INFO L290 TraceCheckUtils]: 5: Hoare triple {1111#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {1111#true} is VALID [2022-04-14 18:56:16,655 INFO L272 TraceCheckUtils]: 4: Hoare triple {1111#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-14 18:56:16,655 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1111#true} {1111#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-14 18:56:16,656 INFO L290 TraceCheckUtils]: 2: Hoare triple {1111#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-14 18:56:16,656 INFO L290 TraceCheckUtils]: 1: Hoare triple {1111#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1111#true} is VALID [2022-04-14 18:56:16,656 INFO L272 TraceCheckUtils]: 0: Hoare triple {1111#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-14 18:56:16,657 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 18:56:16,657 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1919226441] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 18:56:16,657 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 18:56:16,657 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 14] total 35 [2022-04-14 18:56:16,657 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [876581982] [2022-04-14 18:56:16,657 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 18:56:16,658 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-14 18:56:16,659 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 18:56:16,659 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:17,380 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 57 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:17,380 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-04-14 18:56:17,380 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 18:56:17,381 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-04-14 18:56:17,381 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=1047, Unknown=2, NotChecked=0, Total=1190 [2022-04-14 18:56:17,382 INFO L87 Difference]: Start difference. First operand 41 states and 45 transitions. Second operand has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:19,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:19,967 INFO L93 Difference]: Finished difference Result 78 states and 88 transitions. [2022-04-14 18:56:19,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-04-14 18:56:19,967 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-14 18:56:19,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 18:56:19,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:19,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 76 transitions. [2022-04-14 18:56:19,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:19,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 76 transitions. [2022-04-14 18:56:19,973 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 29 states and 76 transitions. [2022-04-14 18:56:20,061 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 76 edges. 76 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:20,062 INFO L225 Difference]: With dead ends: 78 [2022-04-14 18:56:20,062 INFO L226 Difference]: Without dead ends: 78 [2022-04-14 18:56:20,064 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 31 SyntacticMatches, 1 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 850 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=560, Invalid=3098, Unknown=2, NotChecked=0, Total=3660 [2022-04-14 18:56:20,065 INFO L913 BasicCegarLoop]: 19 mSDtfsCounter, 84 mSDsluCounter, 89 mSDsCounter, 0 mSdLazyCounter, 790 mSolverCounterSat, 155 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 84 SdHoareTripleChecker+Valid, 108 SdHoareTripleChecker+Invalid, 997 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 155 IncrementalHoareTripleChecker+Valid, 790 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 52 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-14 18:56:20,065 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [84 Valid, 108 Invalid, 997 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [155 Valid, 790 Invalid, 0 Unknown, 52 Unchecked, 0.9s Time] [2022-04-14 18:56:20,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2022-04-14 18:56:20,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 46. [2022-04-14 18:56:20,072 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 18:56:20,072 INFO L82 GeneralOperation]: Start isEquivalent. First operand 78 states. Second operand has 46 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 39 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:20,073 INFO L74 IsIncluded]: Start isIncluded. First operand 78 states. Second operand has 46 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 39 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:20,073 INFO L87 Difference]: Start difference. First operand 78 states. Second operand has 46 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 39 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:20,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:20,076 INFO L93 Difference]: Finished difference Result 78 states and 88 transitions. [2022-04-14 18:56:20,076 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 88 transitions. [2022-04-14 18:56:20,076 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:20,076 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:20,077 INFO L74 IsIncluded]: Start isIncluded. First operand has 46 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 39 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 78 states. [2022-04-14 18:56:20,077 INFO L87 Difference]: Start difference. First operand has 46 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 39 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 78 states. [2022-04-14 18:56:20,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:20,080 INFO L93 Difference]: Finished difference Result 78 states and 88 transitions. [2022-04-14 18:56:20,080 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 88 transitions. [2022-04-14 18:56:20,080 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:20,080 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:20,080 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 18:56:20,080 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 18:56:20,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 39 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:20,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 51 transitions. [2022-04-14 18:56:20,082 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 51 transitions. Word has length 25 [2022-04-14 18:56:20,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 18:56:20,082 INFO L478 AbstractCegarLoop]: Abstraction has 46 states and 51 transitions. [2022-04-14 18:56:20,082 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:20,082 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 51 transitions. [2022-04-14 18:56:20,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-14 18:56:20,083 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 18:56:20,083 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 18:56:20,115 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-14 18:56:20,309 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:20,309 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 18:56:20,310 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 18:56:20,310 INFO L85 PathProgramCache]: Analyzing trace with hash 1131578614, now seen corresponding path program 4 times [2022-04-14 18:56:20,310 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 18:56:20,310 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [410516189] [2022-04-14 18:56:20,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:20,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 18:56:20,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:20,374 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 18:56:20,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:20,384 INFO L290 TraceCheckUtils]: 0: Hoare triple {1640#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1630#true} is VALID [2022-04-14 18:56:20,384 INFO L290 TraceCheckUtils]: 1: Hoare triple {1630#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-14 18:56:20,385 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1630#true} {1630#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-14 18:56:20,385 INFO L272 TraceCheckUtils]: 0: Hoare triple {1630#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1640#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 18:56:20,385 INFO L290 TraceCheckUtils]: 1: Hoare triple {1640#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1630#true} is VALID [2022-04-14 18:56:20,386 INFO L290 TraceCheckUtils]: 2: Hoare triple {1630#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-14 18:56:20,386 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1630#true} {1630#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-14 18:56:20,386 INFO L272 TraceCheckUtils]: 4: Hoare triple {1630#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-14 18:56:20,386 INFO L290 TraceCheckUtils]: 5: Hoare triple {1630#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {1630#true} is VALID [2022-04-14 18:56:20,386 INFO L290 TraceCheckUtils]: 6: Hoare triple {1630#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-14 18:56:20,387 INFO L290 TraceCheckUtils]: 7: Hoare triple {1630#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {1635#(= main_~i~0 0)} is VALID [2022-04-14 18:56:20,387 INFO L290 TraceCheckUtils]: 8: Hoare triple {1635#(= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1635#(= main_~i~0 0)} is VALID [2022-04-14 18:56:20,387 INFO L290 TraceCheckUtils]: 9: Hoare triple {1635#(= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1636#(<= 1 main_~i~0)} is VALID [2022-04-14 18:56:20,388 INFO L290 TraceCheckUtils]: 10: Hoare triple {1636#(<= 1 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1636#(<= 1 main_~i~0)} is VALID [2022-04-14 18:56:20,388 INFO L290 TraceCheckUtils]: 11: Hoare triple {1636#(<= 1 main_~i~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1637#(<= 2 main_~i~0)} is VALID [2022-04-14 18:56:20,389 INFO L290 TraceCheckUtils]: 12: Hoare triple {1637#(<= 2 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1638#(<= 3 main_~MAX~0)} is VALID [2022-04-14 18:56:20,389 INFO L290 TraceCheckUtils]: 13: Hoare triple {1638#(<= 3 main_~MAX~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1638#(<= 3 main_~MAX~0)} is VALID [2022-04-14 18:56:20,389 INFO L290 TraceCheckUtils]: 14: Hoare triple {1638#(<= 3 main_~MAX~0)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {1638#(<= 3 main_~MAX~0)} is VALID [2022-04-14 18:56:20,390 INFO L290 TraceCheckUtils]: 15: Hoare triple {1638#(<= 3 main_~MAX~0)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1637#(<= 2 main_~i~0)} is VALID [2022-04-14 18:56:20,390 INFO L290 TraceCheckUtils]: 16: Hoare triple {1637#(<= 2 main_~i~0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1637#(<= 2 main_~i~0)} is VALID [2022-04-14 18:56:20,391 INFO L290 TraceCheckUtils]: 17: Hoare triple {1637#(<= 2 main_~i~0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1636#(<= 1 main_~i~0)} is VALID [2022-04-14 18:56:20,391 INFO L290 TraceCheckUtils]: 18: Hoare triple {1636#(<= 1 main_~i~0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1636#(<= 1 main_~i~0)} is VALID [2022-04-14 18:56:20,392 INFO L290 TraceCheckUtils]: 19: Hoare triple {1636#(<= 1 main_~i~0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1639#(<= 0 main_~i~0)} is VALID [2022-04-14 18:56:20,392 INFO L290 TraceCheckUtils]: 20: Hoare triple {1639#(<= 0 main_~i~0)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {1631#false} is VALID [2022-04-14 18:56:20,392 INFO L290 TraceCheckUtils]: 21: Hoare triple {1631#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1631#false} is VALID [2022-04-14 18:56:20,393 INFO L290 TraceCheckUtils]: 22: Hoare triple {1631#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {1631#false} is VALID [2022-04-14 18:56:20,394 INFO L272 TraceCheckUtils]: 23: Hoare triple {1631#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {1631#false} is VALID [2022-04-14 18:56:20,394 INFO L290 TraceCheckUtils]: 24: Hoare triple {1631#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1631#false} is VALID [2022-04-14 18:56:20,394 INFO L290 TraceCheckUtils]: 25: Hoare triple {1631#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1631#false} is VALID [2022-04-14 18:56:20,394 INFO L290 TraceCheckUtils]: 26: Hoare triple {1631#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1631#false} is VALID [2022-04-14 18:56:20,394 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 18:56:20,394 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 18:56:20,395 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [410516189] [2022-04-14 18:56:20,395 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [410516189] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 18:56:20,395 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [816436395] [2022-04-14 18:56:20,395 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-14 18:56:20,395 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:20,395 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 18:56:20,400 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 18:56:20,414 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-14 18:56:20,454 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-14 18:56:20,454 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-14 18:56:20,455 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 34 conjunts are in the unsatisfiable core [2022-04-14 18:56:20,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:20,467 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 18:56:20,500 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-14 18:56:20,659 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2022-04-14 18:56:21,059 INFO L356 Elim1Store]: treesize reduction 9, result has 25.0 percent of original size [2022-04-14 18:56:21,060 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 13 [2022-04-14 18:56:21,129 INFO L272 TraceCheckUtils]: 0: Hoare triple {1630#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-14 18:56:21,129 INFO L290 TraceCheckUtils]: 1: Hoare triple {1630#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1630#true} is VALID [2022-04-14 18:56:21,129 INFO L290 TraceCheckUtils]: 2: Hoare triple {1630#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-14 18:56:21,129 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1630#true} {1630#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-14 18:56:21,129 INFO L272 TraceCheckUtils]: 4: Hoare triple {1630#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-14 18:56:21,130 INFO L290 TraceCheckUtils]: 5: Hoare triple {1630#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {1630#true} is VALID [2022-04-14 18:56:21,130 INFO L290 TraceCheckUtils]: 6: Hoare triple {1630#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-14 18:56:21,130 INFO L290 TraceCheckUtils]: 7: Hoare triple {1630#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,131 INFO L290 TraceCheckUtils]: 8: Hoare triple {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,131 INFO L290 TraceCheckUtils]: 9: Hoare triple {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,132 INFO L290 TraceCheckUtils]: 10: Hoare triple {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,133 INFO L290 TraceCheckUtils]: 11: Hoare triple {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,133 INFO L290 TraceCheckUtils]: 12: Hoare triple {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,133 INFO L290 TraceCheckUtils]: 13: Hoare triple {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,134 INFO L290 TraceCheckUtils]: 14: Hoare triple {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,134 INFO L290 TraceCheckUtils]: 15: Hoare triple {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1690#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (= main_~i~0 (+ (- 1) main_~MAX~0)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,135 INFO L290 TraceCheckUtils]: 16: Hoare triple {1690#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (= main_~i~0 (+ (- 1) main_~MAX~0)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1694#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 (+ (- 1) main_~MAX~0)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,135 INFO L290 TraceCheckUtils]: 17: Hoare triple {1694#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 (+ (- 1) main_~MAX~0)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1698#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (= (+ (- 1) main_~MAX~0) (+ main_~i~0 1)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,136 INFO L290 TraceCheckUtils]: 18: Hoare triple {1698#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (= (+ (- 1) main_~MAX~0) (+ main_~i~0 1)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1702#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (= (+ (- 1) main_~MAX~0) (+ main_~i~0 1)) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,136 INFO L290 TraceCheckUtils]: 19: Hoare triple {1702#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (= (+ (- 1) main_~MAX~0) (+ main_~i~0 1)) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1706#(and (<= 2 main_~MAX~0) (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= main_~MAX~0 (+ main_~i~0 3)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,137 INFO L290 TraceCheckUtils]: 20: Hoare triple {1706#(and (<= 2 main_~MAX~0) (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= main_~MAX~0 (+ main_~i~0 3)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {1710#(and (<= 2 main_~MAX~0) (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< main_~MAX~0 3) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,138 INFO L290 TraceCheckUtils]: 21: Hoare triple {1710#(and (<= 2 main_~MAX~0) (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< main_~MAX~0 3) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1714#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= 1 main_~j~0) (= |main_~#str1~0.offset| 0) (< main_~j~0 2) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,138 INFO L290 TraceCheckUtils]: 22: Hoare triple {1714#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= 1 main_~j~0) (= |main_~#str1~0.offset| 0) (< main_~j~0 2) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {1718#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-14 18:56:21,139 INFO L272 TraceCheckUtils]: 23: Hoare triple {1718#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {1722#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 18:56:21,139 INFO L290 TraceCheckUtils]: 24: Hoare triple {1722#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1726#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 18:56:21,139 INFO L290 TraceCheckUtils]: 25: Hoare triple {1726#(<= 1 __VERIFIER_assert_~cond)} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1631#false} is VALID [2022-04-14 18:56:21,139 INFO L290 TraceCheckUtils]: 26: Hoare triple {1631#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1631#false} is VALID [2022-04-14 18:56:21,140 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-14 18:56:21,140 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 18:56:21,350 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-14 18:56:21,351 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 26 [2022-04-14 18:56:21,381 INFO L356 Elim1Store]: treesize reduction 4, result has 63.6 percent of original size [2022-04-14 18:56:21,382 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 29 [2022-04-14 18:56:21,412 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2022-04-14 18:56:21,579 INFO L290 TraceCheckUtils]: 26: Hoare triple {1631#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1631#false} is VALID [2022-04-14 18:56:21,580 INFO L290 TraceCheckUtils]: 25: Hoare triple {1726#(<= 1 __VERIFIER_assert_~cond)} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1631#false} is VALID [2022-04-14 18:56:21,580 INFO L290 TraceCheckUtils]: 24: Hoare triple {1722#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1726#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 18:56:21,581 INFO L272 TraceCheckUtils]: 23: Hoare triple {1718#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {1722#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 18:56:21,581 INFO L290 TraceCheckUtils]: 22: Hoare triple {1745#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {1718#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-14 18:56:21,582 INFO L290 TraceCheckUtils]: 21: Hoare triple {1749#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1745#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-14 18:56:21,582 INFO L290 TraceCheckUtils]: 20: Hoare triple {1753#(or (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|))) (<= 0 main_~i~0))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {1749#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is VALID [2022-04-14 18:56:21,583 INFO L290 TraceCheckUtils]: 19: Hoare triple {1757#(or (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|))) (<= 1 main_~i~0))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1753#(or (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|))) (<= 0 main_~i~0))} is VALID [2022-04-14 18:56:21,583 INFO L290 TraceCheckUtils]: 18: Hoare triple {1761#(or (not (<= 0 main_~i~0)) (<= 1 main_~i~0) (= main_~MAX~0 (+ main_~j~0 1)))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1757#(or (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|))) (<= 1 main_~i~0))} is VALID [2022-04-14 18:56:21,584 INFO L290 TraceCheckUtils]: 17: Hoare triple {1765#(or (<= 2 main_~i~0) (not (<= 1 main_~i~0)) (= main_~MAX~0 (+ main_~j~0 1)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1761#(or (not (<= 0 main_~i~0)) (<= 1 main_~i~0) (= main_~MAX~0 (+ main_~j~0 1)))} is VALID [2022-04-14 18:56:21,584 INFO L290 TraceCheckUtils]: 16: Hoare triple {1769#(or (<= 2 main_~i~0) (= main_~MAX~0 (+ main_~j~0 2)) (not (<= 1 main_~i~0)))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1765#(or (<= 2 main_~i~0) (not (<= 1 main_~i~0)) (= main_~MAX~0 (+ main_~j~0 1)))} is VALID [2022-04-14 18:56:21,585 INFO L290 TraceCheckUtils]: 15: Hoare triple {1630#true} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1769#(or (<= 2 main_~i~0) (= main_~MAX~0 (+ main_~j~0 2)) (not (<= 1 main_~i~0)))} is VALID [2022-04-14 18:56:21,585 INFO L290 TraceCheckUtils]: 14: Hoare triple {1630#true} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-14 18:56:21,585 INFO L290 TraceCheckUtils]: 13: Hoare triple {1630#true} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1630#true} is VALID [2022-04-14 18:56:21,585 INFO L290 TraceCheckUtils]: 12: Hoare triple {1630#true} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1630#true} is VALID [2022-04-14 18:56:21,585 INFO L290 TraceCheckUtils]: 11: Hoare triple {1630#true} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1630#true} is VALID [2022-04-14 18:56:21,585 INFO L290 TraceCheckUtils]: 10: Hoare triple {1630#true} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1630#true} is VALID [2022-04-14 18:56:21,586 INFO L290 TraceCheckUtils]: 9: Hoare triple {1630#true} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1630#true} is VALID [2022-04-14 18:56:21,586 INFO L290 TraceCheckUtils]: 8: Hoare triple {1630#true} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1630#true} is VALID [2022-04-14 18:56:21,586 INFO L290 TraceCheckUtils]: 7: Hoare triple {1630#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {1630#true} is VALID [2022-04-14 18:56:21,586 INFO L290 TraceCheckUtils]: 6: Hoare triple {1630#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-14 18:56:21,586 INFO L290 TraceCheckUtils]: 5: Hoare triple {1630#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {1630#true} is VALID [2022-04-14 18:56:21,586 INFO L272 TraceCheckUtils]: 4: Hoare triple {1630#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-14 18:56:21,586 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1630#true} {1630#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-14 18:56:21,586 INFO L290 TraceCheckUtils]: 2: Hoare triple {1630#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-14 18:56:21,587 INFO L290 TraceCheckUtils]: 1: Hoare triple {1630#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1630#true} is VALID [2022-04-14 18:56:21,587 INFO L272 TraceCheckUtils]: 0: Hoare triple {1630#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-14 18:56:21,587 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-14 18:56:21,587 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [816436395] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 18:56:21,587 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 18:56:21,587 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 13, 12] total 26 [2022-04-14 18:56:21,587 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1014528405] [2022-04-14 18:56:21,588 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 18:56:21,588 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-14 18:56:21,589 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 18:56:21,589 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:21,643 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:21,643 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-14 18:56:21,644 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 18:56:21,644 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-14 18:56:21,644 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=556, Unknown=0, NotChecked=0, Total=650 [2022-04-14 18:56:21,645 INFO L87 Difference]: Start difference. First operand 46 states and 51 transitions. Second operand has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:25,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:25,354 INFO L93 Difference]: Finished difference Result 114 states and 130 transitions. [2022-04-14 18:56:25,354 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2022-04-14 18:56:25,354 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-14 18:56:25,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 18:56:25,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:25,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 124 transitions. [2022-04-14 18:56:25,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:25,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 124 transitions. [2022-04-14 18:56:25,367 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 52 states and 124 transitions. [2022-04-14 18:56:25,501 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 124 edges. 124 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:25,505 INFO L225 Difference]: With dead ends: 114 [2022-04-14 18:56:25,505 INFO L226 Difference]: Without dead ends: 111 [2022-04-14 18:56:25,506 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1387 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=935, Invalid=4615, Unknown=0, NotChecked=0, Total=5550 [2022-04-14 18:56:25,507 INFO L913 BasicCegarLoop]: 20 mSDtfsCounter, 119 mSDsluCounter, 59 mSDsCounter, 0 mSdLazyCounter, 918 mSolverCounterSat, 252 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 119 SdHoareTripleChecker+Valid, 79 SdHoareTripleChecker+Invalid, 1170 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 252 IncrementalHoareTripleChecker+Valid, 918 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-04-14 18:56:25,507 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [119 Valid, 79 Invalid, 1170 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [252 Valid, 918 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-04-14 18:56:25,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2022-04-14 18:56:25,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 71. [2022-04-14 18:56:25,512 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 18:56:25,513 INFO L82 GeneralOperation]: Start isEquivalent. First operand 111 states. Second operand has 71 states, 59 states have (on average 1.1694915254237288) internal successors, (69), 62 states have internal predecessors, (69), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-14 18:56:25,513 INFO L74 IsIncluded]: Start isIncluded. First operand 111 states. Second operand has 71 states, 59 states have (on average 1.1694915254237288) internal successors, (69), 62 states have internal predecessors, (69), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-14 18:56:25,513 INFO L87 Difference]: Start difference. First operand 111 states. Second operand has 71 states, 59 states have (on average 1.1694915254237288) internal successors, (69), 62 states have internal predecessors, (69), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-14 18:56:25,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:25,517 INFO L93 Difference]: Finished difference Result 111 states and 127 transitions. [2022-04-14 18:56:25,517 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 127 transitions. [2022-04-14 18:56:25,518 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:25,518 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:25,518 INFO L74 IsIncluded]: Start isIncluded. First operand has 71 states, 59 states have (on average 1.1694915254237288) internal successors, (69), 62 states have internal predecessors, (69), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 111 states. [2022-04-14 18:56:25,518 INFO L87 Difference]: Start difference. First operand has 71 states, 59 states have (on average 1.1694915254237288) internal successors, (69), 62 states have internal predecessors, (69), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 111 states. [2022-04-14 18:56:25,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:25,525 INFO L93 Difference]: Finished difference Result 111 states and 127 transitions. [2022-04-14 18:56:25,525 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 127 transitions. [2022-04-14 18:56:25,525 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:25,525 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:25,526 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 18:56:25,526 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 18:56:25,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 71 states, 59 states have (on average 1.1694915254237288) internal successors, (69), 62 states have internal predecessors, (69), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-14 18:56:25,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 81 transitions. [2022-04-14 18:56:25,528 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 81 transitions. Word has length 27 [2022-04-14 18:56:25,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 18:56:25,530 INFO L478 AbstractCegarLoop]: Abstraction has 71 states and 81 transitions. [2022-04-14 18:56:25,530 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:25,530 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 81 transitions. [2022-04-14 18:56:25,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-14 18:56:25,530 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 18:56:25,531 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 18:56:25,555 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-14 18:56:25,753 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:25,754 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 18:56:25,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 18:56:25,754 INFO L85 PathProgramCache]: Analyzing trace with hash -468461934, now seen corresponding path program 1 times [2022-04-14 18:56:25,754 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 18:56:25,754 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2132562756] [2022-04-14 18:56:25,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:25,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 18:56:25,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:25,838 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 18:56:25,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:25,843 INFO L290 TraceCheckUtils]: 0: Hoare triple {2343#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2329#true} is VALID [2022-04-14 18:56:25,843 INFO L290 TraceCheckUtils]: 1: Hoare triple {2329#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:25,843 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2329#true} {2329#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:25,843 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 17 [2022-04-14 18:56:25,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:25,852 INFO L290 TraceCheckUtils]: 0: Hoare triple {2329#true} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2329#true} is VALID [2022-04-14 18:56:25,853 INFO L290 TraceCheckUtils]: 1: Hoare triple {2329#true} [106] L7-->L7-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:25,853 INFO L290 TraceCheckUtils]: 2: Hoare triple {2329#true} [109] L7-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:25,854 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2329#true} {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} [112] __VERIFIER_assertEXIT-->L36-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} is VALID [2022-04-14 18:56:25,855 INFO L272 TraceCheckUtils]: 0: Hoare triple {2329#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2343#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 18:56:25,855 INFO L290 TraceCheckUtils]: 1: Hoare triple {2343#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2329#true} is VALID [2022-04-14 18:56:25,858 INFO L290 TraceCheckUtils]: 2: Hoare triple {2329#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:25,858 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2329#true} {2329#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:25,858 INFO L272 TraceCheckUtils]: 4: Hoare triple {2329#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:25,859 INFO L290 TraceCheckUtils]: 5: Hoare triple {2329#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {2329#true} is VALID [2022-04-14 18:56:25,859 INFO L290 TraceCheckUtils]: 6: Hoare triple {2329#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:25,859 INFO L290 TraceCheckUtils]: 7: Hoare triple {2329#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {2334#(= main_~i~0 0)} is VALID [2022-04-14 18:56:25,860 INFO L290 TraceCheckUtils]: 8: Hoare triple {2334#(= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2334#(= main_~i~0 0)} is VALID [2022-04-14 18:56:25,860 INFO L290 TraceCheckUtils]: 9: Hoare triple {2334#(= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2335#(<= main_~i~0 1)} is VALID [2022-04-14 18:56:25,860 INFO L290 TraceCheckUtils]: 10: Hoare triple {2335#(<= main_~i~0 1)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-14 18:56:25,861 INFO L290 TraceCheckUtils]: 11: Hoare triple {2336#(<= main_~MAX~0 1)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-14 18:56:25,861 INFO L290 TraceCheckUtils]: 12: Hoare triple {2336#(<= main_~MAX~0 1)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-14 18:56:25,861 INFO L290 TraceCheckUtils]: 13: Hoare triple {2336#(<= main_~MAX~0 1)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-14 18:56:25,862 INFO L290 TraceCheckUtils]: 14: Hoare triple {2336#(<= main_~MAX~0 1)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-14 18:56:25,862 INFO L290 TraceCheckUtils]: 15: Hoare triple {2336#(<= main_~MAX~0 1)} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} is VALID [2022-04-14 18:56:25,863 INFO L290 TraceCheckUtils]: 16: Hoare triple {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} is VALID [2022-04-14 18:56:25,863 INFO L272 TraceCheckUtils]: 17: Hoare triple {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2329#true} is VALID [2022-04-14 18:56:25,863 INFO L290 TraceCheckUtils]: 18: Hoare triple {2329#true} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2329#true} is VALID [2022-04-14 18:56:25,863 INFO L290 TraceCheckUtils]: 19: Hoare triple {2329#true} [106] L7-->L7-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:25,863 INFO L290 TraceCheckUtils]: 20: Hoare triple {2329#true} [109] L7-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:25,864 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {2329#true} {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} [112] __VERIFIER_assertEXIT-->L36-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} is VALID [2022-04-14 18:56:25,864 INFO L290 TraceCheckUtils]: 22: Hoare triple {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} [102] L36-1-->L35-2: Formula: (= (+ v_main_~j~0_4 1) v_main_~j~0_5) InVars {main_~j~0=v_main_~j~0_5} OutVars{main_#t~mem12=|v_main_#t~mem12_3|, main_#t~post13=|v_main_#t~post13_1|, main_~j~0=v_main_~j~0_4, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem12, main_~j~0, main_#t~mem11, main_#t~post13] {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} is VALID [2022-04-14 18:56:25,865 INFO L290 TraceCheckUtils]: 23: Hoare triple {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} [104] L35-2-->L35-3: Formula: (= v_main_~i~0_10 (+ v_main_~i~0_11 1)) InVars {main_~i~0=v_main_~i~0_11} OutVars{main_~i~0=v_main_~i~0_10, main_#t~post10=|v_main_#t~post10_1|} AuxVars[] AssignedVars[main_#t~post10, main_~i~0] {2342#(<= main_~MAX~0 main_~i~0)} is VALID [2022-04-14 18:56:25,865 INFO L290 TraceCheckUtils]: 24: Hoare triple {2342#(<= main_~MAX~0 main_~i~0)} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2330#false} is VALID [2022-04-14 18:56:25,865 INFO L272 TraceCheckUtils]: 25: Hoare triple {2330#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2330#false} is VALID [2022-04-14 18:56:25,865 INFO L290 TraceCheckUtils]: 26: Hoare triple {2330#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2330#false} is VALID [2022-04-14 18:56:25,865 INFO L290 TraceCheckUtils]: 27: Hoare triple {2330#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2330#false} is VALID [2022-04-14 18:56:25,866 INFO L290 TraceCheckUtils]: 28: Hoare triple {2330#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2330#false} is VALID [2022-04-14 18:56:25,866 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 18:56:25,866 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 18:56:25,866 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2132562756] [2022-04-14 18:56:25,866 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2132562756] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 18:56:25,866 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [573051702] [2022-04-14 18:56:25,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:25,867 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:25,867 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 18:56:25,868 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 18:56:25,894 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-14 18:56:25,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:25,924 INFO L263 TraceCheckSpWp]: Trace formula consists of 138 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-14 18:56:25,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:25,942 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 18:56:26,144 INFO L272 TraceCheckUtils]: 0: Hoare triple {2329#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:26,144 INFO L290 TraceCheckUtils]: 1: Hoare triple {2329#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2329#true} is VALID [2022-04-14 18:56:26,144 INFO L290 TraceCheckUtils]: 2: Hoare triple {2329#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:26,144 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2329#true} {2329#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:26,144 INFO L272 TraceCheckUtils]: 4: Hoare triple {2329#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:26,144 INFO L290 TraceCheckUtils]: 5: Hoare triple {2329#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {2329#true} is VALID [2022-04-14 18:56:26,145 INFO L290 TraceCheckUtils]: 6: Hoare triple {2329#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:26,149 INFO L290 TraceCheckUtils]: 7: Hoare triple {2329#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {2368#(<= main_~i~0 0)} is VALID [2022-04-14 18:56:26,149 INFO L290 TraceCheckUtils]: 8: Hoare triple {2368#(<= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2368#(<= main_~i~0 0)} is VALID [2022-04-14 18:56:26,149 INFO L290 TraceCheckUtils]: 9: Hoare triple {2368#(<= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2335#(<= main_~i~0 1)} is VALID [2022-04-14 18:56:26,150 INFO L290 TraceCheckUtils]: 10: Hoare triple {2335#(<= main_~i~0 1)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-14 18:56:26,150 INFO L290 TraceCheckUtils]: 11: Hoare triple {2336#(<= main_~MAX~0 1)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-14 18:56:26,151 INFO L290 TraceCheckUtils]: 12: Hoare triple {2336#(<= main_~MAX~0 1)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-14 18:56:26,151 INFO L290 TraceCheckUtils]: 13: Hoare triple {2336#(<= main_~MAX~0 1)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-14 18:56:26,151 INFO L290 TraceCheckUtils]: 14: Hoare triple {2336#(<= main_~MAX~0 1)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-14 18:56:26,152 INFO L290 TraceCheckUtils]: 15: Hoare triple {2336#(<= main_~MAX~0 1)} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2393#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} is VALID [2022-04-14 18:56:26,152 INFO L290 TraceCheckUtils]: 16: Hoare triple {2393#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2393#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} is VALID [2022-04-14 18:56:26,153 INFO L272 TraceCheckUtils]: 17: Hoare triple {2393#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2329#true} is VALID [2022-04-14 18:56:26,153 INFO L290 TraceCheckUtils]: 18: Hoare triple {2329#true} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2329#true} is VALID [2022-04-14 18:56:26,153 INFO L290 TraceCheckUtils]: 19: Hoare triple {2329#true} [106] L7-->L7-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:26,153 INFO L290 TraceCheckUtils]: 20: Hoare triple {2329#true} [109] L7-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:26,153 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {2329#true} {2393#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} [112] __VERIFIER_assertEXIT-->L36-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2393#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} is VALID [2022-04-14 18:56:26,154 INFO L290 TraceCheckUtils]: 22: Hoare triple {2393#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} [102] L36-1-->L35-2: Formula: (= (+ v_main_~j~0_4 1) v_main_~j~0_5) InVars {main_~j~0=v_main_~j~0_5} OutVars{main_#t~mem12=|v_main_#t~mem12_3|, main_#t~post13=|v_main_#t~post13_1|, main_~j~0=v_main_~j~0_4, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem12, main_~j~0, main_#t~mem11, main_#t~post13] {2393#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} is VALID [2022-04-14 18:56:26,154 INFO L290 TraceCheckUtils]: 23: Hoare triple {2393#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} [104] L35-2-->L35-3: Formula: (= v_main_~i~0_10 (+ v_main_~i~0_11 1)) InVars {main_~i~0=v_main_~i~0_11} OutVars{main_~i~0=v_main_~i~0_10, main_#t~post10=|v_main_#t~post10_1|} AuxVars[] AssignedVars[main_#t~post10, main_~i~0] {2418#(and (<= main_~MAX~0 1) (<= 1 main_~i~0))} is VALID [2022-04-14 18:56:26,155 INFO L290 TraceCheckUtils]: 24: Hoare triple {2418#(and (<= main_~MAX~0 1) (<= 1 main_~i~0))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2330#false} is VALID [2022-04-14 18:56:26,155 INFO L272 TraceCheckUtils]: 25: Hoare triple {2330#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2330#false} is VALID [2022-04-14 18:56:26,155 INFO L290 TraceCheckUtils]: 26: Hoare triple {2330#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2330#false} is VALID [2022-04-14 18:56:26,155 INFO L290 TraceCheckUtils]: 27: Hoare triple {2330#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2330#false} is VALID [2022-04-14 18:56:26,156 INFO L290 TraceCheckUtils]: 28: Hoare triple {2330#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2330#false} is VALID [2022-04-14 18:56:26,156 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 18:56:26,156 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 18:56:26,294 INFO L290 TraceCheckUtils]: 28: Hoare triple {2330#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2330#false} is VALID [2022-04-14 18:56:26,294 INFO L290 TraceCheckUtils]: 27: Hoare triple {2330#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2330#false} is VALID [2022-04-14 18:56:26,294 INFO L290 TraceCheckUtils]: 26: Hoare triple {2330#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2330#false} is VALID [2022-04-14 18:56:26,295 INFO L272 TraceCheckUtils]: 25: Hoare triple {2330#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2330#false} is VALID [2022-04-14 18:56:26,295 INFO L290 TraceCheckUtils]: 24: Hoare triple {2342#(<= main_~MAX~0 main_~i~0)} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2330#false} is VALID [2022-04-14 18:56:26,296 INFO L290 TraceCheckUtils]: 23: Hoare triple {2449#(<= main_~MAX~0 (+ main_~i~0 1))} [104] L35-2-->L35-3: Formula: (= v_main_~i~0_10 (+ v_main_~i~0_11 1)) InVars {main_~i~0=v_main_~i~0_11} OutVars{main_~i~0=v_main_~i~0_10, main_#t~post10=|v_main_#t~post10_1|} AuxVars[] AssignedVars[main_#t~post10, main_~i~0] {2342#(<= main_~MAX~0 main_~i~0)} is VALID [2022-04-14 18:56:26,296 INFO L290 TraceCheckUtils]: 22: Hoare triple {2449#(<= main_~MAX~0 (+ main_~i~0 1))} [102] L36-1-->L35-2: Formula: (= (+ v_main_~j~0_4 1) v_main_~j~0_5) InVars {main_~j~0=v_main_~j~0_5} OutVars{main_#t~mem12=|v_main_#t~mem12_3|, main_#t~post13=|v_main_#t~post13_1|, main_~j~0=v_main_~j~0_4, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem12, main_~j~0, main_#t~mem11, main_#t~post13] {2449#(<= main_~MAX~0 (+ main_~i~0 1))} is VALID [2022-04-14 18:56:26,297 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {2329#true} {2449#(<= main_~MAX~0 (+ main_~i~0 1))} [112] __VERIFIER_assertEXIT-->L36-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2449#(<= main_~MAX~0 (+ main_~i~0 1))} is VALID [2022-04-14 18:56:26,297 INFO L290 TraceCheckUtils]: 20: Hoare triple {2329#true} [109] L7-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:26,297 INFO L290 TraceCheckUtils]: 19: Hoare triple {2329#true} [106] L7-->L7-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:26,297 INFO L290 TraceCheckUtils]: 18: Hoare triple {2329#true} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2329#true} is VALID [2022-04-14 18:56:26,297 INFO L272 TraceCheckUtils]: 17: Hoare triple {2449#(<= main_~MAX~0 (+ main_~i~0 1))} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2329#true} is VALID [2022-04-14 18:56:26,298 INFO L290 TraceCheckUtils]: 16: Hoare triple {2449#(<= main_~MAX~0 (+ main_~i~0 1))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2449#(<= main_~MAX~0 (+ main_~i~0 1))} is VALID [2022-04-14 18:56:26,298 INFO L290 TraceCheckUtils]: 15: Hoare triple {2336#(<= main_~MAX~0 1)} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2449#(<= main_~MAX~0 (+ main_~i~0 1))} is VALID [2022-04-14 18:56:26,299 INFO L290 TraceCheckUtils]: 14: Hoare triple {2336#(<= main_~MAX~0 1)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-14 18:56:26,299 INFO L290 TraceCheckUtils]: 13: Hoare triple {2336#(<= main_~MAX~0 1)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-14 18:56:26,299 INFO L290 TraceCheckUtils]: 12: Hoare triple {2336#(<= main_~MAX~0 1)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-14 18:56:26,300 INFO L290 TraceCheckUtils]: 11: Hoare triple {2336#(<= main_~MAX~0 1)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-14 18:56:26,300 INFO L290 TraceCheckUtils]: 10: Hoare triple {2335#(<= main_~i~0 1)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-14 18:56:26,301 INFO L290 TraceCheckUtils]: 9: Hoare triple {2368#(<= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2335#(<= main_~i~0 1)} is VALID [2022-04-14 18:56:26,301 INFO L290 TraceCheckUtils]: 8: Hoare triple {2368#(<= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2368#(<= main_~i~0 0)} is VALID [2022-04-14 18:56:26,302 INFO L290 TraceCheckUtils]: 7: Hoare triple {2329#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {2368#(<= main_~i~0 0)} is VALID [2022-04-14 18:56:26,302 INFO L290 TraceCheckUtils]: 6: Hoare triple {2329#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:26,302 INFO L290 TraceCheckUtils]: 5: Hoare triple {2329#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {2329#true} is VALID [2022-04-14 18:56:26,302 INFO L272 TraceCheckUtils]: 4: Hoare triple {2329#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:26,302 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2329#true} {2329#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:26,302 INFO L290 TraceCheckUtils]: 2: Hoare triple {2329#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:26,303 INFO L290 TraceCheckUtils]: 1: Hoare triple {2329#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2329#true} is VALID [2022-04-14 18:56:26,303 INFO L272 TraceCheckUtils]: 0: Hoare triple {2329#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-14 18:56:26,303 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 18:56:26,303 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [573051702] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 18:56:26,303 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 18:56:26,303 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 12 [2022-04-14 18:56:26,303 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [116682892] [2022-04-14 18:56:26,303 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 18:56:26,304 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 29 [2022-04-14 18:56:26,304 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 18:56:26,304 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-14 18:56:26,338 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:26,338 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-14 18:56:26,338 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 18:56:26,339 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-14 18:56:26,339 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2022-04-14 18:56:26,339 INFO L87 Difference]: Start difference. First operand 71 states and 81 transitions. Second operand has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-14 18:56:26,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:26,691 INFO L93 Difference]: Finished difference Result 100 states and 116 transitions. [2022-04-14 18:56:26,691 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-14 18:56:26,691 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 29 [2022-04-14 18:56:26,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 18:56:26,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-14 18:56:26,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 55 transitions. [2022-04-14 18:56:26,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-14 18:56:26,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 55 transitions. [2022-04-14 18:56:26,694 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 55 transitions. [2022-04-14 18:56:26,751 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:26,752 INFO L225 Difference]: With dead ends: 100 [2022-04-14 18:56:26,753 INFO L226 Difference]: Without dead ends: 75 [2022-04-14 18:56:26,753 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 57 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=123, Invalid=339, Unknown=0, NotChecked=0, Total=462 [2022-04-14 18:56:26,754 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 57 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 116 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 58 SdHoareTripleChecker+Valid, 37 SdHoareTripleChecker+Invalid, 171 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 116 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 18:56:26,754 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [58 Valid, 37 Invalid, 171 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [55 Valid, 116 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 18:56:26,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2022-04-14 18:56:26,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 67. [2022-04-14 18:56:26,758 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 18:56:26,758 INFO L82 GeneralOperation]: Start isEquivalent. First operand 75 states. Second operand has 67 states, 55 states have (on average 1.1454545454545455) internal successors, (63), 58 states have internal predecessors, (63), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-14 18:56:26,758 INFO L74 IsIncluded]: Start isIncluded. First operand 75 states. Second operand has 67 states, 55 states have (on average 1.1454545454545455) internal successors, (63), 58 states have internal predecessors, (63), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-14 18:56:26,759 INFO L87 Difference]: Start difference. First operand 75 states. Second operand has 67 states, 55 states have (on average 1.1454545454545455) internal successors, (63), 58 states have internal predecessors, (63), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-14 18:56:26,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:26,762 INFO L93 Difference]: Finished difference Result 75 states and 85 transitions. [2022-04-14 18:56:26,762 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 85 transitions. [2022-04-14 18:56:26,762 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:26,762 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:26,762 INFO L74 IsIncluded]: Start isIncluded. First operand has 67 states, 55 states have (on average 1.1454545454545455) internal successors, (63), 58 states have internal predecessors, (63), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 75 states. [2022-04-14 18:56:26,763 INFO L87 Difference]: Start difference. First operand has 67 states, 55 states have (on average 1.1454545454545455) internal successors, (63), 58 states have internal predecessors, (63), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 75 states. [2022-04-14 18:56:26,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:26,765 INFO L93 Difference]: Finished difference Result 75 states and 85 transitions. [2022-04-14 18:56:26,765 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 85 transitions. [2022-04-14 18:56:26,766 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:26,766 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:26,766 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 18:56:26,766 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 18:56:26,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 55 states have (on average 1.1454545454545455) internal successors, (63), 58 states have internal predecessors, (63), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-14 18:56:26,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 75 transitions. [2022-04-14 18:56:26,768 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 75 transitions. Word has length 29 [2022-04-14 18:56:26,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 18:56:26,768 INFO L478 AbstractCegarLoop]: Abstraction has 67 states and 75 transitions. [2022-04-14 18:56:26,769 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-14 18:56:26,769 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 75 transitions. [2022-04-14 18:56:26,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-14 18:56:26,769 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 18:56:26,769 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 18:56:26,796 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-14 18:56:26,983 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:26,983 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 18:56:26,984 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 18:56:26,984 INFO L85 PathProgramCache]: Analyzing trace with hash -812414670, now seen corresponding path program 5 times [2022-04-14 18:56:26,984 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 18:56:26,984 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1839989469] [2022-04-14 18:56:26,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:26,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 18:56:27,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:27,094 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 18:56:27,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:27,099 INFO L290 TraceCheckUtils]: 0: Hoare triple {2870#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2858#true} is VALID [2022-04-14 18:56:27,099 INFO L290 TraceCheckUtils]: 1: Hoare triple {2858#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-14 18:56:27,099 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2858#true} {2858#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-14 18:56:27,100 INFO L272 TraceCheckUtils]: 0: Hoare triple {2858#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2870#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 18:56:27,100 INFO L290 TraceCheckUtils]: 1: Hoare triple {2870#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2858#true} is VALID [2022-04-14 18:56:27,100 INFO L290 TraceCheckUtils]: 2: Hoare triple {2858#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-14 18:56:27,100 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2858#true} {2858#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-14 18:56:27,100 INFO L272 TraceCheckUtils]: 4: Hoare triple {2858#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-14 18:56:27,100 INFO L290 TraceCheckUtils]: 5: Hoare triple {2858#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {2858#true} is VALID [2022-04-14 18:56:27,100 INFO L290 TraceCheckUtils]: 6: Hoare triple {2858#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-14 18:56:27,101 INFO L290 TraceCheckUtils]: 7: Hoare triple {2858#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {2863#(= main_~i~0 0)} is VALID [2022-04-14 18:56:27,101 INFO L290 TraceCheckUtils]: 8: Hoare triple {2863#(= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2863#(= main_~i~0 0)} is VALID [2022-04-14 18:56:27,101 INFO L290 TraceCheckUtils]: 9: Hoare triple {2863#(= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2864#(<= main_~i~0 1)} is VALID [2022-04-14 18:56:27,102 INFO L290 TraceCheckUtils]: 10: Hoare triple {2864#(<= main_~i~0 1)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2864#(<= main_~i~0 1)} is VALID [2022-04-14 18:56:27,102 INFO L290 TraceCheckUtils]: 11: Hoare triple {2864#(<= main_~i~0 1)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2865#(<= main_~i~0 2)} is VALID [2022-04-14 18:56:27,102 INFO L290 TraceCheckUtils]: 12: Hoare triple {2865#(<= main_~i~0 2)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2865#(<= main_~i~0 2)} is VALID [2022-04-14 18:56:27,103 INFO L290 TraceCheckUtils]: 13: Hoare triple {2865#(<= main_~i~0 2)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2866#(<= main_~i~0 3)} is VALID [2022-04-14 18:56:27,103 INFO L290 TraceCheckUtils]: 14: Hoare triple {2866#(<= main_~i~0 3)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {2867#(<= main_~MAX~0 3)} is VALID [2022-04-14 18:56:27,104 INFO L290 TraceCheckUtils]: 15: Hoare triple {2867#(<= main_~MAX~0 3)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2865#(<= main_~i~0 2)} is VALID [2022-04-14 18:56:27,104 INFO L290 TraceCheckUtils]: 16: Hoare triple {2865#(<= main_~i~0 2)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2865#(<= main_~i~0 2)} is VALID [2022-04-14 18:56:27,105 INFO L290 TraceCheckUtils]: 17: Hoare triple {2865#(<= main_~i~0 2)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2864#(<= main_~i~0 1)} is VALID [2022-04-14 18:56:27,105 INFO L290 TraceCheckUtils]: 18: Hoare triple {2864#(<= main_~i~0 1)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2864#(<= main_~i~0 1)} is VALID [2022-04-14 18:56:27,106 INFO L290 TraceCheckUtils]: 19: Hoare triple {2864#(<= main_~i~0 1)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2868#(<= main_~i~0 0)} is VALID [2022-04-14 18:56:27,106 INFO L290 TraceCheckUtils]: 20: Hoare triple {2868#(<= main_~i~0 0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2868#(<= main_~i~0 0)} is VALID [2022-04-14 18:56:27,106 INFO L290 TraceCheckUtils]: 21: Hoare triple {2868#(<= main_~i~0 0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2869#(<= (+ main_~i~0 1) 0)} is VALID [2022-04-14 18:56:27,107 INFO L290 TraceCheckUtils]: 22: Hoare triple {2869#(<= (+ main_~i~0 1) 0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2859#false} is VALID [2022-04-14 18:56:27,107 INFO L290 TraceCheckUtils]: 23: Hoare triple {2859#false} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2859#false} is VALID [2022-04-14 18:56:27,107 INFO L290 TraceCheckUtils]: 24: Hoare triple {2859#false} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {2859#false} is VALID [2022-04-14 18:56:27,107 INFO L290 TraceCheckUtils]: 25: Hoare triple {2859#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2859#false} is VALID [2022-04-14 18:56:27,107 INFO L290 TraceCheckUtils]: 26: Hoare triple {2859#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2859#false} is VALID [2022-04-14 18:56:27,108 INFO L272 TraceCheckUtils]: 27: Hoare triple {2859#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2859#false} is VALID [2022-04-14 18:56:27,108 INFO L290 TraceCheckUtils]: 28: Hoare triple {2859#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2859#false} is VALID [2022-04-14 18:56:27,108 INFO L290 TraceCheckUtils]: 29: Hoare triple {2859#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2859#false} is VALID [2022-04-14 18:56:27,108 INFO L290 TraceCheckUtils]: 30: Hoare triple {2859#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2859#false} is VALID [2022-04-14 18:56:27,108 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 16 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 18:56:27,108 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 18:56:27,108 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1839989469] [2022-04-14 18:56:27,108 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1839989469] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 18:56:27,109 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [23725580] [2022-04-14 18:56:27,109 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-14 18:56:27,109 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:27,109 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 18:56:27,111 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 18:56:27,140 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-14 18:56:27,198 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2022-04-14 18:56:27,199 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-14 18:56:27,200 INFO L263 TraceCheckSpWp]: Trace formula consists of 165 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-14 18:56:27,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:27,212 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 18:56:27,355 INFO L272 TraceCheckUtils]: 0: Hoare triple {2858#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-14 18:56:27,356 INFO L290 TraceCheckUtils]: 1: Hoare triple {2858#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2858#true} is VALID [2022-04-14 18:56:27,356 INFO L290 TraceCheckUtils]: 2: Hoare triple {2858#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-14 18:56:27,356 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2858#true} {2858#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-14 18:56:27,356 INFO L272 TraceCheckUtils]: 4: Hoare triple {2858#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-14 18:56:27,356 INFO L290 TraceCheckUtils]: 5: Hoare triple {2858#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {2858#true} is VALID [2022-04-14 18:56:27,356 INFO L290 TraceCheckUtils]: 6: Hoare triple {2858#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-14 18:56:27,357 INFO L290 TraceCheckUtils]: 7: Hoare triple {2858#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {2868#(<= main_~i~0 0)} is VALID [2022-04-14 18:56:27,357 INFO L290 TraceCheckUtils]: 8: Hoare triple {2868#(<= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2868#(<= main_~i~0 0)} is VALID [2022-04-14 18:56:27,360 INFO L290 TraceCheckUtils]: 9: Hoare triple {2868#(<= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2864#(<= main_~i~0 1)} is VALID [2022-04-14 18:56:27,361 INFO L290 TraceCheckUtils]: 10: Hoare triple {2864#(<= main_~i~0 1)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2864#(<= main_~i~0 1)} is VALID [2022-04-14 18:56:27,363 INFO L290 TraceCheckUtils]: 11: Hoare triple {2864#(<= main_~i~0 1)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2865#(<= main_~i~0 2)} is VALID [2022-04-14 18:56:27,363 INFO L290 TraceCheckUtils]: 12: Hoare triple {2865#(<= main_~i~0 2)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2865#(<= main_~i~0 2)} is VALID [2022-04-14 18:56:27,364 INFO L290 TraceCheckUtils]: 13: Hoare triple {2865#(<= main_~i~0 2)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2866#(<= main_~i~0 3)} is VALID [2022-04-14 18:56:27,364 INFO L290 TraceCheckUtils]: 14: Hoare triple {2866#(<= main_~i~0 3)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {2867#(<= main_~MAX~0 3)} is VALID [2022-04-14 18:56:27,365 INFO L290 TraceCheckUtils]: 15: Hoare triple {2867#(<= main_~MAX~0 3)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2865#(<= main_~i~0 2)} is VALID [2022-04-14 18:56:27,365 INFO L290 TraceCheckUtils]: 16: Hoare triple {2865#(<= main_~i~0 2)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2865#(<= main_~i~0 2)} is VALID [2022-04-14 18:56:27,366 INFO L290 TraceCheckUtils]: 17: Hoare triple {2865#(<= main_~i~0 2)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2864#(<= main_~i~0 1)} is VALID [2022-04-14 18:56:27,366 INFO L290 TraceCheckUtils]: 18: Hoare triple {2864#(<= main_~i~0 1)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2864#(<= main_~i~0 1)} is VALID [2022-04-14 18:56:27,366 INFO L290 TraceCheckUtils]: 19: Hoare triple {2864#(<= main_~i~0 1)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2868#(<= main_~i~0 0)} is VALID [2022-04-14 18:56:27,367 INFO L290 TraceCheckUtils]: 20: Hoare triple {2868#(<= main_~i~0 0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2868#(<= main_~i~0 0)} is VALID [2022-04-14 18:56:27,367 INFO L290 TraceCheckUtils]: 21: Hoare triple {2868#(<= main_~i~0 0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2869#(<= (+ main_~i~0 1) 0)} is VALID [2022-04-14 18:56:27,368 INFO L290 TraceCheckUtils]: 22: Hoare triple {2869#(<= (+ main_~i~0 1) 0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2859#false} is VALID [2022-04-14 18:56:27,368 INFO L290 TraceCheckUtils]: 23: Hoare triple {2859#false} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2859#false} is VALID [2022-04-14 18:56:27,368 INFO L290 TraceCheckUtils]: 24: Hoare triple {2859#false} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {2859#false} is VALID [2022-04-14 18:56:27,368 INFO L290 TraceCheckUtils]: 25: Hoare triple {2859#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2859#false} is VALID [2022-04-14 18:56:27,368 INFO L290 TraceCheckUtils]: 26: Hoare triple {2859#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2859#false} is VALID [2022-04-14 18:56:27,368 INFO L272 TraceCheckUtils]: 27: Hoare triple {2859#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2859#false} is VALID [2022-04-14 18:56:27,369 INFO L290 TraceCheckUtils]: 28: Hoare triple {2859#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2859#false} is VALID [2022-04-14 18:56:27,369 INFO L290 TraceCheckUtils]: 29: Hoare triple {2859#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2859#false} is VALID [2022-04-14 18:56:27,369 INFO L290 TraceCheckUtils]: 30: Hoare triple {2859#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2859#false} is VALID [2022-04-14 18:56:27,369 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 16 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 18:56:27,369 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 18:56:27,537 INFO L290 TraceCheckUtils]: 30: Hoare triple {2859#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2859#false} is VALID [2022-04-14 18:56:27,538 INFO L290 TraceCheckUtils]: 29: Hoare triple {2859#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2859#false} is VALID [2022-04-14 18:56:27,538 INFO L290 TraceCheckUtils]: 28: Hoare triple {2859#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2859#false} is VALID [2022-04-14 18:56:27,538 INFO L272 TraceCheckUtils]: 27: Hoare triple {2859#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2859#false} is VALID [2022-04-14 18:56:27,538 INFO L290 TraceCheckUtils]: 26: Hoare triple {2859#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2859#false} is VALID [2022-04-14 18:56:27,538 INFO L290 TraceCheckUtils]: 25: Hoare triple {2859#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2859#false} is VALID [2022-04-14 18:56:27,538 INFO L290 TraceCheckUtils]: 24: Hoare triple {2859#false} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {2859#false} is VALID [2022-04-14 18:56:27,538 INFO L290 TraceCheckUtils]: 23: Hoare triple {2859#false} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2859#false} is VALID [2022-04-14 18:56:27,539 INFO L290 TraceCheckUtils]: 22: Hoare triple {2869#(<= (+ main_~i~0 1) 0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2859#false} is VALID [2022-04-14 18:56:27,540 INFO L290 TraceCheckUtils]: 21: Hoare triple {2868#(<= main_~i~0 0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2869#(<= (+ main_~i~0 1) 0)} is VALID [2022-04-14 18:56:27,540 INFO L290 TraceCheckUtils]: 20: Hoare triple {2868#(<= main_~i~0 0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2868#(<= main_~i~0 0)} is VALID [2022-04-14 18:56:27,540 INFO L290 TraceCheckUtils]: 19: Hoare triple {2864#(<= main_~i~0 1)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2868#(<= main_~i~0 0)} is VALID [2022-04-14 18:56:27,541 INFO L290 TraceCheckUtils]: 18: Hoare triple {2864#(<= main_~i~0 1)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2864#(<= main_~i~0 1)} is VALID [2022-04-14 18:56:27,541 INFO L290 TraceCheckUtils]: 17: Hoare triple {2865#(<= main_~i~0 2)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2864#(<= main_~i~0 1)} is VALID [2022-04-14 18:56:27,542 INFO L290 TraceCheckUtils]: 16: Hoare triple {2865#(<= main_~i~0 2)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2865#(<= main_~i~0 2)} is VALID [2022-04-14 18:56:27,542 INFO L290 TraceCheckUtils]: 15: Hoare triple {2867#(<= main_~MAX~0 3)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2865#(<= main_~i~0 2)} is VALID [2022-04-14 18:56:27,543 INFO L290 TraceCheckUtils]: 14: Hoare triple {2866#(<= main_~i~0 3)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {2867#(<= main_~MAX~0 3)} is VALID [2022-04-14 18:56:27,543 INFO L290 TraceCheckUtils]: 13: Hoare triple {2865#(<= main_~i~0 2)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2866#(<= main_~i~0 3)} is VALID [2022-04-14 18:56:27,544 INFO L290 TraceCheckUtils]: 12: Hoare triple {2865#(<= main_~i~0 2)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2865#(<= main_~i~0 2)} is VALID [2022-04-14 18:56:27,544 INFO L290 TraceCheckUtils]: 11: Hoare triple {2864#(<= main_~i~0 1)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2865#(<= main_~i~0 2)} is VALID [2022-04-14 18:56:27,544 INFO L290 TraceCheckUtils]: 10: Hoare triple {2864#(<= main_~i~0 1)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2864#(<= main_~i~0 1)} is VALID [2022-04-14 18:56:27,545 INFO L290 TraceCheckUtils]: 9: Hoare triple {2868#(<= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2864#(<= main_~i~0 1)} is VALID [2022-04-14 18:56:27,545 INFO L290 TraceCheckUtils]: 8: Hoare triple {2868#(<= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2868#(<= main_~i~0 0)} is VALID [2022-04-14 18:56:27,546 INFO L290 TraceCheckUtils]: 7: Hoare triple {2858#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {2868#(<= main_~i~0 0)} is VALID [2022-04-14 18:56:27,546 INFO L290 TraceCheckUtils]: 6: Hoare triple {2858#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-14 18:56:27,546 INFO L290 TraceCheckUtils]: 5: Hoare triple {2858#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {2858#true} is VALID [2022-04-14 18:56:27,546 INFO L272 TraceCheckUtils]: 4: Hoare triple {2858#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-14 18:56:27,546 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2858#true} {2858#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-14 18:56:27,546 INFO L290 TraceCheckUtils]: 2: Hoare triple {2858#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-14 18:56:27,546 INFO L290 TraceCheckUtils]: 1: Hoare triple {2858#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2858#true} is VALID [2022-04-14 18:56:27,546 INFO L272 TraceCheckUtils]: 0: Hoare triple {2858#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-14 18:56:27,546 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 16 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 18:56:27,547 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [23725580] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 18:56:27,547 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 18:56:27,547 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 8] total 10 [2022-04-14 18:56:27,547 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1762168413] [2022-04-14 18:56:27,547 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 18:56:27,547 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-14 18:56:27,548 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 18:56:27,548 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:27,574 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:27,575 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-14 18:56:27,575 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 18:56:27,575 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-14 18:56:27,575 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2022-04-14 18:56:27,575 INFO L87 Difference]: Start difference. First operand 67 states and 75 transitions. Second operand has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:27,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:27,980 INFO L93 Difference]: Finished difference Result 106 states and 120 transitions. [2022-04-14 18:56:27,980 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-14 18:56:27,980 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-14 18:56:27,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 18:56:27,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:27,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 84 transitions. [2022-04-14 18:56:27,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:27,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 84 transitions. [2022-04-14 18:56:27,984 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 84 transitions. [2022-04-14 18:56:28,052 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 84 edges. 84 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:28,054 INFO L225 Difference]: With dead ends: 106 [2022-04-14 18:56:28,054 INFO L226 Difference]: Without dead ends: 106 [2022-04-14 18:56:28,054 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 65 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=146, Invalid=274, Unknown=0, NotChecked=0, Total=420 [2022-04-14 18:56:28,055 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 78 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 145 mSolverCounterSat, 72 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 79 SdHoareTripleChecker+Valid, 32 SdHoareTripleChecker+Invalid, 217 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 72 IncrementalHoareTripleChecker+Valid, 145 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-14 18:56:28,055 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [79 Valid, 32 Invalid, 217 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [72 Valid, 145 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-14 18:56:28,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2022-04-14 18:56:28,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 75. [2022-04-14 18:56:28,059 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 18:56:28,059 INFO L82 GeneralOperation]: Start isEquivalent. First operand 106 states. Second operand has 75 states, 63 states have (on average 1.1111111111111112) internal successors, (70), 66 states have internal predecessors, (70), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-14 18:56:28,059 INFO L74 IsIncluded]: Start isIncluded. First operand 106 states. Second operand has 75 states, 63 states have (on average 1.1111111111111112) internal successors, (70), 66 states have internal predecessors, (70), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-14 18:56:28,060 INFO L87 Difference]: Start difference. First operand 106 states. Second operand has 75 states, 63 states have (on average 1.1111111111111112) internal successors, (70), 66 states have internal predecessors, (70), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-14 18:56:28,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:28,063 INFO L93 Difference]: Finished difference Result 106 states and 120 transitions. [2022-04-14 18:56:28,063 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 120 transitions. [2022-04-14 18:56:28,063 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:28,063 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:28,064 INFO L74 IsIncluded]: Start isIncluded. First operand has 75 states, 63 states have (on average 1.1111111111111112) internal successors, (70), 66 states have internal predecessors, (70), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 106 states. [2022-04-14 18:56:28,064 INFO L87 Difference]: Start difference. First operand has 75 states, 63 states have (on average 1.1111111111111112) internal successors, (70), 66 states have internal predecessors, (70), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 106 states. [2022-04-14 18:56:28,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:28,067 INFO L93 Difference]: Finished difference Result 106 states and 120 transitions. [2022-04-14 18:56:28,067 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 120 transitions. [2022-04-14 18:56:28,068 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:28,068 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:28,068 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 18:56:28,068 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 18:56:28,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 63 states have (on average 1.1111111111111112) internal successors, (70), 66 states have internal predecessors, (70), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-14 18:56:28,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 82 transitions. [2022-04-14 18:56:28,070 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 82 transitions. Word has length 31 [2022-04-14 18:56:28,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 18:56:28,070 INFO L478 AbstractCegarLoop]: Abstraction has 75 states and 82 transitions. [2022-04-14 18:56:28,070 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:28,070 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 82 transitions. [2022-04-14 18:56:28,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-14 18:56:28,071 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 18:56:28,071 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 18:56:28,093 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2022-04-14 18:56:28,286 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:28,286 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 18:56:28,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 18:56:28,287 INFO L85 PathProgramCache]: Analyzing trace with hash -1779570578, now seen corresponding path program 2 times [2022-04-14 18:56:28,287 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 18:56:28,287 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1619975513] [2022-04-14 18:56:28,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:28,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 18:56:28,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-04-14 18:56:28,331 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-04-14 18:56:28,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-04-14 18:56:28,382 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-04-14 18:56:28,382 INFO L618 BasicCegarLoop]: Counterexample is feasible [2022-04-14 18:56:28,383 INFO L788 garLoopResultBuilder]: Registering result UNSAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-04-14 18:56:28,384 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-04-14 18:56:28,387 INFO L719 BasicCegarLoop]: Path program histogram: [5, 2, 1, 1, 1] [2022-04-14 18:56:28,389 INFO L177 ceAbstractionStarter]: Computing trace abstraction results [2022-04-14 18:56:28,426 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.04 06:56:28 BasicIcfg [2022-04-14 18:56:28,426 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-04-14 18:56:28,427 INFO L158 Benchmark]: Toolchain (without parser) took 23428.79ms. Allocated memory was 179.3MB in the beginning and 260.0MB in the end (delta: 80.7MB). Free memory was 129.4MB in the beginning and 127.8MB in the end (delta: 1.5MB). Peak memory consumption was 83.6MB. Max. memory is 8.0GB. [2022-04-14 18:56:28,427 INFO L158 Benchmark]: CDTParser took 0.16ms. Allocated memory is still 179.3MB. Free memory is still 146.2MB. There was no memory consumed. Max. memory is 8.0GB. [2022-04-14 18:56:28,428 INFO L158 Benchmark]: CACSL2BoogieTranslator took 258.80ms. Allocated memory is still 179.3MB. Free memory was 129.3MB in the beginning and 154.3MB in the end (delta: -25.0MB). Peak memory consumption was 9.0MB. Max. memory is 8.0GB. [2022-04-14 18:56:28,428 INFO L158 Benchmark]: Boogie Preprocessor took 47.03ms. Allocated memory is still 179.3MB. Free memory was 154.3MB in the beginning and 152.7MB in the end (delta: 1.6MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-04-14 18:56:28,428 INFO L158 Benchmark]: RCFGBuilder took 410.61ms. Allocated memory is still 179.3MB. Free memory was 152.7MB in the beginning and 139.1MB in the end (delta: 13.6MB). Peak memory consumption was 13.6MB. Max. memory is 8.0GB. [2022-04-14 18:56:28,428 INFO L158 Benchmark]: IcfgTransformer took 38.99ms. Allocated memory is still 179.3MB. Free memory was 139.1MB in the beginning and 137.5MB in the end (delta: 1.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2022-04-14 18:56:28,429 INFO L158 Benchmark]: TraceAbstraction took 22667.86ms. Allocated memory was 179.3MB in the beginning and 260.0MB in the end (delta: 80.7MB). Free memory was 137.0MB in the beginning and 127.8MB in the end (delta: 9.2MB). Peak memory consumption was 91.4MB. Max. memory is 8.0GB. [2022-04-14 18:56:28,430 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - AssertionsEnabledResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16ms. Allocated memory is still 179.3MB. Free memory is still 146.2MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 258.80ms. Allocated memory is still 179.3MB. Free memory was 129.3MB in the beginning and 154.3MB in the end (delta: -25.0MB). Peak memory consumption was 9.0MB. Max. memory is 8.0GB. * Boogie Preprocessor took 47.03ms. Allocated memory is still 179.3MB. Free memory was 154.3MB in the beginning and 152.7MB in the end (delta: 1.6MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 410.61ms. Allocated memory is still 179.3MB. Free memory was 152.7MB in the beginning and 139.1MB in the end (delta: 13.6MB). Peak memory consumption was 13.6MB. Max. memory is 8.0GB. * IcfgTransformer took 38.99ms. Allocated memory is still 179.3MB. Free memory was 139.1MB in the beginning and 137.5MB in the end (delta: 1.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * TraceAbstraction took 22667.86ms. Allocated memory was 179.3MB in the beginning and 260.0MB in the end (delta: 80.7MB). Free memory was 137.0MB in the beginning and 127.8MB in the end (delta: 9.2MB). Peak memory consumption was 91.4MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 8]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L16] int MAX = __VERIFIER_nondet_uint(); [L17] COND FALSE !(!(MAX > 0)) VAL [MAX=2] [L18] char str1[MAX], str2[MAX]; [L19] int cont, i, j; [L20] cont = 0 [L22] i=0 VAL [cont=0, i=0, MAX=2, str1={5:0}, str2={4:0}] [L22] COND TRUE i= 0 [L30] EXPR str1[0] [L30] str2[j] = str1[0] [L31] j++ VAL [cont=0, i=1, j=1, MAX=2, str1={5:0}, str2={4:0}] [L29] i-- VAL [cont=0, i=0, j=1, MAX=2, str1={5:0}, str2={4:0}] [L29] COND TRUE i >= 0 [L30] EXPR str1[0] [L30] str2[j] = str1[0] [L31] j++ VAL [cont=0, i=0, j=2, MAX=2, str1={5:0}, str2={4:0}] [L29] i-- VAL [cont=0, i=-1, j=2, MAX=2, str1={5:0}, str2={4:0}] [L29] COND FALSE !(i >= 0) VAL [cont=0, i=-1, j=2, MAX=2, str1={5:0}, str2={4:0}] [L34] j = MAX-1 [L35] i=0 VAL [cont=0, i=0, j=1, MAX=2, str1={5:0}, str2={4:0}] [L35] COND TRUE i