/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loops/invert_string-3.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-e106359-m [2022-04-14 18:56:04,261 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-14 18:56:04,263 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-14 18:56:04,302 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-14 18:56:04,302 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-14 18:56:04,303 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-14 18:56:04,305 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-14 18:56:04,307 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-14 18:56:04,308 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-14 18:56:04,311 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-14 18:56:04,311 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-14 18:56:04,312 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-14 18:56:04,312 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-14 18:56:04,312 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-14 18:56:04,313 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-14 18:56:04,313 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-14 18:56:04,314 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-14 18:56:04,314 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-14 18:56:04,315 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-14 18:56:04,316 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-14 18:56:04,317 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-14 18:56:04,319 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-14 18:56:04,321 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-14 18:56:04,323 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-14 18:56:04,324 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-14 18:56:04,330 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-14 18:56:04,335 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-14 18:56:04,335 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-14 18:56:04,340 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-14 18:56:04,341 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-14 18:56:04,352 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-14 18:56:04,352 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-14 18:56:04,353 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-14 18:56:04,353 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-14 18:56:04,353 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-14 18:56:04,354 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-14 18:56:04,354 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-14 18:56:04,354 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-14 18:56:04,354 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-14 18:56:04,354 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-14 18:56:04,355 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-14 18:56:04,355 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-14 18:56:04,355 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-14 18:56:04,355 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-14 18:56:04,355 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-14 18:56:04,355 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-14 18:56:04,355 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-14 18:56:04,355 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-14 18:56:04,355 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-14 18:56:04,355 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-14 18:56:04,356 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-14 18:56:04,356 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-14 18:56:04,356 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-14 18:56:04,550 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-14 18:56:04,567 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-14 18:56:04,569 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-14 18:56:04,570 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-14 18:56:04,570 INFO L275 PluginConnector]: CDTParser initialized [2022-04-14 18:56:04,571 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops/invert_string-3.c [2022-04-14 18:56:04,614 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/32878c772/ce68c6894999451496f01a6620545755/FLAG94a134b5a [2022-04-14 18:56:05,008 INFO L306 CDTParser]: Found 1 translation units. [2022-04-14 18:56:05,009 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops/invert_string-3.c [2022-04-14 18:56:05,012 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/32878c772/ce68c6894999451496f01a6620545755/FLAG94a134b5a [2022-04-14 18:56:05,023 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/32878c772/ce68c6894999451496f01a6620545755 [2022-04-14 18:56:05,025 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-14 18:56:05,027 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-14 18:56:05,044 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-14 18:56:05,046 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-14 18:56:05,049 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-14 18:56:05,050 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,050 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7f210f55 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05, skipping insertion in model container [2022-04-14 18:56:05,050 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,055 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-14 18:56:05,064 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-14 18:56:05,191 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops/invert_string-3.c[327,340] [2022-04-14 18:56:05,228 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-14 18:56:05,238 INFO L203 MainTranslator]: Completed pre-run [2022-04-14 18:56:05,246 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops/invert_string-3.c[327,340] [2022-04-14 18:56:05,262 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-14 18:56:05,270 INFO L208 MainTranslator]: Completed translation [2022-04-14 18:56:05,271 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05 WrapperNode [2022-04-14 18:56:05,271 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-14 18:56:05,271 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-14 18:56:05,272 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-14 18:56:05,272 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-14 18:56:05,279 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,279 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,289 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,289 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,303 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,307 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,310 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,311 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-14 18:56:05,312 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-14 18:56:05,312 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-14 18:56:05,312 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-14 18:56:05,315 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,320 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-14 18:56:05,327 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 18:56:05,349 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-14 18:56:05,367 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-14 18:56:05,376 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-14 18:56:05,376 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-14 18:56:05,376 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-14 18:56:05,377 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-14 18:56:05,377 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-14 18:56:05,377 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-14 18:56:05,377 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-14 18:56:05,377 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-14 18:56:05,377 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-14 18:56:05,378 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-14 18:56:05,378 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_char [2022-04-14 18:56:05,378 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-14 18:56:05,378 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-04-14 18:56:05,378 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-14 18:56:05,379 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-14 18:56:05,379 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-14 18:56:05,379 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-14 18:56:05,379 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-14 18:56:05,379 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-14 18:56:05,428 INFO L234 CfgBuilder]: Building ICFG [2022-04-14 18:56:05,429 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-14 18:56:05,599 INFO L275 CfgBuilder]: Performing block encoding [2022-04-14 18:56:05,603 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-14 18:56:05,603 INFO L299 CfgBuilder]: Removed 3 assume(true) statements. [2022-04-14 18:56:05,604 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 06:56:05 BoogieIcfgContainer [2022-04-14 18:56:05,604 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-14 18:56:05,605 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-14 18:56:05,605 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-14 18:56:05,606 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-14 18:56:05,608 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 06:56:05" (1/1) ... [2022-04-14 18:56:05,609 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-14 18:56:05,634 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 14.04 06:56:05 BasicIcfg [2022-04-14 18:56:05,634 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-14 18:56:05,635 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-14 18:56:05,635 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-14 18:56:05,637 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-14 18:56:05,637 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.04 06:56:05" (1/4) ... [2022-04-14 18:56:05,638 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@48566cbf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.04 06:56:05, skipping insertion in model container [2022-04-14 18:56:05,638 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 06:56:05" (2/4) ... [2022-04-14 18:56:05,638 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@48566cbf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.04 06:56:05, skipping insertion in model container [2022-04-14 18:56:05,638 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 06:56:05" (3/4) ... [2022-04-14 18:56:05,638 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@48566cbf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.04 06:56:05, skipping insertion in model container [2022-04-14 18:56:05,638 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 14.04 06:56:05" (4/4) ... [2022-04-14 18:56:05,639 INFO L111 eAbstractionObserver]: Analyzing ICFG invert_string-3.cJordan [2022-04-14 18:56:05,642 INFO L202 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-14 18:56:05,642 INFO L161 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-14 18:56:05,667 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-14 18:56:05,672 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-14 18:56:05,672 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-14 18:56:05,695 INFO L276 IsEmpty]: Start isEmpty. Operand has 27 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 20 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:05,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-14 18:56:05,699 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 18:56:05,699 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 18:56:05,699 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 18:56:05,702 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 18:56:05,702 INFO L85 PathProgramCache]: Analyzing trace with hash 677474136, now seen corresponding path program 1 times [2022-04-14 18:56:05,708 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 18:56:05,708 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1141439551] [2022-04-14 18:56:05,709 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:05,709 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 18:56:05,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:05,873 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 18:56:05,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:05,904 INFO L290 TraceCheckUtils]: 0: Hoare triple {35#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {30#true} is VALID [2022-04-14 18:56:05,904 INFO L290 TraceCheckUtils]: 1: Hoare triple {30#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#true} is VALID [2022-04-14 18:56:05,904 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30#true} {30#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#true} is VALID [2022-04-14 18:56:05,910 INFO L272 TraceCheckUtils]: 0: Hoare triple {30#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 18:56:05,911 INFO L290 TraceCheckUtils]: 1: Hoare triple {35#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {30#true} is VALID [2022-04-14 18:56:05,911 INFO L290 TraceCheckUtils]: 2: Hoare triple {30#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#true} is VALID [2022-04-14 18:56:05,911 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30#true} {30#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#true} is VALID [2022-04-14 18:56:05,912 INFO L272 TraceCheckUtils]: 4: Hoare triple {30#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#true} is VALID [2022-04-14 18:56:05,912 INFO L290 TraceCheckUtils]: 5: Hoare triple {30#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {30#true} is VALID [2022-04-14 18:56:05,913 INFO L290 TraceCheckUtils]: 6: Hoare triple {30#true} [76] L18-3-->L18-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {31#false} is VALID [2022-04-14 18:56:05,914 INFO L290 TraceCheckUtils]: 7: Hoare triple {31#false} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {31#false} is VALID [2022-04-14 18:56:05,914 INFO L290 TraceCheckUtils]: 8: Hoare triple {31#false} [81] L26-3-->L26-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {31#false} is VALID [2022-04-14 18:56:05,914 INFO L290 TraceCheckUtils]: 9: Hoare triple {31#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {31#false} is VALID [2022-04-14 18:56:05,916 INFO L290 TraceCheckUtils]: 10: Hoare triple {31#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {31#false} is VALID [2022-04-14 18:56:05,917 INFO L272 TraceCheckUtils]: 11: Hoare triple {31#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {31#false} is VALID [2022-04-14 18:56:05,917 INFO L290 TraceCheckUtils]: 12: Hoare triple {31#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {31#false} is VALID [2022-04-14 18:56:05,917 INFO L290 TraceCheckUtils]: 13: Hoare triple {31#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {31#false} is VALID [2022-04-14 18:56:05,917 INFO L290 TraceCheckUtils]: 14: Hoare triple {31#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31#false} is VALID [2022-04-14 18:56:05,918 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 18:56:05,918 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 18:56:05,918 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1141439551] [2022-04-14 18:56:05,919 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1141439551] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 18:56:05,919 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 18:56:05,919 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-14 18:56:05,920 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2033327521] [2022-04-14 18:56:05,920 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 18:56:05,926 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-14 18:56:05,927 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 18:56:05,930 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:05,949 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:05,949 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-14 18:56:05,949 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 18:56:05,967 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-14 18:56:05,967 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-14 18:56:05,970 INFO L87 Difference]: Start difference. First operand has 27 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 20 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:06,031 INFO L93 Difference]: Finished difference Result 27 states and 29 transitions. [2022-04-14 18:56:06,031 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-14 18:56:06,032 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-14 18:56:06,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 18:56:06,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 33 transitions. [2022-04-14 18:56:06,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 33 transitions. [2022-04-14 18:56:06,049 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 33 transitions. [2022-04-14 18:56:06,092 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:06,099 INFO L225 Difference]: With dead ends: 27 [2022-04-14 18:56:06,100 INFO L226 Difference]: Without dead ends: 22 [2022-04-14 18:56:06,101 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-14 18:56:06,105 INFO L913 BasicCegarLoop]: 28 mSDtfsCounter, 20 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 18:56:06,106 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [21 Valid, 31 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-14 18:56:06,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-14 18:56:06,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2022-04-14 18:56:06,125 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 18:56:06,126 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 22 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:06,127 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 22 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:06,127 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 22 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:06,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:06,135 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2022-04-14 18:56:06,135 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2022-04-14 18:56:06,136 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:06,136 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:06,137 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-14 18:56:06,137 INFO L87 Difference]: Start difference. First operand has 22 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-14 18:56:06,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:06,140 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2022-04-14 18:56:06,140 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2022-04-14 18:56:06,140 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:06,140 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:06,141 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 18:56:06,141 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 18:56:06,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:06,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 24 transitions. [2022-04-14 18:56:06,149 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 24 transitions. Word has length 15 [2022-04-14 18:56:06,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 18:56:06,150 INFO L478 AbstractCegarLoop]: Abstraction has 22 states and 24 transitions. [2022-04-14 18:56:06,150 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,150 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2022-04-14 18:56:06,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-14 18:56:06,151 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 18:56:06,151 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 18:56:06,151 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-14 18:56:06,151 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 18:56:06,152 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 18:56:06,152 INFO L85 PathProgramCache]: Analyzing trace with hash -242476646, now seen corresponding path program 1 times [2022-04-14 18:56:06,152 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 18:56:06,152 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1227630559] [2022-04-14 18:56:06,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:06,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 18:56:06,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:06,400 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 18:56:06,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:06,406 INFO L290 TraceCheckUtils]: 0: Hoare triple {138#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {131#true} is VALID [2022-04-14 18:56:06,406 INFO L290 TraceCheckUtils]: 1: Hoare triple {131#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {131#true} is VALID [2022-04-14 18:56:06,406 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {131#true} {131#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {131#true} is VALID [2022-04-14 18:56:06,407 INFO L272 TraceCheckUtils]: 0: Hoare triple {131#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {138#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 18:56:06,407 INFO L290 TraceCheckUtils]: 1: Hoare triple {138#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {131#true} is VALID [2022-04-14 18:56:06,407 INFO L290 TraceCheckUtils]: 2: Hoare triple {131#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {131#true} is VALID [2022-04-14 18:56:06,407 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {131#true} {131#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {131#true} is VALID [2022-04-14 18:56:06,407 INFO L272 TraceCheckUtils]: 4: Hoare triple {131#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {131#true} is VALID [2022-04-14 18:56:06,408 INFO L290 TraceCheckUtils]: 5: Hoare triple {131#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {136#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-14 18:56:06,409 INFO L290 TraceCheckUtils]: 6: Hoare triple {136#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {136#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-14 18:56:06,410 INFO L290 TraceCheckUtils]: 7: Hoare triple {136#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {137#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~max~0 4294967295) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} is VALID [2022-04-14 18:56:06,411 INFO L290 TraceCheckUtils]: 8: Hoare triple {137#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~max~0 4294967295) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {132#false} is VALID [2022-04-14 18:56:06,411 INFO L290 TraceCheckUtils]: 9: Hoare triple {132#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {132#false} is VALID [2022-04-14 18:56:06,412 INFO L290 TraceCheckUtils]: 10: Hoare triple {132#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {132#false} is VALID [2022-04-14 18:56:06,412 INFO L272 TraceCheckUtils]: 11: Hoare triple {132#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {132#false} is VALID [2022-04-14 18:56:06,412 INFO L290 TraceCheckUtils]: 12: Hoare triple {132#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {132#false} is VALID [2022-04-14 18:56:06,412 INFO L290 TraceCheckUtils]: 13: Hoare triple {132#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {132#false} is VALID [2022-04-14 18:56:06,412 INFO L290 TraceCheckUtils]: 14: Hoare triple {132#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {132#false} is VALID [2022-04-14 18:56:06,413 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 18:56:06,413 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 18:56:06,413 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1227630559] [2022-04-14 18:56:06,413 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1227630559] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 18:56:06,413 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 18:56:06,413 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-14 18:56:06,413 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1090877492] [2022-04-14 18:56:06,413 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 18:56:06,427 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-14 18:56:06,428 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 18:56:06,428 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,442 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:06,442 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-14 18:56:06,442 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 18:56:06,443 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-14 18:56:06,443 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-14 18:56:06,443 INFO L87 Difference]: Start difference. First operand 22 states and 24 transitions. Second operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:06,619 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2022-04-14 18:56:06,619 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-14 18:56:06,619 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-14 18:56:06,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 18:56:06,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 27 transitions. [2022-04-14 18:56:06,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 27 transitions. [2022-04-14 18:56:06,622 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 27 transitions. [2022-04-14 18:56:06,648 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:06,650 INFO L225 Difference]: With dead ends: 24 [2022-04-14 18:56:06,650 INFO L226 Difference]: Without dead ends: 24 [2022-04-14 18:56:06,653 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-04-14 18:56:06,655 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 30 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 18:56:06,656 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [30 Valid, 28 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 33 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 18:56:06,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2022-04-14 18:56:06,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 23. [2022-04-14 18:56:06,661 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 18:56:06,661 INFO L82 GeneralOperation]: Start isEquivalent. First operand 24 states. Second operand has 23 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:06,661 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand has 23 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:06,662 INFO L87 Difference]: Start difference. First operand 24 states. Second operand has 23 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:06,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:06,663 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2022-04-14 18:56:06,663 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2022-04-14 18:56:06,663 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:06,663 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:06,663 INFO L74 IsIncluded]: Start isIncluded. First operand has 23 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 24 states. [2022-04-14 18:56:06,664 INFO L87 Difference]: Start difference. First operand has 23 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 24 states. [2022-04-14 18:56:06,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:06,665 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2022-04-14 18:56:06,665 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2022-04-14 18:56:06,666 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:06,666 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:06,666 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 18:56:06,666 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 18:56:06,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:06,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 25 transitions. [2022-04-14 18:56:06,670 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 25 transitions. Word has length 15 [2022-04-14 18:56:06,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 18:56:06,671 INFO L478 AbstractCegarLoop]: Abstraction has 23 states and 25 transitions. [2022-04-14 18:56:06,671 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,671 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 25 transitions. [2022-04-14 18:56:06,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-14 18:56:06,671 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 18:56:06,672 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 18:56:06,672 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-14 18:56:06,672 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 18:56:06,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 18:56:06,672 INFO L85 PathProgramCache]: Analyzing trace with hash 1931903288, now seen corresponding path program 1 times [2022-04-14 18:56:06,673 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 18:56:06,673 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [728496964] [2022-04-14 18:56:06,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:06,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 18:56:06,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:06,767 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 18:56:06,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:06,773 INFO L290 TraceCheckUtils]: 0: Hoare triple {246#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {240#true} is VALID [2022-04-14 18:56:06,773 INFO L290 TraceCheckUtils]: 1: Hoare triple {240#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-14 18:56:06,773 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {240#true} {240#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-14 18:56:06,774 INFO L272 TraceCheckUtils]: 0: Hoare triple {240#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {246#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 18:56:06,774 INFO L290 TraceCheckUtils]: 1: Hoare triple {246#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {240#true} is VALID [2022-04-14 18:56:06,774 INFO L290 TraceCheckUtils]: 2: Hoare triple {240#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-14 18:56:06,774 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {240#true} {240#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-14 18:56:06,775 INFO L272 TraceCheckUtils]: 4: Hoare triple {240#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-14 18:56:06,775 INFO L290 TraceCheckUtils]: 5: Hoare triple {240#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {245#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)) (= main_~i~0 0))} is VALID [2022-04-14 18:56:06,776 INFO L290 TraceCheckUtils]: 6: Hoare triple {245#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)) (= main_~i~0 0))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {241#false} is VALID [2022-04-14 18:56:06,776 INFO L290 TraceCheckUtils]: 7: Hoare triple {241#false} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {241#false} is VALID [2022-04-14 18:56:06,777 INFO L290 TraceCheckUtils]: 8: Hoare triple {241#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {241#false} is VALID [2022-04-14 18:56:06,777 INFO L290 TraceCheckUtils]: 9: Hoare triple {241#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {241#false} is VALID [2022-04-14 18:56:06,777 INFO L290 TraceCheckUtils]: 10: Hoare triple {241#false} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {241#false} is VALID [2022-04-14 18:56:06,777 INFO L290 TraceCheckUtils]: 11: Hoare triple {241#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {241#false} is VALID [2022-04-14 18:56:06,777 INFO L290 TraceCheckUtils]: 12: Hoare triple {241#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {241#false} is VALID [2022-04-14 18:56:06,778 INFO L272 TraceCheckUtils]: 13: Hoare triple {241#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {241#false} is VALID [2022-04-14 18:56:06,778 INFO L290 TraceCheckUtils]: 14: Hoare triple {241#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {241#false} is VALID [2022-04-14 18:56:06,778 INFO L290 TraceCheckUtils]: 15: Hoare triple {241#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {241#false} is VALID [2022-04-14 18:56:06,778 INFO L290 TraceCheckUtils]: 16: Hoare triple {241#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241#false} is VALID [2022-04-14 18:56:06,778 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 18:56:06,778 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 18:56:06,779 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [728496964] [2022-04-14 18:56:06,779 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [728496964] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 18:56:06,779 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 18:56:06,779 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 18:56:06,779 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [53766522] [2022-04-14 18:56:06,779 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 18:56:06,780 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 18:56:06,780 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 18:56:06,780 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,792 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:06,792 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 18:56:06,792 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 18:56:06,792 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 18:56:06,792 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 18:56:06,793 INFO L87 Difference]: Start difference. First operand 23 states and 25 transitions. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:06,869 INFO L93 Difference]: Finished difference Result 25 states and 27 transitions. [2022-04-14 18:56:06,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 18:56:06,870 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-14 18:56:06,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 18:56:06,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 27 transitions. [2022-04-14 18:56:06,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 27 transitions. [2022-04-14 18:56:06,872 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 27 transitions. [2022-04-14 18:56:06,895 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:06,896 INFO L225 Difference]: With dead ends: 25 [2022-04-14 18:56:06,896 INFO L226 Difference]: Without dead ends: 25 [2022-04-14 18:56:06,897 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 18:56:06,897 INFO L913 BasicCegarLoop]: 21 mSDtfsCounter, 19 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 18:56:06,898 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [20 Valid, 28 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-14 18:56:06,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2022-04-14 18:56:06,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 24. [2022-04-14 18:56:06,899 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 18:56:06,900 INFO L82 GeneralOperation]: Start isEquivalent. First operand 25 states. Second operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:06,900 INFO L74 IsIncluded]: Start isIncluded. First operand 25 states. Second operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:06,900 INFO L87 Difference]: Start difference. First operand 25 states. Second operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:06,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:06,901 INFO L93 Difference]: Finished difference Result 25 states and 27 transitions. [2022-04-14 18:56:06,901 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 27 transitions. [2022-04-14 18:56:06,902 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:06,902 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:06,902 INFO L74 IsIncluded]: Start isIncluded. First operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 25 states. [2022-04-14 18:56:06,902 INFO L87 Difference]: Start difference. First operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 25 states. [2022-04-14 18:56:06,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:06,903 INFO L93 Difference]: Finished difference Result 25 states and 27 transitions. [2022-04-14 18:56:06,903 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 27 transitions. [2022-04-14 18:56:06,904 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:06,904 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:06,904 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 18:56:06,904 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 18:56:06,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 18:56:06,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 26 transitions. [2022-04-14 18:56:06,905 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 26 transitions. Word has length 17 [2022-04-14 18:56:06,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 18:56:06,905 INFO L478 AbstractCegarLoop]: Abstraction has 24 states and 26 transitions. [2022-04-14 18:56:06,905 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:06,906 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2022-04-14 18:56:06,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-14 18:56:06,906 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 18:56:06,906 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 18:56:06,906 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-14 18:56:06,906 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 18:56:06,907 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 18:56:06,907 INFO L85 PathProgramCache]: Analyzing trace with hash -1226486282, now seen corresponding path program 1 times [2022-04-14 18:56:06,907 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 18:56:06,907 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1224474326] [2022-04-14 18:56:06,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:06,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 18:56:06,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:07,018 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 18:56:07,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:07,023 INFO L290 TraceCheckUtils]: 0: Hoare triple {358#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {350#true} is VALID [2022-04-14 18:56:07,023 INFO L290 TraceCheckUtils]: 1: Hoare triple {350#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-14 18:56:07,023 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {350#true} {350#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-14 18:56:07,024 INFO L272 TraceCheckUtils]: 0: Hoare triple {350#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {358#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 18:56:07,024 INFO L290 TraceCheckUtils]: 1: Hoare triple {358#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {350#true} is VALID [2022-04-14 18:56:07,024 INFO L290 TraceCheckUtils]: 2: Hoare triple {350#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-14 18:56:07,024 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {350#true} {350#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-14 18:56:07,024 INFO L272 TraceCheckUtils]: 4: Hoare triple {350#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-14 18:56:07,025 INFO L290 TraceCheckUtils]: 5: Hoare triple {350#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {355#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= main_~i~0 0))} is VALID [2022-04-14 18:56:07,026 INFO L290 TraceCheckUtils]: 6: Hoare triple {355#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= main_~i~0 0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {356#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) 0) (= main_~i~0 0))} is VALID [2022-04-14 18:56:07,026 INFO L290 TraceCheckUtils]: 7: Hoare triple {356#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) 0) (= main_~i~0 0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {357#(and (<= (+ main_~i~0 4) main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)))} is VALID [2022-04-14 18:56:07,027 INFO L290 TraceCheckUtils]: 8: Hoare triple {357#(and (<= (+ main_~i~0 4) main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {351#false} is VALID [2022-04-14 18:56:07,027 INFO L290 TraceCheckUtils]: 9: Hoare triple {351#false} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {351#false} is VALID [2022-04-14 18:56:07,028 INFO L290 TraceCheckUtils]: 10: Hoare triple {351#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {351#false} is VALID [2022-04-14 18:56:07,028 INFO L290 TraceCheckUtils]: 11: Hoare triple {351#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {351#false} is VALID [2022-04-14 18:56:07,028 INFO L290 TraceCheckUtils]: 12: Hoare triple {351#false} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {351#false} is VALID [2022-04-14 18:56:07,028 INFO L290 TraceCheckUtils]: 13: Hoare triple {351#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {351#false} is VALID [2022-04-14 18:56:07,028 INFO L290 TraceCheckUtils]: 14: Hoare triple {351#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {351#false} is VALID [2022-04-14 18:56:07,028 INFO L272 TraceCheckUtils]: 15: Hoare triple {351#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {351#false} is VALID [2022-04-14 18:56:07,028 INFO L290 TraceCheckUtils]: 16: Hoare triple {351#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {351#false} is VALID [2022-04-14 18:56:07,029 INFO L290 TraceCheckUtils]: 17: Hoare triple {351#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {351#false} is VALID [2022-04-14 18:56:07,029 INFO L290 TraceCheckUtils]: 18: Hoare triple {351#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {351#false} is VALID [2022-04-14 18:56:07,029 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 18:56:07,029 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 18:56:07,029 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1224474326] [2022-04-14 18:56:07,029 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1224474326] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 18:56:07,030 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2053807780] [2022-04-14 18:56:07,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:07,030 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:07,030 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 18:56:07,044 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 18:56:07,045 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-14 18:56:07,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:07,092 INFO L263 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 32 conjunts are in the unsatisfiable core [2022-04-14 18:56:07,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:07,110 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 18:56:07,156 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-14 18:56:07,252 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 49 [2022-04-14 18:56:07,260 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 14 [2022-04-14 18:56:07,265 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2022-04-14 18:56:07,334 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2022-04-14 18:56:07,879 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-14 18:56:07,880 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-14 18:56:07,881 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 10 [2022-04-14 18:56:07,980 INFO L272 TraceCheckUtils]: 0: Hoare triple {350#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-14 18:56:07,980 INFO L290 TraceCheckUtils]: 1: Hoare triple {350#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {350#true} is VALID [2022-04-14 18:56:07,980 INFO L290 TraceCheckUtils]: 2: Hoare triple {350#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-14 18:56:07,982 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {350#true} {350#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-14 18:56:07,983 INFO L272 TraceCheckUtils]: 4: Hoare triple {350#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-14 18:56:07,984 INFO L290 TraceCheckUtils]: 5: Hoare triple {350#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {377#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:07,984 INFO L290 TraceCheckUtils]: 6: Hoare triple {377#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {377#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:07,985 INFO L290 TraceCheckUtils]: 7: Hoare triple {377#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {377#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:07,985 INFO L290 TraceCheckUtils]: 8: Hoare triple {377#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {377#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:07,988 INFO L290 TraceCheckUtils]: 9: Hoare triple {377#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {390#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-14 18:56:07,989 INFO L290 TraceCheckUtils]: 10: Hoare triple {390#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {394#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:07,990 INFO L290 TraceCheckUtils]: 11: Hoare triple {394#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {398#(and (= |main_~#str2~0.offset| 0) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:07,993 INFO L290 TraceCheckUtils]: 12: Hoare triple {398#(and (= |main_~#str2~0.offset| 0) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {402#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (mod (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-14 18:56:07,994 INFO L290 TraceCheckUtils]: 13: Hoare triple {402#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (mod (+ main_~max~0 4294967295) 4294967296) 1))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {406#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< (mod main_~j~0 4294967296) 1) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|)))} is VALID [2022-04-14 18:56:07,999 INFO L290 TraceCheckUtils]: 14: Hoare triple {406#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< (mod main_~j~0 4294967296) 1) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {410#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-14 18:56:08,000 INFO L272 TraceCheckUtils]: 15: Hoare triple {410#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {414#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 18:56:08,000 INFO L290 TraceCheckUtils]: 16: Hoare triple {414#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {418#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 18:56:08,001 INFO L290 TraceCheckUtils]: 17: Hoare triple {418#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {351#false} is VALID [2022-04-14 18:56:08,001 INFO L290 TraceCheckUtils]: 18: Hoare triple {351#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {351#false} is VALID [2022-04-14 18:56:08,001 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 18:56:08,002 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 18:56:08,384 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-04-14 18:56:08,384 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 330 treesize of output 1 [2022-04-14 18:56:08,405 INFO L290 TraceCheckUtils]: 18: Hoare triple {351#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {351#false} is VALID [2022-04-14 18:56:08,405 INFO L290 TraceCheckUtils]: 17: Hoare triple {418#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {351#false} is VALID [2022-04-14 18:56:08,406 INFO L290 TraceCheckUtils]: 16: Hoare triple {414#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {418#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 18:56:08,407 INFO L272 TraceCheckUtils]: 15: Hoare triple {410#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {414#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 18:56:08,408 INFO L290 TraceCheckUtils]: 14: Hoare triple {437#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {410#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-14 18:56:08,410 INFO L290 TraceCheckUtils]: 13: Hoare triple {441#(and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {437#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-14 18:56:08,410 INFO L290 TraceCheckUtils]: 12: Hoare triple {445#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 0 main_~i~0))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {441#(and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))))} is VALID [2022-04-14 18:56:08,413 INFO L290 TraceCheckUtils]: 11: Hoare triple {449#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {445#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 0 main_~i~0))} is VALID [2022-04-14 18:56:08,416 INFO L290 TraceCheckUtils]: 10: Hoare triple {453#(or (not (<= 0 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))) |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))) |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {449#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} is VALID [2022-04-14 18:56:08,417 INFO L290 TraceCheckUtils]: 9: Hoare triple {350#true} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {453#(or (not (<= 0 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))) |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))) |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} is VALID [2022-04-14 18:56:08,417 INFO L290 TraceCheckUtils]: 8: Hoare triple {350#true} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-14 18:56:08,417 INFO L290 TraceCheckUtils]: 7: Hoare triple {350#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {350#true} is VALID [2022-04-14 18:56:08,418 INFO L290 TraceCheckUtils]: 6: Hoare triple {350#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {350#true} is VALID [2022-04-14 18:56:08,418 INFO L290 TraceCheckUtils]: 5: Hoare triple {350#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {350#true} is VALID [2022-04-14 18:56:08,418 INFO L272 TraceCheckUtils]: 4: Hoare triple {350#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-14 18:56:08,418 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {350#true} {350#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-14 18:56:08,418 INFO L290 TraceCheckUtils]: 2: Hoare triple {350#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-14 18:56:08,418 INFO L290 TraceCheckUtils]: 1: Hoare triple {350#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {350#true} is VALID [2022-04-14 18:56:08,418 INFO L272 TraceCheckUtils]: 0: Hoare triple {350#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-14 18:56:08,419 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-14 18:56:08,419 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2053807780] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 18:56:08,419 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 18:56:08,419 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 11, 10] total 20 [2022-04-14 18:56:08,419 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1588718007] [2022-04-14 18:56:08,419 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 18:56:08,420 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 19 states have (on average 2.0) internal successors, (38), 18 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 18:56:08,420 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 18:56:08,420 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 19 states have (on average 2.0) internal successors, (38), 18 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:08,451 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:08,451 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-14 18:56:08,452 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 18:56:08,452 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-14 18:56:08,452 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=316, Unknown=0, NotChecked=0, Total=380 [2022-04-14 18:56:08,452 INFO L87 Difference]: Start difference. First operand 24 states and 26 transitions. Second operand has 20 states, 19 states have (on average 2.0) internal successors, (38), 18 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:09,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:09,993 INFO L93 Difference]: Finished difference Result 46 states and 51 transitions. [2022-04-14 18:56:09,993 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-04-14 18:56:09,993 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 19 states have (on average 2.0) internal successors, (38), 18 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-14 18:56:09,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 18:56:09,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 19 states have (on average 2.0) internal successors, (38), 18 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:09,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 53 transitions. [2022-04-14 18:56:09,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 19 states have (on average 2.0) internal successors, (38), 18 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:09,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 53 transitions. [2022-04-14 18:56:09,998 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 20 states and 53 transitions. [2022-04-14 18:56:10,060 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:10,061 INFO L225 Difference]: With dead ends: 46 [2022-04-14 18:56:10,061 INFO L226 Difference]: Without dead ends: 46 [2022-04-14 18:56:10,062 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 27 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 233 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=259, Invalid=1073, Unknown=0, NotChecked=0, Total=1332 [2022-04-14 18:56:10,062 INFO L913 BasicCegarLoop]: 10 mSDtfsCounter, 43 mSDsluCounter, 56 mSDsCounter, 0 mSdLazyCounter, 292 mSolverCounterSat, 72 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 43 SdHoareTripleChecker+Valid, 66 SdHoareTripleChecker+Invalid, 364 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 72 IncrementalHoareTripleChecker+Valid, 292 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-14 18:56:10,063 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [43 Valid, 66 Invalid, 364 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [72 Valid, 292 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-14 18:56:10,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2022-04-14 18:56:10,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 35. [2022-04-14 18:56:10,066 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 18:56:10,066 INFO L82 GeneralOperation]: Start isEquivalent. First operand 46 states. Second operand has 35 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 28 states have internal predecessors, (31), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:10,066 INFO L74 IsIncluded]: Start isIncluded. First operand 46 states. Second operand has 35 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 28 states have internal predecessors, (31), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:10,066 INFO L87 Difference]: Start difference. First operand 46 states. Second operand has 35 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 28 states have internal predecessors, (31), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:10,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:10,069 INFO L93 Difference]: Finished difference Result 46 states and 51 transitions. [2022-04-14 18:56:10,069 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 51 transitions. [2022-04-14 18:56:10,069 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:10,069 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:10,069 INFO L74 IsIncluded]: Start isIncluded. First operand has 35 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 28 states have internal predecessors, (31), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 46 states. [2022-04-14 18:56:10,070 INFO L87 Difference]: Start difference. First operand has 35 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 28 states have internal predecessors, (31), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 46 states. [2022-04-14 18:56:10,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:10,071 INFO L93 Difference]: Finished difference Result 46 states and 51 transitions. [2022-04-14 18:56:10,071 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 51 transitions. [2022-04-14 18:56:10,072 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:10,072 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:10,072 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 18:56:10,072 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 18:56:10,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 28 states have internal predecessors, (31), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:10,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 38 transitions. [2022-04-14 18:56:10,073 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 38 transitions. Word has length 19 [2022-04-14 18:56:10,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 18:56:10,073 INFO L478 AbstractCegarLoop]: Abstraction has 35 states and 38 transitions. [2022-04-14 18:56:10,074 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 19 states have (on average 2.0) internal successors, (38), 18 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:10,074 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 38 transitions. [2022-04-14 18:56:10,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-14 18:56:10,075 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 18:56:10,075 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 18:56:10,094 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-14 18:56:10,291 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:10,292 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 18:56:10,292 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 18:56:10,292 INFO L85 PathProgramCache]: Analyzing trace with hash -1057862574, now seen corresponding path program 2 times [2022-04-14 18:56:10,292 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 18:56:10,292 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1178948666] [2022-04-14 18:56:10,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:10,292 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 18:56:10,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:10,453 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 18:56:10,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:10,460 INFO L290 TraceCheckUtils]: 0: Hoare triple {705#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {695#true} is VALID [2022-04-14 18:56:10,460 INFO L290 TraceCheckUtils]: 1: Hoare triple {695#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-14 18:56:10,460 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {695#true} {695#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-14 18:56:10,461 INFO L272 TraceCheckUtils]: 0: Hoare triple {695#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {705#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 18:56:10,462 INFO L290 TraceCheckUtils]: 1: Hoare triple {705#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {695#true} is VALID [2022-04-14 18:56:10,462 INFO L290 TraceCheckUtils]: 2: Hoare triple {695#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-14 18:56:10,462 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {695#true} {695#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-14 18:56:10,462 INFO L272 TraceCheckUtils]: 4: Hoare triple {695#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-14 18:56:10,462 INFO L290 TraceCheckUtils]: 5: Hoare triple {695#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-14 18:56:10,463 INFO L290 TraceCheckUtils]: 6: Hoare triple {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-14 18:56:10,463 INFO L290 TraceCheckUtils]: 7: Hoare triple {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-14 18:56:10,464 INFO L290 TraceCheckUtils]: 8: Hoare triple {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-14 18:56:10,464 INFO L290 TraceCheckUtils]: 9: Hoare triple {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-14 18:56:10,465 INFO L290 TraceCheckUtils]: 10: Hoare triple {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-14 18:56:10,466 INFO L290 TraceCheckUtils]: 11: Hoare triple {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {701#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-14 18:56:10,467 INFO L290 TraceCheckUtils]: 12: Hoare triple {701#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {701#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-14 18:56:10,467 INFO L290 TraceCheckUtils]: 13: Hoare triple {701#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {702#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} is VALID [2022-04-14 18:56:10,468 INFO L290 TraceCheckUtils]: 14: Hoare triple {702#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {703#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} is VALID [2022-04-14 18:56:10,469 INFO L290 TraceCheckUtils]: 15: Hoare triple {703#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {704#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} is VALID [2022-04-14 18:56:10,469 INFO L290 TraceCheckUtils]: 16: Hoare triple {704#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {696#false} is VALID [2022-04-14 18:56:10,469 INFO L290 TraceCheckUtils]: 17: Hoare triple {696#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {696#false} is VALID [2022-04-14 18:56:10,469 INFO L290 TraceCheckUtils]: 18: Hoare triple {696#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {696#false} is VALID [2022-04-14 18:56:10,469 INFO L272 TraceCheckUtils]: 19: Hoare triple {696#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {696#false} is VALID [2022-04-14 18:56:10,469 INFO L290 TraceCheckUtils]: 20: Hoare triple {696#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {696#false} is VALID [2022-04-14 18:56:10,470 INFO L290 TraceCheckUtils]: 21: Hoare triple {696#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {696#false} is VALID [2022-04-14 18:56:10,470 INFO L290 TraceCheckUtils]: 22: Hoare triple {696#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {696#false} is VALID [2022-04-14 18:56:10,470 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-14 18:56:10,470 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 18:56:10,470 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1178948666] [2022-04-14 18:56:10,470 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1178948666] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 18:56:10,470 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [131382186] [2022-04-14 18:56:10,470 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-14 18:56:10,470 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:10,470 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 18:56:10,486 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 18:56:10,491 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-14 18:56:10,540 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-14 18:56:10,540 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-14 18:56:10,541 INFO L263 TraceCheckSpWp]: Trace formula consists of 135 conjuncts, 34 conjunts are in the unsatisfiable core [2022-04-14 18:56:10,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:10,552 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 18:56:10,567 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-14 18:56:10,778 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2022-04-14 18:56:12,492 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-14 18:56:12,496 INFO L356 Elim1Store]: treesize reduction 12, result has 20.0 percent of original size [2022-04-14 18:56:12,496 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 37 treesize of output 13 [2022-04-14 18:56:12,847 INFO L272 TraceCheckUtils]: 0: Hoare triple {695#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-14 18:56:12,847 INFO L290 TraceCheckUtils]: 1: Hoare triple {695#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {695#true} is VALID [2022-04-14 18:56:12,847 INFO L290 TraceCheckUtils]: 2: Hoare triple {695#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-14 18:56:12,847 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {695#true} {695#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-14 18:56:12,847 INFO L272 TraceCheckUtils]: 4: Hoare triple {695#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-14 18:56:12,848 INFO L290 TraceCheckUtils]: 5: Hoare triple {695#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:12,849 INFO L290 TraceCheckUtils]: 6: Hoare triple {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:12,849 INFO L290 TraceCheckUtils]: 7: Hoare triple {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:12,849 INFO L290 TraceCheckUtils]: 8: Hoare triple {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:12,850 INFO L290 TraceCheckUtils]: 9: Hoare triple {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:12,850 INFO L290 TraceCheckUtils]: 10: Hoare triple {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:12,851 INFO L290 TraceCheckUtils]: 11: Hoare triple {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {743#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-14 18:56:12,852 INFO L290 TraceCheckUtils]: 12: Hoare triple {743#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {747#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-14 18:56:12,853 INFO L290 TraceCheckUtils]: 13: Hoare triple {747#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {751#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:12,854 INFO L290 TraceCheckUtils]: 14: Hoare triple {751#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {755#(and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-14 18:56:12,854 INFO L290 TraceCheckUtils]: 15: Hoare triple {755#(and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {759#(and (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 (mod (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-14 18:56:12,855 INFO L290 TraceCheckUtils]: 16: Hoare triple {759#(and (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 (mod (+ main_~max~0 4294967295) 4294967296)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {763#(and (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< (mod (+ main_~max~0 4294967295) 4294967296) 2) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 (mod (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-14 18:56:12,857 INFO L290 TraceCheckUtils]: 17: Hoare triple {763#(and (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< (mod (+ main_~max~0 4294967295) 4294967296) 2) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 (mod (+ main_~max~0 4294967295) 4294967296)))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {767#(and (< (div (+ (- 1) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-14 18:56:12,858 INFO L290 TraceCheckUtils]: 18: Hoare triple {767#(and (< (div (+ (- 1) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {771#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-14 18:56:12,859 INFO L272 TraceCheckUtils]: 19: Hoare triple {771#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {775#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 18:56:12,859 INFO L290 TraceCheckUtils]: 20: Hoare triple {775#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {779#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 18:56:12,860 INFO L290 TraceCheckUtils]: 21: Hoare triple {779#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {696#false} is VALID [2022-04-14 18:56:12,860 INFO L290 TraceCheckUtils]: 22: Hoare triple {696#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {696#false} is VALID [2022-04-14 18:56:12,860 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-14 18:56:12,860 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 18:56:13,142 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-14 18:56:13,142 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 80 treesize of output 76 [2022-04-14 18:56:13,203 INFO L356 Elim1Store]: treesize reduction 6, result has 40.0 percent of original size [2022-04-14 18:56:13,203 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 21 [2022-04-14 18:56:13,211 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2022-04-14 18:56:13,232 INFO L356 Elim1Store]: treesize reduction 27, result has 34.1 percent of original size [2022-04-14 18:56:13,232 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 45 [2022-04-14 18:56:13,258 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-14 18:56:13,258 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 82 treesize of output 78 [2022-04-14 18:56:13,330 INFO L356 Elim1Store]: treesize reduction 6, result has 40.0 percent of original size [2022-04-14 18:56:13,330 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 22 [2022-04-14 18:56:13,340 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2022-04-14 18:56:13,364 INFO L356 Elim1Store]: treesize reduction 27, result has 37.2 percent of original size [2022-04-14 18:56:13,364 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 51 treesize of output 49 [2022-04-14 18:56:13,641 INFO L290 TraceCheckUtils]: 22: Hoare triple {696#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {696#false} is VALID [2022-04-14 18:56:13,642 INFO L290 TraceCheckUtils]: 21: Hoare triple {779#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {696#false} is VALID [2022-04-14 18:56:13,642 INFO L290 TraceCheckUtils]: 20: Hoare triple {775#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {779#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 18:56:13,643 INFO L272 TraceCheckUtils]: 19: Hoare triple {771#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {775#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 18:56:13,643 INFO L290 TraceCheckUtils]: 18: Hoare triple {798#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {771#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-14 18:56:13,644 INFO L290 TraceCheckUtils]: 17: Hoare triple {802#(and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {798#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-14 18:56:13,645 INFO L290 TraceCheckUtils]: 16: Hoare triple {806#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 0 main_~i~0))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {802#(and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))))} is VALID [2022-04-14 18:56:13,646 INFO L290 TraceCheckUtils]: 15: Hoare triple {810#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {806#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 0 main_~i~0))} is VALID [2022-04-14 18:56:13,647 INFO L290 TraceCheckUtils]: 14: Hoare triple {814#(or (not (<= 0 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (<= 1 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {810#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} is VALID [2022-04-14 18:56:13,647 INFO L290 TraceCheckUtils]: 13: Hoare triple {818#(or (<= 2 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (not (<= 1 main_~i~0)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {814#(or (not (<= 0 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (<= 1 main_~i~0))} is VALID [2022-04-14 18:56:13,648 INFO L290 TraceCheckUtils]: 12: Hoare triple {822#(or (<= 2 main_~i~0) (and (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))) (not (<= 1 main_~i~0)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {818#(or (<= 2 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (not (<= 1 main_~i~0)))} is VALID [2022-04-14 18:56:13,649 INFO L290 TraceCheckUtils]: 11: Hoare triple {695#true} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {822#(or (<= 2 main_~i~0) (and (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))) (not (<= 1 main_~i~0)))} is VALID [2022-04-14 18:56:13,649 INFO L290 TraceCheckUtils]: 10: Hoare triple {695#true} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-14 18:56:13,649 INFO L290 TraceCheckUtils]: 9: Hoare triple {695#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {695#true} is VALID [2022-04-14 18:56:13,649 INFO L290 TraceCheckUtils]: 8: Hoare triple {695#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {695#true} is VALID [2022-04-14 18:56:13,650 INFO L290 TraceCheckUtils]: 7: Hoare triple {695#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {695#true} is VALID [2022-04-14 18:56:13,650 INFO L290 TraceCheckUtils]: 6: Hoare triple {695#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {695#true} is VALID [2022-04-14 18:56:13,650 INFO L290 TraceCheckUtils]: 5: Hoare triple {695#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {695#true} is VALID [2022-04-14 18:56:13,650 INFO L272 TraceCheckUtils]: 4: Hoare triple {695#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-14 18:56:13,650 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {695#true} {695#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-14 18:56:13,650 INFO L290 TraceCheckUtils]: 2: Hoare triple {695#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-14 18:56:13,650 INFO L290 TraceCheckUtils]: 1: Hoare triple {695#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {695#true} is VALID [2022-04-14 18:56:13,650 INFO L272 TraceCheckUtils]: 0: Hoare triple {695#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-14 18:56:13,651 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-14 18:56:13,651 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [131382186] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 18:56:13,651 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 18:56:13,651 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 13, 12] total 26 [2022-04-14 18:56:13,651 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1368551496] [2022-04-14 18:56:13,651 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 18:56:13,652 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-14 18:56:13,652 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 18:56:13,652 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:13,696 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:13,697 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-14 18:56:13,697 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 18:56:13,697 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-14 18:56:13,697 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=557, Unknown=0, NotChecked=0, Total=650 [2022-04-14 18:56:13,698 INFO L87 Difference]: Start difference. First operand 35 states and 38 transitions. Second operand has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:16,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:16,249 INFO L93 Difference]: Finished difference Result 51 states and 57 transitions. [2022-04-14 18:56:16,250 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-04-14 18:56:16,250 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-14 18:56:16,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 18:56:16,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:16,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 59 transitions. [2022-04-14 18:56:16,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:16,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 59 transitions. [2022-04-14 18:56:16,253 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 23 states and 59 transitions. [2022-04-14 18:56:16,321 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:16,322 INFO L225 Difference]: With dead ends: 51 [2022-04-14 18:56:16,322 INFO L226 Difference]: Without dead ends: 51 [2022-04-14 18:56:16,323 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 33 SyntacticMatches, 1 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 358 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=378, Invalid=1692, Unknown=0, NotChecked=0, Total=2070 [2022-04-14 18:56:16,323 INFO L913 BasicCegarLoop]: 10 mSDtfsCounter, 68 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 349 mSolverCounterSat, 162 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 68 SdHoareTripleChecker+Valid, 60 SdHoareTripleChecker+Invalid, 511 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 162 IncrementalHoareTripleChecker+Valid, 349 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-14 18:56:16,323 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [68 Valid, 60 Invalid, 511 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [162 Valid, 349 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-14 18:56:16,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-04-14 18:56:16,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 41. [2022-04-14 18:56:16,326 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 18:56:16,326 INFO L82 GeneralOperation]: Start isEquivalent. First operand 51 states. Second operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:16,326 INFO L74 IsIncluded]: Start isIncluded. First operand 51 states. Second operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:16,326 INFO L87 Difference]: Start difference. First operand 51 states. Second operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:16,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:16,328 INFO L93 Difference]: Finished difference Result 51 states and 57 transitions. [2022-04-14 18:56:16,328 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 57 transitions. [2022-04-14 18:56:16,329 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:16,329 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:16,330 INFO L74 IsIncluded]: Start isIncluded. First operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 51 states. [2022-04-14 18:56:16,330 INFO L87 Difference]: Start difference. First operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 51 states. [2022-04-14 18:56:16,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:16,331 INFO L93 Difference]: Finished difference Result 51 states and 57 transitions. [2022-04-14 18:56:16,331 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 57 transitions. [2022-04-14 18:56:16,332 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:16,332 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:16,332 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 18:56:16,332 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 18:56:16,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:16,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 45 transitions. [2022-04-14 18:56:16,333 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 45 transitions. Word has length 23 [2022-04-14 18:56:16,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 18:56:16,333 INFO L478 AbstractCegarLoop]: Abstraction has 41 states and 45 transitions. [2022-04-14 18:56:16,333 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:16,333 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 45 transitions. [2022-04-14 18:56:16,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-14 18:56:16,334 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 18:56:16,334 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 18:56:16,357 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-14 18:56:16,543 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:16,543 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 18:56:16,544 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 18:56:16,544 INFO L85 PathProgramCache]: Analyzing trace with hash -126211412, now seen corresponding path program 3 times [2022-04-14 18:56:16,544 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 18:56:16,544 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373587018] [2022-04-14 18:56:16,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:16,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 18:56:16,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:16,705 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 18:56:16,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:16,711 INFO L290 TraceCheckUtils]: 0: Hoare triple {1107#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1098#true} is VALID [2022-04-14 18:56:16,711 INFO L290 TraceCheckUtils]: 1: Hoare triple {1098#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-14 18:56:16,711 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1098#true} {1098#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-14 18:56:16,712 INFO L272 TraceCheckUtils]: 0: Hoare triple {1098#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1107#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 18:56:16,712 INFO L290 TraceCheckUtils]: 1: Hoare triple {1107#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1098#true} is VALID [2022-04-14 18:56:16,712 INFO L290 TraceCheckUtils]: 2: Hoare triple {1098#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-14 18:56:16,712 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1098#true} {1098#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-14 18:56:16,712 INFO L272 TraceCheckUtils]: 4: Hoare triple {1098#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-14 18:56:16,713 INFO L290 TraceCheckUtils]: 5: Hoare triple {1098#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {1103#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= main_~i~0 0))} is VALID [2022-04-14 18:56:16,713 INFO L290 TraceCheckUtils]: 6: Hoare triple {1103#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= main_~i~0 0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1104#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) 0) (= main_~i~0 0))} is VALID [2022-04-14 18:56:16,714 INFO L290 TraceCheckUtils]: 7: Hoare triple {1104#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) 0) (= main_~i~0 0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1105#(and (<= (div main_~max~0 4294967296) 0) (<= (+ main_~i~0 4) main_~max~0) (<= 1 main_~i~0))} is VALID [2022-04-14 18:56:16,714 INFO L290 TraceCheckUtils]: 8: Hoare triple {1105#(and (<= (div main_~max~0 4294967296) 0) (<= (+ main_~i~0 4) main_~max~0) (<= 1 main_~i~0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1105#(and (<= (div main_~max~0 4294967296) 0) (<= (+ main_~i~0 4) main_~max~0) (<= 1 main_~i~0))} is VALID [2022-04-14 18:56:16,715 INFO L290 TraceCheckUtils]: 9: Hoare triple {1105#(and (<= (div main_~max~0 4294967296) 0) (<= (+ main_~i~0 4) main_~max~0) (<= 1 main_~i~0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1106#(and (<= (+ main_~i~0 3) main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)))} is VALID [2022-04-14 18:56:16,718 INFO L290 TraceCheckUtils]: 10: Hoare triple {1106#(and (<= (+ main_~i~0 3) main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-14 18:56:16,719 INFO L290 TraceCheckUtils]: 11: Hoare triple {1099#false} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1099#false} is VALID [2022-04-14 18:56:16,719 INFO L290 TraceCheckUtils]: 12: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-14 18:56:16,719 INFO L290 TraceCheckUtils]: 13: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-14 18:56:16,719 INFO L290 TraceCheckUtils]: 14: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-14 18:56:16,719 INFO L290 TraceCheckUtils]: 15: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-14 18:56:16,719 INFO L290 TraceCheckUtils]: 16: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-14 18:56:16,719 INFO L290 TraceCheckUtils]: 17: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-14 18:56:16,719 INFO L290 TraceCheckUtils]: 18: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-14 18:56:16,719 INFO L290 TraceCheckUtils]: 19: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-14 18:56:16,719 INFO L290 TraceCheckUtils]: 20: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-14 18:56:16,720 INFO L290 TraceCheckUtils]: 21: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-14 18:56:16,720 INFO L290 TraceCheckUtils]: 22: Hoare triple {1099#false} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-14 18:56:16,720 INFO L290 TraceCheckUtils]: 23: Hoare triple {1099#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1099#false} is VALID [2022-04-14 18:56:16,720 INFO L290 TraceCheckUtils]: 24: Hoare triple {1099#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {1099#false} is VALID [2022-04-14 18:56:16,720 INFO L272 TraceCheckUtils]: 25: Hoare triple {1099#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {1099#false} is VALID [2022-04-14 18:56:16,720 INFO L290 TraceCheckUtils]: 26: Hoare triple {1099#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1099#false} is VALID [2022-04-14 18:56:16,720 INFO L290 TraceCheckUtils]: 27: Hoare triple {1099#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-14 18:56:16,720 INFO L290 TraceCheckUtils]: 28: Hoare triple {1099#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-14 18:56:16,720 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-14 18:56:16,721 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 18:56:16,721 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [373587018] [2022-04-14 18:56:16,721 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [373587018] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 18:56:16,721 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1844330181] [2022-04-14 18:56:16,721 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-14 18:56:16,721 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:16,721 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 18:56:16,748 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 18:56:16,800 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-14 18:56:16,859 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-14 18:56:16,859 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-14 18:56:16,859 INFO L263 TraceCheckSpWp]: Trace formula consists of 135 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-14 18:56:16,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:16,870 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 18:56:17,065 INFO L272 TraceCheckUtils]: 0: Hoare triple {1098#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-14 18:56:17,066 INFO L290 TraceCheckUtils]: 1: Hoare triple {1098#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1098#true} is VALID [2022-04-14 18:56:17,066 INFO L290 TraceCheckUtils]: 2: Hoare triple {1098#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-14 18:56:17,066 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1098#true} {1098#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-14 18:56:17,066 INFO L272 TraceCheckUtils]: 4: Hoare triple {1098#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-14 18:56:17,067 INFO L290 TraceCheckUtils]: 5: Hoare triple {1098#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {1103#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= main_~i~0 0))} is VALID [2022-04-14 18:56:17,067 INFO L290 TraceCheckUtils]: 6: Hoare triple {1103#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= main_~i~0 0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1103#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= main_~i~0 0))} is VALID [2022-04-14 18:56:17,068 INFO L290 TraceCheckUtils]: 7: Hoare triple {1103#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= main_~i~0 0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1132#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= (+ (- 1) main_~i~0) 0))} is VALID [2022-04-14 18:56:17,068 INFO L290 TraceCheckUtils]: 8: Hoare triple {1132#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= (+ (- 1) main_~i~0) 0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1132#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= (+ (- 1) main_~i~0) 0))} is VALID [2022-04-14 18:56:17,068 INFO L290 TraceCheckUtils]: 9: Hoare triple {1132#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= (+ (- 1) main_~i~0) 0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1139#(and (= (+ (- 2) main_~i~0) 0) (<= 5 main_~max~0) (<= main_~max~0 5))} is VALID [2022-04-14 18:56:17,069 INFO L290 TraceCheckUtils]: 10: Hoare triple {1139#(and (= (+ (- 2) main_~i~0) 0) (<= 5 main_~max~0) (<= main_~max~0 5))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-14 18:56:17,069 INFO L290 TraceCheckUtils]: 11: Hoare triple {1099#false} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1099#false} is VALID [2022-04-14 18:56:17,069 INFO L290 TraceCheckUtils]: 12: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-14 18:56:17,069 INFO L290 TraceCheckUtils]: 13: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-14 18:56:17,069 INFO L290 TraceCheckUtils]: 14: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-14 18:56:17,069 INFO L290 TraceCheckUtils]: 15: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-14 18:56:17,069 INFO L290 TraceCheckUtils]: 16: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-14 18:56:17,070 INFO L290 TraceCheckUtils]: 17: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-14 18:56:17,070 INFO L290 TraceCheckUtils]: 18: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-14 18:56:17,070 INFO L290 TraceCheckUtils]: 19: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-14 18:56:17,070 INFO L290 TraceCheckUtils]: 20: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-14 18:56:17,070 INFO L290 TraceCheckUtils]: 21: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-14 18:56:17,070 INFO L290 TraceCheckUtils]: 22: Hoare triple {1099#false} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-14 18:56:17,070 INFO L290 TraceCheckUtils]: 23: Hoare triple {1099#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1099#false} is VALID [2022-04-14 18:56:17,070 INFO L290 TraceCheckUtils]: 24: Hoare triple {1099#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {1099#false} is VALID [2022-04-14 18:56:17,070 INFO L272 TraceCheckUtils]: 25: Hoare triple {1099#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {1099#false} is VALID [2022-04-14 18:56:17,070 INFO L290 TraceCheckUtils]: 26: Hoare triple {1099#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1099#false} is VALID [2022-04-14 18:56:17,071 INFO L290 TraceCheckUtils]: 27: Hoare triple {1099#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-14 18:56:17,071 INFO L290 TraceCheckUtils]: 28: Hoare triple {1099#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-14 18:56:17,071 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-14 18:56:17,071 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 18:56:17,188 INFO L290 TraceCheckUtils]: 28: Hoare triple {1099#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-14 18:56:17,188 INFO L290 TraceCheckUtils]: 27: Hoare triple {1099#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-14 18:56:17,189 INFO L290 TraceCheckUtils]: 26: Hoare triple {1099#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1099#false} is VALID [2022-04-14 18:56:17,189 INFO L272 TraceCheckUtils]: 25: Hoare triple {1099#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {1099#false} is VALID [2022-04-14 18:56:17,189 INFO L290 TraceCheckUtils]: 24: Hoare triple {1099#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {1099#false} is VALID [2022-04-14 18:56:17,189 INFO L290 TraceCheckUtils]: 23: Hoare triple {1099#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1099#false} is VALID [2022-04-14 18:56:17,189 INFO L290 TraceCheckUtils]: 22: Hoare triple {1099#false} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-14 18:56:17,189 INFO L290 TraceCheckUtils]: 21: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-14 18:56:17,189 INFO L290 TraceCheckUtils]: 20: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-14 18:56:17,189 INFO L290 TraceCheckUtils]: 19: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-14 18:56:17,189 INFO L290 TraceCheckUtils]: 18: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-14 18:56:17,189 INFO L290 TraceCheckUtils]: 17: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-14 18:56:17,190 INFO L290 TraceCheckUtils]: 16: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-14 18:56:17,190 INFO L290 TraceCheckUtils]: 15: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-14 18:56:17,190 INFO L290 TraceCheckUtils]: 14: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-14 18:56:17,190 INFO L290 TraceCheckUtils]: 13: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-14 18:56:17,190 INFO L290 TraceCheckUtils]: 12: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-14 18:56:17,190 INFO L290 TraceCheckUtils]: 11: Hoare triple {1099#false} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1099#false} is VALID [2022-04-14 18:56:17,192 INFO L290 TraceCheckUtils]: 10: Hoare triple {1251#(< (mod main_~i~0 4294967296) (mod main_~max~0 4294967296))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-14 18:56:17,193 INFO L290 TraceCheckUtils]: 9: Hoare triple {1255#(< (mod (+ main_~i~0 1) 4294967296) (mod main_~max~0 4294967296))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1251#(< (mod main_~i~0 4294967296) (mod main_~max~0 4294967296))} is VALID [2022-04-14 18:56:17,194 INFO L290 TraceCheckUtils]: 8: Hoare triple {1255#(< (mod (+ main_~i~0 1) 4294967296) (mod main_~max~0 4294967296))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1255#(< (mod (+ main_~i~0 1) 4294967296) (mod main_~max~0 4294967296))} is VALID [2022-04-14 18:56:17,194 INFO L290 TraceCheckUtils]: 7: Hoare triple {1262#(< (mod (+ main_~i~0 2) 4294967296) (mod main_~max~0 4294967296))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1255#(< (mod (+ main_~i~0 1) 4294967296) (mod main_~max~0 4294967296))} is VALID [2022-04-14 18:56:17,194 INFO L290 TraceCheckUtils]: 6: Hoare triple {1262#(< (mod (+ main_~i~0 2) 4294967296) (mod main_~max~0 4294967296))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1262#(< (mod (+ main_~i~0 2) 4294967296) (mod main_~max~0 4294967296))} is VALID [2022-04-14 18:56:17,196 INFO L290 TraceCheckUtils]: 5: Hoare triple {1098#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {1262#(< (mod (+ main_~i~0 2) 4294967296) (mod main_~max~0 4294967296))} is VALID [2022-04-14 18:56:17,203 INFO L272 TraceCheckUtils]: 4: Hoare triple {1098#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-14 18:56:17,203 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1098#true} {1098#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-14 18:56:17,203 INFO L290 TraceCheckUtils]: 2: Hoare triple {1098#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-14 18:56:17,204 INFO L290 TraceCheckUtils]: 1: Hoare triple {1098#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1098#true} is VALID [2022-04-14 18:56:17,204 INFO L272 TraceCheckUtils]: 0: Hoare triple {1098#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-14 18:56:17,204 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-14 18:56:17,204 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1844330181] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 18:56:17,204 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 18:56:17,204 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5, 5] total 12 [2022-04-14 18:56:17,204 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [953340133] [2022-04-14 18:56:17,204 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 18:56:17,205 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.4166666666666665) internal successors, (29), 11 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-14 18:56:17,205 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 18:56:17,205 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 2.4166666666666665) internal successors, (29), 11 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:17,225 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:17,226 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-14 18:56:17,226 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 18:56:17,226 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-14 18:56:17,226 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2022-04-14 18:56:17,226 INFO L87 Difference]: Start difference. First operand 41 states and 45 transitions. Second operand has 12 states, 12 states have (on average 2.4166666666666665) internal successors, (29), 11 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:17,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:17,489 INFO L93 Difference]: Finished difference Result 47 states and 51 transitions. [2022-04-14 18:56:17,489 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-14 18:56:17,490 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.4166666666666665) internal successors, (29), 11 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-14 18:56:17,490 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 18:56:17,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.4166666666666665) internal successors, (29), 11 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:17,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 36 transitions. [2022-04-14 18:56:17,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.4166666666666665) internal successors, (29), 11 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:17,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 36 transitions. [2022-04-14 18:56:17,507 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 36 transitions. [2022-04-14 18:56:17,533 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:17,534 INFO L225 Difference]: With dead ends: 47 [2022-04-14 18:56:17,534 INFO L226 Difference]: Without dead ends: 47 [2022-04-14 18:56:17,535 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 54 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=88, Invalid=184, Unknown=0, NotChecked=0, Total=272 [2022-04-14 18:56:17,535 INFO L913 BasicCegarLoop]: 20 mSDtfsCounter, 26 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 92 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 42 SdHoareTripleChecker+Invalid, 109 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 92 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 18:56:17,535 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [26 Valid, 42 Invalid, 109 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 92 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 18:56:17,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2022-04-14 18:56:17,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2022-04-14 18:56:17,538 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 18:56:17,538 INFO L82 GeneralOperation]: Start isEquivalent. First operand 47 states. Second operand has 47 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 40 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:17,538 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand has 47 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 40 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:17,538 INFO L87 Difference]: Start difference. First operand 47 states. Second operand has 47 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 40 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:17,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:17,539 INFO L93 Difference]: Finished difference Result 47 states and 51 transitions. [2022-04-14 18:56:17,539 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 51 transitions. [2022-04-14 18:56:17,539 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:17,539 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:17,540 INFO L74 IsIncluded]: Start isIncluded. First operand has 47 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 40 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 47 states. [2022-04-14 18:56:17,540 INFO L87 Difference]: Start difference. First operand has 47 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 40 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 47 states. [2022-04-14 18:56:17,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:17,541 INFO L93 Difference]: Finished difference Result 47 states and 51 transitions. [2022-04-14 18:56:17,541 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 51 transitions. [2022-04-14 18:56:17,541 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:17,541 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:17,541 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 18:56:17,541 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 18:56:17,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 40 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:17,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 51 transitions. [2022-04-14 18:56:17,542 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 51 transitions. Word has length 29 [2022-04-14 18:56:17,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 18:56:17,542 INFO L478 AbstractCegarLoop]: Abstraction has 47 states and 51 transitions. [2022-04-14 18:56:17,542 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 2.4166666666666665) internal successors, (29), 11 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:17,543 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 51 transitions. [2022-04-14 18:56:17,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-14 18:56:17,543 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 18:56:17,543 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 18:56:17,581 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-14 18:56:17,778 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:17,778 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 18:56:17,778 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 18:56:17,778 INFO L85 PathProgramCache]: Analyzing trace with hash -1457388698, now seen corresponding path program 4 times [2022-04-14 18:56:17,779 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 18:56:17,779 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [599537496] [2022-04-14 18:56:17,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:17,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 18:56:17,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:18,632 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 18:56:18,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:18,637 INFO L290 TraceCheckUtils]: 0: Hoare triple {1507#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1484#true} is VALID [2022-04-14 18:56:18,637 INFO L290 TraceCheckUtils]: 1: Hoare triple {1484#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-14 18:56:18,637 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1484#true} {1484#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-14 18:56:18,638 INFO L272 TraceCheckUtils]: 0: Hoare triple {1484#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1507#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 18:56:18,638 INFO L290 TraceCheckUtils]: 1: Hoare triple {1507#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1484#true} is VALID [2022-04-14 18:56:18,638 INFO L290 TraceCheckUtils]: 2: Hoare triple {1484#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-14 18:56:18,638 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1484#true} {1484#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-14 18:56:18,638 INFO L272 TraceCheckUtils]: 4: Hoare triple {1484#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-14 18:56:18,639 INFO L290 TraceCheckUtils]: 5: Hoare triple {1484#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {1489#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:18,639 INFO L290 TraceCheckUtils]: 6: Hoare triple {1489#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1489#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:18,640 INFO L290 TraceCheckUtils]: 7: Hoare triple {1489#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1490#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} is VALID [2022-04-14 18:56:18,640 INFO L290 TraceCheckUtils]: 8: Hoare triple {1490#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1490#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} is VALID [2022-04-14 18:56:18,641 INFO L290 TraceCheckUtils]: 9: Hoare triple {1490#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1491#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} is VALID [2022-04-14 18:56:18,641 INFO L290 TraceCheckUtils]: 10: Hoare triple {1491#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1491#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} is VALID [2022-04-14 18:56:18,642 INFO L290 TraceCheckUtils]: 11: Hoare triple {1491#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1492#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-14 18:56:18,642 INFO L290 TraceCheckUtils]: 12: Hoare triple {1492#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0) (<= main_~i~0 3))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1492#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-14 18:56:18,643 INFO L290 TraceCheckUtils]: 13: Hoare triple {1492#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0) (<= main_~i~0 3))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1493#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 main_~i~0))} is VALID [2022-04-14 18:56:18,643 INFO L290 TraceCheckUtils]: 14: Hoare triple {1493#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 main_~i~0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1493#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 main_~i~0))} is VALID [2022-04-14 18:56:18,643 INFO L290 TraceCheckUtils]: 15: Hoare triple {1493#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 main_~i~0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1494#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:18,644 INFO L290 TraceCheckUtils]: 16: Hoare triple {1494#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {1494#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:18,645 INFO L290 TraceCheckUtils]: 17: Hoare triple {1494#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1495#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-14 18:56:18,646 INFO L290 TraceCheckUtils]: 18: Hoare triple {1495#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1496#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ main_~j~0 3 |main_~#str1~0.offset|) (+ |main_~#str1~0.offset| 4)) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-14 18:56:18,647 INFO L290 TraceCheckUtils]: 19: Hoare triple {1496#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ main_~j~0 3 |main_~#str1~0.offset|) (+ |main_~#str1~0.offset| 4)) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1497#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 3 |main_~#str1~0.offset|)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 3 |main_~#str1~0.offset|)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:18,648 INFO L290 TraceCheckUtils]: 20: Hoare triple {1497#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 3 |main_~#str1~0.offset|)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 3 |main_~#str1~0.offset|)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1498#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 2 |main_~#str1~0.offset|))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 2 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:18,648 INFO L290 TraceCheckUtils]: 21: Hoare triple {1498#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 2 |main_~#str1~0.offset|))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 2 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1497#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 3 |main_~#str1~0.offset|)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 3 |main_~#str1~0.offset|)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:18,649 INFO L290 TraceCheckUtils]: 22: Hoare triple {1497#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 3 |main_~#str1~0.offset|)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 3 |main_~#str1~0.offset|)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1498#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 2 |main_~#str1~0.offset|))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 2 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:18,650 INFO L290 TraceCheckUtils]: 23: Hoare triple {1498#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 2 |main_~#str1~0.offset|))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 2 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1497#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 3 |main_~#str1~0.offset|)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 3 |main_~#str1~0.offset|)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:18,651 INFO L290 TraceCheckUtils]: 24: Hoare triple {1497#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 3 |main_~#str1~0.offset|)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 3 |main_~#str1~0.offset|)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1498#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 2 |main_~#str1~0.offset|))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 2 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:18,652 INFO L290 TraceCheckUtils]: 25: Hoare triple {1498#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 2 |main_~#str1~0.offset|))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 2 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1499#(and (= |main_~#str2~0.offset| 0) (or (not (= (+ main_~i~0 |main_~#str1~0.offset|) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~j~0 |main_~#str2~0.offset|) (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|))) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ main_~j~0 |main_~#str2~0.offset|) (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:18,653 INFO L290 TraceCheckUtils]: 26: Hoare triple {1499#(and (= |main_~#str2~0.offset| 0) (or (not (= (+ main_~i~0 |main_~#str1~0.offset|) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~j~0 |main_~#str2~0.offset|) (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|))) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ main_~j~0 |main_~#str2~0.offset|) (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1500#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (not (= (+ main_~i~0 |main_~#str1~0.offset|) 0)) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))))) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:18,654 INFO L290 TraceCheckUtils]: 27: Hoare triple {1500#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (not (= (+ main_~i~0 |main_~#str1~0.offset|) 0)) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))))) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1501#(and (= |main_~#str2~0.offset| 0) (or (<= 0 (+ main_~i~0 |main_~#str1~0.offset|)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|)))) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|))))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 0 (+ main_~i~0 1)))} is VALID [2022-04-14 18:56:18,655 INFO L290 TraceCheckUtils]: 28: Hoare triple {1501#(and (= |main_~#str2~0.offset| 0) (or (<= 0 (+ main_~i~0 |main_~#str1~0.offset|)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|)))) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|))))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 0 (+ main_~i~0 1)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {1502#(and (= |main_~#str2~0.offset| 0) (or (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|)))) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|))))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:18,656 INFO L290 TraceCheckUtils]: 29: Hoare triple {1502#(and (= |main_~#str2~0.offset| 0) (or (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|)))) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|))))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1503#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:18,657 INFO L290 TraceCheckUtils]: 30: Hoare triple {1503#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {1504#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-14 18:56:18,658 INFO L272 TraceCheckUtils]: 31: Hoare triple {1504#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {1505#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-14 18:56:18,659 INFO L290 TraceCheckUtils]: 32: Hoare triple {1505#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1506#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-14 18:56:18,659 INFO L290 TraceCheckUtils]: 33: Hoare triple {1506#(not (= __VERIFIER_assert_~cond 0))} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1485#false} is VALID [2022-04-14 18:56:18,659 INFO L290 TraceCheckUtils]: 34: Hoare triple {1485#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1485#false} is VALID [2022-04-14 18:56:18,659 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 44 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-14 18:56:18,660 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 18:56:18,660 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [599537496] [2022-04-14 18:56:18,660 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [599537496] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 18:56:18,660 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [361384100] [2022-04-14 18:56:18,660 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-14 18:56:18,660 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:18,660 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 18:56:18,661 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 18:56:18,680 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-14 18:56:18,742 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-14 18:56:18,742 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-14 18:56:18,743 INFO L263 TraceCheckSpWp]: Trace formula consists of 189 conjuncts, 47 conjunts are in the unsatisfiable core [2022-04-14 18:56:18,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:18,755 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 18:56:18,771 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-14 18:56:19,355 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2022-04-14 18:56:21,006 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-14 18:56:21,012 INFO L356 Elim1Store]: treesize reduction 15, result has 16.7 percent of original size [2022-04-14 18:56:21,012 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 13 [2022-04-14 18:56:21,429 INFO L272 TraceCheckUtils]: 0: Hoare triple {1484#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-14 18:56:21,429 INFO L290 TraceCheckUtils]: 1: Hoare triple {1484#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1484#true} is VALID [2022-04-14 18:56:21,429 INFO L290 TraceCheckUtils]: 2: Hoare triple {1484#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-14 18:56:21,430 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1484#true} {1484#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-14 18:56:21,430 INFO L272 TraceCheckUtils]: 4: Hoare triple {1484#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-14 18:56:21,430 INFO L290 TraceCheckUtils]: 5: Hoare triple {1484#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,431 INFO L290 TraceCheckUtils]: 6: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,431 INFO L290 TraceCheckUtils]: 7: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,432 INFO L290 TraceCheckUtils]: 8: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,432 INFO L290 TraceCheckUtils]: 9: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,433 INFO L290 TraceCheckUtils]: 10: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,433 INFO L290 TraceCheckUtils]: 11: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,434 INFO L290 TraceCheckUtils]: 12: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,434 INFO L290 TraceCheckUtils]: 13: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,435 INFO L290 TraceCheckUtils]: 14: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,435 INFO L290 TraceCheckUtils]: 15: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,435 INFO L290 TraceCheckUtils]: 16: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,436 INFO L290 TraceCheckUtils]: 17: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1563#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-14 18:56:21,437 INFO L290 TraceCheckUtils]: 18: Hoare triple {1563#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1567#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-14 18:56:21,438 INFO L290 TraceCheckUtils]: 19: Hoare triple {1567#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1571#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,439 INFO L290 TraceCheckUtils]: 20: Hoare triple {1571#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1575#(and (= (+ (- 2) main_~j~0) 0) (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,440 INFO L290 TraceCheckUtils]: 21: Hoare triple {1575#(and (= (+ (- 2) main_~j~0) 0) (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1579#(and (= (+ (- 2) main_~j~0) 0) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,441 INFO L290 TraceCheckUtils]: 22: Hoare triple {1579#(and (= (+ (- 2) main_~j~0) 0) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1583#(and (= (+ main_~j~0 (- 3)) 0) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,442 INFO L290 TraceCheckUtils]: 23: Hoare triple {1583#(and (= (+ main_~j~0 (- 3)) 0) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1587#(and (= (+ main_~j~0 (- 3)) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-14 18:56:21,442 INFO L290 TraceCheckUtils]: 24: Hoare triple {1587#(and (= (+ main_~j~0 (- 3)) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1591#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-14 18:56:21,443 INFO L290 TraceCheckUtils]: 25: Hoare triple {1591#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1595#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 4) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,444 INFO L290 TraceCheckUtils]: 26: Hoare triple {1595#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 4) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1599#(and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= 0 main_~i~0) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:21,445 INFO L290 TraceCheckUtils]: 27: Hoare triple {1599#(and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= 0 main_~i~0) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1603#(and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4)) (+ main_~i~0 1)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 (mod (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-14 18:56:21,446 INFO L290 TraceCheckUtils]: 28: Hoare triple {1603#(and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4)) (+ main_~i~0 1)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 (mod (+ main_~max~0 4294967295) 4294967296)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {1607#(and (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= |main_~#str1~0.offset| 0) (< (mod (+ main_~max~0 4294967295) 4294967296) 5) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 (mod (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-14 18:56:21,448 INFO L290 TraceCheckUtils]: 29: Hoare triple {1607#(and (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= |main_~#str1~0.offset| 0) (< (mod (+ main_~max~0 4294967295) 4294967296) 5) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 (mod (+ main_~max~0 4294967295) 4294967296)))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1611#(and (< (div main_~j~0 (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div (+ main_~j~0 (- 4)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)))} is VALID [2022-04-14 18:56:21,450 INFO L290 TraceCheckUtils]: 30: Hoare triple {1611#(and (< (div main_~j~0 (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div (+ main_~j~0 (- 4)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {1504#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-14 18:56:21,451 INFO L272 TraceCheckUtils]: 31: Hoare triple {1504#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {1618#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 18:56:21,451 INFO L290 TraceCheckUtils]: 32: Hoare triple {1618#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1622#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 18:56:21,452 INFO L290 TraceCheckUtils]: 33: Hoare triple {1622#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1485#false} is VALID [2022-04-14 18:56:21,452 INFO L290 TraceCheckUtils]: 34: Hoare triple {1485#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1485#false} is VALID [2022-04-14 18:56:21,452 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-14 18:56:21,452 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 18:56:21,744 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-14 18:56:21,744 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 80 treesize of output 76 [2022-04-14 18:56:21,818 INFO L356 Elim1Store]: treesize reduction 27, result has 34.1 percent of original size [2022-04-14 18:56:21,819 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 45 [2022-04-14 18:56:21,848 INFO L356 Elim1Store]: treesize reduction 9, result has 10.0 percent of original size [2022-04-14 18:56:21,848 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 1 [2022-04-14 18:56:21,861 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-14 18:56:21,861 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 82 treesize of output 78 [2022-04-14 18:56:21,945 INFO L356 Elim1Store]: treesize reduction 5, result has 70.6 percent of original size [2022-04-14 18:56:21,945 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 42 [2022-04-14 18:56:21,967 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 17 [2022-04-14 18:56:21,977 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2022-04-14 18:56:22,599 INFO L290 TraceCheckUtils]: 34: Hoare triple {1485#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1485#false} is VALID [2022-04-14 18:56:22,600 INFO L290 TraceCheckUtils]: 33: Hoare triple {1622#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1485#false} is VALID [2022-04-14 18:56:22,600 INFO L290 TraceCheckUtils]: 32: Hoare triple {1618#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1622#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 18:56:22,601 INFO L272 TraceCheckUtils]: 31: Hoare triple {1504#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {1618#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 18:56:22,601 INFO L290 TraceCheckUtils]: 30: Hoare triple {1641#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {1504#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-14 18:56:22,602 INFO L290 TraceCheckUtils]: 29: Hoare triple {1645#(and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1641#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-14 18:56:22,603 INFO L290 TraceCheckUtils]: 28: Hoare triple {1649#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 0 main_~i~0))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {1645#(and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))))} is VALID [2022-04-14 18:56:22,603 INFO L290 TraceCheckUtils]: 27: Hoare triple {1653#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1649#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 0 main_~i~0))} is VALID [2022-04-14 18:56:22,605 INFO L290 TraceCheckUtils]: 26: Hoare triple {1657#(or (not (<= 0 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (<= 1 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1653#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} is VALID [2022-04-14 18:56:22,605 INFO L290 TraceCheckUtils]: 25: Hoare triple {1661#(or (<= 2 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (not (<= 1 main_~i~0)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1657#(or (not (<= 0 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (<= 1 main_~i~0))} is VALID [2022-04-14 18:56:22,606 INFO L290 TraceCheckUtils]: 24: Hoare triple {1665#(or (<= 2 main_~i~0) (and (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))) (not (<= 1 main_~i~0)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1661#(or (<= 2 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (not (<= 1 main_~i~0)))} is VALID [2022-04-14 18:56:22,607 INFO L290 TraceCheckUtils]: 23: Hoare triple {1669#(or (not (<= 2 main_~i~0)) (and (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))) (<= 3 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1665#(or (<= 2 main_~i~0) (and (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))) (not (<= 1 main_~i~0)))} is VALID [2022-04-14 18:56:22,608 INFO L290 TraceCheckUtils]: 22: Hoare triple {1673#(or (not (<= 2 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)))) (<= 3 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1669#(or (not (<= 2 main_~i~0)) (and (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))) (<= 3 main_~i~0))} is VALID [2022-04-14 18:56:22,609 INFO L290 TraceCheckUtils]: 21: Hoare triple {1677#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)))) (not (<= 3 main_~i~0)) (<= 4 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1673#(or (not (<= 2 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)))) (<= 3 main_~i~0))} is VALID [2022-04-14 18:56:22,610 INFO L290 TraceCheckUtils]: 20: Hoare triple {1681#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)))) (not (<= 3 main_~i~0)) (<= 4 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1677#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)))) (not (<= 3 main_~i~0)) (<= 4 main_~i~0))} is VALID [2022-04-14 18:56:22,610 INFO L290 TraceCheckUtils]: 19: Hoare triple {1685#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)))) (not (<= 4 main_~i~0)) (<= 5 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1681#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)))) (not (<= 3 main_~i~0)) (<= 4 main_~i~0))} is VALID [2022-04-14 18:56:22,611 INFO L290 TraceCheckUtils]: 18: Hoare triple {1689#(or (not (<= 4 main_~i~0)) (and (or (= (+ main_~j~0 4294967300) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4)))) (<= 5 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1685#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)))) (not (<= 4 main_~i~0)) (<= 5 main_~i~0))} is VALID [2022-04-14 18:56:22,612 INFO L290 TraceCheckUtils]: 17: Hoare triple {1484#true} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1689#(or (not (<= 4 main_~i~0)) (and (or (= (+ main_~j~0 4294967300) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4)))) (<= 5 main_~i~0))} is VALID [2022-04-14 18:56:22,612 INFO L290 TraceCheckUtils]: 16: Hoare triple {1484#true} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-14 18:56:22,612 INFO L290 TraceCheckUtils]: 15: Hoare triple {1484#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1484#true} is VALID [2022-04-14 18:56:22,612 INFO L290 TraceCheckUtils]: 14: Hoare triple {1484#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1484#true} is VALID [2022-04-14 18:56:22,613 INFO L290 TraceCheckUtils]: 13: Hoare triple {1484#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1484#true} is VALID [2022-04-14 18:56:22,613 INFO L290 TraceCheckUtils]: 12: Hoare triple {1484#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1484#true} is VALID [2022-04-14 18:56:22,616 INFO L290 TraceCheckUtils]: 11: Hoare triple {1484#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1484#true} is VALID [2022-04-14 18:56:22,616 INFO L290 TraceCheckUtils]: 10: Hoare triple {1484#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1484#true} is VALID [2022-04-14 18:56:22,617 INFO L290 TraceCheckUtils]: 9: Hoare triple {1484#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1484#true} is VALID [2022-04-14 18:56:22,618 INFO L290 TraceCheckUtils]: 8: Hoare triple {1484#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1484#true} is VALID [2022-04-14 18:56:22,618 INFO L290 TraceCheckUtils]: 7: Hoare triple {1484#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1484#true} is VALID [2022-04-14 18:56:22,619 INFO L290 TraceCheckUtils]: 6: Hoare triple {1484#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1484#true} is VALID [2022-04-14 18:56:22,620 INFO L290 TraceCheckUtils]: 5: Hoare triple {1484#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {1484#true} is VALID [2022-04-14 18:56:22,620 INFO L272 TraceCheckUtils]: 4: Hoare triple {1484#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-14 18:56:22,620 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1484#true} {1484#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-14 18:56:22,623 INFO L290 TraceCheckUtils]: 2: Hoare triple {1484#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-14 18:56:22,623 INFO L290 TraceCheckUtils]: 1: Hoare triple {1484#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1484#true} is VALID [2022-04-14 18:56:22,623 INFO L272 TraceCheckUtils]: 0: Hoare triple {1484#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-14 18:56:22,623 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-14 18:56:22,623 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [361384100] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 18:56:22,623 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 18:56:22,623 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 19, 18] total 50 [2022-04-14 18:56:22,623 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [912600863] [2022-04-14 18:56:22,624 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 18:56:22,625 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-14 18:56:22,626 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 18:56:22,626 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:22,692 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 73 edges. 73 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:22,693 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2022-04-14 18:56:22,693 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 18:56:22,693 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-04-14 18:56:22,694 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=303, Invalid=2147, Unknown=0, NotChecked=0, Total=2450 [2022-04-14 18:56:22,694 INFO L87 Difference]: Start difference. First operand 47 states and 51 transitions. Second operand has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:36,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:36,496 INFO L93 Difference]: Finished difference Result 145 states and 172 transitions. [2022-04-14 18:56:36,496 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 73 states. [2022-04-14 18:56:36,496 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-14 18:56:36,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 18:56:36,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:36,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 167 transitions. [2022-04-14 18:56:36,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:36,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 167 transitions. [2022-04-14 18:56:36,506 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 73 states and 167 transitions. [2022-04-14 18:56:36,683 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 167 edges. 167 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:36,690 INFO L225 Difference]: With dead ends: 145 [2022-04-14 18:56:36,691 INFO L226 Difference]: Without dead ends: 145 [2022-04-14 18:56:36,693 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 42 SyntacticMatches, 5 SemanticMatches, 118 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3638 ImplicationChecksByTransitivity, 7.6s TimeCoverageRelationStatistics Valid=2087, Invalid=12193, Unknown=0, NotChecked=0, Total=14280 [2022-04-14 18:56:36,694 INFO L913 BasicCegarLoop]: 27 mSDtfsCounter, 343 mSDsluCounter, 98 mSDsCounter, 0 mSdLazyCounter, 2028 mSolverCounterSat, 785 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 343 SdHoareTripleChecker+Valid, 125 SdHoareTripleChecker+Invalid, 2813 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 785 IncrementalHoareTripleChecker+Valid, 2028 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.7s IncrementalHoareTripleChecker+Time [2022-04-14 18:56:36,694 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [343 Valid, 125 Invalid, 2813 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [785 Valid, 2028 Invalid, 0 Unknown, 0 Unchecked, 3.7s Time] [2022-04-14 18:56:36,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2022-04-14 18:56:36,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 42. [2022-04-14 18:56:36,711 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 18:56:36,711 INFO L82 GeneralOperation]: Start isEquivalent. First operand 145 states. Second operand has 42 states, 34 states have (on average 1.088235294117647) internal successors, (37), 35 states have internal predecessors, (37), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:36,711 INFO L74 IsIncluded]: Start isIncluded. First operand 145 states. Second operand has 42 states, 34 states have (on average 1.088235294117647) internal successors, (37), 35 states have internal predecessors, (37), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:36,711 INFO L87 Difference]: Start difference. First operand 145 states. Second operand has 42 states, 34 states have (on average 1.088235294117647) internal successors, (37), 35 states have internal predecessors, (37), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:36,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:36,719 INFO L93 Difference]: Finished difference Result 145 states and 172 transitions. [2022-04-14 18:56:36,719 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 172 transitions. [2022-04-14 18:56:36,722 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:36,722 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:36,722 INFO L74 IsIncluded]: Start isIncluded. First operand has 42 states, 34 states have (on average 1.088235294117647) internal successors, (37), 35 states have internal predecessors, (37), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 145 states. [2022-04-14 18:56:36,722 INFO L87 Difference]: Start difference. First operand has 42 states, 34 states have (on average 1.088235294117647) internal successors, (37), 35 states have internal predecessors, (37), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 145 states. [2022-04-14 18:56:36,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:36,727 INFO L93 Difference]: Finished difference Result 145 states and 172 transitions. [2022-04-14 18:56:36,727 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 172 transitions. [2022-04-14 18:56:36,728 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:36,728 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:36,728 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 18:56:36,728 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 18:56:36,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 34 states have (on average 1.088235294117647) internal successors, (37), 35 states have internal predecessors, (37), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-14 18:56:36,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 44 transitions. [2022-04-14 18:56:36,729 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 44 transitions. Word has length 35 [2022-04-14 18:56:36,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 18:56:36,730 INFO L478 AbstractCegarLoop]: Abstraction has 42 states and 44 transitions. [2022-04-14 18:56:36,730 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 18:56:36,730 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 44 transitions. [2022-04-14 18:56:36,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-04-14 18:56:36,732 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 18:56:36,733 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 18:56:36,749 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-04-14 18:56:36,941 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:36,942 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 18:56:36,942 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 18:56:36,942 INFO L85 PathProgramCache]: Analyzing trace with hash -349680096, now seen corresponding path program 1 times [2022-04-14 18:56:36,942 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 18:56:36,942 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1110204137] [2022-04-14 18:56:36,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:36,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 18:56:36,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:37,131 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 18:56:37,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:37,135 INFO L290 TraceCheckUtils]: 0: Hoare triple {2378#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2363#true} is VALID [2022-04-14 18:56:37,136 INFO L290 TraceCheckUtils]: 1: Hoare triple {2363#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-14 18:56:37,136 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2363#true} {2363#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-14 18:56:37,136 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-04-14 18:56:37,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:37,139 INFO L290 TraceCheckUtils]: 0: Hoare triple {2363#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2363#true} is VALID [2022-04-14 18:56:37,139 INFO L290 TraceCheckUtils]: 1: Hoare triple {2363#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-14 18:56:37,139 INFO L290 TraceCheckUtils]: 2: Hoare triple {2363#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-14 18:56:37,140 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2363#true} {2364#false} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2364#false} is VALID [2022-04-14 18:56:37,140 INFO L272 TraceCheckUtils]: 0: Hoare triple {2363#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2378#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 18:56:37,140 INFO L290 TraceCheckUtils]: 1: Hoare triple {2378#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2363#true} is VALID [2022-04-14 18:56:37,140 INFO L290 TraceCheckUtils]: 2: Hoare triple {2363#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-14 18:56:37,140 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2363#true} {2363#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-14 18:56:37,140 INFO L272 TraceCheckUtils]: 4: Hoare triple {2363#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-14 18:56:37,141 INFO L290 TraceCheckUtils]: 5: Hoare triple {2363#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-14 18:56:37,141 INFO L290 TraceCheckUtils]: 6: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-14 18:56:37,142 INFO L290 TraceCheckUtils]: 7: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-14 18:56:37,142 INFO L290 TraceCheckUtils]: 8: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-14 18:56:37,143 INFO L290 TraceCheckUtils]: 9: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-14 18:56:37,143 INFO L290 TraceCheckUtils]: 10: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-14 18:56:37,143 INFO L290 TraceCheckUtils]: 11: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-14 18:56:37,144 INFO L290 TraceCheckUtils]: 12: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-14 18:56:37,144 INFO L290 TraceCheckUtils]: 13: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-14 18:56:37,145 INFO L290 TraceCheckUtils]: 14: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-14 18:56:37,145 INFO L290 TraceCheckUtils]: 15: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-14 18:56:37,145 INFO L290 TraceCheckUtils]: 16: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-14 18:56:37,146 INFO L290 TraceCheckUtils]: 17: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2369#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-14 18:56:37,147 INFO L290 TraceCheckUtils]: 18: Hoare triple {2369#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2369#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-14 18:56:37,148 INFO L290 TraceCheckUtils]: 19: Hoare triple {2369#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2370#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} is VALID [2022-04-14 18:56:37,149 INFO L290 TraceCheckUtils]: 20: Hoare triple {2370#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2370#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} is VALID [2022-04-14 18:56:37,150 INFO L290 TraceCheckUtils]: 21: Hoare triple {2370#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2371#(or (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (<= (+ main_~i~0 3) 0))} is VALID [2022-04-14 18:56:37,150 INFO L290 TraceCheckUtils]: 22: Hoare triple {2371#(or (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (<= (+ main_~i~0 3) 0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2372#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} is VALID [2022-04-14 18:56:37,151 INFO L290 TraceCheckUtils]: 23: Hoare triple {2372#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2373#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967297 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} is VALID [2022-04-14 18:56:37,151 INFO L290 TraceCheckUtils]: 24: Hoare triple {2373#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967297 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {2364#false} is VALID [2022-04-14 18:56:37,151 INFO L290 TraceCheckUtils]: 25: Hoare triple {2364#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2364#false} is VALID [2022-04-14 18:56:37,151 INFO L290 TraceCheckUtils]: 26: Hoare triple {2364#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2364#false} is VALID [2022-04-14 18:56:37,151 INFO L272 TraceCheckUtils]: 27: Hoare triple {2364#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2363#true} is VALID [2022-04-14 18:56:37,152 INFO L290 TraceCheckUtils]: 28: Hoare triple {2363#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2363#true} is VALID [2022-04-14 18:56:37,152 INFO L290 TraceCheckUtils]: 29: Hoare triple {2363#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-14 18:56:37,152 INFO L290 TraceCheckUtils]: 30: Hoare triple {2363#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-14 18:56:37,152 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {2363#true} {2364#false} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2364#false} is VALID [2022-04-14 18:56:37,152 INFO L290 TraceCheckUtils]: 32: Hoare triple {2364#false} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {2364#false} is VALID [2022-04-14 18:56:37,152 INFO L290 TraceCheckUtils]: 33: Hoare triple {2364#false} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {2364#false} is VALID [2022-04-14 18:56:37,152 INFO L290 TraceCheckUtils]: 34: Hoare triple {2364#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2364#false} is VALID [2022-04-14 18:56:37,152 INFO L272 TraceCheckUtils]: 35: Hoare triple {2364#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2364#false} is VALID [2022-04-14 18:56:37,152 INFO L290 TraceCheckUtils]: 36: Hoare triple {2364#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2364#false} is VALID [2022-04-14 18:56:37,152 INFO L290 TraceCheckUtils]: 37: Hoare triple {2364#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2364#false} is VALID [2022-04-14 18:56:37,152 INFO L290 TraceCheckUtils]: 38: Hoare triple {2364#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2364#false} is VALID [2022-04-14 18:56:37,152 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2022-04-14 18:56:37,153 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 18:56:37,153 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1110204137] [2022-04-14 18:56:37,153 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1110204137] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 18:56:37,153 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1261704305] [2022-04-14 18:56:37,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:37,153 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:37,153 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 18:56:37,154 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 18:56:37,155 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-14 18:56:37,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:37,214 INFO L263 TraceCheckSpWp]: Trace formula consists of 189 conjuncts, 44 conjunts are in the unsatisfiable core [2022-04-14 18:56:37,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:37,225 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 18:56:37,240 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-14 18:56:37,506 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 20 [2022-04-14 18:56:37,664 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-14 18:56:37,665 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-04-14 18:56:41,956 WARN L855 $PredicateComparison]: unable to prove that (exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (let ((.cse1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (let ((.cse0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 .cse1))) (and (= (select (select |c_#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1) (select (select |c_#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296)))) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= .cse0 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 .cse1)) (<= .cse0 (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (<= .cse0 (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) .cse0) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|)))))) is different from true [2022-04-14 18:56:48,144 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-14 18:56:48,145 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-14 18:56:48,146 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 10 [2022-04-14 18:56:48,512 INFO L272 TraceCheckUtils]: 0: Hoare triple {2363#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-14 18:56:48,512 INFO L290 TraceCheckUtils]: 1: Hoare triple {2363#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2363#true} is VALID [2022-04-14 18:56:48,512 INFO L290 TraceCheckUtils]: 2: Hoare triple {2363#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-14 18:56:48,512 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2363#true} {2363#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-14 18:56:48,513 INFO L272 TraceCheckUtils]: 4: Hoare triple {2363#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-14 18:56:48,513 INFO L290 TraceCheckUtils]: 5: Hoare triple {2363#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:48,514 INFO L290 TraceCheckUtils]: 6: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:48,514 INFO L290 TraceCheckUtils]: 7: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:48,515 INFO L290 TraceCheckUtils]: 8: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:48,515 INFO L290 TraceCheckUtils]: 9: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:48,516 INFO L290 TraceCheckUtils]: 10: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:48,516 INFO L290 TraceCheckUtils]: 11: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:48,516 INFO L290 TraceCheckUtils]: 12: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:48,517 INFO L290 TraceCheckUtils]: 13: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:48,517 INFO L290 TraceCheckUtils]: 14: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:48,518 INFO L290 TraceCheckUtils]: 15: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:48,518 INFO L290 TraceCheckUtils]: 16: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:48,519 INFO L290 TraceCheckUtils]: 17: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2434#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-14 18:56:48,520 INFO L290 TraceCheckUtils]: 18: Hoare triple {2434#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2438#(and (= |main_~#str2~0.offset| 0) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-14 18:56:48,520 INFO L290 TraceCheckUtils]: 19: Hoare triple {2438#(and (= |main_~#str2~0.offset| 0) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2442#(and (= |main_~#str2~0.offset| 0) (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:48,521 INFO L290 TraceCheckUtils]: 20: Hoare triple {2442#(and (= |main_~#str2~0.offset| 0) (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2446#(and (= |main_~#str2~0.offset| 0) (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0) 1))} is VALID [2022-04-14 18:56:48,545 INFO L290 TraceCheckUtils]: 21: Hoare triple {2446#(and (= |main_~#str2~0.offset| 0) (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0) 1))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2450#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0) 1))} is VALID [2022-04-14 18:56:48,546 INFO L290 TraceCheckUtils]: 22: Hoare triple {2450#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0) 1))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2454#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:48,547 INFO L290 TraceCheckUtils]: 23: Hoare triple {2454#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2458#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= 2 (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:48,548 INFO L290 TraceCheckUtils]: 24: Hoare triple {2458#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= 2 (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {2462#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (mod (+ main_~max~0 4294967295) 4294967296) 3) (<= 2 (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:48,549 INFO L290 TraceCheckUtils]: 25: Hoare triple {2462#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (mod (+ main_~max~0 4294967295) 4294967296) 3) (<= 2 (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2466#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-14 18:56:48,550 INFO L290 TraceCheckUtils]: 26: Hoare triple {2466#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2466#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-14 18:56:48,571 INFO L272 TraceCheckUtils]: 27: Hoare triple {2466#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2473#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} is VALID [2022-04-14 18:56:48,581 INFO L290 TraceCheckUtils]: 28: Hoare triple {2473#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2473#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} is VALID [2022-04-14 18:56:48,592 INFO L290 TraceCheckUtils]: 29: Hoare triple {2473#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2473#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} is VALID [2022-04-14 18:56:48,596 INFO L290 TraceCheckUtils]: 30: Hoare triple {2473#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2473#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} is VALID [2022-04-14 18:56:48,596 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {2473#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} {2466#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2466#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-14 18:56:48,598 INFO L290 TraceCheckUtils]: 32: Hoare triple {2466#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {2489#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (< (div (+ (- 1) main_~j~0) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:56:48,598 INFO L290 TraceCheckUtils]: 33: Hoare triple {2489#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (< (div (+ (- 1) main_~j~0) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {2493#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (< (div (+ (- 1) main_~j~0) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} is VALID [2022-04-14 18:56:48,601 INFO L290 TraceCheckUtils]: 34: Hoare triple {2493#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (< (div (+ (- 1) main_~j~0) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2497#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-14 18:56:48,602 INFO L272 TraceCheckUtils]: 35: Hoare triple {2497#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2501#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 18:56:48,602 INFO L290 TraceCheckUtils]: 36: Hoare triple {2501#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2505#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 18:56:48,602 INFO L290 TraceCheckUtils]: 37: Hoare triple {2505#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2364#false} is VALID [2022-04-14 18:56:48,602 INFO L290 TraceCheckUtils]: 38: Hoare triple {2364#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2364#false} is VALID [2022-04-14 18:56:48,603 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 25 trivial. 2 not checked. [2022-04-14 18:56:48,603 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 18:56:49,080 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-14 18:56:49,080 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 218 treesize of output 206 [2022-04-14 18:56:49,385 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-14 18:56:49,389 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-14 18:56:49,389 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 256 treesize of output 227 [2022-04-14 18:56:49,539 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-14 18:56:49,540 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 23 [2022-04-14 18:56:49,549 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-14 18:56:49,562 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2022-04-14 18:56:49,652 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-14 18:56:49,653 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 23 [2022-04-14 18:56:49,660 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 96 [2022-04-14 18:56:49,681 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-14 18:56:49,685 INFO L356 Elim1Store]: treesize reduction 5, result has 70.6 percent of original size [2022-04-14 18:56:49,685 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 129 treesize of output 108 [2022-04-14 18:56:49,735 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-14 18:56:49,736 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 218 treesize of output 206 [2022-04-14 18:56:50,076 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 23 [2022-04-14 18:56:50,086 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 96 [2022-04-14 18:56:50,117 INFO L356 Elim1Store]: treesize reduction 5, result has 70.6 percent of original size [2022-04-14 18:56:50,118 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 231 treesize of output 209 [2022-04-14 18:56:50,270 INFO L356 Elim1Store]: treesize reduction 16, result has 5.9 percent of original size [2022-04-14 18:56:50,270 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 105 treesize of output 92 [2022-04-14 18:56:50,879 INFO L290 TraceCheckUtils]: 38: Hoare triple {2364#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2364#false} is VALID [2022-04-14 18:56:50,879 INFO L290 TraceCheckUtils]: 37: Hoare triple {2505#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2364#false} is VALID [2022-04-14 18:56:50,880 INFO L290 TraceCheckUtils]: 36: Hoare triple {2501#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2505#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 18:56:50,880 INFO L272 TraceCheckUtils]: 35: Hoare triple {2497#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2501#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 18:56:50,880 INFO L290 TraceCheckUtils]: 34: Hoare triple {2524#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2497#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-14 18:56:50,881 INFO L290 TraceCheckUtils]: 33: Hoare triple {2528#(= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {2524#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-14 18:56:50,882 INFO L290 TraceCheckUtils]: 32: Hoare triple {2532#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {2528#(= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)))} is VALID [2022-04-14 18:56:50,882 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {2363#true} {2532#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2532#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} is VALID [2022-04-14 18:56:50,882 INFO L290 TraceCheckUtils]: 30: Hoare triple {2363#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-14 18:56:50,882 INFO L290 TraceCheckUtils]: 29: Hoare triple {2363#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-14 18:56:50,882 INFO L290 TraceCheckUtils]: 28: Hoare triple {2363#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2363#true} is VALID [2022-04-14 18:56:50,882 INFO L272 TraceCheckUtils]: 27: Hoare triple {2532#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2363#true} is VALID [2022-04-14 18:56:50,883 INFO L290 TraceCheckUtils]: 26: Hoare triple {2532#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2532#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} is VALID [2022-04-14 18:56:50,884 INFO L290 TraceCheckUtils]: 25: Hoare triple {2554#(and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2532#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} is VALID [2022-04-14 18:56:50,884 INFO L290 TraceCheckUtils]: 24: Hoare triple {2558#(or (<= 0 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1))))))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {2554#(and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))))} is VALID [2022-04-14 18:56:50,885 INFO L290 TraceCheckUtils]: 23: Hoare triple {2562#(or (<= 1 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2558#(or (<= 0 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1))))))} is VALID [2022-04-14 18:56:50,886 INFO L290 TraceCheckUtils]: 22: Hoare triple {2566#(or (not (<= 0 main_~i~0)) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (forall ((v_ArrVal_234 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297)))))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_234 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))) (<= 1 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2562#(or (<= 1 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1))))))} is VALID [2022-04-14 18:56:50,887 INFO L290 TraceCheckUtils]: 21: Hoare triple {2570#(or (<= 2 main_~i~0) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (forall ((v_ArrVal_234 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297)))))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_234 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))) (not (<= 1 main_~i~0)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2566#(or (not (<= 0 main_~i~0)) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (forall ((v_ArrVal_234 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297)))))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_234 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))) (<= 1 main_~i~0))} is VALID [2022-04-14 18:56:50,890 INFO L290 TraceCheckUtils]: 20: Hoare triple {2574#(or (<= 2 main_~i~0) (not (<= 1 main_~i~0)) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (not (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) (+ |main_~#str1~0.offset| 1)))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= (+ main_~i~0 |main_~#str1~0.offset| 4294967297) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (= (+ main_~i~0 |main_~#str1~0.offset| 1) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2570#(or (<= 2 main_~i~0) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (forall ((v_ArrVal_234 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297)))))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_234 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))) (not (<= 1 main_~i~0)))} is VALID [2022-04-14 18:56:50,892 INFO L290 TraceCheckUtils]: 19: Hoare triple {2578#(or (not (<= 2 main_~i~0)) (<= 3 main_~i~0) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (not (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) (+ |main_~#str1~0.offset| 1)))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|) (+ main_~i~0 |main_~#str1~0.offset| 4294967296))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|))) (or (= (+ main_~i~0 |main_~#str1~0.offset|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2574#(or (<= 2 main_~i~0) (not (<= 1 main_~i~0)) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (not (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) (+ |main_~#str1~0.offset| 1)))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= (+ main_~i~0 |main_~#str1~0.offset| 4294967297) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (= (+ main_~i~0 |main_~#str1~0.offset| 1) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))))} is VALID [2022-04-14 18:56:50,893 INFO L290 TraceCheckUtils]: 18: Hoare triple {2582#(or (not (<= 2 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= (+ main_~i~0 |main_~#str1~0.offset|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))) (or (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) |main_~#str1~0.offset|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (not (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 2 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|) (+ main_~i~0 |main_~#str1~0.offset| 4294967296))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (= |main_~#str1~0.base| |main_~#str2~0.base|))))) (<= 3 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2578#(or (not (<= 2 main_~i~0)) (<= 3 main_~i~0) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (not (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) (+ |main_~#str1~0.offset| 1)))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|) (+ main_~i~0 |main_~#str1~0.offset| 4294967296))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|))) (or (= (+ main_~i~0 |main_~#str1~0.offset|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))))))} is VALID [2022-04-14 18:56:50,894 INFO L290 TraceCheckUtils]: 17: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2582#(or (not (<= 2 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= (+ main_~i~0 |main_~#str1~0.offset|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))) (or (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) |main_~#str1~0.offset|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (not (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 2 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|) (+ main_~i~0 |main_~#str1~0.offset| 4294967296))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (= |main_~#str1~0.base| |main_~#str2~0.base|))))) (<= 3 main_~i~0))} is VALID [2022-04-14 18:56:50,895 INFO L290 TraceCheckUtils]: 16: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-14 18:56:50,895 INFO L290 TraceCheckUtils]: 15: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-14 18:56:50,896 INFO L290 TraceCheckUtils]: 14: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-14 18:56:50,896 INFO L290 TraceCheckUtils]: 13: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-14 18:56:50,896 INFO L290 TraceCheckUtils]: 12: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-14 18:56:50,897 INFO L290 TraceCheckUtils]: 11: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-14 18:56:50,897 INFO L290 TraceCheckUtils]: 10: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-14 18:56:50,898 INFO L290 TraceCheckUtils]: 9: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-14 18:56:50,899 INFO L290 TraceCheckUtils]: 8: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-14 18:56:50,901 INFO L290 TraceCheckUtils]: 7: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-14 18:56:50,901 INFO L290 TraceCheckUtils]: 6: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-14 18:56:50,903 INFO L290 TraceCheckUtils]: 5: Hoare triple {2363#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-14 18:56:50,903 INFO L272 TraceCheckUtils]: 4: Hoare triple {2363#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-14 18:56:50,903 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2363#true} {2363#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-14 18:56:50,903 INFO L290 TraceCheckUtils]: 2: Hoare triple {2363#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-14 18:56:50,903 INFO L290 TraceCheckUtils]: 1: Hoare triple {2363#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2363#true} is VALID [2022-04-14 18:56:50,904 INFO L272 TraceCheckUtils]: 0: Hoare triple {2363#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-14 18:56:50,904 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-14 18:56:50,904 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1261704305] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-14 18:56:50,904 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-14 18:56:50,904 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 18, 17] total 37 [2022-04-14 18:56:50,904 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1289808181] [2022-04-14 18:56:50,904 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-14 18:56:50,905 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 39 [2022-04-14 18:56:50,905 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 18:56:50,905 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-14 18:56:51,151 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 76 edges. 76 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:51,151 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-04-14 18:56:51,151 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 18:56:51,151 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-04-14 18:56:51,152 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=156, Invalid=1107, Unknown=1, NotChecked=68, Total=1332 [2022-04-14 18:56:51,152 INFO L87 Difference]: Start difference. First operand 42 states and 44 transitions. Second operand has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-14 18:56:54,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:54,915 INFO L93 Difference]: Finished difference Result 67 states and 73 transitions. [2022-04-14 18:56:54,915 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-04-14 18:56:54,916 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 39 [2022-04-14 18:56:54,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 18:56:54,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-14 18:56:54,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 67 transitions. [2022-04-14 18:56:54,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-14 18:56:54,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 67 transitions. [2022-04-14 18:56:54,918 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 30 states and 67 transitions. [2022-04-14 18:56:55,009 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 67 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 18:56:55,010 INFO L225 Difference]: With dead ends: 67 [2022-04-14 18:56:55,010 INFO L226 Difference]: Without dead ends: 67 [2022-04-14 18:56:55,011 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 53 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 806 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=496, Invalid=3167, Unknown=1, NotChecked=118, Total=3782 [2022-04-14 18:56:55,011 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 56 mSDsluCounter, 76 mSDsCounter, 0 mSdLazyCounter, 545 mSolverCounterSat, 148 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 56 SdHoareTripleChecker+Valid, 90 SdHoareTripleChecker+Invalid, 838 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 148 IncrementalHoareTripleChecker+Valid, 545 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 145 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-14 18:56:55,011 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [56 Valid, 90 Invalid, 838 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [148 Valid, 545 Invalid, 0 Unknown, 145 Unchecked, 0.8s Time] [2022-04-14 18:56:55,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2022-04-14 18:56:55,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 59. [2022-04-14 18:56:55,014 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 18:56:55,014 INFO L82 GeneralOperation]: Start isEquivalent. First operand 67 states. Second operand has 59 states, 48 states have (on average 1.1041666666666667) internal successors, (53), 50 states have internal predecessors, (53), 6 states have call successors, (6), 5 states have call predecessors, (6), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-14 18:56:55,014 INFO L74 IsIncluded]: Start isIncluded. First operand 67 states. Second operand has 59 states, 48 states have (on average 1.1041666666666667) internal successors, (53), 50 states have internal predecessors, (53), 6 states have call successors, (6), 5 states have call predecessors, (6), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-14 18:56:55,014 INFO L87 Difference]: Start difference. First operand 67 states. Second operand has 59 states, 48 states have (on average 1.1041666666666667) internal successors, (53), 50 states have internal predecessors, (53), 6 states have call successors, (6), 5 states have call predecessors, (6), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-14 18:56:55,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:55,015 INFO L93 Difference]: Finished difference Result 67 states and 73 transitions. [2022-04-14 18:56:55,015 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 73 transitions. [2022-04-14 18:56:55,016 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:55,016 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:55,016 INFO L74 IsIncluded]: Start isIncluded. First operand has 59 states, 48 states have (on average 1.1041666666666667) internal successors, (53), 50 states have internal predecessors, (53), 6 states have call successors, (6), 5 states have call predecessors, (6), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 67 states. [2022-04-14 18:56:55,016 INFO L87 Difference]: Start difference. First operand has 59 states, 48 states have (on average 1.1041666666666667) internal successors, (53), 50 states have internal predecessors, (53), 6 states have call successors, (6), 5 states have call predecessors, (6), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 67 states. [2022-04-14 18:56:55,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 18:56:55,018 INFO L93 Difference]: Finished difference Result 67 states and 73 transitions. [2022-04-14 18:56:55,018 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 73 transitions. [2022-04-14 18:56:55,018 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 18:56:55,018 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 18:56:55,018 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 18:56:55,018 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 18:56:55,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 48 states have (on average 1.1041666666666667) internal successors, (53), 50 states have internal predecessors, (53), 6 states have call successors, (6), 5 states have call predecessors, (6), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-14 18:56:55,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 64 transitions. [2022-04-14 18:56:55,020 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 64 transitions. Word has length 39 [2022-04-14 18:56:55,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 18:56:55,020 INFO L478 AbstractCegarLoop]: Abstraction has 59 states and 64 transitions. [2022-04-14 18:56:55,020 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-14 18:56:55,020 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 64 transitions. [2022-04-14 18:56:55,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2022-04-14 18:56:55,021 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 18:56:55,021 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 18:56:55,037 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2022-04-14 18:56:55,236 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:55,237 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 18:56:55,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 18:56:55,237 INFO L85 PathProgramCache]: Analyzing trace with hash -821800838, now seen corresponding path program 2 times [2022-04-14 18:56:55,237 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 18:56:55,237 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1095842538] [2022-04-14 18:56:55,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 18:56:55,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 18:56:55,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:55,416 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 18:56:55,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:55,424 INFO L290 TraceCheckUtils]: 0: Hoare triple {2966#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2950#true} is VALID [2022-04-14 18:56:55,424 INFO L290 TraceCheckUtils]: 1: Hoare triple {2950#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-14 18:56:55,424 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2950#true} {2950#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-14 18:56:55,424 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2022-04-14 18:56:55,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:55,432 INFO L290 TraceCheckUtils]: 0: Hoare triple {2950#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2950#true} is VALID [2022-04-14 18:56:55,433 INFO L290 TraceCheckUtils]: 1: Hoare triple {2950#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-14 18:56:55,433 INFO L290 TraceCheckUtils]: 2: Hoare triple {2950#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-14 18:56:55,433 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2950#true} {2951#false} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2951#false} is VALID [2022-04-14 18:56:55,433 INFO L272 TraceCheckUtils]: 0: Hoare triple {2950#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2966#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 18:56:55,433 INFO L290 TraceCheckUtils]: 1: Hoare triple {2966#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2950#true} is VALID [2022-04-14 18:56:55,433 INFO L290 TraceCheckUtils]: 2: Hoare triple {2950#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-14 18:56:55,433 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2950#true} {2950#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-14 18:56:55,433 INFO L272 TraceCheckUtils]: 4: Hoare triple {2950#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-14 18:56:55,434 INFO L290 TraceCheckUtils]: 5: Hoare triple {2950#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-14 18:56:55,434 INFO L290 TraceCheckUtils]: 6: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-14 18:56:55,435 INFO L290 TraceCheckUtils]: 7: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-14 18:56:55,435 INFO L290 TraceCheckUtils]: 8: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-14 18:56:55,435 INFO L290 TraceCheckUtils]: 9: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-14 18:56:55,436 INFO L290 TraceCheckUtils]: 10: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-14 18:56:55,436 INFO L290 TraceCheckUtils]: 11: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-14 18:56:55,436 INFO L290 TraceCheckUtils]: 12: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-14 18:56:55,437 INFO L290 TraceCheckUtils]: 13: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-14 18:56:55,437 INFO L290 TraceCheckUtils]: 14: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-14 18:56:55,437 INFO L290 TraceCheckUtils]: 15: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-14 18:56:55,438 INFO L290 TraceCheckUtils]: 16: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-14 18:56:55,438 INFO L290 TraceCheckUtils]: 17: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2956#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (or (<= main_~max~0 5) (and (<= main_~max~0 4294967301) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-14 18:56:55,439 INFO L290 TraceCheckUtils]: 18: Hoare triple {2956#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (or (<= main_~max~0 5) (and (<= main_~max~0 4294967301) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2956#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (or (<= main_~max~0 5) (and (<= main_~max~0 4294967301) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-14 18:56:55,440 INFO L290 TraceCheckUtils]: 19: Hoare triple {2956#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (or (<= main_~max~0 5) (and (<= main_~max~0 4294967301) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2957#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967299) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-14 18:56:55,440 INFO L290 TraceCheckUtils]: 20: Hoare triple {2957#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967299) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2957#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967299) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-14 18:56:55,441 INFO L290 TraceCheckUtils]: 21: Hoare triple {2957#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967299) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2958#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967298))} is VALID [2022-04-14 18:56:55,441 INFO L290 TraceCheckUtils]: 22: Hoare triple {2958#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967298))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2958#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967298))} is VALID [2022-04-14 18:56:55,442 INFO L290 TraceCheckUtils]: 23: Hoare triple {2958#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967298))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2959#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967297))} is VALID [2022-04-14 18:56:55,442 INFO L290 TraceCheckUtils]: 24: Hoare triple {2959#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967297))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2959#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967297))} is VALID [2022-04-14 18:56:55,443 INFO L290 TraceCheckUtils]: 25: Hoare triple {2959#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967297))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2960#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967296) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-14 18:56:55,443 INFO L290 TraceCheckUtils]: 26: Hoare triple {2960#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967296) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2960#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967296) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-14 18:56:55,443 INFO L290 TraceCheckUtils]: 27: Hoare triple {2960#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967296) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2961#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967295) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-14 18:56:55,444 INFO L290 TraceCheckUtils]: 28: Hoare triple {2961#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967295) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2951#false} is VALID [2022-04-14 18:56:55,444 INFO L290 TraceCheckUtils]: 29: Hoare triple {2951#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2951#false} is VALID [2022-04-14 18:56:55,444 INFO L290 TraceCheckUtils]: 30: Hoare triple {2951#false} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {2951#false} is VALID [2022-04-14 18:56:55,444 INFO L290 TraceCheckUtils]: 31: Hoare triple {2951#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2951#false} is VALID [2022-04-14 18:56:55,444 INFO L290 TraceCheckUtils]: 32: Hoare triple {2951#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2951#false} is VALID [2022-04-14 18:56:55,444 INFO L272 TraceCheckUtils]: 33: Hoare triple {2951#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2950#true} is VALID [2022-04-14 18:56:55,444 INFO L290 TraceCheckUtils]: 34: Hoare triple {2950#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2950#true} is VALID [2022-04-14 18:56:55,444 INFO L290 TraceCheckUtils]: 35: Hoare triple {2950#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-14 18:56:55,444 INFO L290 TraceCheckUtils]: 36: Hoare triple {2950#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-14 18:56:55,445 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {2950#true} {2951#false} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2951#false} is VALID [2022-04-14 18:56:55,445 INFO L290 TraceCheckUtils]: 38: Hoare triple {2951#false} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {2951#false} is VALID [2022-04-14 18:56:55,445 INFO L290 TraceCheckUtils]: 39: Hoare triple {2951#false} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {2951#false} is VALID [2022-04-14 18:56:55,445 INFO L290 TraceCheckUtils]: 40: Hoare triple {2951#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2951#false} is VALID [2022-04-14 18:56:55,445 INFO L272 TraceCheckUtils]: 41: Hoare triple {2951#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2951#false} is VALID [2022-04-14 18:56:55,445 INFO L290 TraceCheckUtils]: 42: Hoare triple {2951#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2951#false} is VALID [2022-04-14 18:56:55,445 INFO L290 TraceCheckUtils]: 43: Hoare triple {2951#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2951#false} is VALID [2022-04-14 18:56:55,445 INFO L290 TraceCheckUtils]: 44: Hoare triple {2951#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2951#false} is VALID [2022-04-14 18:56:55,445 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 29 proven. 9 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2022-04-14 18:56:55,446 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 18:56:55,446 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1095842538] [2022-04-14 18:56:55,446 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1095842538] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-14 18:56:55,446 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [135800050] [2022-04-14 18:56:55,446 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-14 18:56:55,446 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-14 18:56:55,446 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 18:56:55,447 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-14 18:56:55,448 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-14 18:56:55,513 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-14 18:56:55,513 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-14 18:56:55,514 INFO L263 TraceCheckSpWp]: Trace formula consists of 216 conjuncts, 75 conjunts are in the unsatisfiable core [2022-04-14 18:56:55,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 18:56:55,557 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-14 18:56:55,573 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-14 18:56:55,648 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-04-14 18:56:55,699 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-04-14 18:56:55,735 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-04-14 18:56:55,784 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-04-14 18:56:55,833 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 49 [2022-04-14 18:56:55,837 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2022-04-14 18:56:55,841 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 14 [2022-04-14 18:56:55,902 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-04-14 18:56:56,021 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-04-14 18:56:56,131 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-04-14 18:56:56,251 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-04-14 18:56:56,348 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 20 [2022-04-14 18:56:56,481 INFO L356 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2022-04-14 18:56:56,481 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 32 [2022-04-14 18:57:00,289 WARN L855 $PredicateComparison]: unable to prove that (exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (let ((.cse1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296))) (let ((.cse0 (+ .cse1 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))) (and (<= .cse0 (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= .cse0 (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 .cse1 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |c_#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4))) (select (select |c_#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4))) (<= .cse0 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 .cse1 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)))))) is different from true [2022-04-14 18:57:06,901 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-14 18:57:06,907 INFO L356 Elim1Store]: treesize reduction 15, result has 16.7 percent of original size [2022-04-14 18:57:06,907 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 13 [2022-04-14 18:57:07,312 INFO L272 TraceCheckUtils]: 0: Hoare triple {2950#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-14 18:57:07,312 INFO L290 TraceCheckUtils]: 1: Hoare triple {2950#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2950#true} is VALID [2022-04-14 18:57:07,312 INFO L290 TraceCheckUtils]: 2: Hoare triple {2950#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-14 18:57:07,312 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2950#true} {2950#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-14 18:57:07,312 INFO L272 TraceCheckUtils]: 4: Hoare triple {2950#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-14 18:57:07,313 INFO L290 TraceCheckUtils]: 5: Hoare triple {2950#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {2985#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:57:07,314 INFO L290 TraceCheckUtils]: 6: Hoare triple {2985#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2985#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:57:07,314 INFO L290 TraceCheckUtils]: 7: Hoare triple {2985#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2992#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} is VALID [2022-04-14 18:57:07,315 INFO L290 TraceCheckUtils]: 8: Hoare triple {2992#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2992#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} is VALID [2022-04-14 18:57:07,315 INFO L290 TraceCheckUtils]: 9: Hoare triple {2992#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2999#(and (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:57:07,315 INFO L290 TraceCheckUtils]: 10: Hoare triple {2999#(and (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2999#(and (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:57:07,316 INFO L290 TraceCheckUtils]: 11: Hoare triple {2999#(and (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3006#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0))} is VALID [2022-04-14 18:57:07,316 INFO L290 TraceCheckUtils]: 12: Hoare triple {3006#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3006#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0))} is VALID [2022-04-14 18:57:07,317 INFO L290 TraceCheckUtils]: 13: Hoare triple {3006#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3013#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 main_~i~0))} is VALID [2022-04-14 18:57:07,317 INFO L290 TraceCheckUtils]: 14: Hoare triple {3013#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 main_~i~0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3017#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:57:07,318 INFO L290 TraceCheckUtils]: 15: Hoare triple {3017#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3017#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:57:07,318 INFO L290 TraceCheckUtils]: 16: Hoare triple {3017#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {3017#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:57:07,319 INFO L290 TraceCheckUtils]: 17: Hoare triple {3017#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {3027#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-14 18:57:07,320 INFO L290 TraceCheckUtils]: 18: Hoare triple {3027#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3031#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-14 18:57:07,320 INFO L290 TraceCheckUtils]: 19: Hoare triple {3031#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3035#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:57:07,321 INFO L290 TraceCheckUtils]: 20: Hoare triple {3035#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3039#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= |main_~#str1~0.offset| 0) (= main_~j~0 2) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:57:07,322 INFO L290 TraceCheckUtils]: 21: Hoare triple {3039#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= |main_~#str1~0.offset| 0) (= main_~j~0 2) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3043#(and (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (= main_~j~0 2) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:57:07,323 INFO L290 TraceCheckUtils]: 22: Hoare triple {3043#(and (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (= main_~j~0 2) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3047#(and (= main_~j~0 3) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:57:07,323 INFO L290 TraceCheckUtils]: 23: Hoare triple {3047#(and (= main_~j~0 3) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3051#(and (= main_~j~0 3) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-14 18:57:07,324 INFO L290 TraceCheckUtils]: 24: Hoare triple {3051#(and (= main_~j~0 3) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3055#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-14 18:57:07,325 INFO L290 TraceCheckUtils]: 25: Hoare triple {3055#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3059#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 4) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:57:07,326 INFO L290 TraceCheckUtils]: 26: Hoare triple {3059#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 4) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3063#(and (= |main_~#str1~0.offset| 0) (= (+ (- 1) main_~j~0) 4) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 4) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:57:07,327 INFO L290 TraceCheckUtils]: 27: Hoare triple {3063#(and (= |main_~#str1~0.offset| 0) (= (+ (- 1) main_~j~0) 4) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 4) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3067#(and (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ 5 main_~i~0) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (= (+ 5 main_~i~0) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1))) (= (+ (- 1) main_~j~0) 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:57:07,328 INFO L290 TraceCheckUtils]: 28: Hoare triple {3067#(and (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ 5 main_~i~0) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (= (+ 5 main_~i~0) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1))) (= (+ (- 1) main_~j~0) 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3071#(and (= (+ 5 main_~i~0) (mod (+ main_~max~0 4294967295) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:57:07,329 INFO L290 TraceCheckUtils]: 29: Hoare triple {3071#(and (= (+ 5 main_~i~0) (mod (+ main_~max~0 4294967295) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3075#(and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= |main_~#str1~0.offset| 0) (<= 5 (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 6)))} is VALID [2022-04-14 18:57:07,329 INFO L290 TraceCheckUtils]: 30: Hoare triple {3075#(and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= |main_~#str1~0.offset| 0) (<= 5 (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 6)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {3079#(and (< (mod (+ main_~max~0 4294967295) 4294967296) 6) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= |main_~#str1~0.offset| 0) (<= 5 (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-14 18:57:07,331 INFO L290 TraceCheckUtils]: 31: Hoare triple {3079#(and (< (mod (+ main_~max~0 4294967295) 4294967296) 6) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= |main_~#str1~0.offset| 0) (<= 5 (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {3083#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} is VALID [2022-04-14 18:57:07,332 INFO L290 TraceCheckUtils]: 32: Hoare triple {3083#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {3083#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} is VALID [2022-04-14 18:57:07,596 INFO L272 TraceCheckUtils]: 33: Hoare triple {3083#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {3090#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} is VALID [2022-04-14 18:57:07,602 INFO L290 TraceCheckUtils]: 34: Hoare triple {3090#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3090#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} is VALID [2022-04-14 18:57:07,606 INFO L290 TraceCheckUtils]: 35: Hoare triple {3090#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3090#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} is VALID [2022-04-14 18:57:07,615 INFO L290 TraceCheckUtils]: 36: Hoare triple {3090#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3090#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} is VALID [2022-04-14 18:57:07,615 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {3090#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} {3083#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {3083#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} is VALID [2022-04-14 18:57:07,617 INFO L290 TraceCheckUtils]: 38: Hoare triple {3083#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {3106#(and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~j~0 1) 4294967296) (- 4) |main_~#str1~0.offset|))) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div (+ main_~j~0 (- 4)) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)))} is VALID [2022-04-14 18:57:07,618 INFO L290 TraceCheckUtils]: 39: Hoare triple {3106#(and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~j~0 1) 4294967296) (- 4) |main_~#str1~0.offset|))) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div (+ main_~j~0 (- 4)) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {3110#(and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~j~0 1) 4294967296) (- 4) |main_~#str1~0.offset|))) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (= main_~i~0 1) (< main_~j~0 4294967295) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div (+ main_~j~0 (- 4)) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)))} is VALID [2022-04-14 18:57:07,620 INFO L290 TraceCheckUtils]: 40: Hoare triple {3110#(and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~j~0 1) 4294967296) (- 4) |main_~#str1~0.offset|))) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (= main_~i~0 1) (< main_~j~0 4294967295) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div (+ main_~j~0 (- 4)) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {3114#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-14 18:57:07,621 INFO L272 TraceCheckUtils]: 41: Hoare triple {3114#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {3118#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-14 18:57:07,621 INFO L290 TraceCheckUtils]: 42: Hoare triple {3118#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3122#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-14 18:57:07,621 INFO L290 TraceCheckUtils]: 43: Hoare triple {3122#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2951#false} is VALID [2022-04-14 18:57:07,622 INFO L290 TraceCheckUtils]: 44: Hoare triple {2951#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2951#false} is VALID [2022-04-14 18:57:07,622 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 4 proven. 59 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2022-04-14 18:57:07,622 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-14 18:57:17,107 WARN L232 SmtUtils]: Spent 8.76s on a formula simplification that was a NOOP. DAG size: 47 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-14 18:57:24,542 WARN L232 SmtUtils]: Spent 7.27s on a formula simplification that was a NOOP. DAG size: 48 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-14 18:57:24,634 WARN L833 $PredicateComparison]: unable to prove that (or (not (<= 2 c_main_~i~0)) (<= 3 c_main_~i~0) (let ((.cse1 (<= (mod (+ 4294967295 c_main_~max~0) 4294967296) 2147483647))) (and (or (forall ((v_ArrVal_311 Int) (v_ArrVal_307 (Array Int Int)) (|main_~#str2~0.offset| Int)) (let ((.cse0 (store (store v_ArrVal_307 (+ |main_~#str2~0.offset| c_main_~j~0 1) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| v_ArrVal_307) |c_main_~#str1~0.base|) (+ (- 1) |c_main_~#str1~0.offset| c_main_~i~0))) (+ 2 |main_~#str2~0.offset| c_main_~j~0) v_ArrVal_311))) (= (select .cse0 (+ |main_~#str2~0.offset| (- 4294967297) (mod (+ 4294967295 c_main_~max~0) 4294967296))) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| .cse0) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| 1))))) .cse1) (or (not .cse1) (forall ((v_ArrVal_311 Int) (v_ArrVal_307 (Array Int Int)) (|main_~#str2~0.offset| Int)) (let ((.cse2 (store (store v_ArrVal_307 (+ |main_~#str2~0.offset| c_main_~j~0 1) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| v_ArrVal_307) |c_main_~#str1~0.base|) (+ (- 1) |c_main_~#str1~0.offset| c_main_~i~0))) (+ 2 |main_~#str2~0.offset| c_main_~j~0) v_ArrVal_311))) (= (select .cse2 (+ (- 1) |main_~#str2~0.offset| (mod (+ 4294967295 c_main_~max~0) 4294967296))) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| .cse2) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| 1))))))))) is different from false [2022-04-14 18:57:24,727 WARN L833 $PredicateComparison]: unable to prove that (or (<= 4 c_main_~i~0) (not (<= 3 c_main_~i~0)) (let ((.cse1 (<= (mod (+ 4294967295 c_main_~max~0) 4294967296) 2147483647))) (and (or (forall ((v_ArrVal_311 Int) (v_ArrVal_307 (Array Int Int)) (|main_~#str2~0.offset| Int)) (let ((.cse0 (store (store v_ArrVal_307 (+ |main_~#str2~0.offset| c_main_~j~0 1) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| v_ArrVal_307) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| c_main_~i~0 (- 2)))) (+ 2 |main_~#str2~0.offset| c_main_~j~0) v_ArrVal_311))) (= (select (select (store |c_#memory_int| |c_main_~#str2~0.base| .cse0) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| 1)) (select .cse0 (+ |main_~#str2~0.offset| (- 4294967297) (mod (+ 4294967295 c_main_~max~0) 4294967296)))))) .cse1) (or (not .cse1) (forall ((v_ArrVal_311 Int) (v_ArrVal_307 (Array Int Int)) (|main_~#str2~0.offset| Int)) (let ((.cse2 (store (store v_ArrVal_307 (+ |main_~#str2~0.offset| c_main_~j~0 1) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| v_ArrVal_307) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| c_main_~i~0 (- 2)))) (+ 2 |main_~#str2~0.offset| c_main_~j~0) v_ArrVal_311))) (= (select .cse2 (+ (- 1) |main_~#str2~0.offset| (mod (+ 4294967295 c_main_~max~0) 4294967296))) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| .cse2) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| 1))))))))) is different from false [2022-04-14 18:57:24,815 WARN L833 $PredicateComparison]: unable to prove that (or (<= 4 c_main_~i~0) (not (<= 3 c_main_~i~0)) (let ((.cse1 (<= (mod (+ 4294967295 c_main_~max~0) 4294967296) 2147483647))) (and (or (forall ((v_ArrVal_311 Int) (v_ArrVal_307 (Array Int Int)) (|main_~#str2~0.offset| Int)) (let ((.cse0 (store (store v_ArrVal_307 (+ 2 |main_~#str2~0.offset| c_main_~j~0) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| v_ArrVal_307) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| c_main_~i~0 (- 2)))) (+ 3 |main_~#str2~0.offset| c_main_~j~0) v_ArrVal_311))) (= (select .cse0 (+ |main_~#str2~0.offset| (- 4294967297) (mod (+ 4294967295 c_main_~max~0) 4294967296))) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| .cse0) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| 1))))) .cse1) (or (not .cse1) (forall ((v_ArrVal_311 Int) (v_ArrVal_307 (Array Int Int)) (|main_~#str2~0.offset| Int)) (let ((.cse2 (store (store v_ArrVal_307 (+ 2 |main_~#str2~0.offset| c_main_~j~0) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| v_ArrVal_307) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| c_main_~i~0 (- 2)))) (+ 3 |main_~#str2~0.offset| c_main_~j~0) v_ArrVal_311))) (= (select .cse2 (+ (- 1) |main_~#str2~0.offset| (mod (+ 4294967295 c_main_~max~0) 4294967296))) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| .cse2) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| 1))))))))) is different from false [2022-04-14 18:57:24,909 WARN L833 $PredicateComparison]: unable to prove that (or (<= 5 c_main_~i~0) (let ((.cse1 (<= (mod (+ 4294967295 c_main_~max~0) 4294967296) 2147483647))) (and (or (forall ((v_ArrVal_311 Int) (v_ArrVal_307 (Array Int Int)) (|main_~#str2~0.offset| Int)) (let ((.cse0 (store (store v_ArrVal_307 (+ 2 |main_~#str2~0.offset| c_main_~j~0) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| v_ArrVal_307) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| c_main_~i~0 (- 3)))) (+ 3 |main_~#str2~0.offset| c_main_~j~0) v_ArrVal_311))) (= (select .cse0 (+ |main_~#str2~0.offset| (- 4294967297) (mod (+ 4294967295 c_main_~max~0) 4294967296))) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| .cse0) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| 1))))) .cse1) (or (not .cse1) (forall ((v_ArrVal_311 Int) (v_ArrVal_307 (Array Int Int)) (|main_~#str2~0.offset| Int)) (let ((.cse2 (store (store v_ArrVal_307 (+ 2 |main_~#str2~0.offset| c_main_~j~0) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| v_ArrVal_307) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| c_main_~i~0 (- 3)))) (+ 3 |main_~#str2~0.offset| c_main_~j~0) v_ArrVal_311))) (= (select .cse2 (+ (- 1) |main_~#str2~0.offset| (mod (+ 4294967295 c_main_~max~0) 4294967296))) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| .cse2) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| 1)))))))) (not (<= 4 c_main_~i~0))) is different from false [2022-04-14 18:57:25,007 WARN L833 $PredicateComparison]: unable to prove that (or (<= 5 c_main_~i~0) (let ((.cse1 (<= (mod (+ 4294967295 c_main_~max~0) 4294967296) 2147483647))) (and (or (forall ((v_ArrVal_311 Int) (v_ArrVal_307 (Array Int Int)) (|main_~#str2~0.offset| Int)) (let ((.cse0 (store (store v_ArrVal_307 (+ 3 |main_~#str2~0.offset| c_main_~j~0) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| v_ArrVal_307) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| c_main_~i~0 (- 3)))) (+ |main_~#str2~0.offset| c_main_~j~0 4) v_ArrVal_311))) (= (select .cse0 (+ |main_~#str2~0.offset| (- 4294967297) (mod (+ 4294967295 c_main_~max~0) 4294967296))) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| .cse0) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| 1))))) .cse1) (or (not .cse1) (forall ((v_ArrVal_311 Int) (v_ArrVal_307 (Array Int Int)) (|main_~#str2~0.offset| Int)) (let ((.cse2 (store (store v_ArrVal_307 (+ 3 |main_~#str2~0.offset| c_main_~j~0) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| v_ArrVal_307) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| c_main_~i~0 (- 3)))) (+ |main_~#str2~0.offset| c_main_~j~0 4) v_ArrVal_311))) (= (select .cse2 (+ (- 1) |main_~#str2~0.offset| (mod (+ 4294967295 c_main_~max~0) 4294967296))) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| .cse2) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| 1)))))))) (not (<= 4 c_main_~i~0))) is different from false [2022-04-14 18:57:25,104 WARN L833 $PredicateComparison]: unable to prove that (or (not (<= 5 c_main_~i~0)) (let ((.cse0 (<= (mod (+ 4294967295 c_main_~max~0) 4294967296) 2147483647))) (and (or (not .cse0) (forall ((v_ArrVal_311 Int) (v_ArrVal_307 (Array Int Int)) (|main_~#str2~0.offset| Int)) (let ((.cse1 (store (store v_ArrVal_307 (+ 3 |main_~#str2~0.offset| c_main_~j~0) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| v_ArrVal_307) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| c_main_~i~0 (- 4)))) (+ |main_~#str2~0.offset| c_main_~j~0 4) v_ArrVal_311))) (= (select .cse1 (+ (- 1) |main_~#str2~0.offset| (mod (+ 4294967295 c_main_~max~0) 4294967296))) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| .cse1) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| 1)))))) (or (forall ((v_ArrVal_311 Int) (v_ArrVal_307 (Array Int Int)) (|main_~#str2~0.offset| Int)) (let ((.cse2 (store (store v_ArrVal_307 (+ 3 |main_~#str2~0.offset| c_main_~j~0) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| v_ArrVal_307) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| c_main_~i~0 (- 4)))) (+ |main_~#str2~0.offset| c_main_~j~0 4) v_ArrVal_311))) (= (select .cse2 (+ |main_~#str2~0.offset| (- 4294967297) (mod (+ 4294967295 c_main_~max~0) 4294967296))) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| .cse2) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| 1))))) .cse0))) (<= 6 c_main_~i~0)) is different from false