/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/locks/test_locks_14-1.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-e106359-m [2022-04-14 23:27:59,363 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-14 23:27:59,365 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-14 23:27:59,412 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-14 23:27:59,421 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-14 23:27:59,422 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-14 23:27:59,422 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-14 23:27:59,429 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-14 23:27:59,430 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-14 23:27:59,435 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-14 23:27:59,439 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-14 23:27:59,441 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-14 23:27:59,443 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-14 23:27:59,446 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-14 23:27:59,446 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-14 23:27:59,447 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-14 23:27:59,448 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-14 23:27:59,450 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-14 23:27:59,457 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-14 23:27:59,458 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-14 23:27:59,460 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-14 23:27:59,460 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-14 23:27:59,470 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-14 23:27:59,470 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-14 23:27:59,472 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-14 23:27:59,472 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-14 23:27:59,472 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-14 23:27:59,472 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-14 23:27:59,472 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-14 23:27:59,472 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-14 23:27:59,473 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-14 23:27:59,473 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-14 23:27:59,473 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-14 23:27:59,474 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-14 23:27:59,474 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-14 23:27:59,474 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-14 23:27:59,474 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-14 23:27:59,474 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-14 23:27:59,474 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-14 23:27:59,474 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-14 23:27:59,474 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-14 23:27:59,475 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-14 23:27:59,475 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-14 23:27:59,475 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-14 23:27:59,475 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-14 23:27:59,667 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-14 23:27:59,698 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-14 23:27:59,700 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-14 23:27:59,701 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-14 23:27:59,702 INFO L275 PluginConnector]: CDTParser initialized [2022-04-14 23:27:59,703 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/locks/test_locks_14-1.c [2022-04-14 23:27:59,768 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/28a3a67ef/17ef84174b7248a0acda66285dc024bb/FLAGf7247399b [2022-04-14 23:28:00,131 INFO L306 CDTParser]: Found 1 translation units. [2022-04-14 23:28:00,132 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_14-1.c [2022-04-14 23:28:00,142 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/28a3a67ef/17ef84174b7248a0acda66285dc024bb/FLAGf7247399b [2022-04-14 23:28:00,159 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/28a3a67ef/17ef84174b7248a0acda66285dc024bb [2022-04-14 23:28:00,161 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-14 23:28:00,163 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-14 23:28:00,164 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-14 23:28:00,164 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-14 23:28:00,168 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-14 23:28:00,169 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.04 11:28:00" (1/1) ... [2022-04-14 23:28:00,170 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5e1a7507 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 11:28:00, skipping insertion in model container [2022-04-14 23:28:00,171 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.04 11:28:00" (1/1) ... [2022-04-14 23:28:00,176 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-14 23:28:00,203 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-14 23:28:00,441 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_14-1.c[5283,5296] [2022-04-14 23:28:00,454 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-14 23:28:00,465 INFO L203 MainTranslator]: Completed pre-run [2022-04-14 23:28:00,508 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_14-1.c[5283,5296] [2022-04-14 23:28:00,509 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-14 23:28:00,521 INFO L208 MainTranslator]: Completed translation [2022-04-14 23:28:00,522 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 11:28:00 WrapperNode [2022-04-14 23:28:00,522 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-14 23:28:00,523 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-14 23:28:00,523 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-14 23:28:00,524 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-14 23:28:00,534 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 11:28:00" (1/1) ... [2022-04-14 23:28:00,534 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 11:28:00" (1/1) ... [2022-04-14 23:28:00,550 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 11:28:00" (1/1) ... [2022-04-14 23:28:00,551 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 11:28:00" (1/1) ... [2022-04-14 23:28:00,559 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 11:28:00" (1/1) ... [2022-04-14 23:28:00,581 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 11:28:00" (1/1) ... [2022-04-14 23:28:00,582 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 11:28:00" (1/1) ... [2022-04-14 23:28:00,584 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-14 23:28:00,585 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-14 23:28:00,585 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-14 23:28:00,585 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-14 23:28:00,589 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 11:28:00" (1/1) ... [2022-04-14 23:28:00,595 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-14 23:28:00,604 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-14 23:28:00,616 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-14 23:28:00,634 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-14 23:28:00,667 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-14 23:28:00,668 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-14 23:28:00,668 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-14 23:28:00,669 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-14 23:28:00,669 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-14 23:28:00,669 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-14 23:28:00,669 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-14 23:28:00,670 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-14 23:28:00,670 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-14 23:28:00,670 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-14 23:28:00,670 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-14 23:28:00,670 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-14 23:28:00,671 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-14 23:28:00,671 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-14 23:28:00,671 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-14 23:28:00,673 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-14 23:28:00,742 INFO L234 CfgBuilder]: Building ICFG [2022-04-14 23:28:00,744 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-14 23:28:01,076 INFO L275 CfgBuilder]: Performing block encoding [2022-04-14 23:28:01,083 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-14 23:28:01,083 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-14 23:28:01,084 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 11:28:01 BoogieIcfgContainer [2022-04-14 23:28:01,085 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-14 23:28:01,085 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-14 23:28:01,085 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-14 23:28:01,087 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-14 23:28:01,090 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 11:28:01" (1/1) ... [2022-04-14 23:28:01,092 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-14 23:28:01,152 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 14.04 11:28:01 BasicIcfg [2022-04-14 23:28:01,153 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-14 23:28:01,158 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-14 23:28:01,158 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-14 23:28:01,161 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-14 23:28:01,161 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.04 11:28:00" (1/4) ... [2022-04-14 23:28:01,162 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1766a1f2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.04 11:28:01, skipping insertion in model container [2022-04-14 23:28:01,162 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 11:28:00" (2/4) ... [2022-04-14 23:28:01,164 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1766a1f2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.04 11:28:01, skipping insertion in model container [2022-04-14 23:28:01,164 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.04 11:28:01" (3/4) ... [2022-04-14 23:28:01,165 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1766a1f2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.04 11:28:01, skipping insertion in model container [2022-04-14 23:28:01,165 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 14.04 11:28:01" (4/4) ... [2022-04-14 23:28:01,166 INFO L111 eAbstractionObserver]: Analyzing ICFG test_locks_14-1.cJordan [2022-04-14 23:28:01,170 INFO L202 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-14 23:28:01,171 INFO L161 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-14 23:28:01,215 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-14 23:28:01,221 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-14 23:28:01,222 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-14 23:28:01,240 INFO L276 IsEmpty]: Start isEmpty. Operand has 57 states, 51 states have (on average 1.9019607843137254) internal successors, (97), 52 states have internal predecessors, (97), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-14 23:28:01,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-14 23:28:01,248 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:01,248 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:01,249 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:01,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:01,254 INFO L85 PathProgramCache]: Analyzing trace with hash 267710119, now seen corresponding path program 1 times [2022-04-14 23:28:01,263 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:01,263 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2001710445] [2022-04-14 23:28:01,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:01,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:01,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:01,530 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:01,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:01,543 INFO L290 TraceCheckUtils]: 0: Hoare triple {66#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {60#true} is VALID [2022-04-14 23:28:01,544 INFO L290 TraceCheckUtils]: 1: Hoare triple {60#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-14 23:28:01,544 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {60#true} {60#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-14 23:28:01,546 INFO L272 TraceCheckUtils]: 0: Hoare triple {60#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {66#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:01,546 INFO L290 TraceCheckUtils]: 1: Hoare triple {66#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {60#true} is VALID [2022-04-14 23:28:01,546 INFO L290 TraceCheckUtils]: 2: Hoare triple {60#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-14 23:28:01,547 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {60#true} {60#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-14 23:28:01,547 INFO L272 TraceCheckUtils]: 4: Hoare triple {60#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-14 23:28:01,548 INFO L290 TraceCheckUtils]: 5: Hoare triple {60#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {60#true} is VALID [2022-04-14 23:28:01,548 INFO L290 TraceCheckUtils]: 6: Hoare triple {60#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {60#true} is VALID [2022-04-14 23:28:01,548 INFO L290 TraceCheckUtils]: 7: Hoare triple {60#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {60#true} is VALID [2022-04-14 23:28:01,549 INFO L290 TraceCheckUtils]: 8: Hoare triple {60#true} [284] L88-->L88-2: Formula: (and (= v_main_~lk1~0_3 1) (not (= v_main_~p1~0_2 0))) InVars {main_~p1~0=v_main_~p1~0_2} OutVars{main_~p1~0=v_main_~p1~0_2, main_~lk1~0=v_main_~lk1~0_3} AuxVars[] AssignedVars[main_~lk1~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-14 23:28:01,550 INFO L290 TraceCheckUtils]: 9: Hoare triple {65#(= main_~lk1~0 1)} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-14 23:28:01,550 INFO L290 TraceCheckUtils]: 10: Hoare triple {65#(= main_~lk1~0 1)} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-14 23:28:01,551 INFO L290 TraceCheckUtils]: 11: Hoare triple {65#(= main_~lk1~0 1)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-14 23:28:01,551 INFO L290 TraceCheckUtils]: 12: Hoare triple {65#(= main_~lk1~0 1)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-14 23:28:01,552 INFO L290 TraceCheckUtils]: 13: Hoare triple {65#(= main_~lk1~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-14 23:28:01,553 INFO L290 TraceCheckUtils]: 14: Hoare triple {65#(= main_~lk1~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-14 23:28:01,553 INFO L290 TraceCheckUtils]: 15: Hoare triple {65#(= main_~lk1~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-14 23:28:01,554 INFO L290 TraceCheckUtils]: 16: Hoare triple {65#(= main_~lk1~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-14 23:28:01,554 INFO L290 TraceCheckUtils]: 17: Hoare triple {65#(= main_~lk1~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-14 23:28:01,555 INFO L290 TraceCheckUtils]: 18: Hoare triple {65#(= main_~lk1~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-14 23:28:01,555 INFO L290 TraceCheckUtils]: 19: Hoare triple {65#(= main_~lk1~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-14 23:28:01,556 INFO L290 TraceCheckUtils]: 20: Hoare triple {65#(= main_~lk1~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-14 23:28:01,556 INFO L290 TraceCheckUtils]: 21: Hoare triple {65#(= main_~lk1~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-14 23:28:01,557 INFO L290 TraceCheckUtils]: 22: Hoare triple {65#(= main_~lk1~0 1)} [312] L140-1-->L147: Formula: (not (= v_main_~p1~0_4 0)) InVars {main_~p1~0=v_main_~p1~0_4} OutVars{main_~p1~0=v_main_~p1~0_4} AuxVars[] AssignedVars[] {65#(= main_~lk1~0 1)} is VALID [2022-04-14 23:28:01,557 INFO L290 TraceCheckUtils]: 23: Hoare triple {65#(= main_~lk1~0 1)} [314] L147-->L212-1: Formula: (not (= v_main_~lk1~0_4 1)) InVars {main_~lk1~0=v_main_~lk1~0_4} OutVars{main_~lk1~0=v_main_~lk1~0_4} AuxVars[] AssignedVars[] {61#false} is VALID [2022-04-14 23:28:01,558 INFO L290 TraceCheckUtils]: 24: Hoare triple {61#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {61#false} is VALID [2022-04-14 23:28:01,559 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:01,559 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:01,559 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2001710445] [2022-04-14 23:28:01,560 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2001710445] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:01,560 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:01,560 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:01,562 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [829164208] [2022-04-14 23:28:01,562 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:01,567 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-14 23:28:01,568 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:01,571 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:01,624 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:01,625 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:01,625 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:01,643 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:01,644 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:01,646 INFO L87 Difference]: Start difference. First operand has 57 states, 51 states have (on average 1.9019607843137254) internal successors, (97), 52 states have internal predecessors, (97), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:02,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:02,106 INFO L93 Difference]: Finished difference Result 105 states and 186 transitions. [2022-04-14 23:28:02,106 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:02,108 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-14 23:28:02,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:02,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:02,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 193 transitions. [2022-04-14 23:28:02,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:02,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 193 transitions. [2022-04-14 23:28:02,154 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 193 transitions. [2022-04-14 23:28:02,335 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 193 edges. 193 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:02,351 INFO L225 Difference]: With dead ends: 105 [2022-04-14 23:28:02,351 INFO L226 Difference]: Without dead ends: 97 [2022-04-14 23:28:02,353 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:02,358 INFO L913 BasicCegarLoop]: 104 mSDtfsCounter, 242 mSDsluCounter, 9 mSDsCounter, 0 mSdLazyCounter, 97 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 242 SdHoareTripleChecker+Valid, 113 SdHoareTripleChecker+Invalid, 99 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 97 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:02,359 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [242 Valid, 113 Invalid, 99 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 97 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:02,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-04-14 23:28:02,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 67. [2022-04-14 23:28:02,393 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:02,395 INFO L82 GeneralOperation]: Start isEquivalent. First operand 97 states. Second operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:02,398 INFO L74 IsIncluded]: Start isIncluded. First operand 97 states. Second operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:02,400 INFO L87 Difference]: Start difference. First operand 97 states. Second operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:02,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:02,410 INFO L93 Difference]: Finished difference Result 97 states and 177 transitions. [2022-04-14 23:28:02,410 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 177 transitions. [2022-04-14 23:28:02,412 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:02,412 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:02,412 INFO L74 IsIncluded]: Start isIncluded. First operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-14 23:28:02,414 INFO L87 Difference]: Start difference. First operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-14 23:28:02,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:02,431 INFO L93 Difference]: Finished difference Result 97 states and 177 transitions. [2022-04-14 23:28:02,431 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 177 transitions. [2022-04-14 23:28:02,433 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:02,433 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:02,433 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:02,433 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:02,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:02,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 122 transitions. [2022-04-14 23:28:02,441 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 122 transitions. Word has length 25 [2022-04-14 23:28:02,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:02,441 INFO L478 AbstractCegarLoop]: Abstraction has 67 states and 122 transitions. [2022-04-14 23:28:02,442 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:02,442 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 122 transitions. [2022-04-14 23:28:02,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-14 23:28:02,443 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:02,443 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:02,443 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-14 23:28:02,443 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:02,444 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:02,444 INFO L85 PathProgramCache]: Analyzing trace with hash 1621019816, now seen corresponding path program 1 times [2022-04-14 23:28:02,444 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:02,444 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1211132059] [2022-04-14 23:28:02,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:02,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:02,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:02,526 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:02,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:02,540 INFO L290 TraceCheckUtils]: 0: Hoare triple {444#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {438#true} is VALID [2022-04-14 23:28:02,540 INFO L290 TraceCheckUtils]: 1: Hoare triple {438#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {438#true} is VALID [2022-04-14 23:28:02,540 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {438#true} {438#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {438#true} is VALID [2022-04-14 23:28:02,541 INFO L272 TraceCheckUtils]: 0: Hoare triple {438#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {444#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:02,547 INFO L290 TraceCheckUtils]: 1: Hoare triple {444#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {438#true} is VALID [2022-04-14 23:28:02,547 INFO L290 TraceCheckUtils]: 2: Hoare triple {438#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {438#true} is VALID [2022-04-14 23:28:02,548 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {438#true} {438#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {438#true} is VALID [2022-04-14 23:28:02,548 INFO L272 TraceCheckUtils]: 4: Hoare triple {438#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {438#true} is VALID [2022-04-14 23:28:02,548 INFO L290 TraceCheckUtils]: 5: Hoare triple {438#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {438#true} is VALID [2022-04-14 23:28:02,549 INFO L290 TraceCheckUtils]: 6: Hoare triple {438#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {438#true} is VALID [2022-04-14 23:28:02,549 INFO L290 TraceCheckUtils]: 7: Hoare triple {438#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {438#true} is VALID [2022-04-14 23:28:02,550 INFO L290 TraceCheckUtils]: 8: Hoare triple {438#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {443#(= main_~p1~0 0)} is VALID [2022-04-14 23:28:02,551 INFO L290 TraceCheckUtils]: 9: Hoare triple {443#(= main_~p1~0 0)} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {443#(= main_~p1~0 0)} is VALID [2022-04-14 23:28:02,552 INFO L290 TraceCheckUtils]: 10: Hoare triple {443#(= main_~p1~0 0)} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {443#(= main_~p1~0 0)} is VALID [2022-04-14 23:28:02,552 INFO L290 TraceCheckUtils]: 11: Hoare triple {443#(= main_~p1~0 0)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {443#(= main_~p1~0 0)} is VALID [2022-04-14 23:28:02,553 INFO L290 TraceCheckUtils]: 12: Hoare triple {443#(= main_~p1~0 0)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {443#(= main_~p1~0 0)} is VALID [2022-04-14 23:28:02,553 INFO L290 TraceCheckUtils]: 13: Hoare triple {443#(= main_~p1~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {443#(= main_~p1~0 0)} is VALID [2022-04-14 23:28:02,554 INFO L290 TraceCheckUtils]: 14: Hoare triple {443#(= main_~p1~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {443#(= main_~p1~0 0)} is VALID [2022-04-14 23:28:02,554 INFO L290 TraceCheckUtils]: 15: Hoare triple {443#(= main_~p1~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {443#(= main_~p1~0 0)} is VALID [2022-04-14 23:28:02,554 INFO L290 TraceCheckUtils]: 16: Hoare triple {443#(= main_~p1~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {443#(= main_~p1~0 0)} is VALID [2022-04-14 23:28:02,555 INFO L290 TraceCheckUtils]: 17: Hoare triple {443#(= main_~p1~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {443#(= main_~p1~0 0)} is VALID [2022-04-14 23:28:02,555 INFO L290 TraceCheckUtils]: 18: Hoare triple {443#(= main_~p1~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {443#(= main_~p1~0 0)} is VALID [2022-04-14 23:28:02,556 INFO L290 TraceCheckUtils]: 19: Hoare triple {443#(= main_~p1~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {443#(= main_~p1~0 0)} is VALID [2022-04-14 23:28:02,556 INFO L290 TraceCheckUtils]: 20: Hoare triple {443#(= main_~p1~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {443#(= main_~p1~0 0)} is VALID [2022-04-14 23:28:02,557 INFO L290 TraceCheckUtils]: 21: Hoare triple {443#(= main_~p1~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {443#(= main_~p1~0 0)} is VALID [2022-04-14 23:28:02,557 INFO L290 TraceCheckUtils]: 22: Hoare triple {443#(= main_~p1~0 0)} [312] L140-1-->L147: Formula: (not (= v_main_~p1~0_4 0)) InVars {main_~p1~0=v_main_~p1~0_4} OutVars{main_~p1~0=v_main_~p1~0_4} AuxVars[] AssignedVars[] {439#false} is VALID [2022-04-14 23:28:02,557 INFO L290 TraceCheckUtils]: 23: Hoare triple {439#false} [314] L147-->L212-1: Formula: (not (= v_main_~lk1~0_4 1)) InVars {main_~lk1~0=v_main_~lk1~0_4} OutVars{main_~lk1~0=v_main_~lk1~0_4} AuxVars[] AssignedVars[] {439#false} is VALID [2022-04-14 23:28:02,558 INFO L290 TraceCheckUtils]: 24: Hoare triple {439#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {439#false} is VALID [2022-04-14 23:28:02,558 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:02,558 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:02,558 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1211132059] [2022-04-14 23:28:02,559 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1211132059] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:02,559 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:02,559 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:02,559 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [91494148] [2022-04-14 23:28:02,559 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:02,562 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-14 23:28:02,562 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:02,562 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:02,582 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:02,583 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:02,583 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:02,583 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:02,583 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:02,584 INFO L87 Difference]: Start difference. First operand 67 states and 122 transitions. Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:02,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:02,873 INFO L93 Difference]: Finished difference Result 97 states and 175 transitions. [2022-04-14 23:28:02,873 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:02,873 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-14 23:28:02,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:02,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:02,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 177 transitions. [2022-04-14 23:28:02,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:02,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 177 transitions. [2022-04-14 23:28:02,880 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 177 transitions. [2022-04-14 23:28:03,038 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 177 edges. 177 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:03,043 INFO L225 Difference]: With dead ends: 97 [2022-04-14 23:28:03,043 INFO L226 Difference]: Without dead ends: 97 [2022-04-14 23:28:03,044 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:03,045 INFO L913 BasicCegarLoop]: 120 mSDtfsCounter, 208 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 88 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 208 SdHoareTripleChecker+Valid, 127 SdHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 88 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:03,045 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [208 Valid, 127 Invalid, 91 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 88 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:03,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-04-14 23:28:03,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 95. [2022-04-14 23:28:03,062 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:03,062 INFO L82 GeneralOperation]: Start isEquivalent. First operand 97 states. Second operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:03,062 INFO L74 IsIncluded]: Start isIncluded. First operand 97 states. Second operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:03,063 INFO L87 Difference]: Start difference. First operand 97 states. Second operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:03,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:03,066 INFO L93 Difference]: Finished difference Result 97 states and 175 transitions. [2022-04-14 23:28:03,067 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 175 transitions. [2022-04-14 23:28:03,067 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:03,067 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:03,068 INFO L74 IsIncluded]: Start isIncluded. First operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-14 23:28:03,068 INFO L87 Difference]: Start difference. First operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-14 23:28:03,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:03,073 INFO L93 Difference]: Finished difference Result 97 states and 175 transitions. [2022-04-14 23:28:03,073 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 175 transitions. [2022-04-14 23:28:03,076 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:03,076 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:03,076 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:03,076 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:03,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:03,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 174 transitions. [2022-04-14 23:28:03,080 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 174 transitions. Word has length 25 [2022-04-14 23:28:03,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:03,080 INFO L478 AbstractCegarLoop]: Abstraction has 95 states and 174 transitions. [2022-04-14 23:28:03,080 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:03,080 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 174 transitions. [2022-04-14 23:28:03,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-14 23:28:03,084 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:03,084 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:03,084 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-14 23:28:03,084 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:03,084 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:03,085 INFO L85 PathProgramCache]: Analyzing trace with hash -290888810, now seen corresponding path program 1 times [2022-04-14 23:28:03,085 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:03,085 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1637384121] [2022-04-14 23:28:03,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:03,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:03,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:03,181 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:03,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:03,188 INFO L290 TraceCheckUtils]: 0: Hoare triple {842#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {836#true} is VALID [2022-04-14 23:28:03,189 INFO L290 TraceCheckUtils]: 1: Hoare triple {836#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {836#true} is VALID [2022-04-14 23:28:03,189 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {836#true} {836#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {836#true} is VALID [2022-04-14 23:28:03,190 INFO L272 TraceCheckUtils]: 0: Hoare triple {836#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {842#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:03,190 INFO L290 TraceCheckUtils]: 1: Hoare triple {842#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {836#true} is VALID [2022-04-14 23:28:03,190 INFO L290 TraceCheckUtils]: 2: Hoare triple {836#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {836#true} is VALID [2022-04-14 23:28:03,190 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {836#true} {836#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {836#true} is VALID [2022-04-14 23:28:03,190 INFO L272 TraceCheckUtils]: 4: Hoare triple {836#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {836#true} is VALID [2022-04-14 23:28:03,191 INFO L290 TraceCheckUtils]: 5: Hoare triple {836#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {836#true} is VALID [2022-04-14 23:28:03,191 INFO L290 TraceCheckUtils]: 6: Hoare triple {836#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {836#true} is VALID [2022-04-14 23:28:03,191 INFO L290 TraceCheckUtils]: 7: Hoare triple {836#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {836#true} is VALID [2022-04-14 23:28:03,192 INFO L290 TraceCheckUtils]: 8: Hoare triple {836#true} [284] L88-->L88-2: Formula: (and (= v_main_~lk1~0_3 1) (not (= v_main_~p1~0_2 0))) InVars {main_~p1~0=v_main_~p1~0_2} OutVars{main_~p1~0=v_main_~p1~0_2, main_~lk1~0=v_main_~lk1~0_3} AuxVars[] AssignedVars[main_~lk1~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-14 23:28:03,192 INFO L290 TraceCheckUtils]: 9: Hoare triple {841#(not (= main_~p1~0 0))} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-14 23:28:03,193 INFO L290 TraceCheckUtils]: 10: Hoare triple {841#(not (= main_~p1~0 0))} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-14 23:28:03,193 INFO L290 TraceCheckUtils]: 11: Hoare triple {841#(not (= main_~p1~0 0))} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-14 23:28:03,193 INFO L290 TraceCheckUtils]: 12: Hoare triple {841#(not (= main_~p1~0 0))} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-14 23:28:03,194 INFO L290 TraceCheckUtils]: 13: Hoare triple {841#(not (= main_~p1~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-14 23:28:03,194 INFO L290 TraceCheckUtils]: 14: Hoare triple {841#(not (= main_~p1~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-14 23:28:03,199 INFO L290 TraceCheckUtils]: 15: Hoare triple {841#(not (= main_~p1~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-14 23:28:03,199 INFO L290 TraceCheckUtils]: 16: Hoare triple {841#(not (= main_~p1~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-14 23:28:03,200 INFO L290 TraceCheckUtils]: 17: Hoare triple {841#(not (= main_~p1~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-14 23:28:03,200 INFO L290 TraceCheckUtils]: 18: Hoare triple {841#(not (= main_~p1~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-14 23:28:03,200 INFO L290 TraceCheckUtils]: 19: Hoare triple {841#(not (= main_~p1~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-14 23:28:03,201 INFO L290 TraceCheckUtils]: 20: Hoare triple {841#(not (= main_~p1~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-14 23:28:03,201 INFO L290 TraceCheckUtils]: 21: Hoare triple {841#(not (= main_~p1~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-14 23:28:03,202 INFO L290 TraceCheckUtils]: 22: Hoare triple {841#(not (= main_~p1~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {837#false} is VALID [2022-04-14 23:28:03,202 INFO L290 TraceCheckUtils]: 23: Hoare triple {837#false} [316] L146-1-->L152: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {837#false} is VALID [2022-04-14 23:28:03,202 INFO L290 TraceCheckUtils]: 24: Hoare triple {837#false} [320] L152-->L212-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {837#false} is VALID [2022-04-14 23:28:03,202 INFO L290 TraceCheckUtils]: 25: Hoare triple {837#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {837#false} is VALID [2022-04-14 23:28:03,203 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:03,203 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:03,203 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1637384121] [2022-04-14 23:28:03,203 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1637384121] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:03,204 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:03,204 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:03,204 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [435161640] [2022-04-14 23:28:03,204 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:03,211 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-14 23:28:03,211 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:03,211 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:03,229 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:03,229 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:03,229 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:03,230 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:03,230 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:03,230 INFO L87 Difference]: Start difference. First operand 95 states and 174 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:03,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:03,453 INFO L93 Difference]: Finished difference Result 100 states and 177 transitions. [2022-04-14 23:28:03,453 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:03,454 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-14 23:28:03,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:03,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:03,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 176 transitions. [2022-04-14 23:28:03,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:03,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 176 transitions. [2022-04-14 23:28:03,459 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 176 transitions. [2022-04-14 23:28:03,591 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 176 edges. 176 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:03,593 INFO L225 Difference]: With dead ends: 100 [2022-04-14 23:28:03,593 INFO L226 Difference]: Without dead ends: 100 [2022-04-14 23:28:03,593 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:03,595 INFO L913 BasicCegarLoop]: 146 mSDtfsCounter, 183 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 183 SdHoareTripleChecker+Valid, 153 SdHoareTripleChecker+Invalid, 89 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:03,595 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [183 Valid, 153 Invalid, 89 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:03,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2022-04-14 23:28:03,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 98. [2022-04-14 23:28:03,600 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:03,600 INFO L82 GeneralOperation]: Start isEquivalent. First operand 100 states. Second operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:03,601 INFO L74 IsIncluded]: Start isIncluded. First operand 100 states. Second operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:03,601 INFO L87 Difference]: Start difference. First operand 100 states. Second operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:03,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:03,604 INFO L93 Difference]: Finished difference Result 100 states and 177 transitions. [2022-04-14 23:28:03,604 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 177 transitions. [2022-04-14 23:28:03,604 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:03,605 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:03,605 INFO L74 IsIncluded]: Start isIncluded. First operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 100 states. [2022-04-14 23:28:03,605 INFO L87 Difference]: Start difference. First operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 100 states. [2022-04-14 23:28:03,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:03,609 INFO L93 Difference]: Finished difference Result 100 states and 177 transitions. [2022-04-14 23:28:03,609 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 177 transitions. [2022-04-14 23:28:03,609 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:03,609 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:03,609 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:03,609 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:03,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:03,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 176 transitions. [2022-04-14 23:28:03,613 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 176 transitions. Word has length 26 [2022-04-14 23:28:03,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:03,613 INFO L478 AbstractCegarLoop]: Abstraction has 98 states and 176 transitions. [2022-04-14 23:28:03,613 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:03,613 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 176 transitions. [2022-04-14 23:28:03,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-14 23:28:03,614 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:03,614 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:03,614 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-14 23:28:03,614 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:03,615 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:03,615 INFO L85 PathProgramCache]: Analyzing trace with hash -1287961163, now seen corresponding path program 1 times [2022-04-14 23:28:03,615 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:03,615 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1259876710] [2022-04-14 23:28:03,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:03,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:03,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:03,662 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:03,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:03,668 INFO L290 TraceCheckUtils]: 0: Hoare triple {1252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1246#true} is VALID [2022-04-14 23:28:03,668 INFO L290 TraceCheckUtils]: 1: Hoare triple {1246#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1246#true} is VALID [2022-04-14 23:28:03,669 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1246#true} {1246#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1246#true} is VALID [2022-04-14 23:28:03,669 INFO L272 TraceCheckUtils]: 0: Hoare triple {1246#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:03,670 INFO L290 TraceCheckUtils]: 1: Hoare triple {1252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1246#true} is VALID [2022-04-14 23:28:03,670 INFO L290 TraceCheckUtils]: 2: Hoare triple {1246#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1246#true} is VALID [2022-04-14 23:28:03,670 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1246#true} {1246#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1246#true} is VALID [2022-04-14 23:28:03,670 INFO L272 TraceCheckUtils]: 4: Hoare triple {1246#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1246#true} is VALID [2022-04-14 23:28:03,670 INFO L290 TraceCheckUtils]: 5: Hoare triple {1246#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {1246#true} is VALID [2022-04-14 23:28:03,671 INFO L290 TraceCheckUtils]: 6: Hoare triple {1246#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {1246#true} is VALID [2022-04-14 23:28:03,671 INFO L290 TraceCheckUtils]: 7: Hoare triple {1246#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {1246#true} is VALID [2022-04-14 23:28:03,671 INFO L290 TraceCheckUtils]: 8: Hoare triple {1246#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {1246#true} is VALID [2022-04-14 23:28:03,672 INFO L290 TraceCheckUtils]: 9: Hoare triple {1246#true} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-14 23:28:03,672 INFO L290 TraceCheckUtils]: 10: Hoare triple {1251#(= main_~lk2~0 1)} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-14 23:28:03,673 INFO L290 TraceCheckUtils]: 11: Hoare triple {1251#(= main_~lk2~0 1)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-14 23:28:03,673 INFO L290 TraceCheckUtils]: 12: Hoare triple {1251#(= main_~lk2~0 1)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-14 23:28:03,673 INFO L290 TraceCheckUtils]: 13: Hoare triple {1251#(= main_~lk2~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-14 23:28:03,674 INFO L290 TraceCheckUtils]: 14: Hoare triple {1251#(= main_~lk2~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-14 23:28:03,674 INFO L290 TraceCheckUtils]: 15: Hoare triple {1251#(= main_~lk2~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-14 23:28:03,675 INFO L290 TraceCheckUtils]: 16: Hoare triple {1251#(= main_~lk2~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-14 23:28:03,675 INFO L290 TraceCheckUtils]: 17: Hoare triple {1251#(= main_~lk2~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-14 23:28:03,675 INFO L290 TraceCheckUtils]: 18: Hoare triple {1251#(= main_~lk2~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-14 23:28:03,676 INFO L290 TraceCheckUtils]: 19: Hoare triple {1251#(= main_~lk2~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-14 23:28:03,676 INFO L290 TraceCheckUtils]: 20: Hoare triple {1251#(= main_~lk2~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-14 23:28:03,676 INFO L290 TraceCheckUtils]: 21: Hoare triple {1251#(= main_~lk2~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-14 23:28:03,677 INFO L290 TraceCheckUtils]: 22: Hoare triple {1251#(= main_~lk2~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {1251#(= main_~lk2~0 1)} is VALID [2022-04-14 23:28:03,677 INFO L290 TraceCheckUtils]: 23: Hoare triple {1251#(= main_~lk2~0 1)} [316] L146-1-->L152: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {1251#(= main_~lk2~0 1)} is VALID [2022-04-14 23:28:03,678 INFO L290 TraceCheckUtils]: 24: Hoare triple {1251#(= main_~lk2~0 1)} [320] L152-->L212-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {1247#false} is VALID [2022-04-14 23:28:03,678 INFO L290 TraceCheckUtils]: 25: Hoare triple {1247#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1247#false} is VALID [2022-04-14 23:28:03,678 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:03,678 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:03,679 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1259876710] [2022-04-14 23:28:03,679 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1259876710] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:03,679 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:03,679 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:03,679 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [776912607] [2022-04-14 23:28:03,679 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:03,680 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-14 23:28:03,680 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:03,680 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:03,706 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:03,706 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:03,706 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:03,707 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:03,707 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:03,707 INFO L87 Difference]: Start difference. First operand 98 states and 176 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:03,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:03,948 INFO L93 Difference]: Finished difference Result 183 states and 334 transitions. [2022-04-14 23:28:03,948 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:03,948 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-14 23:28:03,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:03,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:03,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 174 transitions. [2022-04-14 23:28:03,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:03,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 174 transitions. [2022-04-14 23:28:03,956 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 174 transitions. [2022-04-14 23:28:04,091 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 174 edges. 174 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:04,095 INFO L225 Difference]: With dead ends: 183 [2022-04-14 23:28:04,095 INFO L226 Difference]: Without dead ends: 183 [2022-04-14 23:28:04,095 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:04,104 INFO L913 BasicCegarLoop]: 94 mSDtfsCounter, 229 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 89 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 229 SdHoareTripleChecker+Valid, 101 SdHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 89 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:04,106 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [229 Valid, 101 Invalid, 91 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 89 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:04,108 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2022-04-14 23:28:04,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 129. [2022-04-14 23:28:04,116 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:04,117 INFO L82 GeneralOperation]: Start isEquivalent. First operand 183 states. Second operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:04,117 INFO L74 IsIncluded]: Start isIncluded. First operand 183 states. Second operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:04,117 INFO L87 Difference]: Start difference. First operand 183 states. Second operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:04,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:04,123 INFO L93 Difference]: Finished difference Result 183 states and 334 transitions. [2022-04-14 23:28:04,123 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 334 transitions. [2022-04-14 23:28:04,126 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:04,126 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:04,127 INFO L74 IsIncluded]: Start isIncluded. First operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 183 states. [2022-04-14 23:28:04,129 INFO L87 Difference]: Start difference. First operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 183 states. [2022-04-14 23:28:04,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:04,135 INFO L93 Difference]: Finished difference Result 183 states and 334 transitions. [2022-04-14 23:28:04,135 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 334 transitions. [2022-04-14 23:28:04,135 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:04,136 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:04,136 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:04,136 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:04,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:04,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 233 transitions. [2022-04-14 23:28:04,139 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 233 transitions. Word has length 26 [2022-04-14 23:28:04,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:04,140 INFO L478 AbstractCegarLoop]: Abstraction has 129 states and 233 transitions. [2022-04-14 23:28:04,140 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:04,140 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 233 transitions. [2022-04-14 23:28:04,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-14 23:28:04,141 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:04,141 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:04,141 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-04-14 23:28:04,141 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:04,141 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:04,142 INFO L85 PathProgramCache]: Analyzing trace with hash 65348534, now seen corresponding path program 1 times [2022-04-14 23:28:04,142 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:04,142 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [498077860] [2022-04-14 23:28:04,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:04,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:04,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:04,187 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:04,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:04,193 INFO L290 TraceCheckUtils]: 0: Hoare triple {1942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1936#true} is VALID [2022-04-14 23:28:04,193 INFO L290 TraceCheckUtils]: 1: Hoare triple {1936#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#true} is VALID [2022-04-14 23:28:04,193 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1936#true} {1936#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#true} is VALID [2022-04-14 23:28:04,194 INFO L272 TraceCheckUtils]: 0: Hoare triple {1936#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:04,194 INFO L290 TraceCheckUtils]: 1: Hoare triple {1942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1936#true} is VALID [2022-04-14 23:28:04,194 INFO L290 TraceCheckUtils]: 2: Hoare triple {1936#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#true} is VALID [2022-04-14 23:28:04,194 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1936#true} {1936#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#true} is VALID [2022-04-14 23:28:04,194 INFO L272 TraceCheckUtils]: 4: Hoare triple {1936#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#true} is VALID [2022-04-14 23:28:04,195 INFO L290 TraceCheckUtils]: 5: Hoare triple {1936#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {1936#true} is VALID [2022-04-14 23:28:04,195 INFO L290 TraceCheckUtils]: 6: Hoare triple {1936#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {1936#true} is VALID [2022-04-14 23:28:04,195 INFO L290 TraceCheckUtils]: 7: Hoare triple {1936#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {1936#true} is VALID [2022-04-14 23:28:04,195 INFO L290 TraceCheckUtils]: 8: Hoare triple {1936#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {1936#true} is VALID [2022-04-14 23:28:04,196 INFO L290 TraceCheckUtils]: 9: Hoare triple {1936#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {1941#(= main_~p2~0 0)} is VALID [2022-04-14 23:28:04,196 INFO L290 TraceCheckUtils]: 10: Hoare triple {1941#(= main_~p2~0 0)} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-14 23:28:04,197 INFO L290 TraceCheckUtils]: 11: Hoare triple {1941#(= main_~p2~0 0)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-14 23:28:04,197 INFO L290 TraceCheckUtils]: 12: Hoare triple {1941#(= main_~p2~0 0)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-14 23:28:04,197 INFO L290 TraceCheckUtils]: 13: Hoare triple {1941#(= main_~p2~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-14 23:28:04,198 INFO L290 TraceCheckUtils]: 14: Hoare triple {1941#(= main_~p2~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-14 23:28:04,198 INFO L290 TraceCheckUtils]: 15: Hoare triple {1941#(= main_~p2~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-14 23:28:04,199 INFO L290 TraceCheckUtils]: 16: Hoare triple {1941#(= main_~p2~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-14 23:28:04,199 INFO L290 TraceCheckUtils]: 17: Hoare triple {1941#(= main_~p2~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-14 23:28:04,199 INFO L290 TraceCheckUtils]: 18: Hoare triple {1941#(= main_~p2~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-14 23:28:04,200 INFO L290 TraceCheckUtils]: 19: Hoare triple {1941#(= main_~p2~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-14 23:28:04,200 INFO L290 TraceCheckUtils]: 20: Hoare triple {1941#(= main_~p2~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-14 23:28:04,200 INFO L290 TraceCheckUtils]: 21: Hoare triple {1941#(= main_~p2~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-14 23:28:04,201 INFO L290 TraceCheckUtils]: 22: Hoare triple {1941#(= main_~p2~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {1941#(= main_~p2~0 0)} is VALID [2022-04-14 23:28:04,201 INFO L290 TraceCheckUtils]: 23: Hoare triple {1941#(= main_~p2~0 0)} [316] L146-1-->L152: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {1937#false} is VALID [2022-04-14 23:28:04,201 INFO L290 TraceCheckUtils]: 24: Hoare triple {1937#false} [320] L152-->L212-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {1937#false} is VALID [2022-04-14 23:28:04,202 INFO L290 TraceCheckUtils]: 25: Hoare triple {1937#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1937#false} is VALID [2022-04-14 23:28:04,202 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:04,202 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:04,202 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [498077860] [2022-04-14 23:28:04,202 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [498077860] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:04,202 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:04,202 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:04,203 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1156706607] [2022-04-14 23:28:04,203 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:04,203 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-14 23:28:04,203 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:04,203 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:04,220 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:04,220 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:04,220 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:04,221 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:04,221 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:04,221 INFO L87 Difference]: Start difference. First operand 129 states and 233 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:04,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:04,459 INFO L93 Difference]: Finished difference Result 185 states and 332 transitions. [2022-04-14 23:28:04,459 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:04,459 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-14 23:28:04,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:04,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:04,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 175 transitions. [2022-04-14 23:28:04,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:04,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 175 transitions. [2022-04-14 23:28:04,464 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 175 transitions. [2022-04-14 23:28:04,593 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 175 edges. 175 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:04,596 INFO L225 Difference]: With dead ends: 185 [2022-04-14 23:28:04,596 INFO L226 Difference]: Without dead ends: 185 [2022-04-14 23:28:04,597 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:04,597 INFO L913 BasicCegarLoop]: 122 mSDtfsCounter, 202 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 202 SdHoareTripleChecker+Valid, 129 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:04,597 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [202 Valid, 129 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:04,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2022-04-14 23:28:04,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 183. [2022-04-14 23:28:04,603 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:04,604 INFO L82 GeneralOperation]: Start isEquivalent. First operand 185 states. Second operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:04,605 INFO L74 IsIncluded]: Start isIncluded. First operand 185 states. Second operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:04,605 INFO L87 Difference]: Start difference. First operand 185 states. Second operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:04,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:04,610 INFO L93 Difference]: Finished difference Result 185 states and 332 transitions. [2022-04-14 23:28:04,610 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 332 transitions. [2022-04-14 23:28:04,611 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:04,611 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:04,611 INFO L74 IsIncluded]: Start isIncluded. First operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 185 states. [2022-04-14 23:28:04,612 INFO L87 Difference]: Start difference. First operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 185 states. [2022-04-14 23:28:04,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:04,617 INFO L93 Difference]: Finished difference Result 185 states and 332 transitions. [2022-04-14 23:28:04,617 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 332 transitions. [2022-04-14 23:28:04,617 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:04,618 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:04,618 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:04,618 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:04,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:04,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 331 transitions. [2022-04-14 23:28:04,623 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 331 transitions. Word has length 26 [2022-04-14 23:28:04,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:04,623 INFO L478 AbstractCegarLoop]: Abstraction has 183 states and 331 transitions. [2022-04-14 23:28:04,623 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:04,623 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 331 transitions. [2022-04-14 23:28:04,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-14 23:28:04,624 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:04,624 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:04,624 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-04-14 23:28:04,624 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:04,625 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:04,625 INFO L85 PathProgramCache]: Analyzing trace with hash -1272058172, now seen corresponding path program 1 times [2022-04-14 23:28:04,625 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:04,625 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [115329232] [2022-04-14 23:28:04,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:04,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:04,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:04,679 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:04,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:04,686 INFO L290 TraceCheckUtils]: 0: Hoare triple {2692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2686#true} is VALID [2022-04-14 23:28:04,686 INFO L290 TraceCheckUtils]: 1: Hoare triple {2686#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2686#true} is VALID [2022-04-14 23:28:04,686 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2686#true} {2686#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2686#true} is VALID [2022-04-14 23:28:04,687 INFO L272 TraceCheckUtils]: 0: Hoare triple {2686#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:04,687 INFO L290 TraceCheckUtils]: 1: Hoare triple {2692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2686#true} is VALID [2022-04-14 23:28:04,687 INFO L290 TraceCheckUtils]: 2: Hoare triple {2686#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2686#true} is VALID [2022-04-14 23:28:04,687 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2686#true} {2686#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2686#true} is VALID [2022-04-14 23:28:04,687 INFO L272 TraceCheckUtils]: 4: Hoare triple {2686#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2686#true} is VALID [2022-04-14 23:28:04,688 INFO L290 TraceCheckUtils]: 5: Hoare triple {2686#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {2686#true} is VALID [2022-04-14 23:28:04,688 INFO L290 TraceCheckUtils]: 6: Hoare triple {2686#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {2686#true} is VALID [2022-04-14 23:28:04,688 INFO L290 TraceCheckUtils]: 7: Hoare triple {2686#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {2686#true} is VALID [2022-04-14 23:28:04,688 INFO L290 TraceCheckUtils]: 8: Hoare triple {2686#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {2686#true} is VALID [2022-04-14 23:28:04,689 INFO L290 TraceCheckUtils]: 9: Hoare triple {2686#true} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-14 23:28:04,689 INFO L290 TraceCheckUtils]: 10: Hoare triple {2691#(not (= main_~p2~0 0))} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-14 23:28:04,690 INFO L290 TraceCheckUtils]: 11: Hoare triple {2691#(not (= main_~p2~0 0))} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-14 23:28:04,690 INFO L290 TraceCheckUtils]: 12: Hoare triple {2691#(not (= main_~p2~0 0))} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-14 23:28:04,690 INFO L290 TraceCheckUtils]: 13: Hoare triple {2691#(not (= main_~p2~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-14 23:28:04,691 INFO L290 TraceCheckUtils]: 14: Hoare triple {2691#(not (= main_~p2~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-14 23:28:04,691 INFO L290 TraceCheckUtils]: 15: Hoare triple {2691#(not (= main_~p2~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-14 23:28:04,691 INFO L290 TraceCheckUtils]: 16: Hoare triple {2691#(not (= main_~p2~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-14 23:28:04,692 INFO L290 TraceCheckUtils]: 17: Hoare triple {2691#(not (= main_~p2~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-14 23:28:04,692 INFO L290 TraceCheckUtils]: 18: Hoare triple {2691#(not (= main_~p2~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-14 23:28:04,693 INFO L290 TraceCheckUtils]: 19: Hoare triple {2691#(not (= main_~p2~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-14 23:28:04,693 INFO L290 TraceCheckUtils]: 20: Hoare triple {2691#(not (= main_~p2~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-14 23:28:04,693 INFO L290 TraceCheckUtils]: 21: Hoare triple {2691#(not (= main_~p2~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-14 23:28:04,694 INFO L290 TraceCheckUtils]: 22: Hoare triple {2691#(not (= main_~p2~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-14 23:28:04,694 INFO L290 TraceCheckUtils]: 23: Hoare triple {2691#(not (= main_~p2~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {2687#false} is VALID [2022-04-14 23:28:04,694 INFO L290 TraceCheckUtils]: 24: Hoare triple {2687#false} [322] L151-1-->L157: Formula: (not (= v_main_~p3~0_1 0)) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {2687#false} is VALID [2022-04-14 23:28:04,694 INFO L290 TraceCheckUtils]: 25: Hoare triple {2687#false} [324] L157-->L212-1: Formula: (not (= v_main_~lk3~0_1 1)) InVars {main_~lk3~0=v_main_~lk3~0_1} OutVars{main_~lk3~0=v_main_~lk3~0_1} AuxVars[] AssignedVars[] {2687#false} is VALID [2022-04-14 23:28:04,695 INFO L290 TraceCheckUtils]: 26: Hoare triple {2687#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2687#false} is VALID [2022-04-14 23:28:04,695 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:04,695 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:04,695 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [115329232] [2022-04-14 23:28:04,695 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [115329232] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:04,695 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:04,695 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:04,696 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [783090185] [2022-04-14 23:28:04,696 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:04,696 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-14 23:28:04,696 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:04,696 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:04,713 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:04,714 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:04,714 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:04,714 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:04,714 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:04,714 INFO L87 Difference]: Start difference. First operand 183 states and 331 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:04,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:04,936 INFO L93 Difference]: Finished difference Result 187 states and 332 transitions. [2022-04-14 23:28:04,937 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:04,937 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-14 23:28:04,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:04,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:04,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 174 transitions. [2022-04-14 23:28:04,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:04,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 174 transitions. [2022-04-14 23:28:04,955 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 174 transitions. [2022-04-14 23:28:05,110 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 174 edges. 174 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:05,116 INFO L225 Difference]: With dead ends: 187 [2022-04-14 23:28:05,116 INFO L226 Difference]: Without dead ends: 187 [2022-04-14 23:28:05,116 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:05,117 INFO L913 BasicCegarLoop]: 143 mSDtfsCounter, 182 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 182 SdHoareTripleChecker+Valid, 150 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:05,117 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [182 Valid, 150 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 86 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:05,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2022-04-14 23:28:05,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 185. [2022-04-14 23:28:05,122 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:05,123 INFO L82 GeneralOperation]: Start isEquivalent. First operand 187 states. Second operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:05,124 INFO L74 IsIncluded]: Start isIncluded. First operand 187 states. Second operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:05,124 INFO L87 Difference]: Start difference. First operand 187 states. Second operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:05,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:05,128 INFO L93 Difference]: Finished difference Result 187 states and 332 transitions. [2022-04-14 23:28:05,128 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 332 transitions. [2022-04-14 23:28:05,128 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:05,129 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:05,129 INFO L74 IsIncluded]: Start isIncluded. First operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 187 states. [2022-04-14 23:28:05,130 INFO L87 Difference]: Start difference. First operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 187 states. [2022-04-14 23:28:05,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:05,133 INFO L93 Difference]: Finished difference Result 187 states and 332 transitions. [2022-04-14 23:28:05,134 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 332 transitions. [2022-04-14 23:28:05,134 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:05,134 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:05,134 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:05,134 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:05,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:05,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 331 transitions. [2022-04-14 23:28:05,138 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 331 transitions. Word has length 27 [2022-04-14 23:28:05,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:05,138 INFO L478 AbstractCegarLoop]: Abstraction has 185 states and 331 transitions. [2022-04-14 23:28:05,139 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:05,139 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 331 transitions. [2022-04-14 23:28:05,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-14 23:28:05,139 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:05,140 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:05,140 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-04-14 23:28:05,140 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:05,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:05,140 INFO L85 PathProgramCache]: Analyzing trace with hash 2025836771, now seen corresponding path program 1 times [2022-04-14 23:28:05,140 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:05,140 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1718075533] [2022-04-14 23:28:05,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:05,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:05,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:05,205 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:05,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:05,211 INFO L290 TraceCheckUtils]: 0: Hoare triple {3450#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3444#true} is VALID [2022-04-14 23:28:05,211 INFO L290 TraceCheckUtils]: 1: Hoare triple {3444#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-14 23:28:05,212 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3444#true} {3444#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-14 23:28:05,212 INFO L272 TraceCheckUtils]: 0: Hoare triple {3444#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3450#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:05,212 INFO L290 TraceCheckUtils]: 1: Hoare triple {3450#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3444#true} is VALID [2022-04-14 23:28:05,213 INFO L290 TraceCheckUtils]: 2: Hoare triple {3444#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-14 23:28:05,213 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3444#true} {3444#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-14 23:28:05,213 INFO L272 TraceCheckUtils]: 4: Hoare triple {3444#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-14 23:28:05,213 INFO L290 TraceCheckUtils]: 5: Hoare triple {3444#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {3444#true} is VALID [2022-04-14 23:28:05,213 INFO L290 TraceCheckUtils]: 6: Hoare triple {3444#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {3444#true} is VALID [2022-04-14 23:28:05,213 INFO L290 TraceCheckUtils]: 7: Hoare triple {3444#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {3444#true} is VALID [2022-04-14 23:28:05,214 INFO L290 TraceCheckUtils]: 8: Hoare triple {3444#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-14 23:28:05,214 INFO L290 TraceCheckUtils]: 9: Hoare triple {3444#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-14 23:28:05,214 INFO L290 TraceCheckUtils]: 10: Hoare triple {3444#true} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-14 23:28:05,215 INFO L290 TraceCheckUtils]: 11: Hoare triple {3449#(= main_~lk3~0 1)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-14 23:28:05,218 INFO L290 TraceCheckUtils]: 12: Hoare triple {3449#(= main_~lk3~0 1)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-14 23:28:05,219 INFO L290 TraceCheckUtils]: 13: Hoare triple {3449#(= main_~lk3~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-14 23:28:05,219 INFO L290 TraceCheckUtils]: 14: Hoare triple {3449#(= main_~lk3~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-14 23:28:05,220 INFO L290 TraceCheckUtils]: 15: Hoare triple {3449#(= main_~lk3~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-14 23:28:05,220 INFO L290 TraceCheckUtils]: 16: Hoare triple {3449#(= main_~lk3~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-14 23:28:05,220 INFO L290 TraceCheckUtils]: 17: Hoare triple {3449#(= main_~lk3~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-14 23:28:05,221 INFO L290 TraceCheckUtils]: 18: Hoare triple {3449#(= main_~lk3~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-14 23:28:05,221 INFO L290 TraceCheckUtils]: 19: Hoare triple {3449#(= main_~lk3~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-14 23:28:05,221 INFO L290 TraceCheckUtils]: 20: Hoare triple {3449#(= main_~lk3~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-14 23:28:05,222 INFO L290 TraceCheckUtils]: 21: Hoare triple {3449#(= main_~lk3~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-14 23:28:05,222 INFO L290 TraceCheckUtils]: 22: Hoare triple {3449#(= main_~lk3~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {3449#(= main_~lk3~0 1)} is VALID [2022-04-14 23:28:05,222 INFO L290 TraceCheckUtils]: 23: Hoare triple {3449#(= main_~lk3~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {3449#(= main_~lk3~0 1)} is VALID [2022-04-14 23:28:05,223 INFO L290 TraceCheckUtils]: 24: Hoare triple {3449#(= main_~lk3~0 1)} [322] L151-1-->L157: Formula: (not (= v_main_~p3~0_1 0)) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {3449#(= main_~lk3~0 1)} is VALID [2022-04-14 23:28:05,223 INFO L290 TraceCheckUtils]: 25: Hoare triple {3449#(= main_~lk3~0 1)} [324] L157-->L212-1: Formula: (not (= v_main_~lk3~0_1 1)) InVars {main_~lk3~0=v_main_~lk3~0_1} OutVars{main_~lk3~0=v_main_~lk3~0_1} AuxVars[] AssignedVars[] {3445#false} is VALID [2022-04-14 23:28:05,223 INFO L290 TraceCheckUtils]: 26: Hoare triple {3445#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3445#false} is VALID [2022-04-14 23:28:05,224 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:05,224 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:05,224 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1718075533] [2022-04-14 23:28:05,224 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1718075533] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:05,224 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:05,224 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:05,224 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [849981878] [2022-04-14 23:28:05,224 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:05,225 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-14 23:28:05,225 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:05,225 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:05,245 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:05,245 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:05,245 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:05,245 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:05,245 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:05,246 INFO L87 Difference]: Start difference. First operand 185 states and 331 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:05,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:05,493 INFO L93 Difference]: Finished difference Result 347 states and 628 transitions. [2022-04-14 23:28:05,493 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:05,493 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-14 23:28:05,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:05,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:05,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 170 transitions. [2022-04-14 23:28:05,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:05,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 170 transitions. [2022-04-14 23:28:05,497 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 170 transitions. [2022-04-14 23:28:05,630 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 170 edges. 170 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:05,637 INFO L225 Difference]: With dead ends: 347 [2022-04-14 23:28:05,637 INFO L226 Difference]: Without dead ends: 347 [2022-04-14 23:28:05,637 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:05,638 INFO L913 BasicCegarLoop]: 93 mSDtfsCounter, 222 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 88 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 222 SdHoareTripleChecker+Valid, 100 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 88 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:05,638 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [222 Valid, 100 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 88 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:05,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2022-04-14 23:28:05,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 249. [2022-04-14 23:28:05,644 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:05,645 INFO L82 GeneralOperation]: Start isEquivalent. First operand 347 states. Second operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:05,646 INFO L74 IsIncluded]: Start isIncluded. First operand 347 states. Second operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:05,647 INFO L87 Difference]: Start difference. First operand 347 states. Second operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:05,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:05,655 INFO L93 Difference]: Finished difference Result 347 states and 628 transitions. [2022-04-14 23:28:05,655 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 628 transitions. [2022-04-14 23:28:05,656 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:05,656 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:05,657 INFO L74 IsIncluded]: Start isIncluded. First operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 347 states. [2022-04-14 23:28:05,658 INFO L87 Difference]: Start difference. First operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 347 states. [2022-04-14 23:28:05,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:05,667 INFO L93 Difference]: Finished difference Result 347 states and 628 transitions. [2022-04-14 23:28:05,667 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 628 transitions. [2022-04-14 23:28:05,667 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:05,667 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:05,667 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:05,668 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:05,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:05,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 249 states to 249 states and 443 transitions. [2022-04-14 23:28:05,674 INFO L78 Accepts]: Start accepts. Automaton has 249 states and 443 transitions. Word has length 27 [2022-04-14 23:28:05,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:05,674 INFO L478 AbstractCegarLoop]: Abstraction has 249 states and 443 transitions. [2022-04-14 23:28:05,675 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:05,675 INFO L276 IsEmpty]: Start isEmpty. Operand 249 states and 443 transitions. [2022-04-14 23:28:05,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-14 23:28:05,675 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:05,675 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:05,676 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-04-14 23:28:05,676 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:05,676 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:05,676 INFO L85 PathProgramCache]: Analyzing trace with hash -915820828, now seen corresponding path program 1 times [2022-04-14 23:28:05,677 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:05,677 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1711293719] [2022-04-14 23:28:05,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:05,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:05,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:05,720 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:05,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:05,725 INFO L290 TraceCheckUtils]: 0: Hoare triple {4752#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4746#true} is VALID [2022-04-14 23:28:05,725 INFO L290 TraceCheckUtils]: 1: Hoare triple {4746#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-14 23:28:05,725 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4746#true} {4746#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-14 23:28:05,726 INFO L272 TraceCheckUtils]: 0: Hoare triple {4746#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4752#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:05,726 INFO L290 TraceCheckUtils]: 1: Hoare triple {4752#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4746#true} is VALID [2022-04-14 23:28:05,726 INFO L290 TraceCheckUtils]: 2: Hoare triple {4746#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-14 23:28:05,727 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4746#true} {4746#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-14 23:28:05,727 INFO L272 TraceCheckUtils]: 4: Hoare triple {4746#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-14 23:28:05,727 INFO L290 TraceCheckUtils]: 5: Hoare triple {4746#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {4746#true} is VALID [2022-04-14 23:28:05,727 INFO L290 TraceCheckUtils]: 6: Hoare triple {4746#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {4746#true} is VALID [2022-04-14 23:28:05,727 INFO L290 TraceCheckUtils]: 7: Hoare triple {4746#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {4746#true} is VALID [2022-04-14 23:28:05,728 INFO L290 TraceCheckUtils]: 8: Hoare triple {4746#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-14 23:28:05,728 INFO L290 TraceCheckUtils]: 9: Hoare triple {4746#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-14 23:28:05,728 INFO L290 TraceCheckUtils]: 10: Hoare triple {4746#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {4751#(= main_~p3~0 0)} is VALID [2022-04-14 23:28:05,729 INFO L290 TraceCheckUtils]: 11: Hoare triple {4751#(= main_~p3~0 0)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-14 23:28:05,729 INFO L290 TraceCheckUtils]: 12: Hoare triple {4751#(= main_~p3~0 0)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-14 23:28:05,729 INFO L290 TraceCheckUtils]: 13: Hoare triple {4751#(= main_~p3~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-14 23:28:05,730 INFO L290 TraceCheckUtils]: 14: Hoare triple {4751#(= main_~p3~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-14 23:28:05,730 INFO L290 TraceCheckUtils]: 15: Hoare triple {4751#(= main_~p3~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-14 23:28:05,730 INFO L290 TraceCheckUtils]: 16: Hoare triple {4751#(= main_~p3~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-14 23:28:05,731 INFO L290 TraceCheckUtils]: 17: Hoare triple {4751#(= main_~p3~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-14 23:28:05,731 INFO L290 TraceCheckUtils]: 18: Hoare triple {4751#(= main_~p3~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-14 23:28:05,731 INFO L290 TraceCheckUtils]: 19: Hoare triple {4751#(= main_~p3~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-14 23:28:05,732 INFO L290 TraceCheckUtils]: 20: Hoare triple {4751#(= main_~p3~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-14 23:28:05,732 INFO L290 TraceCheckUtils]: 21: Hoare triple {4751#(= main_~p3~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-14 23:28:05,732 INFO L290 TraceCheckUtils]: 22: Hoare triple {4751#(= main_~p3~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {4751#(= main_~p3~0 0)} is VALID [2022-04-14 23:28:05,733 INFO L290 TraceCheckUtils]: 23: Hoare triple {4751#(= main_~p3~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {4751#(= main_~p3~0 0)} is VALID [2022-04-14 23:28:05,733 INFO L290 TraceCheckUtils]: 24: Hoare triple {4751#(= main_~p3~0 0)} [322] L151-1-->L157: Formula: (not (= v_main_~p3~0_1 0)) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {4747#false} is VALID [2022-04-14 23:28:05,733 INFO L290 TraceCheckUtils]: 25: Hoare triple {4747#false} [324] L157-->L212-1: Formula: (not (= v_main_~lk3~0_1 1)) InVars {main_~lk3~0=v_main_~lk3~0_1} OutVars{main_~lk3~0=v_main_~lk3~0_1} AuxVars[] AssignedVars[] {4747#false} is VALID [2022-04-14 23:28:05,733 INFO L290 TraceCheckUtils]: 26: Hoare triple {4747#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4747#false} is VALID [2022-04-14 23:28:05,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:05,734 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:05,734 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1711293719] [2022-04-14 23:28:05,734 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1711293719] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:05,734 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:05,734 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:05,734 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1523075348] [2022-04-14 23:28:05,734 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:05,735 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-14 23:28:05,735 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:05,735 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:05,752 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:05,753 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:05,753 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:05,753 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:05,753 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:05,754 INFO L87 Difference]: Start difference. First operand 249 states and 443 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:05,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:05,980 INFO L93 Difference]: Finished difference Result 355 states and 628 transitions. [2022-04-14 23:28:05,980 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:05,980 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-14 23:28:05,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:05,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:05,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 173 transitions. [2022-04-14 23:28:05,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:05,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 173 transitions. [2022-04-14 23:28:05,988 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 173 transitions. [2022-04-14 23:28:06,126 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 173 edges. 173 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:06,133 INFO L225 Difference]: With dead ends: 355 [2022-04-14 23:28:06,134 INFO L226 Difference]: Without dead ends: 355 [2022-04-14 23:28:06,134 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:06,134 INFO L913 BasicCegarLoop]: 124 mSDtfsCounter, 196 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 196 SdHoareTripleChecker+Valid, 131 SdHoareTripleChecker+Invalid, 89 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:06,135 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [196 Valid, 131 Invalid, 89 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 86 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:06,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 355 states. [2022-04-14 23:28:06,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 355 to 353. [2022-04-14 23:28:06,141 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:06,142 INFO L82 GeneralOperation]: Start isEquivalent. First operand 355 states. Second operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:06,143 INFO L74 IsIncluded]: Start isIncluded. First operand 355 states. Second operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:06,144 INFO L87 Difference]: Start difference. First operand 355 states. Second operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:06,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:06,153 INFO L93 Difference]: Finished difference Result 355 states and 628 transitions. [2022-04-14 23:28:06,153 INFO L276 IsEmpty]: Start isEmpty. Operand 355 states and 628 transitions. [2022-04-14 23:28:06,154 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:06,154 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:06,158 INFO L74 IsIncluded]: Start isIncluded. First operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 355 states. [2022-04-14 23:28:06,159 INFO L87 Difference]: Start difference. First operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 355 states. [2022-04-14 23:28:06,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:06,168 INFO L93 Difference]: Finished difference Result 355 states and 628 transitions. [2022-04-14 23:28:06,168 INFO L276 IsEmpty]: Start isEmpty. Operand 355 states and 628 transitions. [2022-04-14 23:28:06,169 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:06,169 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:06,169 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:06,169 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:06,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:06,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 353 states to 353 states and 627 transitions. [2022-04-14 23:28:06,179 INFO L78 Accepts]: Start accepts. Automaton has 353 states and 627 transitions. Word has length 27 [2022-04-14 23:28:06,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:06,179 INFO L478 AbstractCegarLoop]: Abstraction has 353 states and 627 transitions. [2022-04-14 23:28:06,179 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:06,179 INFO L276 IsEmpty]: Start isEmpty. Operand 353 states and 627 transitions. [2022-04-14 23:28:06,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-14 23:28:06,180 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:06,180 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:06,180 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-04-14 23:28:06,180 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:06,181 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:06,181 INFO L85 PathProgramCache]: Analyzing trace with hash -1623537198, now seen corresponding path program 1 times [2022-04-14 23:28:06,181 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:06,181 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2028141576] [2022-04-14 23:28:06,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:06,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:06,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:06,220 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:06,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:06,225 INFO L290 TraceCheckUtils]: 0: Hoare triple {6182#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6176#true} is VALID [2022-04-14 23:28:06,225 INFO L290 TraceCheckUtils]: 1: Hoare triple {6176#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-14 23:28:06,225 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6176#true} {6176#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-14 23:28:06,226 INFO L272 TraceCheckUtils]: 0: Hoare triple {6176#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6182#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:06,226 INFO L290 TraceCheckUtils]: 1: Hoare triple {6182#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6176#true} is VALID [2022-04-14 23:28:06,226 INFO L290 TraceCheckUtils]: 2: Hoare triple {6176#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-14 23:28:06,226 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6176#true} {6176#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-14 23:28:06,226 INFO L272 TraceCheckUtils]: 4: Hoare triple {6176#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-14 23:28:06,227 INFO L290 TraceCheckUtils]: 5: Hoare triple {6176#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {6176#true} is VALID [2022-04-14 23:28:06,227 INFO L290 TraceCheckUtils]: 6: Hoare triple {6176#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {6176#true} is VALID [2022-04-14 23:28:06,227 INFO L290 TraceCheckUtils]: 7: Hoare triple {6176#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {6176#true} is VALID [2022-04-14 23:28:06,227 INFO L290 TraceCheckUtils]: 8: Hoare triple {6176#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-14 23:28:06,228 INFO L290 TraceCheckUtils]: 9: Hoare triple {6176#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-14 23:28:06,228 INFO L290 TraceCheckUtils]: 10: Hoare triple {6176#true} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-14 23:28:06,228 INFO L290 TraceCheckUtils]: 11: Hoare triple {6181#(not (= main_~p3~0 0))} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-14 23:28:06,229 INFO L290 TraceCheckUtils]: 12: Hoare triple {6181#(not (= main_~p3~0 0))} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-14 23:28:06,229 INFO L290 TraceCheckUtils]: 13: Hoare triple {6181#(not (= main_~p3~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-14 23:28:06,229 INFO L290 TraceCheckUtils]: 14: Hoare triple {6181#(not (= main_~p3~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-14 23:28:06,230 INFO L290 TraceCheckUtils]: 15: Hoare triple {6181#(not (= main_~p3~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-14 23:28:06,230 INFO L290 TraceCheckUtils]: 16: Hoare triple {6181#(not (= main_~p3~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-14 23:28:06,230 INFO L290 TraceCheckUtils]: 17: Hoare triple {6181#(not (= main_~p3~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-14 23:28:06,231 INFO L290 TraceCheckUtils]: 18: Hoare triple {6181#(not (= main_~p3~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-14 23:28:06,231 INFO L290 TraceCheckUtils]: 19: Hoare triple {6181#(not (= main_~p3~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-14 23:28:06,231 INFO L290 TraceCheckUtils]: 20: Hoare triple {6181#(not (= main_~p3~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-14 23:28:06,232 INFO L290 TraceCheckUtils]: 21: Hoare triple {6181#(not (= main_~p3~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-14 23:28:06,232 INFO L290 TraceCheckUtils]: 22: Hoare triple {6181#(not (= main_~p3~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-14 23:28:06,232 INFO L290 TraceCheckUtils]: 23: Hoare triple {6181#(not (= main_~p3~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-14 23:28:06,233 INFO L290 TraceCheckUtils]: 24: Hoare triple {6181#(not (= main_~p3~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {6177#false} is VALID [2022-04-14 23:28:06,233 INFO L290 TraceCheckUtils]: 25: Hoare triple {6177#false} [326] L156-1-->L162: Formula: (not (= v_main_~p4~0_2 0)) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2} AuxVars[] AssignedVars[] {6177#false} is VALID [2022-04-14 23:28:06,233 INFO L290 TraceCheckUtils]: 26: Hoare triple {6177#false} [328] L162-->L212-1: Formula: (not (= v_main_~lk4~0_2 1)) InVars {main_~lk4~0=v_main_~lk4~0_2} OutVars{main_~lk4~0=v_main_~lk4~0_2} AuxVars[] AssignedVars[] {6177#false} is VALID [2022-04-14 23:28:06,233 INFO L290 TraceCheckUtils]: 27: Hoare triple {6177#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6177#false} is VALID [2022-04-14 23:28:06,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:06,234 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:06,234 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2028141576] [2022-04-14 23:28:06,234 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2028141576] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:06,234 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:06,234 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:06,234 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1981448408] [2022-04-14 23:28:06,234 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:06,235 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-14 23:28:06,235 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:06,235 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:06,253 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:06,253 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:06,253 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:06,253 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:06,253 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:06,254 INFO L87 Difference]: Start difference. First operand 353 states and 627 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:06,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:06,503 INFO L93 Difference]: Finished difference Result 359 states and 628 transitions. [2022-04-14 23:28:06,503 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:06,503 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-14 23:28:06,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:06,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:06,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 172 transitions. [2022-04-14 23:28:06,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:06,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 172 transitions. [2022-04-14 23:28:06,507 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 172 transitions. [2022-04-14 23:28:06,651 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 172 edges. 172 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:06,658 INFO L225 Difference]: With dead ends: 359 [2022-04-14 23:28:06,658 INFO L226 Difference]: Without dead ends: 359 [2022-04-14 23:28:06,659 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:06,659 INFO L913 BasicCegarLoop]: 140 mSDtfsCounter, 181 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 85 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 181 SdHoareTripleChecker+Valid, 147 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 85 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:06,659 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [181 Valid, 147 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 85 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:06,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 359 states. [2022-04-14 23:28:06,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 359 to 357. [2022-04-14 23:28:06,665 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:06,666 INFO L82 GeneralOperation]: Start isEquivalent. First operand 359 states. Second operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:06,667 INFO L74 IsIncluded]: Start isIncluded. First operand 359 states. Second operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:06,667 INFO L87 Difference]: Start difference. First operand 359 states. Second operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:06,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:06,677 INFO L93 Difference]: Finished difference Result 359 states and 628 transitions. [2022-04-14 23:28:06,677 INFO L276 IsEmpty]: Start isEmpty. Operand 359 states and 628 transitions. [2022-04-14 23:28:06,677 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:06,677 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:06,678 INFO L74 IsIncluded]: Start isIncluded. First operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 359 states. [2022-04-14 23:28:06,679 INFO L87 Difference]: Start difference. First operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 359 states. [2022-04-14 23:28:06,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:06,688 INFO L93 Difference]: Finished difference Result 359 states and 628 transitions. [2022-04-14 23:28:06,688 INFO L276 IsEmpty]: Start isEmpty. Operand 359 states and 628 transitions. [2022-04-14 23:28:06,689 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:06,689 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:06,689 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:06,689 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:06,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:06,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 357 states to 357 states and 627 transitions. [2022-04-14 23:28:06,699 INFO L78 Accepts]: Start accepts. Automaton has 357 states and 627 transitions. Word has length 28 [2022-04-14 23:28:06,699 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:06,699 INFO L478 AbstractCegarLoop]: Abstraction has 357 states and 627 transitions. [2022-04-14 23:28:06,699 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:06,699 INFO L276 IsEmpty]: Start isEmpty. Operand 357 states and 627 transitions. [2022-04-14 23:28:06,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-14 23:28:06,700 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:06,700 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:06,700 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-04-14 23:28:06,700 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:06,701 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:06,701 INFO L85 PathProgramCache]: Analyzing trace with hash 1674357745, now seen corresponding path program 1 times [2022-04-14 23:28:06,701 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:06,701 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [188720323] [2022-04-14 23:28:06,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:06,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:06,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:06,737 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:06,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:06,741 INFO L290 TraceCheckUtils]: 0: Hoare triple {7628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7622#true} is VALID [2022-04-14 23:28:06,742 INFO L290 TraceCheckUtils]: 1: Hoare triple {7622#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-14 23:28:06,742 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7622#true} {7622#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-14 23:28:06,742 INFO L272 TraceCheckUtils]: 0: Hoare triple {7622#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:06,743 INFO L290 TraceCheckUtils]: 1: Hoare triple {7628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7622#true} is VALID [2022-04-14 23:28:06,743 INFO L290 TraceCheckUtils]: 2: Hoare triple {7622#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-14 23:28:06,743 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7622#true} {7622#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-14 23:28:06,743 INFO L272 TraceCheckUtils]: 4: Hoare triple {7622#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-14 23:28:06,743 INFO L290 TraceCheckUtils]: 5: Hoare triple {7622#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {7622#true} is VALID [2022-04-14 23:28:06,743 INFO L290 TraceCheckUtils]: 6: Hoare triple {7622#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {7622#true} is VALID [2022-04-14 23:28:06,744 INFO L290 TraceCheckUtils]: 7: Hoare triple {7622#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {7622#true} is VALID [2022-04-14 23:28:06,744 INFO L290 TraceCheckUtils]: 8: Hoare triple {7622#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-14 23:28:06,744 INFO L290 TraceCheckUtils]: 9: Hoare triple {7622#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-14 23:28:06,744 INFO L290 TraceCheckUtils]: 10: Hoare triple {7622#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-14 23:28:06,744 INFO L290 TraceCheckUtils]: 11: Hoare triple {7622#true} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-14 23:28:06,745 INFO L290 TraceCheckUtils]: 12: Hoare triple {7627#(= main_~lk4~0 1)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-14 23:28:06,745 INFO L290 TraceCheckUtils]: 13: Hoare triple {7627#(= main_~lk4~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-14 23:28:06,745 INFO L290 TraceCheckUtils]: 14: Hoare triple {7627#(= main_~lk4~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-14 23:28:06,746 INFO L290 TraceCheckUtils]: 15: Hoare triple {7627#(= main_~lk4~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-14 23:28:06,746 INFO L290 TraceCheckUtils]: 16: Hoare triple {7627#(= main_~lk4~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-14 23:28:06,746 INFO L290 TraceCheckUtils]: 17: Hoare triple {7627#(= main_~lk4~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-14 23:28:06,747 INFO L290 TraceCheckUtils]: 18: Hoare triple {7627#(= main_~lk4~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-14 23:28:06,747 INFO L290 TraceCheckUtils]: 19: Hoare triple {7627#(= main_~lk4~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-14 23:28:06,748 INFO L290 TraceCheckUtils]: 20: Hoare triple {7627#(= main_~lk4~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-14 23:28:06,748 INFO L290 TraceCheckUtils]: 21: Hoare triple {7627#(= main_~lk4~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-14 23:28:06,748 INFO L290 TraceCheckUtils]: 22: Hoare triple {7627#(= main_~lk4~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {7627#(= main_~lk4~0 1)} is VALID [2022-04-14 23:28:06,749 INFO L290 TraceCheckUtils]: 23: Hoare triple {7627#(= main_~lk4~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {7627#(= main_~lk4~0 1)} is VALID [2022-04-14 23:28:06,749 INFO L290 TraceCheckUtils]: 24: Hoare triple {7627#(= main_~lk4~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {7627#(= main_~lk4~0 1)} is VALID [2022-04-14 23:28:06,749 INFO L290 TraceCheckUtils]: 25: Hoare triple {7627#(= main_~lk4~0 1)} [326] L156-1-->L162: Formula: (not (= v_main_~p4~0_2 0)) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2} AuxVars[] AssignedVars[] {7627#(= main_~lk4~0 1)} is VALID [2022-04-14 23:28:06,750 INFO L290 TraceCheckUtils]: 26: Hoare triple {7627#(= main_~lk4~0 1)} [328] L162-->L212-1: Formula: (not (= v_main_~lk4~0_2 1)) InVars {main_~lk4~0=v_main_~lk4~0_2} OutVars{main_~lk4~0=v_main_~lk4~0_2} AuxVars[] AssignedVars[] {7623#false} is VALID [2022-04-14 23:28:06,750 INFO L290 TraceCheckUtils]: 27: Hoare triple {7623#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7623#false} is VALID [2022-04-14 23:28:06,750 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:06,750 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:06,750 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [188720323] [2022-04-14 23:28:06,750 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [188720323] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:06,751 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:06,751 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:06,751 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1057978378] [2022-04-14 23:28:06,751 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:06,751 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-14 23:28:06,751 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:06,752 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:06,770 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:06,770 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:06,771 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:06,771 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:06,771 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:06,771 INFO L87 Difference]: Start difference. First operand 357 states and 627 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:07,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:07,010 INFO L93 Difference]: Finished difference Result 667 states and 1184 transitions. [2022-04-14 23:28:07,010 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:07,011 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-14 23:28:07,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:07,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:07,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 166 transitions. [2022-04-14 23:28:07,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:07,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 166 transitions. [2022-04-14 23:28:07,014 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 166 transitions. [2022-04-14 23:28:07,151 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 166 edges. 166 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:07,173 INFO L225 Difference]: With dead ends: 667 [2022-04-14 23:28:07,173 INFO L226 Difference]: Without dead ends: 667 [2022-04-14 23:28:07,173 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:07,174 INFO L913 BasicCegarLoop]: 92 mSDtfsCounter, 215 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 215 SdHoareTripleChecker+Valid, 99 SdHoareTripleChecker+Invalid, 89 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:07,174 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [215 Valid, 99 Invalid, 89 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:07,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 667 states. [2022-04-14 23:28:07,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 667 to 489. [2022-04-14 23:28:07,183 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:07,184 INFO L82 GeneralOperation]: Start isEquivalent. First operand 667 states. Second operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:07,185 INFO L74 IsIncluded]: Start isIncluded. First operand 667 states. Second operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:07,186 INFO L87 Difference]: Start difference. First operand 667 states. Second operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:07,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:07,209 INFO L93 Difference]: Finished difference Result 667 states and 1184 transitions. [2022-04-14 23:28:07,209 INFO L276 IsEmpty]: Start isEmpty. Operand 667 states and 1184 transitions. [2022-04-14 23:28:07,210 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:07,210 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:07,211 INFO L74 IsIncluded]: Start isIncluded. First operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 667 states. [2022-04-14 23:28:07,212 INFO L87 Difference]: Start difference. First operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 667 states. [2022-04-14 23:28:07,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:07,235 INFO L93 Difference]: Finished difference Result 667 states and 1184 transitions. [2022-04-14 23:28:07,235 INFO L276 IsEmpty]: Start isEmpty. Operand 667 states and 1184 transitions. [2022-04-14 23:28:07,236 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:07,237 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:07,237 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:07,237 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:07,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:07,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 489 states to 489 states and 847 transitions. [2022-04-14 23:28:07,252 INFO L78 Accepts]: Start accepts. Automaton has 489 states and 847 transitions. Word has length 28 [2022-04-14 23:28:07,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:07,252 INFO L478 AbstractCegarLoop]: Abstraction has 489 states and 847 transitions. [2022-04-14 23:28:07,252 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:07,252 INFO L276 IsEmpty]: Start isEmpty. Operand 489 states and 847 transitions. [2022-04-14 23:28:07,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-14 23:28:07,253 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:07,253 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:07,253 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-04-14 23:28:07,254 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:07,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:07,254 INFO L85 PathProgramCache]: Analyzing trace with hash -1267299854, now seen corresponding path program 1 times [2022-04-14 23:28:07,254 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:07,254 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [432879583] [2022-04-14 23:28:07,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:07,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:07,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:07,289 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:07,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:07,294 INFO L290 TraceCheckUtils]: 0: Hoare triple {10130#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10124#true} is VALID [2022-04-14 23:28:07,295 INFO L290 TraceCheckUtils]: 1: Hoare triple {10124#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-14 23:28:07,295 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10124#true} {10124#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-14 23:28:07,295 INFO L272 TraceCheckUtils]: 0: Hoare triple {10124#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10130#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:07,296 INFO L290 TraceCheckUtils]: 1: Hoare triple {10130#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10124#true} is VALID [2022-04-14 23:28:07,296 INFO L290 TraceCheckUtils]: 2: Hoare triple {10124#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-14 23:28:07,296 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10124#true} {10124#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-14 23:28:07,296 INFO L272 TraceCheckUtils]: 4: Hoare triple {10124#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-14 23:28:07,296 INFO L290 TraceCheckUtils]: 5: Hoare triple {10124#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {10124#true} is VALID [2022-04-14 23:28:07,296 INFO L290 TraceCheckUtils]: 6: Hoare triple {10124#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {10124#true} is VALID [2022-04-14 23:28:07,297 INFO L290 TraceCheckUtils]: 7: Hoare triple {10124#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {10124#true} is VALID [2022-04-14 23:28:07,297 INFO L290 TraceCheckUtils]: 8: Hoare triple {10124#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-14 23:28:07,297 INFO L290 TraceCheckUtils]: 9: Hoare triple {10124#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-14 23:28:07,297 INFO L290 TraceCheckUtils]: 10: Hoare triple {10124#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-14 23:28:07,297 INFO L290 TraceCheckUtils]: 11: Hoare triple {10124#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {10129#(= main_~p4~0 0)} is VALID [2022-04-14 23:28:07,298 INFO L290 TraceCheckUtils]: 12: Hoare triple {10129#(= main_~p4~0 0)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-14 23:28:07,298 INFO L290 TraceCheckUtils]: 13: Hoare triple {10129#(= main_~p4~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-14 23:28:07,298 INFO L290 TraceCheckUtils]: 14: Hoare triple {10129#(= main_~p4~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-14 23:28:07,299 INFO L290 TraceCheckUtils]: 15: Hoare triple {10129#(= main_~p4~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-14 23:28:07,299 INFO L290 TraceCheckUtils]: 16: Hoare triple {10129#(= main_~p4~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-14 23:28:07,299 INFO L290 TraceCheckUtils]: 17: Hoare triple {10129#(= main_~p4~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-14 23:28:07,300 INFO L290 TraceCheckUtils]: 18: Hoare triple {10129#(= main_~p4~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-14 23:28:07,300 INFO L290 TraceCheckUtils]: 19: Hoare triple {10129#(= main_~p4~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-14 23:28:07,300 INFO L290 TraceCheckUtils]: 20: Hoare triple {10129#(= main_~p4~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-14 23:28:07,301 INFO L290 TraceCheckUtils]: 21: Hoare triple {10129#(= main_~p4~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-14 23:28:07,301 INFO L290 TraceCheckUtils]: 22: Hoare triple {10129#(= main_~p4~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {10129#(= main_~p4~0 0)} is VALID [2022-04-14 23:28:07,301 INFO L290 TraceCheckUtils]: 23: Hoare triple {10129#(= main_~p4~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {10129#(= main_~p4~0 0)} is VALID [2022-04-14 23:28:07,302 INFO L290 TraceCheckUtils]: 24: Hoare triple {10129#(= main_~p4~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {10129#(= main_~p4~0 0)} is VALID [2022-04-14 23:28:07,302 INFO L290 TraceCheckUtils]: 25: Hoare triple {10129#(= main_~p4~0 0)} [326] L156-1-->L162: Formula: (not (= v_main_~p4~0_2 0)) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2} AuxVars[] AssignedVars[] {10125#false} is VALID [2022-04-14 23:28:07,302 INFO L290 TraceCheckUtils]: 26: Hoare triple {10125#false} [328] L162-->L212-1: Formula: (not (= v_main_~lk4~0_2 1)) InVars {main_~lk4~0=v_main_~lk4~0_2} OutVars{main_~lk4~0=v_main_~lk4~0_2} AuxVars[] AssignedVars[] {10125#false} is VALID [2022-04-14 23:28:07,302 INFO L290 TraceCheckUtils]: 27: Hoare triple {10125#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10125#false} is VALID [2022-04-14 23:28:07,302 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:07,303 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:07,303 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [432879583] [2022-04-14 23:28:07,303 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [432879583] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:07,303 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:07,303 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:07,303 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1633409675] [2022-04-14 23:28:07,303 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:07,304 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-14 23:28:07,304 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:07,304 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:07,321 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:07,321 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:07,321 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:07,322 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:07,322 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:07,322 INFO L87 Difference]: Start difference. First operand 489 states and 847 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:07,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:07,563 INFO L93 Difference]: Finished difference Result 691 states and 1192 transitions. [2022-04-14 23:28:07,564 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:07,564 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-14 23:28:07,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:07,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:07,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 171 transitions. [2022-04-14 23:28:07,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:07,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 171 transitions. [2022-04-14 23:28:07,567 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 171 transitions. [2022-04-14 23:28:07,726 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 171 edges. 171 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:07,748 INFO L225 Difference]: With dead ends: 691 [2022-04-14 23:28:07,748 INFO L226 Difference]: Without dead ends: 691 [2022-04-14 23:28:07,748 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:07,749 INFO L913 BasicCegarLoop]: 126 mSDtfsCounter, 190 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 85 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 190 SdHoareTripleChecker+Valid, 133 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 85 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:07,749 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [190 Valid, 133 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 85 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:07,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 691 states. [2022-04-14 23:28:07,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 691 to 689. [2022-04-14 23:28:07,761 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:07,762 INFO L82 GeneralOperation]: Start isEquivalent. First operand 691 states. Second operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:07,763 INFO L74 IsIncluded]: Start isIncluded. First operand 691 states. Second operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:07,764 INFO L87 Difference]: Start difference. First operand 691 states. Second operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:07,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:07,793 INFO L93 Difference]: Finished difference Result 691 states and 1192 transitions. [2022-04-14 23:28:07,793 INFO L276 IsEmpty]: Start isEmpty. Operand 691 states and 1192 transitions. [2022-04-14 23:28:07,794 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:07,794 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:07,796 INFO L74 IsIncluded]: Start isIncluded. First operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 691 states. [2022-04-14 23:28:07,797 INFO L87 Difference]: Start difference. First operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 691 states. [2022-04-14 23:28:07,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:07,823 INFO L93 Difference]: Finished difference Result 691 states and 1192 transitions. [2022-04-14 23:28:07,823 INFO L276 IsEmpty]: Start isEmpty. Operand 691 states and 1192 transitions. [2022-04-14 23:28:07,824 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:07,824 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:07,824 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:07,824 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:07,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:07,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 689 states to 689 states and 1191 transitions. [2022-04-14 23:28:07,849 INFO L78 Accepts]: Start accepts. Automaton has 689 states and 1191 transitions. Word has length 28 [2022-04-14 23:28:07,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:07,850 INFO L478 AbstractCegarLoop]: Abstraction has 689 states and 1191 transitions. [2022-04-14 23:28:07,850 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:07,850 INFO L276 IsEmpty]: Start isEmpty. Operand 689 states and 1191 transitions. [2022-04-14 23:28:07,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-14 23:28:07,851 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:07,851 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:07,851 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-04-14 23:28:07,851 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:07,852 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:07,852 INFO L85 PathProgramCache]: Analyzing trace with hash 365515008, now seen corresponding path program 1 times [2022-04-14 23:28:07,852 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:07,852 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1416017064] [2022-04-14 23:28:07,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:07,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:07,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:07,909 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:07,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:07,914 INFO L290 TraceCheckUtils]: 0: Hoare triple {12904#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12898#true} is VALID [2022-04-14 23:28:07,915 INFO L290 TraceCheckUtils]: 1: Hoare triple {12898#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-14 23:28:07,915 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12898#true} {12898#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-14 23:28:07,915 INFO L272 TraceCheckUtils]: 0: Hoare triple {12898#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12904#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:07,916 INFO L290 TraceCheckUtils]: 1: Hoare triple {12904#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12898#true} is VALID [2022-04-14 23:28:07,916 INFO L290 TraceCheckUtils]: 2: Hoare triple {12898#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-14 23:28:07,916 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12898#true} {12898#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-14 23:28:07,916 INFO L272 TraceCheckUtils]: 4: Hoare triple {12898#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-14 23:28:07,916 INFO L290 TraceCheckUtils]: 5: Hoare triple {12898#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {12898#true} is VALID [2022-04-14 23:28:07,916 INFO L290 TraceCheckUtils]: 6: Hoare triple {12898#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {12898#true} is VALID [2022-04-14 23:28:07,917 INFO L290 TraceCheckUtils]: 7: Hoare triple {12898#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {12898#true} is VALID [2022-04-14 23:28:07,917 INFO L290 TraceCheckUtils]: 8: Hoare triple {12898#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-14 23:28:07,917 INFO L290 TraceCheckUtils]: 9: Hoare triple {12898#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-14 23:28:07,917 INFO L290 TraceCheckUtils]: 10: Hoare triple {12898#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-14 23:28:07,917 INFO L290 TraceCheckUtils]: 11: Hoare triple {12898#true} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-14 23:28:07,918 INFO L290 TraceCheckUtils]: 12: Hoare triple {12903#(not (= main_~p4~0 0))} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-14 23:28:07,918 INFO L290 TraceCheckUtils]: 13: Hoare triple {12903#(not (= main_~p4~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-14 23:28:07,919 INFO L290 TraceCheckUtils]: 14: Hoare triple {12903#(not (= main_~p4~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-14 23:28:07,919 INFO L290 TraceCheckUtils]: 15: Hoare triple {12903#(not (= main_~p4~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-14 23:28:07,919 INFO L290 TraceCheckUtils]: 16: Hoare triple {12903#(not (= main_~p4~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-14 23:28:07,920 INFO L290 TraceCheckUtils]: 17: Hoare triple {12903#(not (= main_~p4~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-14 23:28:07,920 INFO L290 TraceCheckUtils]: 18: Hoare triple {12903#(not (= main_~p4~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-14 23:28:07,920 INFO L290 TraceCheckUtils]: 19: Hoare triple {12903#(not (= main_~p4~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-14 23:28:07,921 INFO L290 TraceCheckUtils]: 20: Hoare triple {12903#(not (= main_~p4~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-14 23:28:07,921 INFO L290 TraceCheckUtils]: 21: Hoare triple {12903#(not (= main_~p4~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-14 23:28:07,921 INFO L290 TraceCheckUtils]: 22: Hoare triple {12903#(not (= main_~p4~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-14 23:28:07,922 INFO L290 TraceCheckUtils]: 23: Hoare triple {12903#(not (= main_~p4~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-14 23:28:07,922 INFO L290 TraceCheckUtils]: 24: Hoare triple {12903#(not (= main_~p4~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-14 23:28:07,923 INFO L290 TraceCheckUtils]: 25: Hoare triple {12903#(not (= main_~p4~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {12899#false} is VALID [2022-04-14 23:28:07,923 INFO L290 TraceCheckUtils]: 26: Hoare triple {12899#false} [330] L161-1-->L167: Formula: (not (= v_main_~p5~0_2 0)) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2} AuxVars[] AssignedVars[] {12899#false} is VALID [2022-04-14 23:28:07,923 INFO L290 TraceCheckUtils]: 27: Hoare triple {12899#false} [332] L167-->L212-1: Formula: (not (= v_main_~lk5~0_3 1)) InVars {main_~lk5~0=v_main_~lk5~0_3} OutVars{main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[] {12899#false} is VALID [2022-04-14 23:28:07,923 INFO L290 TraceCheckUtils]: 28: Hoare triple {12899#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12899#false} is VALID [2022-04-14 23:28:07,924 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:07,924 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:07,924 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1416017064] [2022-04-14 23:28:07,924 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1416017064] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:07,924 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:07,924 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:07,924 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2049560969] [2022-04-14 23:28:07,924 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:07,925 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-14 23:28:07,925 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:07,925 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:07,944 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:07,944 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:07,944 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:07,945 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:07,945 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:07,945 INFO L87 Difference]: Start difference. First operand 689 states and 1191 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:08,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:08,189 INFO L93 Difference]: Finished difference Result 699 states and 1192 transitions. [2022-04-14 23:28:08,190 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:08,190 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-14 23:28:08,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:08,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:08,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 170 transitions. [2022-04-14 23:28:08,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:08,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 170 transitions. [2022-04-14 23:28:08,193 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 170 transitions. [2022-04-14 23:28:08,329 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 170 edges. 170 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:08,351 INFO L225 Difference]: With dead ends: 699 [2022-04-14 23:28:08,352 INFO L226 Difference]: Without dead ends: 699 [2022-04-14 23:28:08,352 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:08,352 INFO L913 BasicCegarLoop]: 137 mSDtfsCounter, 180 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 180 SdHoareTripleChecker+Valid, 144 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:08,353 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [180 Valid, 144 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:08,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 699 states. [2022-04-14 23:28:08,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 699 to 697. [2022-04-14 23:28:08,364 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:08,365 INFO L82 GeneralOperation]: Start isEquivalent. First operand 699 states. Second operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:08,366 INFO L74 IsIncluded]: Start isIncluded. First operand 699 states. Second operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:08,367 INFO L87 Difference]: Start difference. First operand 699 states. Second operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:08,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:08,390 INFO L93 Difference]: Finished difference Result 699 states and 1192 transitions. [2022-04-14 23:28:08,390 INFO L276 IsEmpty]: Start isEmpty. Operand 699 states and 1192 transitions. [2022-04-14 23:28:08,392 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:08,392 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:08,394 INFO L74 IsIncluded]: Start isIncluded. First operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 699 states. [2022-04-14 23:28:08,395 INFO L87 Difference]: Start difference. First operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 699 states. [2022-04-14 23:28:08,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:08,419 INFO L93 Difference]: Finished difference Result 699 states and 1192 transitions. [2022-04-14 23:28:08,419 INFO L276 IsEmpty]: Start isEmpty. Operand 699 states and 1192 transitions. [2022-04-14 23:28:08,420 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:08,420 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:08,420 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:08,421 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:08,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:08,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 697 states to 697 states and 1191 transitions. [2022-04-14 23:28:08,448 INFO L78 Accepts]: Start accepts. Automaton has 697 states and 1191 transitions. Word has length 29 [2022-04-14 23:28:08,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:08,448 INFO L478 AbstractCegarLoop]: Abstraction has 697 states and 1191 transitions. [2022-04-14 23:28:08,449 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:08,449 INFO L276 IsEmpty]: Start isEmpty. Operand 697 states and 1191 transitions. [2022-04-14 23:28:08,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-14 23:28:08,450 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:08,450 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:08,450 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-04-14 23:28:08,450 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:08,450 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:08,450 INFO L85 PathProgramCache]: Analyzing trace with hash -631557345, now seen corresponding path program 1 times [2022-04-14 23:28:08,450 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:08,451 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [505164923] [2022-04-14 23:28:08,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:08,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:08,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:08,494 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:08,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:08,502 INFO L290 TraceCheckUtils]: 0: Hoare triple {15710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15704#true} is VALID [2022-04-14 23:28:08,503 INFO L290 TraceCheckUtils]: 1: Hoare triple {15704#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-14 23:28:08,503 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15704#true} {15704#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-14 23:28:08,503 INFO L272 TraceCheckUtils]: 0: Hoare triple {15704#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:08,504 INFO L290 TraceCheckUtils]: 1: Hoare triple {15710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15704#true} is VALID [2022-04-14 23:28:08,504 INFO L290 TraceCheckUtils]: 2: Hoare triple {15704#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-14 23:28:08,504 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15704#true} {15704#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-14 23:28:08,504 INFO L272 TraceCheckUtils]: 4: Hoare triple {15704#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-14 23:28:08,504 INFO L290 TraceCheckUtils]: 5: Hoare triple {15704#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {15704#true} is VALID [2022-04-14 23:28:08,504 INFO L290 TraceCheckUtils]: 6: Hoare triple {15704#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {15704#true} is VALID [2022-04-14 23:28:08,509 INFO L290 TraceCheckUtils]: 7: Hoare triple {15704#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {15704#true} is VALID [2022-04-14 23:28:08,510 INFO L290 TraceCheckUtils]: 8: Hoare triple {15704#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-14 23:28:08,511 INFO L290 TraceCheckUtils]: 9: Hoare triple {15704#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-14 23:28:08,513 INFO L290 TraceCheckUtils]: 10: Hoare triple {15704#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-14 23:28:08,514 INFO L290 TraceCheckUtils]: 11: Hoare triple {15704#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-14 23:28:08,515 INFO L290 TraceCheckUtils]: 12: Hoare triple {15704#true} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-14 23:28:08,515 INFO L290 TraceCheckUtils]: 13: Hoare triple {15709#(= main_~lk5~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-14 23:28:08,515 INFO L290 TraceCheckUtils]: 14: Hoare triple {15709#(= main_~lk5~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-14 23:28:08,516 INFO L290 TraceCheckUtils]: 15: Hoare triple {15709#(= main_~lk5~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-14 23:28:08,517 INFO L290 TraceCheckUtils]: 16: Hoare triple {15709#(= main_~lk5~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-14 23:28:08,517 INFO L290 TraceCheckUtils]: 17: Hoare triple {15709#(= main_~lk5~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-14 23:28:08,518 INFO L290 TraceCheckUtils]: 18: Hoare triple {15709#(= main_~lk5~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-14 23:28:08,518 INFO L290 TraceCheckUtils]: 19: Hoare triple {15709#(= main_~lk5~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-14 23:28:08,519 INFO L290 TraceCheckUtils]: 20: Hoare triple {15709#(= main_~lk5~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-14 23:28:08,519 INFO L290 TraceCheckUtils]: 21: Hoare triple {15709#(= main_~lk5~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-14 23:28:08,523 INFO L290 TraceCheckUtils]: 22: Hoare triple {15709#(= main_~lk5~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {15709#(= main_~lk5~0 1)} is VALID [2022-04-14 23:28:08,523 INFO L290 TraceCheckUtils]: 23: Hoare triple {15709#(= main_~lk5~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {15709#(= main_~lk5~0 1)} is VALID [2022-04-14 23:28:08,524 INFO L290 TraceCheckUtils]: 24: Hoare triple {15709#(= main_~lk5~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {15709#(= main_~lk5~0 1)} is VALID [2022-04-14 23:28:08,524 INFO L290 TraceCheckUtils]: 25: Hoare triple {15709#(= main_~lk5~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {15709#(= main_~lk5~0 1)} is VALID [2022-04-14 23:28:08,524 INFO L290 TraceCheckUtils]: 26: Hoare triple {15709#(= main_~lk5~0 1)} [330] L161-1-->L167: Formula: (not (= v_main_~p5~0_2 0)) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2} AuxVars[] AssignedVars[] {15709#(= main_~lk5~0 1)} is VALID [2022-04-14 23:28:08,524 INFO L290 TraceCheckUtils]: 27: Hoare triple {15709#(= main_~lk5~0 1)} [332] L167-->L212-1: Formula: (not (= v_main_~lk5~0_3 1)) InVars {main_~lk5~0=v_main_~lk5~0_3} OutVars{main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[] {15705#false} is VALID [2022-04-14 23:28:08,525 INFO L290 TraceCheckUtils]: 28: Hoare triple {15705#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15705#false} is VALID [2022-04-14 23:28:08,526 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:08,526 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:08,526 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [505164923] [2022-04-14 23:28:08,526 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [505164923] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:08,526 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:08,526 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:08,526 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2009176462] [2022-04-14 23:28:08,526 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:08,527 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-14 23:28:08,527 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:08,527 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:08,544 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:08,545 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:08,545 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:08,545 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:08,545 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:08,546 INFO L87 Difference]: Start difference. First operand 697 states and 1191 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:08,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:08,829 INFO L93 Difference]: Finished difference Result 1291 states and 2232 transitions. [2022-04-14 23:28:08,829 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:08,829 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-14 23:28:08,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:08,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:08,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-14 23:28:08,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:08,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-14 23:28:08,833 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 162 transitions. [2022-04-14 23:28:08,961 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 162 edges. 162 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:09,035 INFO L225 Difference]: With dead ends: 1291 [2022-04-14 23:28:09,036 INFO L226 Difference]: Without dead ends: 1291 [2022-04-14 23:28:09,036 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:09,038 INFO L913 BasicCegarLoop]: 91 mSDtfsCounter, 208 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 208 SdHoareTripleChecker+Valid, 98 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:09,038 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [208 Valid, 98 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 86 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:09,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1291 states. [2022-04-14 23:28:09,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1291 to 969. [2022-04-14 23:28:09,055 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:09,056 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1291 states. Second operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:09,058 INFO L74 IsIncluded]: Start isIncluded. First operand 1291 states. Second operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:09,059 INFO L87 Difference]: Start difference. First operand 1291 states. Second operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:09,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:09,134 INFO L93 Difference]: Finished difference Result 1291 states and 2232 transitions. [2022-04-14 23:28:09,134 INFO L276 IsEmpty]: Start isEmpty. Operand 1291 states and 2232 transitions. [2022-04-14 23:28:09,136 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:09,137 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:09,138 INFO L74 IsIncluded]: Start isIncluded. First operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1291 states. [2022-04-14 23:28:09,140 INFO L87 Difference]: Start difference. First operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1291 states. [2022-04-14 23:28:09,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:09,211 INFO L93 Difference]: Finished difference Result 1291 states and 2232 transitions. [2022-04-14 23:28:09,211 INFO L276 IsEmpty]: Start isEmpty. Operand 1291 states and 2232 transitions. [2022-04-14 23:28:09,214 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:09,214 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:09,214 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:09,214 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:09,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:09,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 969 states to 969 states and 1623 transitions. [2022-04-14 23:28:09,275 INFO L78 Accepts]: Start accepts. Automaton has 969 states and 1623 transitions. Word has length 29 [2022-04-14 23:28:09,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:09,276 INFO L478 AbstractCegarLoop]: Abstraction has 969 states and 1623 transitions. [2022-04-14 23:28:09,276 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:09,276 INFO L276 IsEmpty]: Start isEmpty. Operand 969 states and 1623 transitions. [2022-04-14 23:28:09,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-14 23:28:09,277 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:09,277 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:09,277 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-04-14 23:28:09,278 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:09,278 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:09,278 INFO L85 PathProgramCache]: Analyzing trace with hash 721752352, now seen corresponding path program 1 times [2022-04-14 23:28:09,278 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:09,278 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [154550211] [2022-04-14 23:28:09,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:09,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:09,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:09,332 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:09,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:09,336 INFO L290 TraceCheckUtils]: 0: Hoare triple {20564#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {20558#true} is VALID [2022-04-14 23:28:09,336 INFO L290 TraceCheckUtils]: 1: Hoare triple {20558#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-14 23:28:09,337 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {20558#true} {20558#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-14 23:28:09,337 INFO L272 TraceCheckUtils]: 0: Hoare triple {20558#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20564#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:09,337 INFO L290 TraceCheckUtils]: 1: Hoare triple {20564#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {20558#true} is VALID [2022-04-14 23:28:09,337 INFO L290 TraceCheckUtils]: 2: Hoare triple {20558#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-14 23:28:09,338 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20558#true} {20558#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-14 23:28:09,338 INFO L272 TraceCheckUtils]: 4: Hoare triple {20558#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-14 23:28:09,338 INFO L290 TraceCheckUtils]: 5: Hoare triple {20558#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {20558#true} is VALID [2022-04-14 23:28:09,338 INFO L290 TraceCheckUtils]: 6: Hoare triple {20558#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {20558#true} is VALID [2022-04-14 23:28:09,338 INFO L290 TraceCheckUtils]: 7: Hoare triple {20558#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {20558#true} is VALID [2022-04-14 23:28:09,338 INFO L290 TraceCheckUtils]: 8: Hoare triple {20558#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-14 23:28:09,338 INFO L290 TraceCheckUtils]: 9: Hoare triple {20558#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-14 23:28:09,338 INFO L290 TraceCheckUtils]: 10: Hoare triple {20558#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-14 23:28:09,338 INFO L290 TraceCheckUtils]: 11: Hoare triple {20558#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-14 23:28:09,339 INFO L290 TraceCheckUtils]: 12: Hoare triple {20558#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {20563#(= main_~p5~0 0)} is VALID [2022-04-14 23:28:09,339 INFO L290 TraceCheckUtils]: 13: Hoare triple {20563#(= main_~p5~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-14 23:28:09,339 INFO L290 TraceCheckUtils]: 14: Hoare triple {20563#(= main_~p5~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-14 23:28:09,340 INFO L290 TraceCheckUtils]: 15: Hoare triple {20563#(= main_~p5~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-14 23:28:09,340 INFO L290 TraceCheckUtils]: 16: Hoare triple {20563#(= main_~p5~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-14 23:28:09,340 INFO L290 TraceCheckUtils]: 17: Hoare triple {20563#(= main_~p5~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-14 23:28:09,341 INFO L290 TraceCheckUtils]: 18: Hoare triple {20563#(= main_~p5~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-14 23:28:09,341 INFO L290 TraceCheckUtils]: 19: Hoare triple {20563#(= main_~p5~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-14 23:28:09,341 INFO L290 TraceCheckUtils]: 20: Hoare triple {20563#(= main_~p5~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-14 23:28:09,342 INFO L290 TraceCheckUtils]: 21: Hoare triple {20563#(= main_~p5~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-14 23:28:09,342 INFO L290 TraceCheckUtils]: 22: Hoare triple {20563#(= main_~p5~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {20563#(= main_~p5~0 0)} is VALID [2022-04-14 23:28:09,342 INFO L290 TraceCheckUtils]: 23: Hoare triple {20563#(= main_~p5~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {20563#(= main_~p5~0 0)} is VALID [2022-04-14 23:28:09,343 INFO L290 TraceCheckUtils]: 24: Hoare triple {20563#(= main_~p5~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {20563#(= main_~p5~0 0)} is VALID [2022-04-14 23:28:09,343 INFO L290 TraceCheckUtils]: 25: Hoare triple {20563#(= main_~p5~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {20563#(= main_~p5~0 0)} is VALID [2022-04-14 23:28:09,343 INFO L290 TraceCheckUtils]: 26: Hoare triple {20563#(= main_~p5~0 0)} [330] L161-1-->L167: Formula: (not (= v_main_~p5~0_2 0)) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2} AuxVars[] AssignedVars[] {20559#false} is VALID [2022-04-14 23:28:09,343 INFO L290 TraceCheckUtils]: 27: Hoare triple {20559#false} [332] L167-->L212-1: Formula: (not (= v_main_~lk5~0_3 1)) InVars {main_~lk5~0=v_main_~lk5~0_3} OutVars{main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[] {20559#false} is VALID [2022-04-14 23:28:09,344 INFO L290 TraceCheckUtils]: 28: Hoare triple {20559#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20559#false} is VALID [2022-04-14 23:28:09,344 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:09,344 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:09,344 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [154550211] [2022-04-14 23:28:09,344 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [154550211] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:09,344 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:09,345 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:09,345 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1746359611] [2022-04-14 23:28:09,345 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:09,345 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-14 23:28:09,345 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:09,345 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:09,363 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:09,363 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:09,363 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:09,363 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:09,363 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:09,364 INFO L87 Difference]: Start difference. First operand 969 states and 1623 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:09,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:09,643 INFO L93 Difference]: Finished difference Result 1355 states and 2264 transitions. [2022-04-14 23:28:09,643 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:09,643 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-14 23:28:09,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:09,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:09,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 169 transitions. [2022-04-14 23:28:09,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:09,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 169 transitions. [2022-04-14 23:28:09,648 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 169 transitions. [2022-04-14 23:28:09,781 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 169 edges. 169 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:09,861 INFO L225 Difference]: With dead ends: 1355 [2022-04-14 23:28:09,861 INFO L226 Difference]: Without dead ends: 1355 [2022-04-14 23:28:09,861 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:09,862 INFO L913 BasicCegarLoop]: 128 mSDtfsCounter, 184 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 184 SdHoareTripleChecker+Valid, 135 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:09,862 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [184 Valid, 135 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:09,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1355 states. [2022-04-14 23:28:09,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1355 to 1353. [2022-04-14 23:28:09,882 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:09,884 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1355 states. Second operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:09,886 INFO L74 IsIncluded]: Start isIncluded. First operand 1355 states. Second operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:09,888 INFO L87 Difference]: Start difference. First operand 1355 states. Second operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:09,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:09,965 INFO L93 Difference]: Finished difference Result 1355 states and 2264 transitions. [2022-04-14 23:28:09,965 INFO L276 IsEmpty]: Start isEmpty. Operand 1355 states and 2264 transitions. [2022-04-14 23:28:09,968 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:09,968 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:09,970 INFO L74 IsIncluded]: Start isIncluded. First operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1355 states. [2022-04-14 23:28:09,972 INFO L87 Difference]: Start difference. First operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1355 states. [2022-04-14 23:28:10,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:10,049 INFO L93 Difference]: Finished difference Result 1355 states and 2264 transitions. [2022-04-14 23:28:10,049 INFO L276 IsEmpty]: Start isEmpty. Operand 1355 states and 2264 transitions. [2022-04-14 23:28:10,051 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:10,052 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:10,052 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:10,052 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:10,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:10,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1353 states to 1353 states and 2263 transitions. [2022-04-14 23:28:10,130 INFO L78 Accepts]: Start accepts. Automaton has 1353 states and 2263 transitions. Word has length 29 [2022-04-14 23:28:10,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:10,130 INFO L478 AbstractCegarLoop]: Abstraction has 1353 states and 2263 transitions. [2022-04-14 23:28:10,130 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:10,130 INFO L276 IsEmpty]: Start isEmpty. Operand 1353 states and 2263 transitions. [2022-04-14 23:28:10,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-14 23:28:10,133 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:10,133 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:10,133 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2022-04-14 23:28:10,133 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:10,134 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:10,134 INFO L85 PathProgramCache]: Analyzing trace with hash 1896591374, now seen corresponding path program 1 times [2022-04-14 23:28:10,134 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:10,134 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [624819861] [2022-04-14 23:28:10,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:10,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:10,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:10,170 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:10,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:10,175 INFO L290 TraceCheckUtils]: 0: Hoare triple {25994#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25988#true} is VALID [2022-04-14 23:28:10,175 INFO L290 TraceCheckUtils]: 1: Hoare triple {25988#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-14 23:28:10,175 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25988#true} {25988#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-14 23:28:10,176 INFO L272 TraceCheckUtils]: 0: Hoare triple {25988#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25994#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:10,176 INFO L290 TraceCheckUtils]: 1: Hoare triple {25994#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25988#true} is VALID [2022-04-14 23:28:10,176 INFO L290 TraceCheckUtils]: 2: Hoare triple {25988#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-14 23:28:10,178 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25988#true} {25988#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-14 23:28:10,178 INFO L272 TraceCheckUtils]: 4: Hoare triple {25988#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-14 23:28:10,178 INFO L290 TraceCheckUtils]: 5: Hoare triple {25988#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {25988#true} is VALID [2022-04-14 23:28:10,178 INFO L290 TraceCheckUtils]: 6: Hoare triple {25988#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {25988#true} is VALID [2022-04-14 23:28:10,179 INFO L290 TraceCheckUtils]: 7: Hoare triple {25988#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {25988#true} is VALID [2022-04-14 23:28:10,179 INFO L290 TraceCheckUtils]: 8: Hoare triple {25988#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-14 23:28:10,179 INFO L290 TraceCheckUtils]: 9: Hoare triple {25988#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-14 23:28:10,180 INFO L290 TraceCheckUtils]: 10: Hoare triple {25988#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-14 23:28:10,181 INFO L290 TraceCheckUtils]: 11: Hoare triple {25988#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-14 23:28:10,181 INFO L290 TraceCheckUtils]: 12: Hoare triple {25988#true} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-14 23:28:10,181 INFO L290 TraceCheckUtils]: 13: Hoare triple {25993#(not (= main_~p5~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-14 23:28:10,182 INFO L290 TraceCheckUtils]: 14: Hoare triple {25993#(not (= main_~p5~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-14 23:28:10,182 INFO L290 TraceCheckUtils]: 15: Hoare triple {25993#(not (= main_~p5~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-14 23:28:10,182 INFO L290 TraceCheckUtils]: 16: Hoare triple {25993#(not (= main_~p5~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-14 23:28:10,183 INFO L290 TraceCheckUtils]: 17: Hoare triple {25993#(not (= main_~p5~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-14 23:28:10,183 INFO L290 TraceCheckUtils]: 18: Hoare triple {25993#(not (= main_~p5~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-14 23:28:10,184 INFO L290 TraceCheckUtils]: 19: Hoare triple {25993#(not (= main_~p5~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-14 23:28:10,184 INFO L290 TraceCheckUtils]: 20: Hoare triple {25993#(not (= main_~p5~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-14 23:28:10,185 INFO L290 TraceCheckUtils]: 21: Hoare triple {25993#(not (= main_~p5~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-14 23:28:10,185 INFO L290 TraceCheckUtils]: 22: Hoare triple {25993#(not (= main_~p5~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-14 23:28:10,185 INFO L290 TraceCheckUtils]: 23: Hoare triple {25993#(not (= main_~p5~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-14 23:28:10,186 INFO L290 TraceCheckUtils]: 24: Hoare triple {25993#(not (= main_~p5~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-14 23:28:10,186 INFO L290 TraceCheckUtils]: 25: Hoare triple {25993#(not (= main_~p5~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-14 23:28:10,186 INFO L290 TraceCheckUtils]: 26: Hoare triple {25993#(not (= main_~p5~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {25989#false} is VALID [2022-04-14 23:28:10,186 INFO L290 TraceCheckUtils]: 27: Hoare triple {25989#false} [334] L166-1-->L172: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {25989#false} is VALID [2022-04-14 23:28:10,186 INFO L290 TraceCheckUtils]: 28: Hoare triple {25989#false} [336] L172-->L212-1: Formula: (not (= v_main_~lk6~0_3 1)) InVars {main_~lk6~0=v_main_~lk6~0_3} OutVars{main_~lk6~0=v_main_~lk6~0_3} AuxVars[] AssignedVars[] {25989#false} is VALID [2022-04-14 23:28:10,187 INFO L290 TraceCheckUtils]: 29: Hoare triple {25989#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25989#false} is VALID [2022-04-14 23:28:10,187 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:10,187 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:10,187 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [624819861] [2022-04-14 23:28:10,187 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [624819861] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:10,187 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:10,187 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:10,188 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [58234790] [2022-04-14 23:28:10,188 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:10,189 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-14 23:28:10,189 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:10,189 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:10,209 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:10,209 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:10,209 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:10,209 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:10,210 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:10,210 INFO L87 Difference]: Start difference. First operand 1353 states and 2263 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:10,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:10,503 INFO L93 Difference]: Finished difference Result 1371 states and 2264 transitions. [2022-04-14 23:28:10,504 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:10,504 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-14 23:28:10,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:10,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:10,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 168 transitions. [2022-04-14 23:28:10,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:10,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 168 transitions. [2022-04-14 23:28:10,508 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 168 transitions. [2022-04-14 23:28:10,646 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 168 edges. 168 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:10,725 INFO L225 Difference]: With dead ends: 1371 [2022-04-14 23:28:10,725 INFO L226 Difference]: Without dead ends: 1371 [2022-04-14 23:28:10,727 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:10,728 INFO L913 BasicCegarLoop]: 134 mSDtfsCounter, 179 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 83 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 179 SdHoareTripleChecker+Valid, 141 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 83 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:10,729 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [179 Valid, 141 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 83 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:10,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1371 states. [2022-04-14 23:28:10,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1371 to 1369. [2022-04-14 23:28:10,749 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:10,751 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1371 states. Second operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:10,755 INFO L74 IsIncluded]: Start isIncluded. First operand 1371 states. Second operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:10,758 INFO L87 Difference]: Start difference. First operand 1371 states. Second operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:10,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:10,832 INFO L93 Difference]: Finished difference Result 1371 states and 2264 transitions. [2022-04-14 23:28:10,832 INFO L276 IsEmpty]: Start isEmpty. Operand 1371 states and 2264 transitions. [2022-04-14 23:28:10,834 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:10,834 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:10,837 INFO L74 IsIncluded]: Start isIncluded. First operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1371 states. [2022-04-14 23:28:10,838 INFO L87 Difference]: Start difference. First operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1371 states. [2022-04-14 23:28:10,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:10,939 INFO L93 Difference]: Finished difference Result 1371 states and 2264 transitions. [2022-04-14 23:28:10,939 INFO L276 IsEmpty]: Start isEmpty. Operand 1371 states and 2264 transitions. [2022-04-14 23:28:10,940 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:10,940 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:10,941 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:10,941 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:10,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:11,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1369 states to 1369 states and 2263 transitions. [2022-04-14 23:28:11,021 INFO L78 Accepts]: Start accepts. Automaton has 1369 states and 2263 transitions. Word has length 30 [2022-04-14 23:28:11,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:11,022 INFO L478 AbstractCegarLoop]: Abstraction has 1369 states and 2263 transitions. [2022-04-14 23:28:11,022 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:11,022 INFO L276 IsEmpty]: Start isEmpty. Operand 1369 states and 2263 transitions. [2022-04-14 23:28:11,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-14 23:28:11,023 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:11,023 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:11,024 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2022-04-14 23:28:11,024 INFO L403 AbstractCegarLoop]: === Iteration 16 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:11,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:11,024 INFO L85 PathProgramCache]: Analyzing trace with hash 899519021, now seen corresponding path program 1 times [2022-04-14 23:28:11,024 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:11,024 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1014272085] [2022-04-14 23:28:11,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:11,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:11,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:11,079 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:11,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:11,087 INFO L290 TraceCheckUtils]: 0: Hoare triple {31488#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31482#true} is VALID [2022-04-14 23:28:11,087 INFO L290 TraceCheckUtils]: 1: Hoare triple {31482#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-14 23:28:11,087 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31482#true} {31482#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-14 23:28:11,089 INFO L272 TraceCheckUtils]: 0: Hoare triple {31482#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31488#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:11,089 INFO L290 TraceCheckUtils]: 1: Hoare triple {31488#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31482#true} is VALID [2022-04-14 23:28:11,089 INFO L290 TraceCheckUtils]: 2: Hoare triple {31482#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-14 23:28:11,090 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31482#true} {31482#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-14 23:28:11,090 INFO L272 TraceCheckUtils]: 4: Hoare triple {31482#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-14 23:28:11,090 INFO L290 TraceCheckUtils]: 5: Hoare triple {31482#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {31482#true} is VALID [2022-04-14 23:28:11,090 INFO L290 TraceCheckUtils]: 6: Hoare triple {31482#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {31482#true} is VALID [2022-04-14 23:28:11,090 INFO L290 TraceCheckUtils]: 7: Hoare triple {31482#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {31482#true} is VALID [2022-04-14 23:28:11,090 INFO L290 TraceCheckUtils]: 8: Hoare triple {31482#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-14 23:28:11,091 INFO L290 TraceCheckUtils]: 9: Hoare triple {31482#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-14 23:28:11,091 INFO L290 TraceCheckUtils]: 10: Hoare triple {31482#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-14 23:28:11,091 INFO L290 TraceCheckUtils]: 11: Hoare triple {31482#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-14 23:28:11,091 INFO L290 TraceCheckUtils]: 12: Hoare triple {31482#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-14 23:28:11,091 INFO L290 TraceCheckUtils]: 13: Hoare triple {31482#true} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-14 23:28:11,092 INFO L290 TraceCheckUtils]: 14: Hoare triple {31487#(= main_~lk6~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-14 23:28:11,092 INFO L290 TraceCheckUtils]: 15: Hoare triple {31487#(= main_~lk6~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-14 23:28:11,092 INFO L290 TraceCheckUtils]: 16: Hoare triple {31487#(= main_~lk6~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-14 23:28:11,093 INFO L290 TraceCheckUtils]: 17: Hoare triple {31487#(= main_~lk6~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-14 23:28:11,093 INFO L290 TraceCheckUtils]: 18: Hoare triple {31487#(= main_~lk6~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-14 23:28:11,093 INFO L290 TraceCheckUtils]: 19: Hoare triple {31487#(= main_~lk6~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-14 23:28:11,094 INFO L290 TraceCheckUtils]: 20: Hoare triple {31487#(= main_~lk6~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-14 23:28:11,094 INFO L290 TraceCheckUtils]: 21: Hoare triple {31487#(= main_~lk6~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-14 23:28:11,094 INFO L290 TraceCheckUtils]: 22: Hoare triple {31487#(= main_~lk6~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {31487#(= main_~lk6~0 1)} is VALID [2022-04-14 23:28:11,095 INFO L290 TraceCheckUtils]: 23: Hoare triple {31487#(= main_~lk6~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {31487#(= main_~lk6~0 1)} is VALID [2022-04-14 23:28:11,095 INFO L290 TraceCheckUtils]: 24: Hoare triple {31487#(= main_~lk6~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {31487#(= main_~lk6~0 1)} is VALID [2022-04-14 23:28:11,095 INFO L290 TraceCheckUtils]: 25: Hoare triple {31487#(= main_~lk6~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {31487#(= main_~lk6~0 1)} is VALID [2022-04-14 23:28:11,096 INFO L290 TraceCheckUtils]: 26: Hoare triple {31487#(= main_~lk6~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {31487#(= main_~lk6~0 1)} is VALID [2022-04-14 23:28:11,096 INFO L290 TraceCheckUtils]: 27: Hoare triple {31487#(= main_~lk6~0 1)} [334] L166-1-->L172: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {31487#(= main_~lk6~0 1)} is VALID [2022-04-14 23:28:11,096 INFO L290 TraceCheckUtils]: 28: Hoare triple {31487#(= main_~lk6~0 1)} [336] L172-->L212-1: Formula: (not (= v_main_~lk6~0_3 1)) InVars {main_~lk6~0=v_main_~lk6~0_3} OutVars{main_~lk6~0=v_main_~lk6~0_3} AuxVars[] AssignedVars[] {31483#false} is VALID [2022-04-14 23:28:11,096 INFO L290 TraceCheckUtils]: 29: Hoare triple {31483#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31483#false} is VALID [2022-04-14 23:28:11,097 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:11,097 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:11,097 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1014272085] [2022-04-14 23:28:11,097 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1014272085] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:11,097 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:11,097 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:11,097 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1527782282] [2022-04-14 23:28:11,097 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:11,098 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-14 23:28:11,098 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:11,098 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:11,118 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:11,118 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:11,118 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:11,119 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:11,119 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:11,119 INFO L87 Difference]: Start difference. First operand 1369 states and 2263 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:11,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:11,572 INFO L93 Difference]: Finished difference Result 2507 states and 4200 transitions. [2022-04-14 23:28:11,572 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:11,572 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-14 23:28:11,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:11,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:11,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 158 transitions. [2022-04-14 23:28:11,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:11,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 158 transitions. [2022-04-14 23:28:11,575 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 158 transitions. [2022-04-14 23:28:11,691 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 158 edges. 158 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:11,863 INFO L225 Difference]: With dead ends: 2507 [2022-04-14 23:28:11,864 INFO L226 Difference]: Without dead ends: 2507 [2022-04-14 23:28:11,864 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:11,864 INFO L913 BasicCegarLoop]: 90 mSDtfsCounter, 201 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 85 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 201 SdHoareTripleChecker+Valid, 97 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 85 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:11,865 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [201 Valid, 97 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 85 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:11,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2507 states. [2022-04-14 23:28:11,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2507 to 1929. [2022-04-14 23:28:11,895 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:11,898 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2507 states. Second operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:11,900 INFO L74 IsIncluded]: Start isIncluded. First operand 2507 states. Second operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:11,902 INFO L87 Difference]: Start difference. First operand 2507 states. Second operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:12,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:12,096 INFO L93 Difference]: Finished difference Result 2507 states and 4200 transitions. [2022-04-14 23:28:12,096 INFO L276 IsEmpty]: Start isEmpty. Operand 2507 states and 4200 transitions. [2022-04-14 23:28:12,099 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:12,099 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:12,102 INFO L74 IsIncluded]: Start isIncluded. First operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2507 states. [2022-04-14 23:28:12,104 INFO L87 Difference]: Start difference. First operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2507 states. [2022-04-14 23:28:12,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:12,338 INFO L93 Difference]: Finished difference Result 2507 states and 4200 transitions. [2022-04-14 23:28:12,338 INFO L276 IsEmpty]: Start isEmpty. Operand 2507 states and 4200 transitions. [2022-04-14 23:28:12,341 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:12,341 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:12,341 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:12,341 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:12,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:12,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1929 states to 1929 states and 3111 transitions. [2022-04-14 23:28:12,492 INFO L78 Accepts]: Start accepts. Automaton has 1929 states and 3111 transitions. Word has length 30 [2022-04-14 23:28:12,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:12,493 INFO L478 AbstractCegarLoop]: Abstraction has 1929 states and 3111 transitions. [2022-04-14 23:28:12,493 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:12,493 INFO L276 IsEmpty]: Start isEmpty. Operand 1929 states and 3111 transitions. [2022-04-14 23:28:12,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-14 23:28:12,495 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:12,495 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:12,495 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2022-04-14 23:28:12,495 INFO L403 AbstractCegarLoop]: === Iteration 17 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:12,495 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:12,495 INFO L85 PathProgramCache]: Analyzing trace with hash -2042138578, now seen corresponding path program 1 times [2022-04-14 23:28:12,495 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:12,495 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [277215779] [2022-04-14 23:28:12,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:12,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:12,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:12,539 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:12,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:12,543 INFO L290 TraceCheckUtils]: 0: Hoare triple {40950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {40944#true} is VALID [2022-04-14 23:28:12,544 INFO L290 TraceCheckUtils]: 1: Hoare triple {40944#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-14 23:28:12,544 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {40944#true} {40944#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-14 23:28:12,544 INFO L272 TraceCheckUtils]: 0: Hoare triple {40944#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:12,544 INFO L290 TraceCheckUtils]: 1: Hoare triple {40950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {40944#true} is VALID [2022-04-14 23:28:12,544 INFO L290 TraceCheckUtils]: 2: Hoare triple {40944#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-14 23:28:12,545 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {40944#true} {40944#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-14 23:28:12,545 INFO L272 TraceCheckUtils]: 4: Hoare triple {40944#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-14 23:28:12,546 INFO L290 TraceCheckUtils]: 5: Hoare triple {40944#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {40944#true} is VALID [2022-04-14 23:28:12,547 INFO L290 TraceCheckUtils]: 6: Hoare triple {40944#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {40944#true} is VALID [2022-04-14 23:28:12,548 INFO L290 TraceCheckUtils]: 7: Hoare triple {40944#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {40944#true} is VALID [2022-04-14 23:28:12,549 INFO L290 TraceCheckUtils]: 8: Hoare triple {40944#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-14 23:28:12,550 INFO L290 TraceCheckUtils]: 9: Hoare triple {40944#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-14 23:28:12,550 INFO L290 TraceCheckUtils]: 10: Hoare triple {40944#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-14 23:28:12,550 INFO L290 TraceCheckUtils]: 11: Hoare triple {40944#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-14 23:28:12,550 INFO L290 TraceCheckUtils]: 12: Hoare triple {40944#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-14 23:28:12,550 INFO L290 TraceCheckUtils]: 13: Hoare triple {40944#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {40949#(= main_~p6~0 0)} is VALID [2022-04-14 23:28:12,551 INFO L290 TraceCheckUtils]: 14: Hoare triple {40949#(= main_~p6~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-14 23:28:12,551 INFO L290 TraceCheckUtils]: 15: Hoare triple {40949#(= main_~p6~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-14 23:28:12,551 INFO L290 TraceCheckUtils]: 16: Hoare triple {40949#(= main_~p6~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-14 23:28:12,552 INFO L290 TraceCheckUtils]: 17: Hoare triple {40949#(= main_~p6~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-14 23:28:12,552 INFO L290 TraceCheckUtils]: 18: Hoare triple {40949#(= main_~p6~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-14 23:28:12,552 INFO L290 TraceCheckUtils]: 19: Hoare triple {40949#(= main_~p6~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-14 23:28:12,553 INFO L290 TraceCheckUtils]: 20: Hoare triple {40949#(= main_~p6~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-14 23:28:12,553 INFO L290 TraceCheckUtils]: 21: Hoare triple {40949#(= main_~p6~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-14 23:28:12,553 INFO L290 TraceCheckUtils]: 22: Hoare triple {40949#(= main_~p6~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {40949#(= main_~p6~0 0)} is VALID [2022-04-14 23:28:12,553 INFO L290 TraceCheckUtils]: 23: Hoare triple {40949#(= main_~p6~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {40949#(= main_~p6~0 0)} is VALID [2022-04-14 23:28:12,554 INFO L290 TraceCheckUtils]: 24: Hoare triple {40949#(= main_~p6~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {40949#(= main_~p6~0 0)} is VALID [2022-04-14 23:28:12,554 INFO L290 TraceCheckUtils]: 25: Hoare triple {40949#(= main_~p6~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {40949#(= main_~p6~0 0)} is VALID [2022-04-14 23:28:12,554 INFO L290 TraceCheckUtils]: 26: Hoare triple {40949#(= main_~p6~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {40949#(= main_~p6~0 0)} is VALID [2022-04-14 23:28:12,555 INFO L290 TraceCheckUtils]: 27: Hoare triple {40949#(= main_~p6~0 0)} [334] L166-1-->L172: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {40945#false} is VALID [2022-04-14 23:28:12,555 INFO L290 TraceCheckUtils]: 28: Hoare triple {40945#false} [336] L172-->L212-1: Formula: (not (= v_main_~lk6~0_3 1)) InVars {main_~lk6~0=v_main_~lk6~0_3} OutVars{main_~lk6~0=v_main_~lk6~0_3} AuxVars[] AssignedVars[] {40945#false} is VALID [2022-04-14 23:28:12,555 INFO L290 TraceCheckUtils]: 29: Hoare triple {40945#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40945#false} is VALID [2022-04-14 23:28:12,555 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:12,555 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:12,555 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [277215779] [2022-04-14 23:28:12,555 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [277215779] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:12,556 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:12,556 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:12,556 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1367815010] [2022-04-14 23:28:12,556 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:12,556 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-14 23:28:12,557 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:12,557 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:12,576 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:12,577 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:12,577 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:12,577 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:12,577 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:12,577 INFO L87 Difference]: Start difference. First operand 1929 states and 3111 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:13,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:13,063 INFO L93 Difference]: Finished difference Result 2667 states and 4296 transitions. [2022-04-14 23:28:13,063 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:13,063 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-14 23:28:13,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:13,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:13,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 167 transitions. [2022-04-14 23:28:13,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:13,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 167 transitions. [2022-04-14 23:28:13,066 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 167 transitions. [2022-04-14 23:28:13,224 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 167 edges. 167 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:13,435 INFO L225 Difference]: With dead ends: 2667 [2022-04-14 23:28:13,435 INFO L226 Difference]: Without dead ends: 2667 [2022-04-14 23:28:13,435 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:13,436 INFO L913 BasicCegarLoop]: 130 mSDtfsCounter, 178 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 83 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 178 SdHoareTripleChecker+Valid, 137 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 83 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:13,436 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [178 Valid, 137 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 83 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:13,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2667 states. [2022-04-14 23:28:13,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2667 to 2665. [2022-04-14 23:28:13,472 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:13,476 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2667 states. Second operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:13,479 INFO L74 IsIncluded]: Start isIncluded. First operand 2667 states. Second operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:13,482 INFO L87 Difference]: Start difference. First operand 2667 states. Second operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:13,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:13,680 INFO L93 Difference]: Finished difference Result 2667 states and 4296 transitions. [2022-04-14 23:28:13,680 INFO L276 IsEmpty]: Start isEmpty. Operand 2667 states and 4296 transitions. [2022-04-14 23:28:13,682 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:13,683 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:13,687 INFO L74 IsIncluded]: Start isIncluded. First operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2667 states. [2022-04-14 23:28:13,690 INFO L87 Difference]: Start difference. First operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2667 states. [2022-04-14 23:28:13,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:13,948 INFO L93 Difference]: Finished difference Result 2667 states and 4296 transitions. [2022-04-14 23:28:13,948 INFO L276 IsEmpty]: Start isEmpty. Operand 2667 states and 4296 transitions. [2022-04-14 23:28:13,950 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:13,950 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:13,950 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:13,951 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:13,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:14,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2665 states to 2665 states and 4295 transitions. [2022-04-14 23:28:14,248 INFO L78 Accepts]: Start accepts. Automaton has 2665 states and 4295 transitions. Word has length 30 [2022-04-14 23:28:14,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:14,249 INFO L478 AbstractCegarLoop]: Abstraction has 2665 states and 4295 transitions. [2022-04-14 23:28:14,249 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:14,249 INFO L276 IsEmpty]: Start isEmpty. Operand 2665 states and 4295 transitions. [2022-04-14 23:28:14,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-14 23:28:14,251 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:14,251 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:14,251 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2022-04-14 23:28:14,251 INFO L403 AbstractCegarLoop]: === Iteration 18 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:14,251 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:14,251 INFO L85 PathProgramCache]: Analyzing trace with hash 2115318588, now seen corresponding path program 1 times [2022-04-14 23:28:14,252 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:14,252 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1843818716] [2022-04-14 23:28:14,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:14,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:14,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:14,300 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:14,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:14,304 INFO L290 TraceCheckUtils]: 0: Hoare triple {51628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {51622#true} is VALID [2022-04-14 23:28:14,304 INFO L290 TraceCheckUtils]: 1: Hoare triple {51622#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-14 23:28:14,304 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {51622#true} {51622#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-14 23:28:14,304 INFO L272 TraceCheckUtils]: 0: Hoare triple {51622#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:14,305 INFO L290 TraceCheckUtils]: 1: Hoare triple {51628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {51622#true} is VALID [2022-04-14 23:28:14,305 INFO L290 TraceCheckUtils]: 2: Hoare triple {51622#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-14 23:28:14,305 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {51622#true} {51622#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-14 23:28:14,305 INFO L272 TraceCheckUtils]: 4: Hoare triple {51622#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-14 23:28:14,306 INFO L290 TraceCheckUtils]: 5: Hoare triple {51622#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {51622#true} is VALID [2022-04-14 23:28:14,306 INFO L290 TraceCheckUtils]: 6: Hoare triple {51622#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {51622#true} is VALID [2022-04-14 23:28:14,306 INFO L290 TraceCheckUtils]: 7: Hoare triple {51622#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {51622#true} is VALID [2022-04-14 23:28:14,306 INFO L290 TraceCheckUtils]: 8: Hoare triple {51622#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-14 23:28:14,306 INFO L290 TraceCheckUtils]: 9: Hoare triple {51622#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-14 23:28:14,306 INFO L290 TraceCheckUtils]: 10: Hoare triple {51622#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-14 23:28:14,307 INFO L290 TraceCheckUtils]: 11: Hoare triple {51622#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-14 23:28:14,307 INFO L290 TraceCheckUtils]: 12: Hoare triple {51622#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-14 23:28:14,307 INFO L290 TraceCheckUtils]: 13: Hoare triple {51622#true} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-14 23:28:14,307 INFO L290 TraceCheckUtils]: 14: Hoare triple {51627#(not (= main_~p6~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-14 23:28:14,308 INFO L290 TraceCheckUtils]: 15: Hoare triple {51627#(not (= main_~p6~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-14 23:28:14,308 INFO L290 TraceCheckUtils]: 16: Hoare triple {51627#(not (= main_~p6~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-14 23:28:14,308 INFO L290 TraceCheckUtils]: 17: Hoare triple {51627#(not (= main_~p6~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-14 23:28:14,309 INFO L290 TraceCheckUtils]: 18: Hoare triple {51627#(not (= main_~p6~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-14 23:28:14,309 INFO L290 TraceCheckUtils]: 19: Hoare triple {51627#(not (= main_~p6~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-14 23:28:14,309 INFO L290 TraceCheckUtils]: 20: Hoare triple {51627#(not (= main_~p6~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-14 23:28:14,309 INFO L290 TraceCheckUtils]: 21: Hoare triple {51627#(not (= main_~p6~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-14 23:28:14,310 INFO L290 TraceCheckUtils]: 22: Hoare triple {51627#(not (= main_~p6~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-14 23:28:14,310 INFO L290 TraceCheckUtils]: 23: Hoare triple {51627#(not (= main_~p6~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-14 23:28:14,310 INFO L290 TraceCheckUtils]: 24: Hoare triple {51627#(not (= main_~p6~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-14 23:28:14,311 INFO L290 TraceCheckUtils]: 25: Hoare triple {51627#(not (= main_~p6~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-14 23:28:14,311 INFO L290 TraceCheckUtils]: 26: Hoare triple {51627#(not (= main_~p6~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-14 23:28:14,311 INFO L290 TraceCheckUtils]: 27: Hoare triple {51627#(not (= main_~p6~0 0))} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {51623#false} is VALID [2022-04-14 23:28:14,311 INFO L290 TraceCheckUtils]: 28: Hoare triple {51623#false} [338] L171-1-->L177: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {51623#false} is VALID [2022-04-14 23:28:14,312 INFO L290 TraceCheckUtils]: 29: Hoare triple {51623#false} [340] L177-->L212-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {51623#false} is VALID [2022-04-14 23:28:14,312 INFO L290 TraceCheckUtils]: 30: Hoare triple {51623#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51623#false} is VALID [2022-04-14 23:28:14,312 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:14,312 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:14,312 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1843818716] [2022-04-14 23:28:14,312 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1843818716] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:14,312 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:14,312 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:14,313 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [619938849] [2022-04-14 23:28:14,313 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:14,313 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-14 23:28:14,313 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:14,314 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:14,333 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:14,333 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:14,333 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:14,334 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:14,334 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:14,334 INFO L87 Difference]: Start difference. First operand 2665 states and 4295 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:14,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:14,788 INFO L93 Difference]: Finished difference Result 2699 states and 4296 transitions. [2022-04-14 23:28:14,788 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:14,788 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-14 23:28:14,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:14,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:14,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 166 transitions. [2022-04-14 23:28:14,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:14,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 166 transitions. [2022-04-14 23:28:14,790 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 166 transitions. [2022-04-14 23:28:14,899 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 166 edges. 166 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:15,080 INFO L225 Difference]: With dead ends: 2699 [2022-04-14 23:28:15,080 INFO L226 Difference]: Without dead ends: 2699 [2022-04-14 23:28:15,080 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:15,081 INFO L913 BasicCegarLoop]: 131 mSDtfsCounter, 178 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 178 SdHoareTripleChecker+Valid, 138 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:15,081 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [178 Valid, 138 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:15,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2699 states. [2022-04-14 23:28:15,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2699 to 2697. [2022-04-14 23:28:15,116 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:15,119 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2699 states. Second operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:15,122 INFO L74 IsIncluded]: Start isIncluded. First operand 2699 states. Second operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:15,125 INFO L87 Difference]: Start difference. First operand 2699 states. Second operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:15,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:15,402 INFO L93 Difference]: Finished difference Result 2699 states and 4296 transitions. [2022-04-14 23:28:15,402 INFO L276 IsEmpty]: Start isEmpty. Operand 2699 states and 4296 transitions. [2022-04-14 23:28:15,426 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:15,426 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:15,429 INFO L74 IsIncluded]: Start isIncluded. First operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2699 states. [2022-04-14 23:28:15,432 INFO L87 Difference]: Start difference. First operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2699 states. [2022-04-14 23:28:15,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:15,632 INFO L93 Difference]: Finished difference Result 2699 states and 4296 transitions. [2022-04-14 23:28:15,632 INFO L276 IsEmpty]: Start isEmpty. Operand 2699 states and 4296 transitions. [2022-04-14 23:28:15,634 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:15,634 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:15,634 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:15,635 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:15,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:15,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2697 states to 2697 states and 4295 transitions. [2022-04-14 23:28:15,831 INFO L78 Accepts]: Start accepts. Automaton has 2697 states and 4295 transitions. Word has length 31 [2022-04-14 23:28:15,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:15,831 INFO L478 AbstractCegarLoop]: Abstraction has 2697 states and 4295 transitions. [2022-04-14 23:28:15,831 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:15,832 INFO L276 IsEmpty]: Start isEmpty. Operand 2697 states and 4295 transitions. [2022-04-14 23:28:15,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-14 23:28:15,834 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:15,834 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:15,834 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2022-04-14 23:28:15,834 INFO L403 AbstractCegarLoop]: === Iteration 19 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:15,835 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:15,835 INFO L85 PathProgramCache]: Analyzing trace with hash 1118246235, now seen corresponding path program 1 times [2022-04-14 23:28:15,835 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:15,835 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [247066362] [2022-04-14 23:28:15,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:15,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:15,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:15,866 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:15,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:15,875 INFO L290 TraceCheckUtils]: 0: Hoare triple {62434#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {62428#true} is VALID [2022-04-14 23:28:15,876 INFO L290 TraceCheckUtils]: 1: Hoare triple {62428#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-14 23:28:15,876 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {62428#true} {62428#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-14 23:28:15,877 INFO L272 TraceCheckUtils]: 0: Hoare triple {62428#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62434#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:15,877 INFO L290 TraceCheckUtils]: 1: Hoare triple {62434#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {62428#true} is VALID [2022-04-14 23:28:15,877 INFO L290 TraceCheckUtils]: 2: Hoare triple {62428#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-14 23:28:15,877 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {62428#true} {62428#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-14 23:28:15,877 INFO L272 TraceCheckUtils]: 4: Hoare triple {62428#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-14 23:28:15,877 INFO L290 TraceCheckUtils]: 5: Hoare triple {62428#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {62428#true} is VALID [2022-04-14 23:28:15,878 INFO L290 TraceCheckUtils]: 6: Hoare triple {62428#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {62428#true} is VALID [2022-04-14 23:28:15,878 INFO L290 TraceCheckUtils]: 7: Hoare triple {62428#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {62428#true} is VALID [2022-04-14 23:28:15,878 INFO L290 TraceCheckUtils]: 8: Hoare triple {62428#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-14 23:28:15,878 INFO L290 TraceCheckUtils]: 9: Hoare triple {62428#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-14 23:28:15,878 INFO L290 TraceCheckUtils]: 10: Hoare triple {62428#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-14 23:28:15,878 INFO L290 TraceCheckUtils]: 11: Hoare triple {62428#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-14 23:28:15,879 INFO L290 TraceCheckUtils]: 12: Hoare triple {62428#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-14 23:28:15,879 INFO L290 TraceCheckUtils]: 13: Hoare triple {62428#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-14 23:28:15,879 INFO L290 TraceCheckUtils]: 14: Hoare triple {62428#true} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-14 23:28:15,879 INFO L290 TraceCheckUtils]: 15: Hoare triple {62433#(= main_~lk7~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-14 23:28:15,880 INFO L290 TraceCheckUtils]: 16: Hoare triple {62433#(= main_~lk7~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-14 23:28:15,880 INFO L290 TraceCheckUtils]: 17: Hoare triple {62433#(= main_~lk7~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-14 23:28:15,881 INFO L290 TraceCheckUtils]: 18: Hoare triple {62433#(= main_~lk7~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-14 23:28:15,881 INFO L290 TraceCheckUtils]: 19: Hoare triple {62433#(= main_~lk7~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-14 23:28:15,881 INFO L290 TraceCheckUtils]: 20: Hoare triple {62433#(= main_~lk7~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-14 23:28:15,882 INFO L290 TraceCheckUtils]: 21: Hoare triple {62433#(= main_~lk7~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-14 23:28:15,882 INFO L290 TraceCheckUtils]: 22: Hoare triple {62433#(= main_~lk7~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-14 23:28:15,882 INFO L290 TraceCheckUtils]: 23: Hoare triple {62433#(= main_~lk7~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-14 23:28:15,883 INFO L290 TraceCheckUtils]: 24: Hoare triple {62433#(= main_~lk7~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-14 23:28:15,883 INFO L290 TraceCheckUtils]: 25: Hoare triple {62433#(= main_~lk7~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-14 23:28:15,883 INFO L290 TraceCheckUtils]: 26: Hoare triple {62433#(= main_~lk7~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-14 23:28:15,884 INFO L290 TraceCheckUtils]: 27: Hoare triple {62433#(= main_~lk7~0 1)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-14 23:28:15,884 INFO L290 TraceCheckUtils]: 28: Hoare triple {62433#(= main_~lk7~0 1)} [338] L171-1-->L177: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-14 23:28:15,884 INFO L290 TraceCheckUtils]: 29: Hoare triple {62433#(= main_~lk7~0 1)} [340] L177-->L212-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {62429#false} is VALID [2022-04-14 23:28:15,885 INFO L290 TraceCheckUtils]: 30: Hoare triple {62429#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62429#false} is VALID [2022-04-14 23:28:15,885 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:15,885 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:15,885 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [247066362] [2022-04-14 23:28:15,885 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [247066362] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:15,885 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:15,885 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:15,885 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [802734154] [2022-04-14 23:28:15,886 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:15,887 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-14 23:28:15,887 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:15,887 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:15,907 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:15,907 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:15,907 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:15,908 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:15,908 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:15,908 INFO L87 Difference]: Start difference. First operand 2697 states and 4295 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:16,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:16,785 INFO L93 Difference]: Finished difference Result 4875 states and 7880 transitions. [2022-04-14 23:28:16,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:16,785 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-14 23:28:16,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:16,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:16,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 154 transitions. [2022-04-14 23:28:16,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:16,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 154 transitions. [2022-04-14 23:28:16,787 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 154 transitions. [2022-04-14 23:28:16,899 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 154 edges. 154 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:17,565 INFO L225 Difference]: With dead ends: 4875 [2022-04-14 23:28:17,565 INFO L226 Difference]: Without dead ends: 4875 [2022-04-14 23:28:17,566 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:17,566 INFO L913 BasicCegarLoop]: 89 mSDtfsCounter, 194 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 194 SdHoareTripleChecker+Valid, 96 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:17,566 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [194 Valid, 96 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:17,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4875 states. [2022-04-14 23:28:17,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4875 to 3849. [2022-04-14 23:28:17,616 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:17,621 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4875 states. Second operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:17,624 INFO L74 IsIncluded]: Start isIncluded. First operand 4875 states. Second operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:17,628 INFO L87 Difference]: Start difference. First operand 4875 states. Second operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:18,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:18,240 INFO L93 Difference]: Finished difference Result 4875 states and 7880 transitions. [2022-04-14 23:28:18,240 INFO L276 IsEmpty]: Start isEmpty. Operand 4875 states and 7880 transitions. [2022-04-14 23:28:18,244 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:18,244 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:18,248 INFO L74 IsIncluded]: Start isIncluded. First operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4875 states. [2022-04-14 23:28:18,250 INFO L87 Difference]: Start difference. First operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4875 states. [2022-04-14 23:28:18,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:18,867 INFO L93 Difference]: Finished difference Result 4875 states and 7880 transitions. [2022-04-14 23:28:18,867 INFO L276 IsEmpty]: Start isEmpty. Operand 4875 states and 7880 transitions. [2022-04-14 23:28:18,871 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:18,871 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:18,872 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:18,872 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:18,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:19,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3849 states to 3849 states and 5959 transitions. [2022-04-14 23:28:19,311 INFO L78 Accepts]: Start accepts. Automaton has 3849 states and 5959 transitions. Word has length 31 [2022-04-14 23:28:19,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:19,311 INFO L478 AbstractCegarLoop]: Abstraction has 3849 states and 5959 transitions. [2022-04-14 23:28:19,311 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:19,312 INFO L276 IsEmpty]: Start isEmpty. Operand 3849 states and 5959 transitions. [2022-04-14 23:28:19,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-14 23:28:19,314 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:19,314 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:19,314 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2022-04-14 23:28:19,314 INFO L403 AbstractCegarLoop]: === Iteration 20 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:19,315 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:19,315 INFO L85 PathProgramCache]: Analyzing trace with hash -1823411364, now seen corresponding path program 1 times [2022-04-14 23:28:19,315 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:19,315 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1309373794] [2022-04-14 23:28:19,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:19,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:19,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:19,343 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:19,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:19,346 INFO L290 TraceCheckUtils]: 0: Hoare triple {80920#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {80914#true} is VALID [2022-04-14 23:28:19,347 INFO L290 TraceCheckUtils]: 1: Hoare triple {80914#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-14 23:28:19,347 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {80914#true} {80914#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-14 23:28:19,347 INFO L272 TraceCheckUtils]: 0: Hoare triple {80914#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80920#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:19,347 INFO L290 TraceCheckUtils]: 1: Hoare triple {80920#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {80914#true} is VALID [2022-04-14 23:28:19,347 INFO L290 TraceCheckUtils]: 2: Hoare triple {80914#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-14 23:28:19,348 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {80914#true} {80914#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-14 23:28:19,348 INFO L272 TraceCheckUtils]: 4: Hoare triple {80914#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-14 23:28:19,348 INFO L290 TraceCheckUtils]: 5: Hoare triple {80914#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {80914#true} is VALID [2022-04-14 23:28:19,348 INFO L290 TraceCheckUtils]: 6: Hoare triple {80914#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {80914#true} is VALID [2022-04-14 23:28:19,348 INFO L290 TraceCheckUtils]: 7: Hoare triple {80914#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {80914#true} is VALID [2022-04-14 23:28:19,348 INFO L290 TraceCheckUtils]: 8: Hoare triple {80914#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-14 23:28:19,348 INFO L290 TraceCheckUtils]: 9: Hoare triple {80914#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-14 23:28:19,348 INFO L290 TraceCheckUtils]: 10: Hoare triple {80914#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-14 23:28:19,349 INFO L290 TraceCheckUtils]: 11: Hoare triple {80914#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-14 23:28:19,349 INFO L290 TraceCheckUtils]: 12: Hoare triple {80914#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-14 23:28:19,349 INFO L290 TraceCheckUtils]: 13: Hoare triple {80914#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-14 23:28:19,349 INFO L290 TraceCheckUtils]: 14: Hoare triple {80914#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-14 23:28:19,349 INFO L290 TraceCheckUtils]: 15: Hoare triple {80919#(= main_~p7~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-14 23:28:19,350 INFO L290 TraceCheckUtils]: 16: Hoare triple {80919#(= main_~p7~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-14 23:28:19,350 INFO L290 TraceCheckUtils]: 17: Hoare triple {80919#(= main_~p7~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-14 23:28:19,350 INFO L290 TraceCheckUtils]: 18: Hoare triple {80919#(= main_~p7~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-14 23:28:19,351 INFO L290 TraceCheckUtils]: 19: Hoare triple {80919#(= main_~p7~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-14 23:28:19,351 INFO L290 TraceCheckUtils]: 20: Hoare triple {80919#(= main_~p7~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-14 23:28:19,351 INFO L290 TraceCheckUtils]: 21: Hoare triple {80919#(= main_~p7~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-14 23:28:19,352 INFO L290 TraceCheckUtils]: 22: Hoare triple {80919#(= main_~p7~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-14 23:28:19,352 INFO L290 TraceCheckUtils]: 23: Hoare triple {80919#(= main_~p7~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-14 23:28:19,352 INFO L290 TraceCheckUtils]: 24: Hoare triple {80919#(= main_~p7~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-14 23:28:19,352 INFO L290 TraceCheckUtils]: 25: Hoare triple {80919#(= main_~p7~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-14 23:28:19,353 INFO L290 TraceCheckUtils]: 26: Hoare triple {80919#(= main_~p7~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-14 23:28:19,353 INFO L290 TraceCheckUtils]: 27: Hoare triple {80919#(= main_~p7~0 0)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-14 23:28:19,353 INFO L290 TraceCheckUtils]: 28: Hoare triple {80919#(= main_~p7~0 0)} [338] L171-1-->L177: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {80915#false} is VALID [2022-04-14 23:28:19,353 INFO L290 TraceCheckUtils]: 29: Hoare triple {80915#false} [340] L177-->L212-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {80915#false} is VALID [2022-04-14 23:28:19,354 INFO L290 TraceCheckUtils]: 30: Hoare triple {80915#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80915#false} is VALID [2022-04-14 23:28:19,354 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:19,354 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:19,354 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1309373794] [2022-04-14 23:28:19,354 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1309373794] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:19,354 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:19,354 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:19,354 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1626981056] [2022-04-14 23:28:19,354 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:19,355 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-14 23:28:19,355 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:19,355 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:19,374 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:19,374 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:19,374 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:19,374 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:19,374 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:19,375 INFO L87 Difference]: Start difference. First operand 3849 states and 5959 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:20,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:20,346 INFO L93 Difference]: Finished difference Result 5259 states and 8136 transitions. [2022-04-14 23:28:20,346 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:20,346 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-14 23:28:20,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:20,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:20,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 165 transitions. [2022-04-14 23:28:20,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:20,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 165 transitions. [2022-04-14 23:28:20,348 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 165 transitions. [2022-04-14 23:28:20,456 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 165 edges. 165 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:21,219 INFO L225 Difference]: With dead ends: 5259 [2022-04-14 23:28:21,219 INFO L226 Difference]: Without dead ends: 5259 [2022-04-14 23:28:21,219 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:21,220 INFO L913 BasicCegarLoop]: 132 mSDtfsCounter, 172 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 172 SdHoareTripleChecker+Valid, 139 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:21,220 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [172 Valid, 139 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:21,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5259 states. [2022-04-14 23:28:21,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5259 to 5257. [2022-04-14 23:28:21,289 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:21,298 INFO L82 GeneralOperation]: Start isEquivalent. First operand 5259 states. Second operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:21,306 INFO L74 IsIncluded]: Start isIncluded. First operand 5259 states. Second operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:21,313 INFO L87 Difference]: Start difference. First operand 5259 states. Second operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:22,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:22,001 INFO L93 Difference]: Finished difference Result 5259 states and 8136 transitions. [2022-04-14 23:28:22,001 INFO L276 IsEmpty]: Start isEmpty. Operand 5259 states and 8136 transitions. [2022-04-14 23:28:22,005 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:22,006 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:22,010 INFO L74 IsIncluded]: Start isIncluded. First operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5259 states. [2022-04-14 23:28:22,014 INFO L87 Difference]: Start difference. First operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5259 states. [2022-04-14 23:28:22,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:22,695 INFO L93 Difference]: Finished difference Result 5259 states and 8136 transitions. [2022-04-14 23:28:22,695 INFO L276 IsEmpty]: Start isEmpty. Operand 5259 states and 8136 transitions. [2022-04-14 23:28:22,700 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:22,701 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:22,701 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:22,701 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:22,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:23,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5257 states to 5257 states and 8135 transitions. [2022-04-14 23:28:23,440 INFO L78 Accepts]: Start accepts. Automaton has 5257 states and 8135 transitions. Word has length 31 [2022-04-14 23:28:23,440 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:23,440 INFO L478 AbstractCegarLoop]: Abstraction has 5257 states and 8135 transitions. [2022-04-14 23:28:23,441 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:23,441 INFO L276 IsEmpty]: Start isEmpty. Operand 5257 states and 8135 transitions. [2022-04-14 23:28:23,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-14 23:28:23,443 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:23,444 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:23,444 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2022-04-14 23:28:23,444 INFO L403 AbstractCegarLoop]: === Iteration 21 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:23,444 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:23,444 INFO L85 PathProgramCache]: Analyzing trace with hash 305927754, now seen corresponding path program 1 times [2022-04-14 23:28:23,444 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:23,444 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1019601167] [2022-04-14 23:28:23,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:23,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:23,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:23,502 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:23,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:23,506 INFO L290 TraceCheckUtils]: 0: Hoare triple {101966#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {101960#true} is VALID [2022-04-14 23:28:23,506 INFO L290 TraceCheckUtils]: 1: Hoare triple {101960#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-14 23:28:23,506 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {101960#true} {101960#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-14 23:28:23,506 INFO L272 TraceCheckUtils]: 0: Hoare triple {101960#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101966#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:23,507 INFO L290 TraceCheckUtils]: 1: Hoare triple {101966#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {101960#true} is VALID [2022-04-14 23:28:23,507 INFO L290 TraceCheckUtils]: 2: Hoare triple {101960#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-14 23:28:23,507 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {101960#true} {101960#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-14 23:28:23,507 INFO L272 TraceCheckUtils]: 4: Hoare triple {101960#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-14 23:28:23,507 INFO L290 TraceCheckUtils]: 5: Hoare triple {101960#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {101960#true} is VALID [2022-04-14 23:28:23,507 INFO L290 TraceCheckUtils]: 6: Hoare triple {101960#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {101960#true} is VALID [2022-04-14 23:28:23,507 INFO L290 TraceCheckUtils]: 7: Hoare triple {101960#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {101960#true} is VALID [2022-04-14 23:28:23,508 INFO L290 TraceCheckUtils]: 8: Hoare triple {101960#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-14 23:28:23,508 INFO L290 TraceCheckUtils]: 9: Hoare triple {101960#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-14 23:28:23,508 INFO L290 TraceCheckUtils]: 10: Hoare triple {101960#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-14 23:28:23,508 INFO L290 TraceCheckUtils]: 11: Hoare triple {101960#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-14 23:28:23,508 INFO L290 TraceCheckUtils]: 12: Hoare triple {101960#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-14 23:28:23,508 INFO L290 TraceCheckUtils]: 13: Hoare triple {101960#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-14 23:28:23,508 INFO L290 TraceCheckUtils]: 14: Hoare triple {101960#true} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-14 23:28:23,509 INFO L290 TraceCheckUtils]: 15: Hoare triple {101965#(not (= main_~p7~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-14 23:28:23,509 INFO L290 TraceCheckUtils]: 16: Hoare triple {101965#(not (= main_~p7~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-14 23:28:23,509 INFO L290 TraceCheckUtils]: 17: Hoare triple {101965#(not (= main_~p7~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-14 23:28:23,510 INFO L290 TraceCheckUtils]: 18: Hoare triple {101965#(not (= main_~p7~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-14 23:28:23,510 INFO L290 TraceCheckUtils]: 19: Hoare triple {101965#(not (= main_~p7~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-14 23:28:23,510 INFO L290 TraceCheckUtils]: 20: Hoare triple {101965#(not (= main_~p7~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-14 23:28:23,511 INFO L290 TraceCheckUtils]: 21: Hoare triple {101965#(not (= main_~p7~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-14 23:28:23,511 INFO L290 TraceCheckUtils]: 22: Hoare triple {101965#(not (= main_~p7~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-14 23:28:23,511 INFO L290 TraceCheckUtils]: 23: Hoare triple {101965#(not (= main_~p7~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-14 23:28:23,512 INFO L290 TraceCheckUtils]: 24: Hoare triple {101965#(not (= main_~p7~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-14 23:28:23,512 INFO L290 TraceCheckUtils]: 25: Hoare triple {101965#(not (= main_~p7~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-14 23:28:23,512 INFO L290 TraceCheckUtils]: 26: Hoare triple {101965#(not (= main_~p7~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-14 23:28:23,513 INFO L290 TraceCheckUtils]: 27: Hoare triple {101965#(not (= main_~p7~0 0))} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-14 23:28:23,513 INFO L290 TraceCheckUtils]: 28: Hoare triple {101965#(not (= main_~p7~0 0))} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {101961#false} is VALID [2022-04-14 23:28:23,513 INFO L290 TraceCheckUtils]: 29: Hoare triple {101961#false} [342] L176-1-->L182: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {101961#false} is VALID [2022-04-14 23:28:23,513 INFO L290 TraceCheckUtils]: 30: Hoare triple {101961#false} [344] L182-->L212-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {101961#false} is VALID [2022-04-14 23:28:23,513 INFO L290 TraceCheckUtils]: 31: Hoare triple {101961#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101961#false} is VALID [2022-04-14 23:28:23,513 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:23,514 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:23,514 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1019601167] [2022-04-14 23:28:23,514 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1019601167] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:23,514 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:23,514 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:23,514 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2146760603] [2022-04-14 23:28:23,514 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:23,515 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-14 23:28:23,515 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:23,515 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:23,535 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:23,535 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:23,535 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:23,536 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:23,536 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:23,536 INFO L87 Difference]: Start difference. First operand 5257 states and 8135 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:24,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:24,537 INFO L93 Difference]: Finished difference Result 5323 states and 8136 transitions. [2022-04-14 23:28:24,537 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:24,537 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-14 23:28:24,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:24,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:24,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 164 transitions. [2022-04-14 23:28:24,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:24,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 164 transitions. [2022-04-14 23:28:24,539 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 164 transitions. [2022-04-14 23:28:24,667 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 164 edges. 164 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:25,441 INFO L225 Difference]: With dead ends: 5323 [2022-04-14 23:28:25,441 INFO L226 Difference]: Without dead ends: 5323 [2022-04-14 23:28:25,441 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:25,442 INFO L913 BasicCegarLoop]: 128 mSDtfsCounter, 177 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 177 SdHoareTripleChecker+Valid, 135 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:25,442 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [177 Valid, 135 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:25,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5323 states. [2022-04-14 23:28:25,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5323 to 5321. [2022-04-14 23:28:25,496 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:25,503 INFO L82 GeneralOperation]: Start isEquivalent. First operand 5323 states. Second operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:25,508 INFO L74 IsIncluded]: Start isIncluded. First operand 5323 states. Second operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:25,514 INFO L87 Difference]: Start difference. First operand 5323 states. Second operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:26,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:26,226 INFO L93 Difference]: Finished difference Result 5323 states and 8136 transitions. [2022-04-14 23:28:26,226 INFO L276 IsEmpty]: Start isEmpty. Operand 5323 states and 8136 transitions. [2022-04-14 23:28:26,229 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:26,229 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:26,235 INFO L74 IsIncluded]: Start isIncluded. First operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5323 states. [2022-04-14 23:28:26,238 INFO L87 Difference]: Start difference. First operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5323 states. [2022-04-14 23:28:26,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:26,931 INFO L93 Difference]: Finished difference Result 5323 states and 8136 transitions. [2022-04-14 23:28:26,931 INFO L276 IsEmpty]: Start isEmpty. Operand 5323 states and 8136 transitions. [2022-04-14 23:28:26,934 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:26,934 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:26,934 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:26,934 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:26,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:27,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5321 states to 5321 states and 8135 transitions. [2022-04-14 23:28:27,708 INFO L78 Accepts]: Start accepts. Automaton has 5321 states and 8135 transitions. Word has length 32 [2022-04-14 23:28:27,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:27,708 INFO L478 AbstractCegarLoop]: Abstraction has 5321 states and 8135 transitions. [2022-04-14 23:28:27,708 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:27,708 INFO L276 IsEmpty]: Start isEmpty. Operand 5321 states and 8135 transitions. [2022-04-14 23:28:27,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-14 23:28:27,711 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:27,711 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:27,712 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2022-04-14 23:28:27,712 INFO L403 AbstractCegarLoop]: === Iteration 22 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:27,712 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:27,712 INFO L85 PathProgramCache]: Analyzing trace with hash -691144599, now seen corresponding path program 1 times [2022-04-14 23:28:27,712 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:27,712 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1096913663] [2022-04-14 23:28:27,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:27,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:27,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:27,771 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:27,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:27,775 INFO L290 TraceCheckUtils]: 0: Hoare triple {123268#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {123262#true} is VALID [2022-04-14 23:28:27,775 INFO L290 TraceCheckUtils]: 1: Hoare triple {123262#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-14 23:28:27,775 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {123262#true} {123262#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-14 23:28:27,776 INFO L272 TraceCheckUtils]: 0: Hoare triple {123262#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123268#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:27,776 INFO L290 TraceCheckUtils]: 1: Hoare triple {123268#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {123262#true} is VALID [2022-04-14 23:28:27,776 INFO L290 TraceCheckUtils]: 2: Hoare triple {123262#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-14 23:28:27,776 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {123262#true} {123262#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-14 23:28:27,777 INFO L272 TraceCheckUtils]: 4: Hoare triple {123262#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-14 23:28:27,777 INFO L290 TraceCheckUtils]: 5: Hoare triple {123262#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {123262#true} is VALID [2022-04-14 23:28:27,777 INFO L290 TraceCheckUtils]: 6: Hoare triple {123262#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {123262#true} is VALID [2022-04-14 23:28:27,777 INFO L290 TraceCheckUtils]: 7: Hoare triple {123262#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {123262#true} is VALID [2022-04-14 23:28:27,777 INFO L290 TraceCheckUtils]: 8: Hoare triple {123262#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-14 23:28:27,777 INFO L290 TraceCheckUtils]: 9: Hoare triple {123262#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-14 23:28:27,777 INFO L290 TraceCheckUtils]: 10: Hoare triple {123262#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-14 23:28:27,778 INFO L290 TraceCheckUtils]: 11: Hoare triple {123262#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-14 23:28:27,778 INFO L290 TraceCheckUtils]: 12: Hoare triple {123262#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-14 23:28:27,778 INFO L290 TraceCheckUtils]: 13: Hoare triple {123262#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-14 23:28:27,778 INFO L290 TraceCheckUtils]: 14: Hoare triple {123262#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-14 23:28:27,778 INFO L290 TraceCheckUtils]: 15: Hoare triple {123262#true} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-14 23:28:27,779 INFO L290 TraceCheckUtils]: 16: Hoare triple {123267#(= main_~lk8~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-14 23:28:27,779 INFO L290 TraceCheckUtils]: 17: Hoare triple {123267#(= main_~lk8~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-14 23:28:27,779 INFO L290 TraceCheckUtils]: 18: Hoare triple {123267#(= main_~lk8~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-14 23:28:27,780 INFO L290 TraceCheckUtils]: 19: Hoare triple {123267#(= main_~lk8~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-14 23:28:27,780 INFO L290 TraceCheckUtils]: 20: Hoare triple {123267#(= main_~lk8~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-14 23:28:27,780 INFO L290 TraceCheckUtils]: 21: Hoare triple {123267#(= main_~lk8~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-14 23:28:27,780 INFO L290 TraceCheckUtils]: 22: Hoare triple {123267#(= main_~lk8~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-14 23:28:27,781 INFO L290 TraceCheckUtils]: 23: Hoare triple {123267#(= main_~lk8~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-14 23:28:27,781 INFO L290 TraceCheckUtils]: 24: Hoare triple {123267#(= main_~lk8~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-14 23:28:27,781 INFO L290 TraceCheckUtils]: 25: Hoare triple {123267#(= main_~lk8~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-14 23:28:27,782 INFO L290 TraceCheckUtils]: 26: Hoare triple {123267#(= main_~lk8~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-14 23:28:27,782 INFO L290 TraceCheckUtils]: 27: Hoare triple {123267#(= main_~lk8~0 1)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-14 23:28:27,782 INFO L290 TraceCheckUtils]: 28: Hoare triple {123267#(= main_~lk8~0 1)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-14 23:28:27,783 INFO L290 TraceCheckUtils]: 29: Hoare triple {123267#(= main_~lk8~0 1)} [342] L176-1-->L182: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-14 23:28:27,783 INFO L290 TraceCheckUtils]: 30: Hoare triple {123267#(= main_~lk8~0 1)} [344] L182-->L212-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {123263#false} is VALID [2022-04-14 23:28:27,783 INFO L290 TraceCheckUtils]: 31: Hoare triple {123263#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123263#false} is VALID [2022-04-14 23:28:27,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:27,783 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:27,784 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1096913663] [2022-04-14 23:28:27,784 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1096913663] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:27,784 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:27,784 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:27,784 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [778030451] [2022-04-14 23:28:27,784 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:27,784 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-14 23:28:27,785 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:27,785 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:27,807 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:27,808 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:27,808 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:27,808 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:27,808 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:27,808 INFO L87 Difference]: Start difference. First operand 5321 states and 8135 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:30,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:30,334 INFO L93 Difference]: Finished difference Result 9483 states and 14728 transitions. [2022-04-14 23:28:30,334 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:30,335 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-14 23:28:30,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:30,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:30,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 150 transitions. [2022-04-14 23:28:30,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:30,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 150 transitions. [2022-04-14 23:28:30,337 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 150 transitions. [2022-04-14 23:28:30,437 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 150 edges. 150 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:33,017 INFO L225 Difference]: With dead ends: 9483 [2022-04-14 23:28:33,017 INFO L226 Difference]: Without dead ends: 9483 [2022-04-14 23:28:33,018 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:33,018 INFO L913 BasicCegarLoop]: 88 mSDtfsCounter, 187 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 83 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 187 SdHoareTripleChecker+Valid, 95 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 83 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:33,019 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [187 Valid, 95 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 83 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:33,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9483 states. [2022-04-14 23:28:33,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9483 to 7689. [2022-04-14 23:28:33,103 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:33,113 INFO L82 GeneralOperation]: Start isEquivalent. First operand 9483 states. Second operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:33,124 INFO L74 IsIncluded]: Start isIncluded. First operand 9483 states. Second operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:33,133 INFO L87 Difference]: Start difference. First operand 9483 states. Second operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:35,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:35,467 INFO L93 Difference]: Finished difference Result 9483 states and 14728 transitions. [2022-04-14 23:28:35,467 INFO L276 IsEmpty]: Start isEmpty. Operand 9483 states and 14728 transitions. [2022-04-14 23:28:35,473 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:35,473 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:35,481 INFO L74 IsIncluded]: Start isIncluded. First operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 9483 states. [2022-04-14 23:28:35,488 INFO L87 Difference]: Start difference. First operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 9483 states. [2022-04-14 23:28:37,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:37,659 INFO L93 Difference]: Finished difference Result 9483 states and 14728 transitions. [2022-04-14 23:28:37,659 INFO L276 IsEmpty]: Start isEmpty. Operand 9483 states and 14728 transitions. [2022-04-14 23:28:37,665 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:37,665 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:37,665 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:37,666 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:37,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:39,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7689 states to 7689 states and 11399 transitions. [2022-04-14 23:28:39,265 INFO L78 Accepts]: Start accepts. Automaton has 7689 states and 11399 transitions. Word has length 32 [2022-04-14 23:28:39,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:39,265 INFO L478 AbstractCegarLoop]: Abstraction has 7689 states and 11399 transitions. [2022-04-14 23:28:39,265 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:39,265 INFO L276 IsEmpty]: Start isEmpty. Operand 7689 states and 11399 transitions. [2022-04-14 23:28:39,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-14 23:28:39,268 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:39,268 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:39,268 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2022-04-14 23:28:39,268 INFO L403 AbstractCegarLoop]: === Iteration 23 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:39,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:39,269 INFO L85 PathProgramCache]: Analyzing trace with hash 662165098, now seen corresponding path program 1 times [2022-04-14 23:28:39,269 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:39,269 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [471372514] [2022-04-14 23:28:39,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:39,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:39,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:39,297 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:39,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:39,301 INFO L290 TraceCheckUtils]: 0: Hoare triple {159418#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {159412#true} is VALID [2022-04-14 23:28:39,302 INFO L290 TraceCheckUtils]: 1: Hoare triple {159412#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-14 23:28:39,302 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {159412#true} {159412#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-14 23:28:39,302 INFO L272 TraceCheckUtils]: 0: Hoare triple {159412#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159418#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:39,302 INFO L290 TraceCheckUtils]: 1: Hoare triple {159418#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {159412#true} is VALID [2022-04-14 23:28:39,302 INFO L290 TraceCheckUtils]: 2: Hoare triple {159412#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-14 23:28:39,303 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {159412#true} {159412#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-14 23:28:39,303 INFO L272 TraceCheckUtils]: 4: Hoare triple {159412#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-14 23:28:39,303 INFO L290 TraceCheckUtils]: 5: Hoare triple {159412#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {159412#true} is VALID [2022-04-14 23:28:39,303 INFO L290 TraceCheckUtils]: 6: Hoare triple {159412#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {159412#true} is VALID [2022-04-14 23:28:39,303 INFO L290 TraceCheckUtils]: 7: Hoare triple {159412#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {159412#true} is VALID [2022-04-14 23:28:39,303 INFO L290 TraceCheckUtils]: 8: Hoare triple {159412#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-14 23:28:39,303 INFO L290 TraceCheckUtils]: 9: Hoare triple {159412#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-14 23:28:39,303 INFO L290 TraceCheckUtils]: 10: Hoare triple {159412#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-14 23:28:39,304 INFO L290 TraceCheckUtils]: 11: Hoare triple {159412#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-14 23:28:39,304 INFO L290 TraceCheckUtils]: 12: Hoare triple {159412#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-14 23:28:39,304 INFO L290 TraceCheckUtils]: 13: Hoare triple {159412#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-14 23:28:39,304 INFO L290 TraceCheckUtils]: 14: Hoare triple {159412#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-14 23:28:39,304 INFO L290 TraceCheckUtils]: 15: Hoare triple {159412#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-14 23:28:39,304 INFO L290 TraceCheckUtils]: 16: Hoare triple {159417#(= main_~p8~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {159417#(= main_~p8~0 0)} is VALID [2022-04-14 23:28:39,305 INFO L290 TraceCheckUtils]: 17: Hoare triple {159417#(= main_~p8~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {159417#(= main_~p8~0 0)} is VALID [2022-04-14 23:28:39,305 INFO L290 TraceCheckUtils]: 18: Hoare triple {159417#(= main_~p8~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {159417#(= main_~p8~0 0)} is VALID [2022-04-14 23:28:39,305 INFO L290 TraceCheckUtils]: 19: Hoare triple {159417#(= main_~p8~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {159417#(= main_~p8~0 0)} is VALID [2022-04-14 23:28:39,306 INFO L290 TraceCheckUtils]: 20: Hoare triple {159417#(= main_~p8~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {159417#(= main_~p8~0 0)} is VALID [2022-04-14 23:28:39,306 INFO L290 TraceCheckUtils]: 21: Hoare triple {159417#(= main_~p8~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {159417#(= main_~p8~0 0)} is VALID [2022-04-14 23:28:39,306 INFO L290 TraceCheckUtils]: 22: Hoare triple {159417#(= main_~p8~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-14 23:28:39,307 INFO L290 TraceCheckUtils]: 23: Hoare triple {159417#(= main_~p8~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-14 23:28:39,307 INFO L290 TraceCheckUtils]: 24: Hoare triple {159417#(= main_~p8~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-14 23:28:39,307 INFO L290 TraceCheckUtils]: 25: Hoare triple {159417#(= main_~p8~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-14 23:28:39,307 INFO L290 TraceCheckUtils]: 26: Hoare triple {159417#(= main_~p8~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-14 23:28:39,308 INFO L290 TraceCheckUtils]: 27: Hoare triple {159417#(= main_~p8~0 0)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-14 23:28:39,308 INFO L290 TraceCheckUtils]: 28: Hoare triple {159417#(= main_~p8~0 0)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-14 23:28:39,308 INFO L290 TraceCheckUtils]: 29: Hoare triple {159417#(= main_~p8~0 0)} [342] L176-1-->L182: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {159413#false} is VALID [2022-04-14 23:28:39,308 INFO L290 TraceCheckUtils]: 30: Hoare triple {159413#false} [344] L182-->L212-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {159413#false} is VALID [2022-04-14 23:28:39,309 INFO L290 TraceCheckUtils]: 31: Hoare triple {159413#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159413#false} is VALID [2022-04-14 23:28:39,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:39,309 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:39,309 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [471372514] [2022-04-14 23:28:39,309 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [471372514] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:39,309 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:39,309 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:39,309 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1123148552] [2022-04-14 23:28:39,309 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:39,310 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-14 23:28:39,310 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:39,310 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:39,334 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:39,335 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:39,335 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:39,335 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:39,335 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:39,335 INFO L87 Difference]: Start difference. First operand 7689 states and 11399 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:42,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:42,304 INFO L93 Difference]: Finished difference Result 10379 states and 15368 transitions. [2022-04-14 23:28:42,304 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:42,304 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-14 23:28:42,305 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:42,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:42,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 163 transitions. [2022-04-14 23:28:42,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:42,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 163 transitions. [2022-04-14 23:28:42,306 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 163 transitions. [2022-04-14 23:28:42,442 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 163 edges. 163 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:45,517 INFO L225 Difference]: With dead ends: 10379 [2022-04-14 23:28:45,517 INFO L226 Difference]: Without dead ends: 10379 [2022-04-14 23:28:45,517 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:28:45,517 INFO L913 BasicCegarLoop]: 134 mSDtfsCounter, 166 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 166 SdHoareTripleChecker+Valid, 141 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:28:45,518 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [166 Valid, 141 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:28:45,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10379 states. [2022-04-14 23:28:45,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10379 to 10377. [2022-04-14 23:28:45,632 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:28:45,646 INFO L82 GeneralOperation]: Start isEquivalent. First operand 10379 states. Second operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:45,661 INFO L74 IsIncluded]: Start isIncluded. First operand 10379 states. Second operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:45,675 INFO L87 Difference]: Start difference. First operand 10379 states. Second operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:48,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:48,433 INFO L93 Difference]: Finished difference Result 10379 states and 15368 transitions. [2022-04-14 23:28:48,433 INFO L276 IsEmpty]: Start isEmpty. Operand 10379 states and 15368 transitions. [2022-04-14 23:28:48,443 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:48,443 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:48,456 INFO L74 IsIncluded]: Start isIncluded. First operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 10379 states. [2022-04-14 23:28:48,466 INFO L87 Difference]: Start difference. First operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 10379 states. [2022-04-14 23:28:51,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:51,274 INFO L93 Difference]: Finished difference Result 10379 states and 15368 transitions. [2022-04-14 23:28:51,274 INFO L276 IsEmpty]: Start isEmpty. Operand 10379 states and 15368 transitions. [2022-04-14 23:28:51,282 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:28:51,283 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:28:51,283 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:28:51,283 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:28:51,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:53,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10377 states to 10377 states and 15367 transitions. [2022-04-14 23:28:53,749 INFO L78 Accepts]: Start accepts. Automaton has 10377 states and 15367 transitions. Word has length 32 [2022-04-14 23:28:53,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:28:53,749 INFO L478 AbstractCegarLoop]: Abstraction has 10377 states and 15367 transitions. [2022-04-14 23:28:53,749 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:53,749 INFO L276 IsEmpty]: Start isEmpty. Operand 10377 states and 15367 transitions. [2022-04-14 23:28:53,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-14 23:28:53,754 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:28:53,754 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:28:53,754 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2022-04-14 23:28:53,755 INFO L403 AbstractCegarLoop]: === Iteration 24 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:28:53,755 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:28:53,755 INFO L85 PathProgramCache]: Analyzing trace with hash 49386872, now seen corresponding path program 1 times [2022-04-14 23:28:53,755 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:28:53,755 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1242275539] [2022-04-14 23:28:53,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:28:53,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:28:53,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:53,805 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:28:53,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:28:53,810 INFO L290 TraceCheckUtils]: 0: Hoare triple {200944#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {200938#true} is VALID [2022-04-14 23:28:53,810 INFO L290 TraceCheckUtils]: 1: Hoare triple {200938#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-14 23:28:53,810 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {200938#true} {200938#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-14 23:28:53,815 INFO L272 TraceCheckUtils]: 0: Hoare triple {200938#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200944#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:28:53,815 INFO L290 TraceCheckUtils]: 1: Hoare triple {200944#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {200938#true} is VALID [2022-04-14 23:28:53,815 INFO L290 TraceCheckUtils]: 2: Hoare triple {200938#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-14 23:28:53,815 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {200938#true} {200938#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-14 23:28:53,815 INFO L272 TraceCheckUtils]: 4: Hoare triple {200938#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-14 23:28:53,816 INFO L290 TraceCheckUtils]: 5: Hoare triple {200938#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {200938#true} is VALID [2022-04-14 23:28:53,816 INFO L290 TraceCheckUtils]: 6: Hoare triple {200938#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {200938#true} is VALID [2022-04-14 23:28:53,816 INFO L290 TraceCheckUtils]: 7: Hoare triple {200938#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {200938#true} is VALID [2022-04-14 23:28:53,816 INFO L290 TraceCheckUtils]: 8: Hoare triple {200938#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-14 23:28:53,816 INFO L290 TraceCheckUtils]: 9: Hoare triple {200938#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-14 23:28:53,816 INFO L290 TraceCheckUtils]: 10: Hoare triple {200938#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-14 23:28:53,816 INFO L290 TraceCheckUtils]: 11: Hoare triple {200938#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-14 23:28:53,816 INFO L290 TraceCheckUtils]: 12: Hoare triple {200938#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-14 23:28:53,817 INFO L290 TraceCheckUtils]: 13: Hoare triple {200938#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-14 23:28:53,817 INFO L290 TraceCheckUtils]: 14: Hoare triple {200938#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-14 23:28:53,817 INFO L290 TraceCheckUtils]: 15: Hoare triple {200938#true} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-14 23:28:53,817 INFO L290 TraceCheckUtils]: 16: Hoare triple {200943#(not (= main_~p8~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-14 23:28:53,818 INFO L290 TraceCheckUtils]: 17: Hoare triple {200943#(not (= main_~p8~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-14 23:28:53,818 INFO L290 TraceCheckUtils]: 18: Hoare triple {200943#(not (= main_~p8~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-14 23:28:53,819 INFO L290 TraceCheckUtils]: 19: Hoare triple {200943#(not (= main_~p8~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-14 23:28:53,819 INFO L290 TraceCheckUtils]: 20: Hoare triple {200943#(not (= main_~p8~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-14 23:28:53,819 INFO L290 TraceCheckUtils]: 21: Hoare triple {200943#(not (= main_~p8~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-14 23:28:53,820 INFO L290 TraceCheckUtils]: 22: Hoare triple {200943#(not (= main_~p8~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-14 23:28:53,820 INFO L290 TraceCheckUtils]: 23: Hoare triple {200943#(not (= main_~p8~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-14 23:28:53,820 INFO L290 TraceCheckUtils]: 24: Hoare triple {200943#(not (= main_~p8~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-14 23:28:53,821 INFO L290 TraceCheckUtils]: 25: Hoare triple {200943#(not (= main_~p8~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-14 23:28:53,821 INFO L290 TraceCheckUtils]: 26: Hoare triple {200943#(not (= main_~p8~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-14 23:28:53,821 INFO L290 TraceCheckUtils]: 27: Hoare triple {200943#(not (= main_~p8~0 0))} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-14 23:28:53,822 INFO L290 TraceCheckUtils]: 28: Hoare triple {200943#(not (= main_~p8~0 0))} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-14 23:28:53,822 INFO L290 TraceCheckUtils]: 29: Hoare triple {200943#(not (= main_~p8~0 0))} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {200939#false} is VALID [2022-04-14 23:28:53,822 INFO L290 TraceCheckUtils]: 30: Hoare triple {200939#false} [346] L181-1-->L187: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {200939#false} is VALID [2022-04-14 23:28:53,822 INFO L290 TraceCheckUtils]: 31: Hoare triple {200939#false} [348] L187-->L212-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {200939#false} is VALID [2022-04-14 23:28:53,823 INFO L290 TraceCheckUtils]: 32: Hoare triple {200939#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200939#false} is VALID [2022-04-14 23:28:53,823 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:28:53,823 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:28:53,823 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1242275539] [2022-04-14 23:28:53,823 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1242275539] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:28:53,823 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:28:53,823 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:28:53,824 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [91067592] [2022-04-14 23:28:53,824 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:28:53,824 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-14 23:28:53,824 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:28:53,824 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:53,847 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:28:53,847 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:28:53,847 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:28:53,847 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:28:53,847 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:28:53,848 INFO L87 Difference]: Start difference. First operand 10377 states and 15367 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:56,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:28:56,847 INFO L93 Difference]: Finished difference Result 10507 states and 15368 transitions. [2022-04-14 23:28:56,847 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:28:56,847 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-14 23:28:56,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:28:56,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:56,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-14 23:28:56,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:28:56,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-14 23:28:56,849 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 162 transitions. [2022-04-14 23:28:56,954 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 162 edges. 162 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:29:00,153 INFO L225 Difference]: With dead ends: 10507 [2022-04-14 23:29:00,154 INFO L226 Difference]: Without dead ends: 10507 [2022-04-14 23:29:00,154 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:29:00,154 INFO L913 BasicCegarLoop]: 125 mSDtfsCounter, 176 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 176 SdHoareTripleChecker+Valid, 132 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:29:00,155 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [176 Valid, 132 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:29:00,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10507 states. [2022-04-14 23:29:00,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10507 to 10505. [2022-04-14 23:29:00,248 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:29:00,261 INFO L82 GeneralOperation]: Start isEquivalent. First operand 10507 states. Second operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:29:00,275 INFO L74 IsIncluded]: Start isIncluded. First operand 10507 states. Second operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:29:00,333 INFO L87 Difference]: Start difference. First operand 10507 states. Second operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:29:03,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:29:03,106 INFO L93 Difference]: Finished difference Result 10507 states and 15368 transitions. [2022-04-14 23:29:03,106 INFO L276 IsEmpty]: Start isEmpty. Operand 10507 states and 15368 transitions. [2022-04-14 23:29:03,112 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:29:03,112 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:29:03,120 INFO L74 IsIncluded]: Start isIncluded. First operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 10507 states. [2022-04-14 23:29:03,126 INFO L87 Difference]: Start difference. First operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 10507 states. [2022-04-14 23:29:05,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:29:05,922 INFO L93 Difference]: Finished difference Result 10507 states and 15368 transitions. [2022-04-14 23:29:05,922 INFO L276 IsEmpty]: Start isEmpty. Operand 10507 states and 15368 transitions. [2022-04-14 23:29:05,928 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:29:05,928 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:29:05,928 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:29:05,928 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:29:05,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:29:08,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10505 states to 10505 states and 15367 transitions. [2022-04-14 23:29:08,734 INFO L78 Accepts]: Start accepts. Automaton has 10505 states and 15367 transitions. Word has length 33 [2022-04-14 23:29:08,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:29:08,734 INFO L478 AbstractCegarLoop]: Abstraction has 10505 states and 15367 transitions. [2022-04-14 23:29:08,735 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:29:08,735 INFO L276 IsEmpty]: Start isEmpty. Operand 10505 states and 15367 transitions. [2022-04-14 23:29:08,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-14 23:29:08,740 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:29:08,740 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:29:08,740 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2022-04-14 23:29:08,740 INFO L403 AbstractCegarLoop]: === Iteration 25 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:29:08,741 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:29:08,741 INFO L85 PathProgramCache]: Analyzing trace with hash -947685481, now seen corresponding path program 1 times [2022-04-14 23:29:08,741 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:29:08,741 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1237201783] [2022-04-14 23:29:08,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:29:08,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:29:08,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:29:08,772 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:29:08,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:29:08,776 INFO L290 TraceCheckUtils]: 0: Hoare triple {242982#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {242976#true} is VALID [2022-04-14 23:29:08,776 INFO L290 TraceCheckUtils]: 1: Hoare triple {242976#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-14 23:29:08,776 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {242976#true} {242976#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-14 23:29:08,777 INFO L272 TraceCheckUtils]: 0: Hoare triple {242976#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242982#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:29:08,777 INFO L290 TraceCheckUtils]: 1: Hoare triple {242982#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {242976#true} is VALID [2022-04-14 23:29:08,777 INFO L290 TraceCheckUtils]: 2: Hoare triple {242976#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-14 23:29:08,777 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {242976#true} {242976#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-14 23:29:08,777 INFO L272 TraceCheckUtils]: 4: Hoare triple {242976#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-14 23:29:08,777 INFO L290 TraceCheckUtils]: 5: Hoare triple {242976#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {242976#true} is VALID [2022-04-14 23:29:08,778 INFO L290 TraceCheckUtils]: 6: Hoare triple {242976#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {242976#true} is VALID [2022-04-14 23:29:08,778 INFO L290 TraceCheckUtils]: 7: Hoare triple {242976#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {242976#true} is VALID [2022-04-14 23:29:08,778 INFO L290 TraceCheckUtils]: 8: Hoare triple {242976#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-14 23:29:08,778 INFO L290 TraceCheckUtils]: 9: Hoare triple {242976#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-14 23:29:08,778 INFO L290 TraceCheckUtils]: 10: Hoare triple {242976#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-14 23:29:08,778 INFO L290 TraceCheckUtils]: 11: Hoare triple {242976#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-14 23:29:08,778 INFO L290 TraceCheckUtils]: 12: Hoare triple {242976#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-14 23:29:08,778 INFO L290 TraceCheckUtils]: 13: Hoare triple {242976#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-14 23:29:08,778 INFO L290 TraceCheckUtils]: 14: Hoare triple {242976#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-14 23:29:08,778 INFO L290 TraceCheckUtils]: 15: Hoare triple {242976#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-14 23:29:08,779 INFO L290 TraceCheckUtils]: 16: Hoare triple {242976#true} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {242981#(= main_~lk9~0 1)} is VALID [2022-04-14 23:29:08,779 INFO L290 TraceCheckUtils]: 17: Hoare triple {242981#(= main_~lk9~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {242981#(= main_~lk9~0 1)} is VALID [2022-04-14 23:29:08,779 INFO L290 TraceCheckUtils]: 18: Hoare triple {242981#(= main_~lk9~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {242981#(= main_~lk9~0 1)} is VALID [2022-04-14 23:29:08,780 INFO L290 TraceCheckUtils]: 19: Hoare triple {242981#(= main_~lk9~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {242981#(= main_~lk9~0 1)} is VALID [2022-04-14 23:29:08,780 INFO L290 TraceCheckUtils]: 20: Hoare triple {242981#(= main_~lk9~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {242981#(= main_~lk9~0 1)} is VALID [2022-04-14 23:29:08,780 INFO L290 TraceCheckUtils]: 21: Hoare triple {242981#(= main_~lk9~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {242981#(= main_~lk9~0 1)} is VALID [2022-04-14 23:29:08,781 INFO L290 TraceCheckUtils]: 22: Hoare triple {242981#(= main_~lk9~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-14 23:29:08,781 INFO L290 TraceCheckUtils]: 23: Hoare triple {242981#(= main_~lk9~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-14 23:29:08,781 INFO L290 TraceCheckUtils]: 24: Hoare triple {242981#(= main_~lk9~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-14 23:29:08,782 INFO L290 TraceCheckUtils]: 25: Hoare triple {242981#(= main_~lk9~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-14 23:29:08,782 INFO L290 TraceCheckUtils]: 26: Hoare triple {242981#(= main_~lk9~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-14 23:29:08,782 INFO L290 TraceCheckUtils]: 27: Hoare triple {242981#(= main_~lk9~0 1)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-14 23:29:08,782 INFO L290 TraceCheckUtils]: 28: Hoare triple {242981#(= main_~lk9~0 1)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-14 23:29:08,783 INFO L290 TraceCheckUtils]: 29: Hoare triple {242981#(= main_~lk9~0 1)} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-14 23:29:08,783 INFO L290 TraceCheckUtils]: 30: Hoare triple {242981#(= main_~lk9~0 1)} [346] L181-1-->L187: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-14 23:29:08,783 INFO L290 TraceCheckUtils]: 31: Hoare triple {242981#(= main_~lk9~0 1)} [348] L187-->L212-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {242977#false} is VALID [2022-04-14 23:29:08,784 INFO L290 TraceCheckUtils]: 32: Hoare triple {242977#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242977#false} is VALID [2022-04-14 23:29:08,784 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:29:08,784 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:29:08,784 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1237201783] [2022-04-14 23:29:08,784 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1237201783] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:29:08,784 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:29:08,784 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:29:08,784 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [993571395] [2022-04-14 23:29:08,784 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:29:08,785 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-14 23:29:08,785 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:29:08,785 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:29:08,806 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:29:08,806 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:29:08,806 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:29:08,807 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:29:08,807 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:29:08,807 INFO L87 Difference]: Start difference. First operand 10505 states and 15367 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:29:18,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:29:18,111 INFO L93 Difference]: Finished difference Result 18443 states and 27400 transitions. [2022-04-14 23:29:18,111 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:29:18,111 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-14 23:29:18,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:29:18,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:29:18,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 146 transitions. [2022-04-14 23:29:18,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:29:18,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 146 transitions. [2022-04-14 23:29:18,113 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 146 transitions. [2022-04-14 23:29:18,209 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 146 edges. 146 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:29:28,048 INFO L225 Difference]: With dead ends: 18443 [2022-04-14 23:29:28,048 INFO L226 Difference]: Without dead ends: 18443 [2022-04-14 23:29:28,048 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:29:28,049 INFO L913 BasicCegarLoop]: 87 mSDtfsCounter, 180 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 180 SdHoareTripleChecker+Valid, 94 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 23:29:28,049 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [180 Valid, 94 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-14 23:29:28,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18443 states. [2022-04-14 23:29:28,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18443 to 15369. [2022-04-14 23:29:28,177 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:29:28,194 INFO L82 GeneralOperation]: Start isEquivalent. First operand 18443 states. Second operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:29:28,210 INFO L74 IsIncluded]: Start isIncluded. First operand 18443 states. Second operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:29:28,226 INFO L87 Difference]: Start difference. First operand 18443 states. Second operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:29:36,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:29:36,853 INFO L93 Difference]: Finished difference Result 18443 states and 27400 transitions. [2022-04-14 23:29:36,853 INFO L276 IsEmpty]: Start isEmpty. Operand 18443 states and 27400 transitions. [2022-04-14 23:29:36,866 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:29:36,866 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:29:36,884 INFO L74 IsIncluded]: Start isIncluded. First operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18443 states. [2022-04-14 23:29:36,901 INFO L87 Difference]: Start difference. First operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18443 states. [2022-04-14 23:29:45,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:29:45,252 INFO L93 Difference]: Finished difference Result 18443 states and 27400 transitions. [2022-04-14 23:29:45,252 INFO L276 IsEmpty]: Start isEmpty. Operand 18443 states and 27400 transitions. [2022-04-14 23:29:45,270 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:29:45,270 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:29:45,270 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:29:45,270 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:29:45,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:29:51,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15369 states to 15369 states and 21767 transitions. [2022-04-14 23:29:51,675 INFO L78 Accepts]: Start accepts. Automaton has 15369 states and 21767 transitions. Word has length 33 [2022-04-14 23:29:51,675 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:29:51,676 INFO L478 AbstractCegarLoop]: Abstraction has 15369 states and 21767 transitions. [2022-04-14 23:29:51,676 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:29:51,676 INFO L276 IsEmpty]: Start isEmpty. Operand 15369 states and 21767 transitions. [2022-04-14 23:29:51,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-14 23:29:51,682 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:29:51,682 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:29:51,682 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2022-04-14 23:29:51,682 INFO L403 AbstractCegarLoop]: === Iteration 26 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:29:51,682 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:29:51,682 INFO L85 PathProgramCache]: Analyzing trace with hash 405624216, now seen corresponding path program 1 times [2022-04-14 23:29:51,683 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:29:51,683 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2058622116] [2022-04-14 23:29:51,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:29:51,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:29:51,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:29:51,748 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:29:51,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:29:51,753 INFO L290 TraceCheckUtils]: 0: Hoare triple {313692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {313686#true} is VALID [2022-04-14 23:29:51,753 INFO L290 TraceCheckUtils]: 1: Hoare triple {313686#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-14 23:29:51,753 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {313686#true} {313686#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-14 23:29:51,753 INFO L272 TraceCheckUtils]: 0: Hoare triple {313686#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:29:51,754 INFO L290 TraceCheckUtils]: 1: Hoare triple {313692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {313686#true} is VALID [2022-04-14 23:29:51,754 INFO L290 TraceCheckUtils]: 2: Hoare triple {313686#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-14 23:29:51,754 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {313686#true} {313686#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-14 23:29:51,754 INFO L272 TraceCheckUtils]: 4: Hoare triple {313686#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-14 23:29:51,754 INFO L290 TraceCheckUtils]: 5: Hoare triple {313686#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {313686#true} is VALID [2022-04-14 23:29:51,754 INFO L290 TraceCheckUtils]: 6: Hoare triple {313686#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {313686#true} is VALID [2022-04-14 23:29:51,754 INFO L290 TraceCheckUtils]: 7: Hoare triple {313686#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {313686#true} is VALID [2022-04-14 23:29:51,754 INFO L290 TraceCheckUtils]: 8: Hoare triple {313686#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-14 23:29:51,755 INFO L290 TraceCheckUtils]: 9: Hoare triple {313686#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-14 23:29:51,755 INFO L290 TraceCheckUtils]: 10: Hoare triple {313686#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-14 23:29:51,755 INFO L290 TraceCheckUtils]: 11: Hoare triple {313686#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-14 23:29:51,755 INFO L290 TraceCheckUtils]: 12: Hoare triple {313686#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-14 23:29:51,755 INFO L290 TraceCheckUtils]: 13: Hoare triple {313686#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-14 23:29:51,755 INFO L290 TraceCheckUtils]: 14: Hoare triple {313686#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-14 23:29:51,755 INFO L290 TraceCheckUtils]: 15: Hoare triple {313686#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-14 23:29:51,756 INFO L290 TraceCheckUtils]: 16: Hoare triple {313686#true} [301] L116-1-->L120-1: Formula: (= v_main_~p9~0_4 0) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-14 23:29:51,756 INFO L290 TraceCheckUtils]: 17: Hoare triple {313691#(= main_~p9~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {313691#(= main_~p9~0 0)} is VALID [2022-04-14 23:29:51,756 INFO L290 TraceCheckUtils]: 18: Hoare triple {313691#(= main_~p9~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {313691#(= main_~p9~0 0)} is VALID [2022-04-14 23:29:51,756 INFO L290 TraceCheckUtils]: 19: Hoare triple {313691#(= main_~p9~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {313691#(= main_~p9~0 0)} is VALID [2022-04-14 23:29:51,757 INFO L290 TraceCheckUtils]: 20: Hoare triple {313691#(= main_~p9~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {313691#(= main_~p9~0 0)} is VALID [2022-04-14 23:29:51,757 INFO L290 TraceCheckUtils]: 21: Hoare triple {313691#(= main_~p9~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {313691#(= main_~p9~0 0)} is VALID [2022-04-14 23:29:51,757 INFO L290 TraceCheckUtils]: 22: Hoare triple {313691#(= main_~p9~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-14 23:29:51,758 INFO L290 TraceCheckUtils]: 23: Hoare triple {313691#(= main_~p9~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-14 23:29:51,758 INFO L290 TraceCheckUtils]: 24: Hoare triple {313691#(= main_~p9~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-14 23:29:51,758 INFO L290 TraceCheckUtils]: 25: Hoare triple {313691#(= main_~p9~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-14 23:29:51,759 INFO L290 TraceCheckUtils]: 26: Hoare triple {313691#(= main_~p9~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-14 23:29:51,759 INFO L290 TraceCheckUtils]: 27: Hoare triple {313691#(= main_~p9~0 0)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-14 23:29:51,759 INFO L290 TraceCheckUtils]: 28: Hoare triple {313691#(= main_~p9~0 0)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-14 23:29:51,760 INFO L290 TraceCheckUtils]: 29: Hoare triple {313691#(= main_~p9~0 0)} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-14 23:29:51,760 INFO L290 TraceCheckUtils]: 30: Hoare triple {313691#(= main_~p9~0 0)} [346] L181-1-->L187: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {313687#false} is VALID [2022-04-14 23:29:51,760 INFO L290 TraceCheckUtils]: 31: Hoare triple {313687#false} [348] L187-->L212-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {313687#false} is VALID [2022-04-14 23:29:51,760 INFO L290 TraceCheckUtils]: 32: Hoare triple {313687#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313687#false} is VALID [2022-04-14 23:29:51,760 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:29:51,760 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:29:51,761 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2058622116] [2022-04-14 23:29:51,761 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2058622116] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:29:51,761 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:29:51,761 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:29:51,761 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1302454643] [2022-04-14 23:29:51,761 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:29:51,762 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-14 23:29:51,762 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:29:51,762 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:29:51,783 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:29:51,784 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:29:51,784 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:29:51,784 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:29:51,785 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:29:51,785 INFO L87 Difference]: Start difference. First operand 15369 states and 21767 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:30:02,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:30:02,496 INFO L93 Difference]: Finished difference Result 20491 states and 28936 transitions. [2022-04-14 23:30:02,496 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:30:02,496 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-14 23:30:02,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:30:02,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:30:02,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 161 transitions. [2022-04-14 23:30:02,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:30:02,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 161 transitions. [2022-04-14 23:30:02,498 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 161 transitions. [2022-04-14 23:30:02,602 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 161 edges. 161 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:30:13,779 INFO L225 Difference]: With dead ends: 20491 [2022-04-14 23:30:13,779 INFO L226 Difference]: Without dead ends: 20491 [2022-04-14 23:30:13,779 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:30:13,780 INFO L913 BasicCegarLoop]: 136 mSDtfsCounter, 160 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 160 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:30:13,780 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [160 Valid, 143 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:30:13,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20491 states. [2022-04-14 23:30:13,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20491 to 20489. [2022-04-14 23:30:13,970 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:30:13,991 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20491 states. Second operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:30:14,009 INFO L74 IsIncluded]: Start isIncluded. First operand 20491 states. Second operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:30:14,026 INFO L87 Difference]: Start difference. First operand 20491 states. Second operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:30:25,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:30:25,290 INFO L93 Difference]: Finished difference Result 20491 states and 28936 transitions. [2022-04-14 23:30:25,290 INFO L276 IsEmpty]: Start isEmpty. Operand 20491 states and 28936 transitions. [2022-04-14 23:30:25,355 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:30:25,356 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:30:25,371 INFO L74 IsIncluded]: Start isIncluded. First operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20491 states. [2022-04-14 23:30:25,386 INFO L87 Difference]: Start difference. First operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20491 states. [2022-04-14 23:30:35,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:30:35,910 INFO L93 Difference]: Finished difference Result 20491 states and 28936 transitions. [2022-04-14 23:30:35,910 INFO L276 IsEmpty]: Start isEmpty. Operand 20491 states and 28936 transitions. [2022-04-14 23:30:35,924 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:30:35,924 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:30:35,924 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:30:35,924 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:30:35,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:30:45,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20489 states to 20489 states and 28935 transitions. [2022-04-14 23:30:45,331 INFO L78 Accepts]: Start accepts. Automaton has 20489 states and 28935 transitions. Word has length 33 [2022-04-14 23:30:45,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:30:45,331 INFO L478 AbstractCegarLoop]: Abstraction has 20489 states and 28935 transitions. [2022-04-14 23:30:45,331 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:30:45,331 INFO L276 IsEmpty]: Start isEmpty. Operand 20489 states and 28935 transitions. [2022-04-14 23:30:45,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-14 23:30:45,338 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:30:45,338 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:30:45,338 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2022-04-14 23:30:45,339 INFO L403 AbstractCegarLoop]: === Iteration 27 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:30:45,339 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:30:45,339 INFO L85 PathProgramCache]: Analyzing trace with hash 686554246, now seen corresponding path program 1 times [2022-04-14 23:30:45,339 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:30:45,339 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [795042773] [2022-04-14 23:30:45,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:30:45,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:30:45,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:30:45,376 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:30:45,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:30:45,380 INFO L290 TraceCheckUtils]: 0: Hoare triple {395666#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {395660#true} is VALID [2022-04-14 23:30:45,380 INFO L290 TraceCheckUtils]: 1: Hoare triple {395660#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-14 23:30:45,380 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {395660#true} {395660#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-14 23:30:45,380 INFO L272 TraceCheckUtils]: 0: Hoare triple {395660#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395666#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:30:45,381 INFO L290 TraceCheckUtils]: 1: Hoare triple {395666#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {395660#true} is VALID [2022-04-14 23:30:45,381 INFO L290 TraceCheckUtils]: 2: Hoare triple {395660#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-14 23:30:45,381 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {395660#true} {395660#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-14 23:30:45,381 INFO L272 TraceCheckUtils]: 4: Hoare triple {395660#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-14 23:30:45,381 INFO L290 TraceCheckUtils]: 5: Hoare triple {395660#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {395660#true} is VALID [2022-04-14 23:30:45,381 INFO L290 TraceCheckUtils]: 6: Hoare triple {395660#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {395660#true} is VALID [2022-04-14 23:30:45,381 INFO L290 TraceCheckUtils]: 7: Hoare triple {395660#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {395660#true} is VALID [2022-04-14 23:30:45,381 INFO L290 TraceCheckUtils]: 8: Hoare triple {395660#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-14 23:30:45,381 INFO L290 TraceCheckUtils]: 9: Hoare triple {395660#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-14 23:30:45,382 INFO L290 TraceCheckUtils]: 10: Hoare triple {395660#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-14 23:30:45,382 INFO L290 TraceCheckUtils]: 11: Hoare triple {395660#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-14 23:30:45,382 INFO L290 TraceCheckUtils]: 12: Hoare triple {395660#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-14 23:30:45,382 INFO L290 TraceCheckUtils]: 13: Hoare triple {395660#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-14 23:30:45,382 INFO L290 TraceCheckUtils]: 14: Hoare triple {395660#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-14 23:30:45,382 INFO L290 TraceCheckUtils]: 15: Hoare triple {395660#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-14 23:30:45,382 INFO L290 TraceCheckUtils]: 16: Hoare triple {395660#true} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-14 23:30:45,383 INFO L290 TraceCheckUtils]: 17: Hoare triple {395665#(not (= main_~p9~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-14 23:30:45,383 INFO L290 TraceCheckUtils]: 18: Hoare triple {395665#(not (= main_~p9~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-14 23:30:45,383 INFO L290 TraceCheckUtils]: 19: Hoare triple {395665#(not (= main_~p9~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-14 23:30:45,384 INFO L290 TraceCheckUtils]: 20: Hoare triple {395665#(not (= main_~p9~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-14 23:30:45,384 INFO L290 TraceCheckUtils]: 21: Hoare triple {395665#(not (= main_~p9~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-14 23:30:45,384 INFO L290 TraceCheckUtils]: 22: Hoare triple {395665#(not (= main_~p9~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-14 23:30:45,385 INFO L290 TraceCheckUtils]: 23: Hoare triple {395665#(not (= main_~p9~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-14 23:30:45,385 INFO L290 TraceCheckUtils]: 24: Hoare triple {395665#(not (= main_~p9~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-14 23:30:45,385 INFO L290 TraceCheckUtils]: 25: Hoare triple {395665#(not (= main_~p9~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-14 23:30:45,385 INFO L290 TraceCheckUtils]: 26: Hoare triple {395665#(not (= main_~p9~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-14 23:30:45,386 INFO L290 TraceCheckUtils]: 27: Hoare triple {395665#(not (= main_~p9~0 0))} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-14 23:30:45,386 INFO L290 TraceCheckUtils]: 28: Hoare triple {395665#(not (= main_~p9~0 0))} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-14 23:30:45,386 INFO L290 TraceCheckUtils]: 29: Hoare triple {395665#(not (= main_~p9~0 0))} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-14 23:30:45,387 INFO L290 TraceCheckUtils]: 30: Hoare triple {395665#(not (= main_~p9~0 0))} [347] L181-1-->L186-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {395661#false} is VALID [2022-04-14 23:30:45,387 INFO L290 TraceCheckUtils]: 31: Hoare triple {395661#false} [350] L186-1-->L192: Formula: (not (= v_main_~p10~0_3 0)) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {395661#false} is VALID [2022-04-14 23:30:45,387 INFO L290 TraceCheckUtils]: 32: Hoare triple {395661#false} [352] L192-->L212-1: Formula: (not (= v_main_~lk10~0_4 1)) InVars {main_~lk10~0=v_main_~lk10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_4} AuxVars[] AssignedVars[] {395661#false} is VALID [2022-04-14 23:30:45,387 INFO L290 TraceCheckUtils]: 33: Hoare triple {395661#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395661#false} is VALID [2022-04-14 23:30:45,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:30:45,387 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:30:45,387 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [795042773] [2022-04-14 23:30:45,388 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [795042773] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:30:45,388 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:30:45,388 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:30:45,388 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1585629024] [2022-04-14 23:30:45,388 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:30:45,388 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-14 23:30:45,388 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:30:45,389 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:30:45,409 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:30:45,409 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:30:45,409 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:30:45,409 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:30:45,410 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:30:45,410 INFO L87 Difference]: Start difference. First operand 20489 states and 28935 transitions. Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:30:56,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:30:56,424 INFO L93 Difference]: Finished difference Result 20747 states and 28936 transitions. [2022-04-14 23:30:56,424 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:30:56,425 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-14 23:30:56,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:30:56,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:30:56,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 160 transitions. [2022-04-14 23:30:56,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:30:56,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 160 transitions. [2022-04-14 23:30:56,426 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 160 transitions. [2022-04-14 23:30:56,533 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 160 edges. 160 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:31:08,100 INFO L225 Difference]: With dead ends: 20747 [2022-04-14 23:31:08,100 INFO L226 Difference]: Without dead ends: 20747 [2022-04-14 23:31:08,101 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:31:08,101 INFO L913 BasicCegarLoop]: 122 mSDtfsCounter, 175 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 79 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 175 SdHoareTripleChecker+Valid, 129 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 79 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:31:08,101 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [175 Valid, 129 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 79 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:31:08,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20747 states. [2022-04-14 23:31:08,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20747 to 20745. [2022-04-14 23:31:08,296 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:31:08,319 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20747 states. Second operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:31:08,343 INFO L74 IsIncluded]: Start isIncluded. First operand 20747 states. Second operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:31:08,366 INFO L87 Difference]: Start difference. First operand 20747 states. Second operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:31:18,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:31:18,346 INFO L93 Difference]: Finished difference Result 20747 states and 28936 transitions. [2022-04-14 23:31:18,346 INFO L276 IsEmpty]: Start isEmpty. Operand 20747 states and 28936 transitions. [2022-04-14 23:31:18,361 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:31:18,361 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:31:18,380 INFO L74 IsIncluded]: Start isIncluded. First operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20747 states. [2022-04-14 23:31:18,399 INFO L87 Difference]: Start difference. First operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20747 states. [2022-04-14 23:31:28,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:31:28,588 INFO L93 Difference]: Finished difference Result 20747 states and 28936 transitions. [2022-04-14 23:31:28,588 INFO L276 IsEmpty]: Start isEmpty. Operand 20747 states and 28936 transitions. [2022-04-14 23:31:28,601 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:31:28,601 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:31:28,601 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:31:28,601 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:31:28,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:31:40,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20745 states to 20745 states and 28935 transitions. [2022-04-14 23:31:40,106 INFO L78 Accepts]: Start accepts. Automaton has 20745 states and 28935 transitions. Word has length 34 [2022-04-14 23:31:40,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:31:40,106 INFO L478 AbstractCegarLoop]: Abstraction has 20745 states and 28935 transitions. [2022-04-14 23:31:40,106 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:31:40,106 INFO L276 IsEmpty]: Start isEmpty. Operand 20745 states and 28935 transitions. [2022-04-14 23:31:40,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-14 23:31:40,114 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:31:40,114 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:31:40,114 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2022-04-14 23:31:40,114 INFO L403 AbstractCegarLoop]: === Iteration 28 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:31:40,114 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:31:40,114 INFO L85 PathProgramCache]: Analyzing trace with hash -310518107, now seen corresponding path program 1 times [2022-04-14 23:31:40,115 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:31:40,115 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1590401225] [2022-04-14 23:31:40,115 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:31:40,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:31:40,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:31:40,161 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:31:40,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:31:40,165 INFO L290 TraceCheckUtils]: 0: Hoare triple {478664#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {478658#true} is VALID [2022-04-14 23:31:40,166 INFO L290 TraceCheckUtils]: 1: Hoare triple {478658#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-14 23:31:40,166 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {478658#true} {478658#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-14 23:31:40,166 INFO L272 TraceCheckUtils]: 0: Hoare triple {478658#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478664#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:31:40,166 INFO L290 TraceCheckUtils]: 1: Hoare triple {478664#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {478658#true} is VALID [2022-04-14 23:31:40,167 INFO L290 TraceCheckUtils]: 2: Hoare triple {478658#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-14 23:31:40,167 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {478658#true} {478658#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-14 23:31:40,167 INFO L272 TraceCheckUtils]: 4: Hoare triple {478658#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-14 23:31:40,167 INFO L290 TraceCheckUtils]: 5: Hoare triple {478658#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {478658#true} is VALID [2022-04-14 23:31:40,167 INFO L290 TraceCheckUtils]: 6: Hoare triple {478658#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {478658#true} is VALID [2022-04-14 23:31:40,167 INFO L290 TraceCheckUtils]: 7: Hoare triple {478658#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {478658#true} is VALID [2022-04-14 23:31:40,167 INFO L290 TraceCheckUtils]: 8: Hoare triple {478658#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-14 23:31:40,167 INFO L290 TraceCheckUtils]: 9: Hoare triple {478658#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-14 23:31:40,167 INFO L290 TraceCheckUtils]: 10: Hoare triple {478658#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-14 23:31:40,168 INFO L290 TraceCheckUtils]: 11: Hoare triple {478658#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-14 23:31:40,168 INFO L290 TraceCheckUtils]: 12: Hoare triple {478658#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-14 23:31:40,168 INFO L290 TraceCheckUtils]: 13: Hoare triple {478658#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-14 23:31:40,168 INFO L290 TraceCheckUtils]: 14: Hoare triple {478658#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-14 23:31:40,168 INFO L290 TraceCheckUtils]: 15: Hoare triple {478658#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-14 23:31:40,168 INFO L290 TraceCheckUtils]: 16: Hoare triple {478658#true} [301] L116-1-->L120-1: Formula: (= v_main_~p9~0_4 0) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-14 23:31:40,168 INFO L290 TraceCheckUtils]: 17: Hoare triple {478658#true} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {478663#(= main_~lk10~0 1)} is VALID [2022-04-14 23:31:40,169 INFO L290 TraceCheckUtils]: 18: Hoare triple {478663#(= main_~lk10~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {478663#(= main_~lk10~0 1)} is VALID [2022-04-14 23:31:40,169 INFO L290 TraceCheckUtils]: 19: Hoare triple {478663#(= main_~lk10~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {478663#(= main_~lk10~0 1)} is VALID [2022-04-14 23:31:40,169 INFO L290 TraceCheckUtils]: 20: Hoare triple {478663#(= main_~lk10~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {478663#(= main_~lk10~0 1)} is VALID [2022-04-14 23:31:40,170 INFO L290 TraceCheckUtils]: 21: Hoare triple {478663#(= main_~lk10~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {478663#(= main_~lk10~0 1)} is VALID [2022-04-14 23:31:40,170 INFO L290 TraceCheckUtils]: 22: Hoare triple {478663#(= main_~lk10~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-14 23:31:40,170 INFO L290 TraceCheckUtils]: 23: Hoare triple {478663#(= main_~lk10~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-14 23:31:40,171 INFO L290 TraceCheckUtils]: 24: Hoare triple {478663#(= main_~lk10~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-14 23:31:40,171 INFO L290 TraceCheckUtils]: 25: Hoare triple {478663#(= main_~lk10~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-14 23:31:40,171 INFO L290 TraceCheckUtils]: 26: Hoare triple {478663#(= main_~lk10~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-14 23:31:40,172 INFO L290 TraceCheckUtils]: 27: Hoare triple {478663#(= main_~lk10~0 1)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-14 23:31:40,172 INFO L290 TraceCheckUtils]: 28: Hoare triple {478663#(= main_~lk10~0 1)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-14 23:31:40,172 INFO L290 TraceCheckUtils]: 29: Hoare triple {478663#(= main_~lk10~0 1)} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-14 23:31:40,173 INFO L290 TraceCheckUtils]: 30: Hoare triple {478663#(= main_~lk10~0 1)} [347] L181-1-->L186-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-14 23:31:40,173 INFO L290 TraceCheckUtils]: 31: Hoare triple {478663#(= main_~lk10~0 1)} [350] L186-1-->L192: Formula: (not (= v_main_~p10~0_3 0)) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-14 23:31:40,173 INFO L290 TraceCheckUtils]: 32: Hoare triple {478663#(= main_~lk10~0 1)} [352] L192-->L212-1: Formula: (not (= v_main_~lk10~0_4 1)) InVars {main_~lk10~0=v_main_~lk10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_4} AuxVars[] AssignedVars[] {478659#false} is VALID [2022-04-14 23:31:40,173 INFO L290 TraceCheckUtils]: 33: Hoare triple {478659#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478659#false} is VALID [2022-04-14 23:31:40,174 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:31:40,174 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:31:40,174 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1590401225] [2022-04-14 23:31:40,174 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1590401225] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:31:40,174 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:31:40,174 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:31:40,174 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1671959654] [2022-04-14 23:31:40,174 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:31:40,175 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-14 23:31:40,175 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:31:40,175 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:31:40,198 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:31:40,198 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:31:40,199 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:31:40,199 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:31:40,199 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:31:40,199 INFO L87 Difference]: Start difference. First operand 20745 states and 28935 transitions. Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:32:45,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:32:45,909 INFO L93 Difference]: Finished difference Result 35851 states and 50696 transitions. [2022-04-14 23:32:45,909 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:32:45,910 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-14 23:32:45,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:32:45,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:32:45,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 142 transitions. [2022-04-14 23:32:45,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:32:45,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 142 transitions. [2022-04-14 23:32:45,911 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 142 transitions. [2022-04-14 23:32:46,005 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 142 edges. 142 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:33:27,212 INFO L225 Difference]: With dead ends: 35851 [2022-04-14 23:33:27,213 INFO L226 Difference]: Without dead ends: 35851 [2022-04-14 23:33:27,213 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:33:27,213 INFO L913 BasicCegarLoop]: 86 mSDtfsCounter, 173 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 173 SdHoareTripleChecker+Valid, 93 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-14 23:33:27,213 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [173 Valid, 93 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-14 23:33:27,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35851 states. [2022-04-14 23:33:27,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35851 to 30729. [2022-04-14 23:33:27,487 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:33:27,532 INFO L82 GeneralOperation]: Start isEquivalent. First operand 35851 states. Second operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:33:27,570 INFO L74 IsIncluded]: Start isIncluded. First operand 35851 states. Second operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:33:27,621 INFO L87 Difference]: Start difference. First operand 35851 states. Second operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:34:58,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:34:58,422 INFO L93 Difference]: Finished difference Result 35851 states and 50696 transitions. [2022-04-14 23:34:58,422 INFO L276 IsEmpty]: Start isEmpty. Operand 35851 states and 50696 transitions. [2022-04-14 23:34:58,452 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:34:58,452 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:34:58,476 INFO L74 IsIncluded]: Start isIncluded. First operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 35851 states. [2022-04-14 23:34:58,500 INFO L87 Difference]: Start difference. First operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 35851 states. [2022-04-14 23:35:59,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:35:59,655 INFO L93 Difference]: Finished difference Result 35851 states and 50696 transitions. [2022-04-14 23:35:59,655 INFO L276 IsEmpty]: Start isEmpty. Operand 35851 states and 50696 transitions. [2022-04-14 23:35:59,680 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:35:59,680 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:35:59,680 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:35:59,681 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:35:59,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:36:24,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30729 states to 30729 states and 41479 transitions. [2022-04-14 23:36:24,858 INFO L78 Accepts]: Start accepts. Automaton has 30729 states and 41479 transitions. Word has length 34 [2022-04-14 23:36:24,858 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-14 23:36:24,858 INFO L478 AbstractCegarLoop]: Abstraction has 30729 states and 41479 transitions. [2022-04-14 23:36:24,858 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:36:24,858 INFO L276 IsEmpty]: Start isEmpty. Operand 30729 states and 41479 transitions. [2022-04-14 23:36:24,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-14 23:36:24,883 INFO L491 BasicCegarLoop]: Found error trace [2022-04-14 23:36:24,883 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-14 23:36:24,883 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2022-04-14 23:36:24,884 INFO L403 AbstractCegarLoop]: === Iteration 29 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-14 23:36:24,885 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-14 23:36:24,885 INFO L85 PathProgramCache]: Analyzing trace with hash 1042791590, now seen corresponding path program 1 times [2022-04-14 23:36:24,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-14 23:36:24,885 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1624605979] [2022-04-14 23:36:24,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-14 23:36:24,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-14 23:36:24,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:36:24,957 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-14 23:36:24,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-14 23:36:24,963 INFO L290 TraceCheckUtils]: 0: Hoare triple {616958#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {616952#true} is VALID [2022-04-14 23:36:24,963 INFO L290 TraceCheckUtils]: 1: Hoare triple {616952#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-14 23:36:24,963 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {616952#true} {616952#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-14 23:36:24,964 INFO L272 TraceCheckUtils]: 0: Hoare triple {616952#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616958#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-14 23:36:24,964 INFO L290 TraceCheckUtils]: 1: Hoare triple {616958#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {616952#true} is VALID [2022-04-14 23:36:24,964 INFO L290 TraceCheckUtils]: 2: Hoare triple {616952#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-14 23:36:24,964 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {616952#true} {616952#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-14 23:36:24,964 INFO L272 TraceCheckUtils]: 4: Hoare triple {616952#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-14 23:36:24,965 INFO L290 TraceCheckUtils]: 5: Hoare triple {616952#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {616952#true} is VALID [2022-04-14 23:36:24,965 INFO L290 TraceCheckUtils]: 6: Hoare triple {616952#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {616952#true} is VALID [2022-04-14 23:36:24,965 INFO L290 TraceCheckUtils]: 7: Hoare triple {616952#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {616952#true} is VALID [2022-04-14 23:36:24,965 INFO L290 TraceCheckUtils]: 8: Hoare triple {616952#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-14 23:36:24,965 INFO L290 TraceCheckUtils]: 9: Hoare triple {616952#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-14 23:36:24,965 INFO L290 TraceCheckUtils]: 10: Hoare triple {616952#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-14 23:36:24,965 INFO L290 TraceCheckUtils]: 11: Hoare triple {616952#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-14 23:36:24,965 INFO L290 TraceCheckUtils]: 12: Hoare triple {616952#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-14 23:36:24,965 INFO L290 TraceCheckUtils]: 13: Hoare triple {616952#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-14 23:36:24,965 INFO L290 TraceCheckUtils]: 14: Hoare triple {616952#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-14 23:36:24,966 INFO L290 TraceCheckUtils]: 15: Hoare triple {616952#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-14 23:36:24,966 INFO L290 TraceCheckUtils]: 16: Hoare triple {616952#true} [301] L116-1-->L120-1: Formula: (= v_main_~p9~0_4 0) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-14 23:36:24,966 INFO L290 TraceCheckUtils]: 17: Hoare triple {616952#true} [303] L120-1-->L124-1: Formula: (= v_main_~p10~0_4 0) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-14 23:36:24,967 INFO L290 TraceCheckUtils]: 18: Hoare triple {616957#(= main_~p10~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {616957#(= main_~p10~0 0)} is VALID [2022-04-14 23:36:24,967 INFO L290 TraceCheckUtils]: 19: Hoare triple {616957#(= main_~p10~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {616957#(= main_~p10~0 0)} is VALID [2022-04-14 23:36:24,967 INFO L290 TraceCheckUtils]: 20: Hoare triple {616957#(= main_~p10~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {616957#(= main_~p10~0 0)} is VALID [2022-04-14 23:36:24,968 INFO L290 TraceCheckUtils]: 21: Hoare triple {616957#(= main_~p10~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {616957#(= main_~p10~0 0)} is VALID [2022-04-14 23:36:24,968 INFO L290 TraceCheckUtils]: 22: Hoare triple {616957#(= main_~p10~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-14 23:36:24,968 INFO L290 TraceCheckUtils]: 23: Hoare triple {616957#(= main_~p10~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-14 23:36:24,969 INFO L290 TraceCheckUtils]: 24: Hoare triple {616957#(= main_~p10~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-14 23:36:24,969 INFO L290 TraceCheckUtils]: 25: Hoare triple {616957#(= main_~p10~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-14 23:36:24,992 INFO L290 TraceCheckUtils]: 26: Hoare triple {616957#(= main_~p10~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-14 23:36:24,992 INFO L290 TraceCheckUtils]: 27: Hoare triple {616957#(= main_~p10~0 0)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-14 23:36:24,993 INFO L290 TraceCheckUtils]: 28: Hoare triple {616957#(= main_~p10~0 0)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-14 23:36:24,993 INFO L290 TraceCheckUtils]: 29: Hoare triple {616957#(= main_~p10~0 0)} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-14 23:36:24,994 INFO L290 TraceCheckUtils]: 30: Hoare triple {616957#(= main_~p10~0 0)} [347] L181-1-->L186-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-14 23:36:24,994 INFO L290 TraceCheckUtils]: 31: Hoare triple {616957#(= main_~p10~0 0)} [350] L186-1-->L192: Formula: (not (= v_main_~p10~0_3 0)) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {616953#false} is VALID [2022-04-14 23:36:24,994 INFO L290 TraceCheckUtils]: 32: Hoare triple {616953#false} [352] L192-->L212-1: Formula: (not (= v_main_~lk10~0_4 1)) InVars {main_~lk10~0=v_main_~lk10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_4} AuxVars[] AssignedVars[] {616953#false} is VALID [2022-04-14 23:36:24,994 INFO L290 TraceCheckUtils]: 33: Hoare triple {616953#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616953#false} is VALID [2022-04-14 23:36:24,994 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-14 23:36:24,994 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-14 23:36:24,995 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1624605979] [2022-04-14 23:36:24,995 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1624605979] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-14 23:36:24,995 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-14 23:36:24,995 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-14 23:36:24,996 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [274231893] [2022-04-14 23:36:24,996 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-14 23:36:24,996 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-14 23:36:24,996 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-14 23:36:24,997 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:36:25,021 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:36:25,021 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-14 23:36:25,021 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-14 23:36:25,022 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-14 23:36:25,023 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-14 23:36:25,023 INFO L87 Difference]: Start difference. First operand 30729 states and 41479 transitions. Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:37:57,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:37:57,263 INFO L93 Difference]: Finished difference Result 40459 states and 54280 transitions. [2022-04-14 23:37:57,263 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-14 23:37:57,263 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-14 23:37:57,264 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-14 23:37:57,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:37:57,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 159 transitions. [2022-04-14 23:37:57,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:37:57,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 159 transitions. [2022-04-14 23:37:57,265 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 159 transitions. [2022-04-14 23:37:57,369 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 159 edges. 159 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-14 23:38:41,349 INFO L225 Difference]: With dead ends: 40459 [2022-04-14 23:38:41,350 INFO L226 Difference]: Without dead ends: 40459 [2022-04-14 23:38:41,350 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-14 23:38:41,350 INFO L913 BasicCegarLoop]: 138 mSDtfsCounter, 154 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 79 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 154 SdHoareTripleChecker+Valid, 145 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 79 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-14 23:38:41,350 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [154 Valid, 145 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 79 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-14 23:38:41,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40459 states. [2022-04-14 23:38:41,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40459 to 40457. [2022-04-14 23:38:41,757 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-14 23:38:41,807 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40459 states. Second operand has 40457 states, 40453 states have (on average 1.3417051887375473) internal successors, (54276), 40453 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:38:41,858 INFO L74 IsIncluded]: Start isIncluded. First operand 40459 states. Second operand has 40457 states, 40453 states have (on average 1.3417051887375473) internal successors, (54276), 40453 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:38:41,916 INFO L87 Difference]: Start difference. First operand 40459 states. Second operand has 40457 states, 40453 states have (on average 1.3417051887375473) internal successors, (54276), 40453 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-14 23:39:33,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:39:33,714 INFO L93 Difference]: Finished difference Result 40459 states and 54280 transitions. [2022-04-14 23:39:33,714 INFO L276 IsEmpty]: Start isEmpty. Operand 40459 states and 54280 transitions. [2022-04-14 23:39:33,741 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:39:33,741 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:39:33,773 INFO L74 IsIncluded]: Start isIncluded. First operand has 40457 states, 40453 states have (on average 1.3417051887375473) internal successors, (54276), 40453 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 40459 states. [2022-04-14 23:39:33,806 INFO L87 Difference]: Start difference. First operand has 40457 states, 40453 states have (on average 1.3417051887375473) internal successors, (54276), 40453 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 40459 states. [2022-04-14 23:40:37,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-14 23:40:37,631 INFO L93 Difference]: Finished difference Result 40459 states and 54280 transitions. [2022-04-14 23:40:37,631 INFO L276 IsEmpty]: Start isEmpty. Operand 40459 states and 54280 transitions. [2022-04-14 23:40:37,674 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-14 23:40:37,674 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-14 23:40:37,675 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-14 23:40:37,675 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-14 23:40:37,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40457 states, 40453 states have (on average 1.3417051887375473) internal successors, (54276), 40453 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1)