/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de20.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-e106359-m [2022-04-15 00:55:41,538 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-15 00:55:41,540 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-15 00:55:41,574 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-15 00:55:41,586 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-15 00:55:41,588 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-15 00:55:41,588 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-15 00:55:41,591 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-15 00:55:41,591 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-15 00:55:41,591 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-15 00:55:41,593 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-15 00:55:41,597 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-15 00:55:41,598 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-15 00:55:41,599 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-15 00:55:41,599 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-15 00:55:41,600 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-15 00:55:41,601 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-15 00:55:41,605 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-15 00:55:41,611 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-15 00:55:41,611 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-15 00:55:41,612 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-15 00:55:41,613 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-15 00:55:41,632 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-15 00:55:41,633 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-15 00:55:41,633 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-15 00:55:41,633 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-15 00:55:41,634 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-15 00:55:41,635 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-15 00:55:41,635 INFO L138 SettingsManager]: * Use SBE=true [2022-04-15 00:55:41,635 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-15 00:55:41,635 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-15 00:55:41,635 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-15 00:55:41,636 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-15 00:55:41,636 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-15 00:55:41,636 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-15 00:55:41,636 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-15 00:55:41,636 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-15 00:55:41,636 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-15 00:55:41,636 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-15 00:55:41,636 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-15 00:55:41,636 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-15 00:55:41,637 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-15 00:55:41,637 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-15 00:55:41,637 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-15 00:55:41,637 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-15 00:55:41,637 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-15 00:55:41,637 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-15 00:55:41,637 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-15 00:55:41,638 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-15 00:55:41,638 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-15 00:55:41,638 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-15 00:55:41,638 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-15 00:55:41,841 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-15 00:55:41,862 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-15 00:55:41,863 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-15 00:55:41,864 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-15 00:55:41,865 INFO L275 PluginConnector]: CDTParser initialized [2022-04-15 00:55:41,865 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de20.c [2022-04-15 00:55:41,910 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/49fa824a5/d8f33d38d2bf4522b67c3fccd19a1a11/FLAG52aa2f8fb [2022-04-15 00:55:42,214 INFO L306 CDTParser]: Found 1 translation units. [2022-04-15 00:55:42,214 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de20.c [2022-04-15 00:55:42,220 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/49fa824a5/d8f33d38d2bf4522b67c3fccd19a1a11/FLAG52aa2f8fb [2022-04-15 00:55:42,640 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/49fa824a5/d8f33d38d2bf4522b67c3fccd19a1a11 [2022-04-15 00:55:42,643 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-15 00:55:42,644 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-15 00:55:42,647 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-15 00:55:42,647 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-15 00:55:42,666 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-15 00:55:42,668 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.04 12:55:42" (1/1) ... [2022-04-15 00:55:42,669 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@221445c2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:55:42, skipping insertion in model container [2022-04-15 00:55:42,670 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.04 12:55:42" (1/1) ... [2022-04-15 00:55:42,677 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-15 00:55:42,687 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-15 00:55:42,791 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de20.c[368,381] [2022-04-15 00:55:42,809 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-15 00:55:42,823 INFO L203 MainTranslator]: Completed pre-run [2022-04-15 00:55:42,830 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de20.c[368,381] [2022-04-15 00:55:42,845 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-15 00:55:42,856 INFO L208 MainTranslator]: Completed translation [2022-04-15 00:55:42,857 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:55:42 WrapperNode [2022-04-15 00:55:42,858 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-15 00:55:42,859 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-15 00:55:42,860 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-15 00:55:42,860 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-15 00:55:42,888 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:55:42" (1/1) ... [2022-04-15 00:55:42,888 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:55:42" (1/1) ... [2022-04-15 00:55:42,892 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:55:42" (1/1) ... [2022-04-15 00:55:42,893 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:55:42" (1/1) ... [2022-04-15 00:55:42,910 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:55:42" (1/1) ... [2022-04-15 00:55:42,915 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:55:42" (1/1) ... [2022-04-15 00:55:42,916 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:55:42" (1/1) ... [2022-04-15 00:55:42,921 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-15 00:55:42,922 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-15 00:55:42,922 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-15 00:55:42,922 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-15 00:55:42,923 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:55:42" (1/1) ... [2022-04-15 00:55:42,929 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-15 00:55:42,935 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:55:42,952 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-15 00:55:42,972 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-15 00:55:42,989 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-15 00:55:42,989 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-15 00:55:42,990 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-15 00:55:42,990 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-15 00:55:42,990 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-15 00:55:42,991 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-15 00:55:42,991 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-15 00:55:42,992 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-15 00:55:42,992 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-15 00:55:42,993 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-15 00:55:42,993 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-15 00:55:42,993 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-15 00:55:42,993 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-15 00:55:42,993 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-15 00:55:42,993 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-15 00:55:42,993 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-15 00:55:42,993 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-15 00:55:42,993 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-15 00:55:43,032 INFO L234 CfgBuilder]: Building ICFG [2022-04-15 00:55:43,034 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-15 00:55:43,173 INFO L275 CfgBuilder]: Performing block encoding [2022-04-15 00:55:43,178 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-15 00:55:43,178 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-04-15 00:55:43,179 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 12:55:43 BoogieIcfgContainer [2022-04-15 00:55:43,179 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-15 00:55:43,179 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-15 00:55:43,179 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-15 00:55:43,196 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-15 00:55:43,198 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 12:55:43" (1/1) ... [2022-04-15 00:55:43,199 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-15 00:55:43,225 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 15.04 12:55:43 BasicIcfg [2022-04-15 00:55:43,225 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-15 00:55:43,226 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-15 00:55:43,227 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-15 00:55:43,229 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-15 00:55:43,229 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.04 12:55:42" (1/4) ... [2022-04-15 00:55:43,229 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@434429d6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.04 12:55:43, skipping insertion in model container [2022-04-15 00:55:43,229 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:55:42" (2/4) ... [2022-04-15 00:55:43,230 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@434429d6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.04 12:55:43, skipping insertion in model container [2022-04-15 00:55:43,230 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 12:55:43" (3/4) ... [2022-04-15 00:55:43,230 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@434429d6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.04 12:55:43, skipping insertion in model container [2022-04-15 00:55:43,230 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 15.04 12:55:43" (4/4) ... [2022-04-15 00:55:43,231 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de20.cqvasr [2022-04-15 00:55:43,234 INFO L202 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-15 00:55:43,234 INFO L161 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-15 00:55:43,282 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-15 00:55:43,286 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-15 00:55:43,286 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-15 00:55:43,298 INFO L276 IsEmpty]: Start isEmpty. Operand has 21 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-15 00:55:43,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-04-15 00:55:43,300 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:55:43,301 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:55:43,301 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:55:43,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:55:43,304 INFO L85 PathProgramCache]: Analyzing trace with hash 1032895658, now seen corresponding path program 1 times [2022-04-15 00:55:43,310 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:55:43,311 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [620155773] [2022-04-15 00:55:43,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:55:43,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:55:43,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:43,460 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:55:43,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:43,479 INFO L290 TraceCheckUtils]: 0: Hoare triple {29#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24#true} is VALID [2022-04-15 00:55:43,479 INFO L290 TraceCheckUtils]: 1: Hoare triple {24#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-15 00:55:43,479 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24#true} {24#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-15 00:55:43,483 INFO L272 TraceCheckUtils]: 0: Hoare triple {24#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:55:43,484 INFO L290 TraceCheckUtils]: 1: Hoare triple {29#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24#true} is VALID [2022-04-15 00:55:43,484 INFO L290 TraceCheckUtils]: 2: Hoare triple {24#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-15 00:55:43,484 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24#true} {24#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-15 00:55:43,484 INFO L272 TraceCheckUtils]: 4: Hoare triple {24#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-15 00:55:43,485 INFO L290 TraceCheckUtils]: 5: Hoare triple {24#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {24#true} is VALID [2022-04-15 00:55:43,485 INFO L290 TraceCheckUtils]: 6: Hoare triple {24#true} [59] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {25#false} is VALID [2022-04-15 00:55:43,486 INFO L290 TraceCheckUtils]: 7: Hoare triple {25#false} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {25#false} is VALID [2022-04-15 00:55:43,486 INFO L290 TraceCheckUtils]: 8: Hoare triple {25#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {25#false} is VALID [2022-04-15 00:55:43,487 INFO L272 TraceCheckUtils]: 9: Hoare triple {25#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {25#false} is VALID [2022-04-15 00:55:43,487 INFO L290 TraceCheckUtils]: 10: Hoare triple {25#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {25#false} is VALID [2022-04-15 00:55:43,487 INFO L290 TraceCheckUtils]: 11: Hoare triple {25#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {25#false} is VALID [2022-04-15 00:55:43,487 INFO L290 TraceCheckUtils]: 12: Hoare triple {25#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#false} is VALID [2022-04-15 00:55:43,488 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:43,488 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:55:43,489 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [620155773] [2022-04-15 00:55:43,490 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [620155773] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 00:55:43,490 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 00:55:43,490 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-15 00:55:43,491 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [726990372] [2022-04-15 00:55:43,492 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 00:55:43,495 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-15 00:55:43,496 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:55:43,498 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:43,516 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 13 edges. 13 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:43,516 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-15 00:55:43,516 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:55:43,530 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-15 00:55:43,531 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-15 00:55:43,533 INFO L87 Difference]: Start difference. First operand has 21 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:43,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:43,615 INFO L93 Difference]: Finished difference Result 35 states and 42 transitions. [2022-04-15 00:55:43,615 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-15 00:55:43,616 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-15 00:55:43,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:55:43,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:43,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 42 transitions. [2022-04-15 00:55:43,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:43,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 42 transitions. [2022-04-15 00:55:43,626 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 42 transitions. [2022-04-15 00:55:43,666 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:43,672 INFO L225 Difference]: With dead ends: 35 [2022-04-15 00:55:43,672 INFO L226 Difference]: Without dead ends: 14 [2022-04-15 00:55:43,674 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-15 00:55:43,679 INFO L913 BasicCegarLoop]: 21 mSDtfsCounter, 13 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 24 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 00:55:43,680 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [14 Valid, 24 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 00:55:43,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states. [2022-04-15 00:55:43,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2022-04-15 00:55:43,704 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:55:43,704 INFO L82 GeneralOperation]: Start isEquivalent. First operand 14 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:43,705 INFO L74 IsIncluded]: Start isIncluded. First operand 14 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:43,705 INFO L87 Difference]: Start difference. First operand 14 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:43,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:43,708 INFO L93 Difference]: Finished difference Result 14 states and 15 transitions. [2022-04-15 00:55:43,708 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 15 transitions. [2022-04-15 00:55:43,708 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:43,708 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:43,709 INFO L74 IsIncluded]: Start isIncluded. First operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 14 states. [2022-04-15 00:55:43,709 INFO L87 Difference]: Start difference. First operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 14 states. [2022-04-15 00:55:43,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:43,712 INFO L93 Difference]: Finished difference Result 14 states and 15 transitions. [2022-04-15 00:55:43,713 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 15 transitions. [2022-04-15 00:55:43,713 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:43,713 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:43,713 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:55:43,713 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:55:43,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:43,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 15 transitions. [2022-04-15 00:55:43,715 INFO L78 Accepts]: Start accepts. Automaton has 14 states and 15 transitions. Word has length 13 [2022-04-15 00:55:43,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:55:43,715 INFO L478 AbstractCegarLoop]: Abstraction has 14 states and 15 transitions. [2022-04-15 00:55:43,716 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:43,716 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 15 transitions. [2022-04-15 00:55:43,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-04-15 00:55:43,716 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:55:43,716 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:55:43,717 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-15 00:55:43,717 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:55:43,717 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:55:43,717 INFO L85 PathProgramCache]: Analyzing trace with hash 1920399339, now seen corresponding path program 1 times [2022-04-15 00:55:43,717 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:55:43,718 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [438052783] [2022-04-15 00:55:43,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:55:43,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:55:43,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:43,829 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:55:43,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:43,837 INFO L290 TraceCheckUtils]: 0: Hoare triple {136#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {128#true} is VALID [2022-04-15 00:55:43,837 INFO L290 TraceCheckUtils]: 1: Hoare triple {128#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {128#true} is VALID [2022-04-15 00:55:43,837 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {128#true} {128#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {128#true} is VALID [2022-04-15 00:55:43,838 INFO L272 TraceCheckUtils]: 0: Hoare triple {128#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {136#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:55:43,838 INFO L290 TraceCheckUtils]: 1: Hoare triple {136#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {128#true} is VALID [2022-04-15 00:55:43,838 INFO L290 TraceCheckUtils]: 2: Hoare triple {128#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {128#true} is VALID [2022-04-15 00:55:43,838 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {128#true} {128#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {128#true} is VALID [2022-04-15 00:55:43,839 INFO L272 TraceCheckUtils]: 4: Hoare triple {128#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {128#true} is VALID [2022-04-15 00:55:43,839 INFO L290 TraceCheckUtils]: 5: Hoare triple {128#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {133#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:55:43,840 INFO L290 TraceCheckUtils]: 6: Hoare triple {133#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {133#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:55:43,840 INFO L290 TraceCheckUtils]: 7: Hoare triple {133#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {133#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:55:43,841 INFO L290 TraceCheckUtils]: 8: Hoare triple {133#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {133#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:55:43,842 INFO L272 TraceCheckUtils]: 9: Hoare triple {133#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {134#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:55:43,842 INFO L290 TraceCheckUtils]: 10: Hoare triple {134#(not (= |__VERIFIER_assert_#in~cond| 0))} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {135#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:55:43,843 INFO L290 TraceCheckUtils]: 11: Hoare triple {135#(not (= __VERIFIER_assert_~cond 0))} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {129#false} is VALID [2022-04-15 00:55:43,843 INFO L290 TraceCheckUtils]: 12: Hoare triple {129#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {129#false} is VALID [2022-04-15 00:55:43,843 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:43,843 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:55:43,843 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [438052783] [2022-04-15 00:55:43,844 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [438052783] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 00:55:43,844 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 00:55:43,844 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-15 00:55:43,844 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1120613556] [2022-04-15 00:55:43,844 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 00:55:43,845 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.5) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-15 00:55:43,845 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:55:43,845 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 1.5) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:43,855 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 13 edges. 13 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:43,856 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-15 00:55:43,856 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:55:43,856 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-15 00:55:43,857 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-04-15 00:55:43,857 INFO L87 Difference]: Start difference. First operand 14 states and 15 transitions. Second operand has 6 states, 6 states have (on average 1.5) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:43,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:43,956 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2022-04-15 00:55:43,956 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-15 00:55:43,956 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.5) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-15 00:55:43,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:55:43,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.5) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:43,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 24 transitions. [2022-04-15 00:55:43,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.5) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:43,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 24 transitions. [2022-04-15 00:55:43,959 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 24 transitions. [2022-04-15 00:55:43,977 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:43,978 INFO L225 Difference]: With dead ends: 22 [2022-04-15 00:55:43,979 INFO L226 Difference]: Without dead ends: 17 [2022-04-15 00:55:43,979 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2022-04-15 00:55:43,980 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 14 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 00:55:43,980 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [14 Valid, 28 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 00:55:43,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-04-15 00:55:43,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-04-15 00:55:43,983 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:55:43,983 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:43,983 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:43,984 INFO L87 Difference]: Start difference. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:43,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:43,985 INFO L93 Difference]: Finished difference Result 17 states and 19 transitions. [2022-04-15 00:55:43,985 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions. [2022-04-15 00:55:43,985 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:43,985 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:43,985 INFO L74 IsIncluded]: Start isIncluded. First operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-15 00:55:43,986 INFO L87 Difference]: Start difference. First operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-15 00:55:43,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:43,987 INFO L93 Difference]: Finished difference Result 17 states and 19 transitions. [2022-04-15 00:55:43,987 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions. [2022-04-15 00:55:43,987 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:43,987 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:43,987 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:55:43,987 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:55:43,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:43,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 19 transitions. [2022-04-15 00:55:43,988 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 19 transitions. Word has length 13 [2022-04-15 00:55:43,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:55:43,989 INFO L478 AbstractCegarLoop]: Abstraction has 17 states and 19 transitions. [2022-04-15 00:55:43,989 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 1.5) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:43,989 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions. [2022-04-15 00:55:43,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-15 00:55:43,989 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:55:43,989 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:55:43,989 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-15 00:55:43,990 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:55:43,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:55:43,990 INFO L85 PathProgramCache]: Analyzing trace with hash -570442020, now seen corresponding path program 1 times [2022-04-15 00:55:43,990 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:55:43,990 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [707177113] [2022-04-15 00:55:43,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:55:43,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:55:44,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:44,023 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:55:44,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:44,029 INFO L290 TraceCheckUtils]: 0: Hoare triple {247#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {240#true} is VALID [2022-04-15 00:55:44,029 INFO L290 TraceCheckUtils]: 1: Hoare triple {240#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-15 00:55:44,030 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {240#true} {240#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-15 00:55:44,030 INFO L272 TraceCheckUtils]: 0: Hoare triple {240#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {247#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:55:44,030 INFO L290 TraceCheckUtils]: 1: Hoare triple {247#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {240#true} is VALID [2022-04-15 00:55:44,031 INFO L290 TraceCheckUtils]: 2: Hoare triple {240#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-15 00:55:44,031 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {240#true} {240#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-15 00:55:44,031 INFO L272 TraceCheckUtils]: 4: Hoare triple {240#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-15 00:55:44,031 INFO L290 TraceCheckUtils]: 5: Hoare triple {240#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {245#(= main_~y~0 0)} is VALID [2022-04-15 00:55:44,032 INFO L290 TraceCheckUtils]: 6: Hoare triple {245#(= main_~y~0 0)} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {245#(= main_~y~0 0)} is VALID [2022-04-15 00:55:44,032 INFO L290 TraceCheckUtils]: 7: Hoare triple {245#(= main_~y~0 0)} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {246#(= main_~z~0 0)} is VALID [2022-04-15 00:55:44,033 INFO L290 TraceCheckUtils]: 8: Hoare triple {246#(= main_~z~0 0)} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {241#false} is VALID [2022-04-15 00:55:44,033 INFO L290 TraceCheckUtils]: 9: Hoare triple {241#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {241#false} is VALID [2022-04-15 00:55:44,033 INFO L272 TraceCheckUtils]: 10: Hoare triple {241#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {241#false} is VALID [2022-04-15 00:55:44,033 INFO L290 TraceCheckUtils]: 11: Hoare triple {241#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {241#false} is VALID [2022-04-15 00:55:44,033 INFO L290 TraceCheckUtils]: 12: Hoare triple {241#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {241#false} is VALID [2022-04-15 00:55:44,034 INFO L290 TraceCheckUtils]: 13: Hoare triple {241#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241#false} is VALID [2022-04-15 00:55:44,034 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:44,034 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:55:44,034 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [707177113] [2022-04-15 00:55:44,034 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [707177113] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 00:55:44,034 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 00:55:44,035 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-15 00:55:44,035 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1652091795] [2022-04-15 00:55:44,035 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 00:55:44,035 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-15 00:55:44,035 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:55:44,036 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:44,045 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:44,045 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-15 00:55:44,045 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:55:44,045 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-15 00:55:44,046 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-15 00:55:44,046 INFO L87 Difference]: Start difference. First operand 17 states and 19 transitions. Second operand has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:44,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:44,103 INFO L93 Difference]: Finished difference Result 23 states and 25 transitions. [2022-04-15 00:55:44,103 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-15 00:55:44,103 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-15 00:55:44,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:55:44,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:44,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 25 transitions. [2022-04-15 00:55:44,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:44,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 25 transitions. [2022-04-15 00:55:44,106 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 25 transitions. [2022-04-15 00:55:44,124 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:44,125 INFO L225 Difference]: With dead ends: 23 [2022-04-15 00:55:44,125 INFO L226 Difference]: Without dead ends: 15 [2022-04-15 00:55:44,125 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-04-15 00:55:44,126 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 12 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 25 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 00:55:44,127 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [12 Valid, 25 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 00:55:44,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2022-04-15 00:55:44,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2022-04-15 00:55:44,129 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:55:44,129 INFO L82 GeneralOperation]: Start isEquivalent. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:44,129 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:44,129 INFO L87 Difference]: Start difference. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:44,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:44,130 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2022-04-15 00:55:44,130 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2022-04-15 00:55:44,131 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:44,131 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:44,131 INFO L74 IsIncluded]: Start isIncluded. First operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-15 00:55:44,131 INFO L87 Difference]: Start difference. First operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-15 00:55:44,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:44,132 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2022-04-15 00:55:44,132 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2022-04-15 00:55:44,132 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:44,132 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:44,133 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:55:44,133 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:55:44,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:44,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2022-04-15 00:55:44,133 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 16 transitions. Word has length 14 [2022-04-15 00:55:44,134 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:55:44,134 INFO L478 AbstractCegarLoop]: Abstraction has 15 states and 16 transitions. [2022-04-15 00:55:44,134 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:44,134 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2022-04-15 00:55:44,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-15 00:55:44,134 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:55:44,134 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:55:44,135 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-15 00:55:44,135 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:55:44,135 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:55:44,135 INFO L85 PathProgramCache]: Analyzing trace with hash -688526500, now seen corresponding path program 1 times [2022-04-15 00:55:44,135 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:55:44,136 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [787477758] [2022-04-15 00:55:44,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:55:44,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:55:44,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:44,209 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:55:44,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:44,217 INFO L290 TraceCheckUtils]: 0: Hoare triple {352#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {344#true} is VALID [2022-04-15 00:55:44,218 INFO L290 TraceCheckUtils]: 1: Hoare triple {344#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-15 00:55:44,218 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {344#true} {344#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-15 00:55:44,218 INFO L272 TraceCheckUtils]: 0: Hoare triple {344#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {352#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:55:44,219 INFO L290 TraceCheckUtils]: 1: Hoare triple {352#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {344#true} is VALID [2022-04-15 00:55:44,219 INFO L290 TraceCheckUtils]: 2: Hoare triple {344#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-15 00:55:44,219 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {344#true} {344#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-15 00:55:44,219 INFO L272 TraceCheckUtils]: 4: Hoare triple {344#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-15 00:55:44,220 INFO L290 TraceCheckUtils]: 5: Hoare triple {344#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {349#(= main_~y~0 0)} is VALID [2022-04-15 00:55:44,220 INFO L290 TraceCheckUtils]: 6: Hoare triple {349#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {350#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:55:44,221 INFO L290 TraceCheckUtils]: 7: Hoare triple {350#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {350#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:55:44,221 INFO L290 TraceCheckUtils]: 8: Hoare triple {350#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {351#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-15 00:55:44,222 INFO L290 TraceCheckUtils]: 9: Hoare triple {351#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {345#false} is VALID [2022-04-15 00:55:44,222 INFO L272 TraceCheckUtils]: 10: Hoare triple {345#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {345#false} is VALID [2022-04-15 00:55:44,222 INFO L290 TraceCheckUtils]: 11: Hoare triple {345#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {345#false} is VALID [2022-04-15 00:55:44,222 INFO L290 TraceCheckUtils]: 12: Hoare triple {345#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {345#false} is VALID [2022-04-15 00:55:44,223 INFO L290 TraceCheckUtils]: 13: Hoare triple {345#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {345#false} is VALID [2022-04-15 00:55:44,223 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:44,223 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:55:44,223 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [787477758] [2022-04-15 00:55:44,223 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [787477758] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:55:44,223 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [989275437] [2022-04-15 00:55:44,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:55:44,224 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:55:44,224 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:55:44,251 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:55:44,274 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-15 00:55:44,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:44,298 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-15 00:55:44,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:44,307 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:55:44,478 INFO L272 TraceCheckUtils]: 0: Hoare triple {344#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-15 00:55:44,479 INFO L290 TraceCheckUtils]: 1: Hoare triple {344#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {344#true} is VALID [2022-04-15 00:55:44,479 INFO L290 TraceCheckUtils]: 2: Hoare triple {344#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-15 00:55:44,479 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {344#true} {344#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-15 00:55:44,479 INFO L272 TraceCheckUtils]: 4: Hoare triple {344#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-15 00:55:44,480 INFO L290 TraceCheckUtils]: 5: Hoare triple {344#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {349#(= main_~y~0 0)} is VALID [2022-04-15 00:55:44,480 INFO L290 TraceCheckUtils]: 6: Hoare triple {349#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {350#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:55:44,481 INFO L290 TraceCheckUtils]: 7: Hoare triple {350#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {350#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:55:44,481 INFO L290 TraceCheckUtils]: 8: Hoare triple {350#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {380#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 00:55:44,482 INFO L290 TraceCheckUtils]: 9: Hoare triple {380#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {345#false} is VALID [2022-04-15 00:55:44,482 INFO L272 TraceCheckUtils]: 10: Hoare triple {345#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {345#false} is VALID [2022-04-15 00:55:44,482 INFO L290 TraceCheckUtils]: 11: Hoare triple {345#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {345#false} is VALID [2022-04-15 00:55:44,482 INFO L290 TraceCheckUtils]: 12: Hoare triple {345#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {345#false} is VALID [2022-04-15 00:55:44,482 INFO L290 TraceCheckUtils]: 13: Hoare triple {345#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {345#false} is VALID [2022-04-15 00:55:44,483 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:44,483 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:55:44,546 INFO L290 TraceCheckUtils]: 13: Hoare triple {345#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {345#false} is VALID [2022-04-15 00:55:44,546 INFO L290 TraceCheckUtils]: 12: Hoare triple {345#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {345#false} is VALID [2022-04-15 00:55:44,546 INFO L290 TraceCheckUtils]: 11: Hoare triple {345#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {345#false} is VALID [2022-04-15 00:55:44,546 INFO L272 TraceCheckUtils]: 10: Hoare triple {345#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {345#false} is VALID [2022-04-15 00:55:44,547 INFO L290 TraceCheckUtils]: 9: Hoare triple {408#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {345#false} is VALID [2022-04-15 00:55:44,547 INFO L290 TraceCheckUtils]: 8: Hoare triple {412#(< 0 (mod main_~y~0 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {408#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 00:55:44,547 INFO L290 TraceCheckUtils]: 7: Hoare triple {412#(< 0 (mod main_~y~0 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {412#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 00:55:44,548 INFO L290 TraceCheckUtils]: 6: Hoare triple {419#(< 0 (mod (+ main_~y~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {412#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 00:55:44,549 INFO L290 TraceCheckUtils]: 5: Hoare triple {344#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {419#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-15 00:55:44,549 INFO L272 TraceCheckUtils]: 4: Hoare triple {344#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-15 00:55:44,549 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {344#true} {344#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-15 00:55:44,549 INFO L290 TraceCheckUtils]: 2: Hoare triple {344#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-15 00:55:44,549 INFO L290 TraceCheckUtils]: 1: Hoare triple {344#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {344#true} is VALID [2022-04-15 00:55:44,550 INFO L272 TraceCheckUtils]: 0: Hoare triple {344#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-15 00:55:44,550 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:44,550 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [989275437] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:55:44,550 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:55:44,550 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 10 [2022-04-15 00:55:44,550 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1154902123] [2022-04-15 00:55:44,550 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:55:44,551 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 1.8) internal successors, (18), 9 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-15 00:55:44,551 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:55:44,551 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 1.8) internal successors, (18), 9 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:44,564 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:44,565 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-15 00:55:44,565 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:55:44,565 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-15 00:55:44,565 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-04-15 00:55:44,565 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. Second operand has 10 states, 10 states have (on average 1.8) internal successors, (18), 9 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:44,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:44,788 INFO L93 Difference]: Finished difference Result 35 states and 44 transitions. [2022-04-15 00:55:44,788 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-15 00:55:44,788 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 1.8) internal successors, (18), 9 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-15 00:55:44,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:55:44,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.8) internal successors, (18), 9 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:44,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 44 transitions. [2022-04-15 00:55:44,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.8) internal successors, (18), 9 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:44,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 44 transitions. [2022-04-15 00:55:44,791 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 44 transitions. [2022-04-15 00:55:44,828 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:44,829 INFO L225 Difference]: With dead ends: 35 [2022-04-15 00:55:44,829 INFO L226 Difference]: Without dead ends: 30 [2022-04-15 00:55:44,829 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 25 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=75, Invalid=197, Unknown=0, NotChecked=0, Total=272 [2022-04-15 00:55:44,830 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 35 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 56 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 56 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 00:55:44,830 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [35 Valid, 39 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 56 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 00:55:44,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-15 00:55:44,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 20. [2022-04-15 00:55:44,845 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:55:44,845 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:44,845 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:44,845 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:44,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:44,847 INFO L93 Difference]: Finished difference Result 30 states and 37 transitions. [2022-04-15 00:55:44,847 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 37 transitions. [2022-04-15 00:55:44,847 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:44,847 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:44,847 INFO L74 IsIncluded]: Start isIncluded. First operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 30 states. [2022-04-15 00:55:44,847 INFO L87 Difference]: Start difference. First operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 30 states. [2022-04-15 00:55:44,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:44,849 INFO L93 Difference]: Finished difference Result 30 states and 37 transitions. [2022-04-15 00:55:44,849 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 37 transitions. [2022-04-15 00:55:44,849 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:44,849 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:44,849 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:55:44,849 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:55:44,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:44,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2022-04-15 00:55:44,850 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 24 transitions. Word has length 14 [2022-04-15 00:55:44,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:55:44,850 INFO L478 AbstractCegarLoop]: Abstraction has 20 states and 24 transitions. [2022-04-15 00:55:44,851 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 1.8) internal successors, (18), 9 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:44,851 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 24 transitions. [2022-04-15 00:55:44,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-15 00:55:44,851 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:55:44,851 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:55:44,868 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-04-15 00:55:45,058 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:55:45,058 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:55:45,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:55:45,059 INFO L85 PathProgramCache]: Analyzing trace with hash 157235595, now seen corresponding path program 1 times [2022-04-15 00:55:45,059 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:55:45,059 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1635682618] [2022-04-15 00:55:45,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:55:45,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:55:45,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:45,204 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:55:45,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:45,209 INFO L290 TraceCheckUtils]: 0: Hoare triple {615#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {605#true} is VALID [2022-04-15 00:55:45,209 INFO L290 TraceCheckUtils]: 1: Hoare triple {605#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-15 00:55:45,209 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {605#true} {605#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-15 00:55:45,210 INFO L272 TraceCheckUtils]: 0: Hoare triple {605#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {615#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:55:45,210 INFO L290 TraceCheckUtils]: 1: Hoare triple {615#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {605#true} is VALID [2022-04-15 00:55:45,210 INFO L290 TraceCheckUtils]: 2: Hoare triple {605#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-15 00:55:45,210 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {605#true} {605#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-15 00:55:45,211 INFO L272 TraceCheckUtils]: 4: Hoare triple {605#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-15 00:55:45,211 INFO L290 TraceCheckUtils]: 5: Hoare triple {605#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {610#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:55:45,212 INFO L290 TraceCheckUtils]: 6: Hoare triple {610#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:55:45,212 INFO L290 TraceCheckUtils]: 7: Hoare triple {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:55:45,213 INFO L290 TraceCheckUtils]: 8: Hoare triple {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:55:45,213 INFO L290 TraceCheckUtils]: 9: Hoare triple {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {612#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 00:55:45,214 INFO L290 TraceCheckUtils]: 10: Hoare triple {612#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {612#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 00:55:45,215 INFO L272 TraceCheckUtils]: 11: Hoare triple {612#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {613#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:55:45,215 INFO L290 TraceCheckUtils]: 12: Hoare triple {613#(not (= |__VERIFIER_assert_#in~cond| 0))} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {614#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:55:45,216 INFO L290 TraceCheckUtils]: 13: Hoare triple {614#(not (= __VERIFIER_assert_~cond 0))} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {606#false} is VALID [2022-04-15 00:55:45,216 INFO L290 TraceCheckUtils]: 14: Hoare triple {606#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {606#false} is VALID [2022-04-15 00:55:45,216 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:45,216 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:55:45,216 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1635682618] [2022-04-15 00:55:45,216 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1635682618] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:55:45,217 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1586361117] [2022-04-15 00:55:45,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:55:45,217 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:55:45,217 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:55:45,218 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:55:45,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:45,258 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-15 00:55:45,259 INFO L263 TraceCheckSpWp]: Trace formula consists of 68 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-15 00:55:45,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:45,264 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:55:45,342 INFO L272 TraceCheckUtils]: 0: Hoare triple {605#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-15 00:55:45,342 INFO L290 TraceCheckUtils]: 1: Hoare triple {605#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {605#true} is VALID [2022-04-15 00:55:45,343 INFO L290 TraceCheckUtils]: 2: Hoare triple {605#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-15 00:55:45,343 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {605#true} {605#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-15 00:55:45,343 INFO L272 TraceCheckUtils]: 4: Hoare triple {605#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-15 00:55:45,343 INFO L290 TraceCheckUtils]: 5: Hoare triple {605#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {610#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:55:45,344 INFO L290 TraceCheckUtils]: 6: Hoare triple {610#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:55:45,344 INFO L290 TraceCheckUtils]: 7: Hoare triple {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:55:45,345 INFO L290 TraceCheckUtils]: 8: Hoare triple {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:55:45,345 INFO L290 TraceCheckUtils]: 9: Hoare triple {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {610#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:55:45,346 INFO L290 TraceCheckUtils]: 10: Hoare triple {610#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {610#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:55:45,347 INFO L272 TraceCheckUtils]: 11: Hoare triple {610#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {652#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:55:45,347 INFO L290 TraceCheckUtils]: 12: Hoare triple {652#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {656#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:55:45,347 INFO L290 TraceCheckUtils]: 13: Hoare triple {656#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {606#false} is VALID [2022-04-15 00:55:45,348 INFO L290 TraceCheckUtils]: 14: Hoare triple {606#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {606#false} is VALID [2022-04-15 00:55:45,348 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:45,348 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:55:45,449 INFO L290 TraceCheckUtils]: 14: Hoare triple {606#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {606#false} is VALID [2022-04-15 00:55:45,449 INFO L290 TraceCheckUtils]: 13: Hoare triple {656#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {606#false} is VALID [2022-04-15 00:55:45,450 INFO L290 TraceCheckUtils]: 12: Hoare triple {652#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {656#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:55:45,450 INFO L272 TraceCheckUtils]: 11: Hoare triple {672#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {652#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:55:45,454 INFO L290 TraceCheckUtils]: 10: Hoare triple {672#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {672#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:55:45,455 INFO L290 TraceCheckUtils]: 9: Hoare triple {679#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {672#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:55:45,456 INFO L290 TraceCheckUtils]: 8: Hoare triple {679#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {679#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 00:55:45,456 INFO L290 TraceCheckUtils]: 7: Hoare triple {679#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {679#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 00:55:45,457 INFO L290 TraceCheckUtils]: 6: Hoare triple {672#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {679#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 00:55:45,457 INFO L290 TraceCheckUtils]: 5: Hoare triple {605#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {672#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:55:45,458 INFO L272 TraceCheckUtils]: 4: Hoare triple {605#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-15 00:55:45,458 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {605#true} {605#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-15 00:55:45,458 INFO L290 TraceCheckUtils]: 2: Hoare triple {605#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-15 00:55:45,458 INFO L290 TraceCheckUtils]: 1: Hoare triple {605#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {605#true} is VALID [2022-04-15 00:55:45,458 INFO L272 TraceCheckUtils]: 0: Hoare triple {605#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-15 00:55:45,458 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:45,458 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1586361117] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:55:45,458 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:55:45,459 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 12 [2022-04-15 00:55:45,459 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [41901850] [2022-04-15 00:55:45,459 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:55:45,459 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-15 00:55:45,459 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:55:45,460 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:45,478 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:45,478 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-15 00:55:45,478 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:55:45,478 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-15 00:55:45,478 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2022-04-15 00:55:45,479 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. Second operand has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:45,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:45,679 INFO L93 Difference]: Finished difference Result 28 states and 32 transitions. [2022-04-15 00:55:45,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-15 00:55:45,680 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-15 00:55:45,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:55:45,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:45,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 26 transitions. [2022-04-15 00:55:45,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:45,682 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 26 transitions. [2022-04-15 00:55:45,682 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 26 transitions. [2022-04-15 00:55:45,698 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:45,698 INFO L225 Difference]: With dead ends: 28 [2022-04-15 00:55:45,699 INFO L226 Difference]: Without dead ends: 23 [2022-04-15 00:55:45,699 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 24 SyntacticMatches, 4 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=189, Unknown=0, NotChecked=0, Total=240 [2022-04-15 00:55:45,699 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 14 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 48 SdHoareTripleChecker+Invalid, 92 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 00:55:45,700 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [14 Valid, 48 Invalid, 92 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 00:55:45,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-04-15 00:55:45,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 22. [2022-04-15 00:55:45,718 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:55:45,718 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand has 22 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:45,718 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand has 22 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:45,718 INFO L87 Difference]: Start difference. First operand 23 states. Second operand has 22 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:45,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:45,719 INFO L93 Difference]: Finished difference Result 23 states and 27 transitions. [2022-04-15 00:55:45,719 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 27 transitions. [2022-04-15 00:55:45,719 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:45,719 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:45,720 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-15 00:55:45,720 INFO L87 Difference]: Start difference. First operand has 22 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-15 00:55:45,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:45,721 INFO L93 Difference]: Finished difference Result 23 states and 27 transitions. [2022-04-15 00:55:45,721 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 27 transitions. [2022-04-15 00:55:45,721 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:45,721 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:45,721 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:55:45,721 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:55:45,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:45,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 26 transitions. [2022-04-15 00:55:45,722 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 26 transitions. Word has length 15 [2022-04-15 00:55:45,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:55:45,722 INFO L478 AbstractCegarLoop]: Abstraction has 22 states and 26 transitions. [2022-04-15 00:55:45,722 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:45,722 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 26 transitions. [2022-04-15 00:55:45,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-15 00:55:45,723 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:55:45,723 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:55:45,758 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-15 00:55:45,923 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:55:45,924 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:55:45,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:55:45,924 INFO L85 PathProgramCache]: Analyzing trace with hash 606056764, now seen corresponding path program 2 times [2022-04-15 00:55:45,924 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:55:45,924 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [982683676] [2022-04-15 00:55:45,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:55:45,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:55:45,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:46,001 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:55:46,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:46,008 INFO L290 TraceCheckUtils]: 0: Hoare triple {853#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {844#true} is VALID [2022-04-15 00:55:46,008 INFO L290 TraceCheckUtils]: 1: Hoare triple {844#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-15 00:55:46,008 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {844#true} {844#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-15 00:55:46,010 INFO L272 TraceCheckUtils]: 0: Hoare triple {844#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {853#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:55:46,010 INFO L290 TraceCheckUtils]: 1: Hoare triple {853#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {844#true} is VALID [2022-04-15 00:55:46,010 INFO L290 TraceCheckUtils]: 2: Hoare triple {844#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-15 00:55:46,011 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {844#true} {844#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-15 00:55:46,011 INFO L272 TraceCheckUtils]: 4: Hoare triple {844#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-15 00:55:46,011 INFO L290 TraceCheckUtils]: 5: Hoare triple {844#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {849#(= main_~y~0 0)} is VALID [2022-04-15 00:55:46,011 INFO L290 TraceCheckUtils]: 6: Hoare triple {849#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {850#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:55:46,012 INFO L290 TraceCheckUtils]: 7: Hoare triple {850#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {850#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:55:46,012 INFO L290 TraceCheckUtils]: 8: Hoare triple {850#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {851#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 00:55:46,013 INFO L290 TraceCheckUtils]: 9: Hoare triple {851#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {852#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 00:55:46,013 INFO L290 TraceCheckUtils]: 10: Hoare triple {852#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {845#false} is VALID [2022-04-15 00:55:46,013 INFO L290 TraceCheckUtils]: 11: Hoare triple {845#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {845#false} is VALID [2022-04-15 00:55:46,013 INFO L272 TraceCheckUtils]: 12: Hoare triple {845#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {845#false} is VALID [2022-04-15 00:55:46,013 INFO L290 TraceCheckUtils]: 13: Hoare triple {845#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {845#false} is VALID [2022-04-15 00:55:46,014 INFO L290 TraceCheckUtils]: 14: Hoare triple {845#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {845#false} is VALID [2022-04-15 00:55:46,014 INFO L290 TraceCheckUtils]: 15: Hoare triple {845#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {845#false} is VALID [2022-04-15 00:55:46,014 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:46,014 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:55:46,014 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [982683676] [2022-04-15 00:55:46,014 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [982683676] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:55:46,014 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [999977166] [2022-04-15 00:55:46,014 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 00:55:46,014 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:55:46,014 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:55:46,029 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:55:46,072 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-15 00:55:46,085 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 00:55:46,085 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:55:46,086 INFO L263 TraceCheckSpWp]: Trace formula consists of 73 conjuncts, 11 conjunts are in the unsatisfiable core [2022-04-15 00:55:46,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:46,091 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:55:46,238 INFO L272 TraceCheckUtils]: 0: Hoare triple {844#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-15 00:55:46,238 INFO L290 TraceCheckUtils]: 1: Hoare triple {844#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {844#true} is VALID [2022-04-15 00:55:46,239 INFO L290 TraceCheckUtils]: 2: Hoare triple {844#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-15 00:55:46,239 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {844#true} {844#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-15 00:55:46,239 INFO L272 TraceCheckUtils]: 4: Hoare triple {844#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-15 00:55:46,239 INFO L290 TraceCheckUtils]: 5: Hoare triple {844#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {849#(= main_~y~0 0)} is VALID [2022-04-15 00:55:46,240 INFO L290 TraceCheckUtils]: 6: Hoare triple {849#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {850#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:55:46,241 INFO L290 TraceCheckUtils]: 7: Hoare triple {850#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {850#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:55:46,241 INFO L290 TraceCheckUtils]: 8: Hoare triple {850#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {851#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 00:55:46,241 INFO L290 TraceCheckUtils]: 9: Hoare triple {851#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {852#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 00:55:46,243 INFO L290 TraceCheckUtils]: 10: Hoare triple {852#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {887#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} is VALID [2022-04-15 00:55:46,243 INFO L290 TraceCheckUtils]: 11: Hoare triple {887#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {845#false} is VALID [2022-04-15 00:55:46,243 INFO L272 TraceCheckUtils]: 12: Hoare triple {845#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {845#false} is VALID [2022-04-15 00:55:46,243 INFO L290 TraceCheckUtils]: 13: Hoare triple {845#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {845#false} is VALID [2022-04-15 00:55:46,243 INFO L290 TraceCheckUtils]: 14: Hoare triple {845#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {845#false} is VALID [2022-04-15 00:55:46,243 INFO L290 TraceCheckUtils]: 15: Hoare triple {845#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {845#false} is VALID [2022-04-15 00:55:46,244 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:46,244 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:55:46,326 INFO L290 TraceCheckUtils]: 15: Hoare triple {845#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {845#false} is VALID [2022-04-15 00:55:46,326 INFO L290 TraceCheckUtils]: 14: Hoare triple {845#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {845#false} is VALID [2022-04-15 00:55:46,326 INFO L290 TraceCheckUtils]: 13: Hoare triple {845#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {845#false} is VALID [2022-04-15 00:55:46,326 INFO L272 TraceCheckUtils]: 12: Hoare triple {845#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {845#false} is VALID [2022-04-15 00:55:46,326 INFO L290 TraceCheckUtils]: 11: Hoare triple {915#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {845#false} is VALID [2022-04-15 00:55:46,327 INFO L290 TraceCheckUtils]: 10: Hoare triple {919#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {915#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 00:55:46,328 INFO L290 TraceCheckUtils]: 9: Hoare triple {923#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {919#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-15 00:55:46,328 INFO L290 TraceCheckUtils]: 8: Hoare triple {927#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {923#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-15 00:55:46,329 INFO L290 TraceCheckUtils]: 7: Hoare triple {927#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {927#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 00:55:46,329 INFO L290 TraceCheckUtils]: 6: Hoare triple {934#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {927#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 00:55:46,332 INFO L290 TraceCheckUtils]: 5: Hoare triple {844#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {934#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 00:55:46,332 INFO L272 TraceCheckUtils]: 4: Hoare triple {844#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-15 00:55:46,332 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {844#true} {844#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-15 00:55:46,332 INFO L290 TraceCheckUtils]: 2: Hoare triple {844#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-15 00:55:46,333 INFO L290 TraceCheckUtils]: 1: Hoare triple {844#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {844#true} is VALID [2022-04-15 00:55:46,333 INFO L272 TraceCheckUtils]: 0: Hoare triple {844#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-15 00:55:46,333 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:46,333 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [999977166] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:55:46,333 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:55:46,333 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2022-04-15 00:55:46,333 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [30855566] [2022-04-15 00:55:46,333 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:55:46,334 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 1.6923076923076923) internal successors, (22), 12 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-15 00:55:46,335 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:55:46,335 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 1.6923076923076923) internal successors, (22), 12 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:46,351 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:46,351 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-15 00:55:46,353 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:55:46,353 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-15 00:55:46,353 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2022-04-15 00:55:46,353 INFO L87 Difference]: Start difference. First operand 22 states and 26 transitions. Second operand has 13 states, 13 states have (on average 1.6923076923076923) internal successors, (22), 12 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:46,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:46,818 INFO L93 Difference]: Finished difference Result 38 states and 47 transitions. [2022-04-15 00:55:46,819 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-04-15 00:55:46,819 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 1.6923076923076923) internal successors, (22), 12 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-15 00:55:46,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:55:46,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 1.6923076923076923) internal successors, (22), 12 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:46,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 47 transitions. [2022-04-15 00:55:46,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 1.6923076923076923) internal successors, (22), 12 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:46,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 47 transitions. [2022-04-15 00:55:46,822 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 17 states and 47 transitions. [2022-04-15 00:55:46,861 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:46,862 INFO L225 Difference]: With dead ends: 38 [2022-04-15 00:55:46,862 INFO L226 Difference]: Without dead ends: 29 [2022-04-15 00:55:46,862 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 27 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=135, Invalid=567, Unknown=0, NotChecked=0, Total=702 [2022-04-15 00:55:46,863 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 28 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 104 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 46 SdHoareTripleChecker+Invalid, 133 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 104 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 00:55:46,863 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [28 Valid, 46 Invalid, 133 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 104 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 00:55:46,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2022-04-15 00:55:46,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 24. [2022-04-15 00:55:46,893 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:55:46,894 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand has 24 states, 19 states have (on average 1.263157894736842) internal successors, (24), 19 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:46,894 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand has 24 states, 19 states have (on average 1.263157894736842) internal successors, (24), 19 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:46,894 INFO L87 Difference]: Start difference. First operand 29 states. Second operand has 24 states, 19 states have (on average 1.263157894736842) internal successors, (24), 19 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:46,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:46,896 INFO L93 Difference]: Finished difference Result 29 states and 35 transitions. [2022-04-15 00:55:46,896 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 35 transitions. [2022-04-15 00:55:46,897 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:46,897 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:46,897 INFO L74 IsIncluded]: Start isIncluded. First operand has 24 states, 19 states have (on average 1.263157894736842) internal successors, (24), 19 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-15 00:55:46,897 INFO L87 Difference]: Start difference. First operand has 24 states, 19 states have (on average 1.263157894736842) internal successors, (24), 19 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-15 00:55:46,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:46,899 INFO L93 Difference]: Finished difference Result 29 states and 35 transitions. [2022-04-15 00:55:46,899 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 35 transitions. [2022-04-15 00:55:46,900 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:46,900 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:46,901 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:55:46,901 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:55:46,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 19 states have (on average 1.263157894736842) internal successors, (24), 19 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:46,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 28 transitions. [2022-04-15 00:55:46,901 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 28 transitions. Word has length 16 [2022-04-15 00:55:46,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:55:46,902 INFO L478 AbstractCegarLoop]: Abstraction has 24 states and 28 transitions. [2022-04-15 00:55:46,902 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 1.6923076923076923) internal successors, (22), 12 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:46,902 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 28 transitions. [2022-04-15 00:55:46,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-15 00:55:46,902 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:55:46,902 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:55:46,927 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-15 00:55:47,118 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:55:47,119 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:55:47,119 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:55:47,119 INFO L85 PathProgramCache]: Analyzing trace with hash -175424469, now seen corresponding path program 3 times [2022-04-15 00:55:47,119 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:55:47,119 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1201669883] [2022-04-15 00:55:47,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:55:47,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:55:47,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:47,253 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:55:47,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:47,258 INFO L290 TraceCheckUtils]: 0: Hoare triple {1156#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1145#true} is VALID [2022-04-15 00:55:47,258 INFO L290 TraceCheckUtils]: 1: Hoare triple {1145#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-15 00:55:47,259 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1145#true} {1145#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-15 00:55:47,259 INFO L272 TraceCheckUtils]: 0: Hoare triple {1145#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1156#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:55:47,259 INFO L290 TraceCheckUtils]: 1: Hoare triple {1156#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1145#true} is VALID [2022-04-15 00:55:47,259 INFO L290 TraceCheckUtils]: 2: Hoare triple {1145#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-15 00:55:47,259 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1145#true} {1145#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-15 00:55:47,259 INFO L272 TraceCheckUtils]: 4: Hoare triple {1145#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-15 00:55:47,263 INFO L290 TraceCheckUtils]: 5: Hoare triple {1145#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1150#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:55:47,263 INFO L290 TraceCheckUtils]: 6: Hoare triple {1150#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1151#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:55:47,264 INFO L290 TraceCheckUtils]: 7: Hoare triple {1151#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:55:47,264 INFO L290 TraceCheckUtils]: 8: Hoare triple {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:55:47,264 INFO L290 TraceCheckUtils]: 9: Hoare triple {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:55:47,265 INFO L290 TraceCheckUtils]: 10: Hoare triple {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1151#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:55:47,266 INFO L290 TraceCheckUtils]: 11: Hoare triple {1151#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1153#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 00:55:47,267 INFO L290 TraceCheckUtils]: 12: Hoare triple {1153#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {1153#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 00:55:47,267 INFO L272 TraceCheckUtils]: 13: Hoare triple {1153#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1154#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:55:47,268 INFO L290 TraceCheckUtils]: 14: Hoare triple {1154#(not (= |__VERIFIER_assert_#in~cond| 0))} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1155#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:55:47,268 INFO L290 TraceCheckUtils]: 15: Hoare triple {1155#(not (= __VERIFIER_assert_~cond 0))} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1146#false} is VALID [2022-04-15 00:55:47,268 INFO L290 TraceCheckUtils]: 16: Hoare triple {1146#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1146#false} is VALID [2022-04-15 00:55:47,268 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:47,268 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:55:47,269 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1201669883] [2022-04-15 00:55:47,269 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1201669883] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:55:47,269 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1921857206] [2022-04-15 00:55:47,269 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-15 00:55:47,269 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:55:47,269 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:55:47,273 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:55:47,274 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-15 00:55:47,315 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-04-15 00:55:47,315 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:55:47,317 INFO L263 TraceCheckSpWp]: Trace formula consists of 78 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-15 00:55:47,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:47,324 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:55:47,420 INFO L272 TraceCheckUtils]: 0: Hoare triple {1145#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-15 00:55:47,420 INFO L290 TraceCheckUtils]: 1: Hoare triple {1145#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1145#true} is VALID [2022-04-15 00:55:47,420 INFO L290 TraceCheckUtils]: 2: Hoare triple {1145#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-15 00:55:47,420 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1145#true} {1145#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-15 00:55:47,421 INFO L272 TraceCheckUtils]: 4: Hoare triple {1145#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-15 00:55:47,421 INFO L290 TraceCheckUtils]: 5: Hoare triple {1145#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1150#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:55:47,422 INFO L290 TraceCheckUtils]: 6: Hoare triple {1150#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1151#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:55:47,422 INFO L290 TraceCheckUtils]: 7: Hoare triple {1151#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:55:47,423 INFO L290 TraceCheckUtils]: 8: Hoare triple {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:55:47,423 INFO L290 TraceCheckUtils]: 9: Hoare triple {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:55:47,424 INFO L290 TraceCheckUtils]: 10: Hoare triple {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1151#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:55:47,424 INFO L290 TraceCheckUtils]: 11: Hoare triple {1151#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1150#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:55:47,425 INFO L290 TraceCheckUtils]: 12: Hoare triple {1150#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {1150#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:55:47,425 INFO L272 TraceCheckUtils]: 13: Hoare triple {1150#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1199#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:55:47,426 INFO L290 TraceCheckUtils]: 14: Hoare triple {1199#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1203#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:55:47,426 INFO L290 TraceCheckUtils]: 15: Hoare triple {1203#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1146#false} is VALID [2022-04-15 00:55:47,426 INFO L290 TraceCheckUtils]: 16: Hoare triple {1146#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1146#false} is VALID [2022-04-15 00:55:47,426 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:47,426 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:55:47,530 INFO L290 TraceCheckUtils]: 16: Hoare triple {1146#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1146#false} is VALID [2022-04-15 00:55:47,531 INFO L290 TraceCheckUtils]: 15: Hoare triple {1203#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1146#false} is VALID [2022-04-15 00:55:47,531 INFO L290 TraceCheckUtils]: 14: Hoare triple {1199#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1203#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:55:47,532 INFO L272 TraceCheckUtils]: 13: Hoare triple {1219#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1199#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:55:47,532 INFO L290 TraceCheckUtils]: 12: Hoare triple {1219#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {1219#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:55:47,534 INFO L290 TraceCheckUtils]: 11: Hoare triple {1226#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1219#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:55:47,535 INFO L290 TraceCheckUtils]: 10: Hoare triple {1230#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1226#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 00:55:47,535 INFO L290 TraceCheckUtils]: 9: Hoare triple {1230#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1230#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 00:55:47,536 INFO L290 TraceCheckUtils]: 8: Hoare triple {1230#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {1230#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 00:55:47,536 INFO L290 TraceCheckUtils]: 7: Hoare triple {1226#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1230#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 00:55:47,537 INFO L290 TraceCheckUtils]: 6: Hoare triple {1219#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1226#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 00:55:47,538 INFO L290 TraceCheckUtils]: 5: Hoare triple {1145#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1219#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:55:47,538 INFO L272 TraceCheckUtils]: 4: Hoare triple {1145#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-15 00:55:47,538 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1145#true} {1145#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-15 00:55:47,538 INFO L290 TraceCheckUtils]: 2: Hoare triple {1145#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-15 00:55:47,538 INFO L290 TraceCheckUtils]: 1: Hoare triple {1145#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1145#true} is VALID [2022-04-15 00:55:47,538 INFO L272 TraceCheckUtils]: 0: Hoare triple {1145#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-15 00:55:47,538 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:47,538 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1921857206] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:55:47,538 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:55:47,539 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7, 7] total 14 [2022-04-15 00:55:47,539 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1451056713] [2022-04-15 00:55:47,539 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:55:47,539 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-15 00:55:47,539 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:55:47,539 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:47,564 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:47,564 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-15 00:55:47,564 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:55:47,565 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-15 00:55:47,565 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2022-04-15 00:55:47,565 INFO L87 Difference]: Start difference. First operand 24 states and 28 transitions. Second operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:47,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:47,904 INFO L93 Difference]: Finished difference Result 31 states and 35 transitions. [2022-04-15 00:55:47,904 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-15 00:55:47,905 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-15 00:55:47,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:55:47,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:47,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 28 transitions. [2022-04-15 00:55:47,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:47,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 28 transitions. [2022-04-15 00:55:47,906 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 28 transitions. [2022-04-15 00:55:47,936 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:47,937 INFO L225 Difference]: With dead ends: 31 [2022-04-15 00:55:47,937 INFO L226 Difference]: Without dead ends: 26 [2022-04-15 00:55:47,937 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 28 SyntacticMatches, 4 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=281, Unknown=0, NotChecked=0, Total=342 [2022-04-15 00:55:47,937 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 14 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 126 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 58 SdHoareTripleChecker+Invalid, 135 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 00:55:47,938 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [14 Valid, 58 Invalid, 135 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 126 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 00:55:47,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2022-04-15 00:55:47,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 25. [2022-04-15 00:55:47,994 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:55:47,994 INFO L82 GeneralOperation]: Start isEquivalent. First operand 26 states. Second operand has 25 states, 20 states have (on average 1.25) internal successors, (25), 20 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:47,994 INFO L74 IsIncluded]: Start isIncluded. First operand 26 states. Second operand has 25 states, 20 states have (on average 1.25) internal successors, (25), 20 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:47,994 INFO L87 Difference]: Start difference. First operand 26 states. Second operand has 25 states, 20 states have (on average 1.25) internal successors, (25), 20 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:47,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:47,995 INFO L93 Difference]: Finished difference Result 26 states and 30 transitions. [2022-04-15 00:55:47,995 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 30 transitions. [2022-04-15 00:55:47,995 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:47,995 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:47,995 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 20 states have (on average 1.25) internal successors, (25), 20 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-15 00:55:47,996 INFO L87 Difference]: Start difference. First operand has 25 states, 20 states have (on average 1.25) internal successors, (25), 20 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-15 00:55:48,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:48,012 INFO L93 Difference]: Finished difference Result 26 states and 30 transitions. [2022-04-15 00:55:48,012 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 30 transitions. [2022-04-15 00:55:48,012 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:48,012 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:48,012 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:55:48,012 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:55:48,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 20 states have (on average 1.25) internal successors, (25), 20 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:48,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2022-04-15 00:55:48,013 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 29 transitions. Word has length 17 [2022-04-15 00:55:48,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:55:48,013 INFO L478 AbstractCegarLoop]: Abstraction has 25 states and 29 transitions. [2022-04-15 00:55:48,013 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:48,013 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 29 transitions. [2022-04-15 00:55:48,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-15 00:55:48,014 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:55:48,014 INFO L499 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:55:48,032 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-15 00:55:48,227 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:55:48,227 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:55:48,228 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:55:48,228 INFO L85 PathProgramCache]: Analyzing trace with hash 458923947, now seen corresponding path program 4 times [2022-04-15 00:55:48,228 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:55:48,228 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1543508401] [2022-04-15 00:55:48,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:55:48,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:55:48,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:48,328 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:55:48,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:48,340 INFO L290 TraceCheckUtils]: 0: Hoare triple {1429#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1418#true} is VALID [2022-04-15 00:55:48,341 INFO L290 TraceCheckUtils]: 1: Hoare triple {1418#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-15 00:55:48,343 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1418#true} {1418#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-15 00:55:48,344 INFO L272 TraceCheckUtils]: 0: Hoare triple {1418#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1429#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:55:48,345 INFO L290 TraceCheckUtils]: 1: Hoare triple {1429#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1418#true} is VALID [2022-04-15 00:55:48,345 INFO L290 TraceCheckUtils]: 2: Hoare triple {1418#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-15 00:55:48,345 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1418#true} {1418#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-15 00:55:48,345 INFO L272 TraceCheckUtils]: 4: Hoare triple {1418#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-15 00:55:48,349 INFO L290 TraceCheckUtils]: 5: Hoare triple {1418#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1423#(= main_~y~0 0)} is VALID [2022-04-15 00:55:48,350 INFO L290 TraceCheckUtils]: 6: Hoare triple {1423#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1424#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:55:48,351 INFO L290 TraceCheckUtils]: 7: Hoare triple {1424#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1425#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:55:48,351 INFO L290 TraceCheckUtils]: 8: Hoare triple {1425#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1426#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:55:48,351 INFO L290 TraceCheckUtils]: 9: Hoare triple {1426#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {1426#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:55:48,352 INFO L290 TraceCheckUtils]: 10: Hoare triple {1426#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1427#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 00:55:48,352 INFO L290 TraceCheckUtils]: 11: Hoare triple {1427#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1428#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-15 00:55:48,353 INFO L290 TraceCheckUtils]: 12: Hoare triple {1428#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {1419#false} is VALID [2022-04-15 00:55:48,353 INFO L272 TraceCheckUtils]: 13: Hoare triple {1419#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1419#false} is VALID [2022-04-15 00:55:48,353 INFO L290 TraceCheckUtils]: 14: Hoare triple {1419#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1419#false} is VALID [2022-04-15 00:55:48,353 INFO L290 TraceCheckUtils]: 15: Hoare triple {1419#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1419#false} is VALID [2022-04-15 00:55:48,353 INFO L290 TraceCheckUtils]: 16: Hoare triple {1419#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1419#false} is VALID [2022-04-15 00:55:48,353 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:48,353 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:55:48,353 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1543508401] [2022-04-15 00:55:48,354 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1543508401] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:55:48,354 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1625053365] [2022-04-15 00:55:48,354 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 00:55:48,354 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:55:48,354 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:55:48,367 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:55:48,412 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-15 00:55:48,441 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 00:55:48,441 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:55:48,441 INFO L263 TraceCheckSpWp]: Trace formula consists of 78 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-15 00:55:48,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:48,451 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:55:48,602 INFO L272 TraceCheckUtils]: 0: Hoare triple {1418#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-15 00:55:48,602 INFO L290 TraceCheckUtils]: 1: Hoare triple {1418#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1418#true} is VALID [2022-04-15 00:55:48,602 INFO L290 TraceCheckUtils]: 2: Hoare triple {1418#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-15 00:55:48,602 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1418#true} {1418#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-15 00:55:48,602 INFO L272 TraceCheckUtils]: 4: Hoare triple {1418#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-15 00:55:48,603 INFO L290 TraceCheckUtils]: 5: Hoare triple {1418#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1423#(= main_~y~0 0)} is VALID [2022-04-15 00:55:48,603 INFO L290 TraceCheckUtils]: 6: Hoare triple {1423#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1424#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:55:48,603 INFO L290 TraceCheckUtils]: 7: Hoare triple {1424#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1425#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:55:48,604 INFO L290 TraceCheckUtils]: 8: Hoare triple {1425#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1426#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:55:48,604 INFO L290 TraceCheckUtils]: 9: Hoare triple {1426#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {1426#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:55:48,605 INFO L290 TraceCheckUtils]: 10: Hoare triple {1426#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1427#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 00:55:48,605 INFO L290 TraceCheckUtils]: 11: Hoare triple {1427#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1466#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 00:55:48,606 INFO L290 TraceCheckUtils]: 12: Hoare triple {1466#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {1419#false} is VALID [2022-04-15 00:55:48,606 INFO L272 TraceCheckUtils]: 13: Hoare triple {1419#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1419#false} is VALID [2022-04-15 00:55:48,606 INFO L290 TraceCheckUtils]: 14: Hoare triple {1419#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1419#false} is VALID [2022-04-15 00:55:48,606 INFO L290 TraceCheckUtils]: 15: Hoare triple {1419#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1419#false} is VALID [2022-04-15 00:55:48,606 INFO L290 TraceCheckUtils]: 16: Hoare triple {1419#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1419#false} is VALID [2022-04-15 00:55:48,606 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:48,606 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:55:48,718 INFO L290 TraceCheckUtils]: 16: Hoare triple {1419#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1419#false} is VALID [2022-04-15 00:55:48,719 INFO L290 TraceCheckUtils]: 15: Hoare triple {1419#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1419#false} is VALID [2022-04-15 00:55:48,719 INFO L290 TraceCheckUtils]: 14: Hoare triple {1419#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1419#false} is VALID [2022-04-15 00:55:48,719 INFO L272 TraceCheckUtils]: 13: Hoare triple {1419#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1419#false} is VALID [2022-04-15 00:55:48,719 INFO L290 TraceCheckUtils]: 12: Hoare triple {1494#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {1419#false} is VALID [2022-04-15 00:55:48,720 INFO L290 TraceCheckUtils]: 11: Hoare triple {1498#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1494#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 00:55:48,720 INFO L290 TraceCheckUtils]: 10: Hoare triple {1502#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1498#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-15 00:55:48,721 INFO L290 TraceCheckUtils]: 9: Hoare triple {1502#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {1502#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 00:55:48,721 INFO L290 TraceCheckUtils]: 8: Hoare triple {1509#(< 0 (mod main_~y~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1502#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 00:55:48,722 INFO L290 TraceCheckUtils]: 7: Hoare triple {1513#(< 0 (mod (+ main_~y~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1509#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 00:55:48,722 INFO L290 TraceCheckUtils]: 6: Hoare triple {1517#(< 0 (mod (+ main_~y~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1513#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-15 00:55:48,723 INFO L290 TraceCheckUtils]: 5: Hoare triple {1418#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1517#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-15 00:55:48,723 INFO L272 TraceCheckUtils]: 4: Hoare triple {1418#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-15 00:55:48,723 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1418#true} {1418#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-15 00:55:48,723 INFO L290 TraceCheckUtils]: 2: Hoare triple {1418#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-15 00:55:48,723 INFO L290 TraceCheckUtils]: 1: Hoare triple {1418#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1418#true} is VALID [2022-04-15 00:55:48,723 INFO L272 TraceCheckUtils]: 0: Hoare triple {1418#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-15 00:55:48,723 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:48,724 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1625053365] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:55:48,724 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:55:48,724 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 16 [2022-04-15 00:55:48,724 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1305936832] [2022-04-15 00:55:48,724 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:55:48,725 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.5) internal successors, (24), 15 states have internal predecessors, (24), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-15 00:55:48,725 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:55:48,725 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 1.5) internal successors, (24), 15 states have internal predecessors, (24), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:48,751 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:48,751 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-15 00:55:48,751 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:55:48,751 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-15 00:55:48,751 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=189, Unknown=0, NotChecked=0, Total=240 [2022-04-15 00:55:48,752 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. Second operand has 16 states, 16 states have (on average 1.5) internal successors, (24), 15 states have internal predecessors, (24), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:49,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:49,924 INFO L93 Difference]: Finished difference Result 59 states and 80 transitions. [2022-04-15 00:55:49,924 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-04-15 00:55:49,925 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.5) internal successors, (24), 15 states have internal predecessors, (24), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-15 00:55:49,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:55:49,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.5) internal successors, (24), 15 states have internal predecessors, (24), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:49,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 79 transitions. [2022-04-15 00:55:49,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.5) internal successors, (24), 15 states have internal predecessors, (24), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:49,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 79 transitions. [2022-04-15 00:55:49,928 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 30 states and 79 transitions. [2022-04-15 00:55:50,002 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 79 edges. 79 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:50,003 INFO L225 Difference]: With dead ends: 59 [2022-04-15 00:55:50,003 INFO L226 Difference]: Without dead ends: 54 [2022-04-15 00:55:50,004 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 28 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 397 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=434, Invalid=1372, Unknown=0, NotChecked=0, Total=1806 [2022-04-15 00:55:50,004 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 93 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 84 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 93 SdHoareTripleChecker+Valid, 47 SdHoareTripleChecker+Invalid, 216 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 84 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 00:55:50,004 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [93 Valid, 47 Invalid, 216 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [84 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-15 00:55:50,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2022-04-15 00:55:50,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 29. [2022-04-15 00:55:50,056 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:55:50,056 INFO L82 GeneralOperation]: Start isEquivalent. First operand 54 states. Second operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:50,056 INFO L74 IsIncluded]: Start isIncluded. First operand 54 states. Second operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:50,056 INFO L87 Difference]: Start difference. First operand 54 states. Second operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:50,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:50,059 INFO L93 Difference]: Finished difference Result 54 states and 68 transitions. [2022-04-15 00:55:50,059 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 68 transitions. [2022-04-15 00:55:50,060 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:50,060 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:50,060 INFO L74 IsIncluded]: Start isIncluded. First operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 54 states. [2022-04-15 00:55:50,060 INFO L87 Difference]: Start difference. First operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 54 states. [2022-04-15 00:55:50,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:50,062 INFO L93 Difference]: Finished difference Result 54 states and 68 transitions. [2022-04-15 00:55:50,062 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 68 transitions. [2022-04-15 00:55:50,062 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:50,062 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:50,062 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:55:50,062 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:55:50,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:50,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 37 transitions. [2022-04-15 00:55:50,063 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 37 transitions. Word has length 17 [2022-04-15 00:55:50,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:55:50,063 INFO L478 AbstractCegarLoop]: Abstraction has 29 states and 37 transitions. [2022-04-15 00:55:50,063 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 1.5) internal successors, (24), 15 states have internal predecessors, (24), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:50,063 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 37 transitions. [2022-04-15 00:55:50,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-15 00:55:50,064 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:55:50,064 INFO L499 BasicCegarLoop]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:55:50,082 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-15 00:55:50,282 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:55:50,282 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:55:50,283 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:55:50,283 INFO L85 PathProgramCache]: Analyzing trace with hash -1116470628, now seen corresponding path program 5 times [2022-04-15 00:55:50,283 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:55:50,283 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1324929847] [2022-04-15 00:55:50,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:55:50,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:55:50,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:50,351 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:55:50,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:50,355 INFO L290 TraceCheckUtils]: 0: Hoare triple {1863#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1852#true} is VALID [2022-04-15 00:55:50,355 INFO L290 TraceCheckUtils]: 1: Hoare triple {1852#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-15 00:55:50,356 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1852#true} {1852#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-15 00:55:50,356 INFO L272 TraceCheckUtils]: 0: Hoare triple {1852#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1863#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:55:50,356 INFO L290 TraceCheckUtils]: 1: Hoare triple {1863#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1852#true} is VALID [2022-04-15 00:55:50,356 INFO L290 TraceCheckUtils]: 2: Hoare triple {1852#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-15 00:55:50,356 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1852#true} {1852#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-15 00:55:50,356 INFO L272 TraceCheckUtils]: 4: Hoare triple {1852#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-15 00:55:50,357 INFO L290 TraceCheckUtils]: 5: Hoare triple {1852#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1857#(= main_~y~0 0)} is VALID [2022-04-15 00:55:50,357 INFO L290 TraceCheckUtils]: 6: Hoare triple {1857#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1858#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:55:50,358 INFO L290 TraceCheckUtils]: 7: Hoare triple {1858#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1859#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:55:50,358 INFO L290 TraceCheckUtils]: 8: Hoare triple {1859#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {1859#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:55:50,358 INFO L290 TraceCheckUtils]: 9: Hoare triple {1859#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1860#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 00:55:50,359 INFO L290 TraceCheckUtils]: 10: Hoare triple {1860#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1861#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 00:55:50,359 INFO L290 TraceCheckUtils]: 11: Hoare triple {1861#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1862#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 00:55:50,360 INFO L290 TraceCheckUtils]: 12: Hoare triple {1862#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1853#false} is VALID [2022-04-15 00:55:50,360 INFO L290 TraceCheckUtils]: 13: Hoare triple {1853#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {1853#false} is VALID [2022-04-15 00:55:50,360 INFO L272 TraceCheckUtils]: 14: Hoare triple {1853#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1853#false} is VALID [2022-04-15 00:55:50,360 INFO L290 TraceCheckUtils]: 15: Hoare triple {1853#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1853#false} is VALID [2022-04-15 00:55:50,360 INFO L290 TraceCheckUtils]: 16: Hoare triple {1853#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1853#false} is VALID [2022-04-15 00:55:50,360 INFO L290 TraceCheckUtils]: 17: Hoare triple {1853#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1853#false} is VALID [2022-04-15 00:55:50,360 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:50,361 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:55:50,361 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1324929847] [2022-04-15 00:55:50,361 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1324929847] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:55:50,361 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1491371589] [2022-04-15 00:55:50,361 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-15 00:55:50,361 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:55:50,361 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:55:50,386 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:55:50,415 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-15 00:55:50,450 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2022-04-15 00:55:50,450 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:55:50,452 INFO L263 TraceCheckSpWp]: Trace formula consists of 83 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-15 00:55:50,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:50,456 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:55:50,620 INFO L272 TraceCheckUtils]: 0: Hoare triple {1852#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-15 00:55:50,620 INFO L290 TraceCheckUtils]: 1: Hoare triple {1852#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1852#true} is VALID [2022-04-15 00:55:50,620 INFO L290 TraceCheckUtils]: 2: Hoare triple {1852#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-15 00:55:50,621 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1852#true} {1852#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-15 00:55:50,621 INFO L272 TraceCheckUtils]: 4: Hoare triple {1852#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-15 00:55:50,621 INFO L290 TraceCheckUtils]: 5: Hoare triple {1852#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1857#(= main_~y~0 0)} is VALID [2022-04-15 00:55:50,621 INFO L290 TraceCheckUtils]: 6: Hoare triple {1857#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1858#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:55:50,622 INFO L290 TraceCheckUtils]: 7: Hoare triple {1858#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1859#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:55:50,622 INFO L290 TraceCheckUtils]: 8: Hoare triple {1859#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {1859#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:55:50,623 INFO L290 TraceCheckUtils]: 9: Hoare triple {1859#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1860#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 00:55:50,623 INFO L290 TraceCheckUtils]: 10: Hoare triple {1860#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1861#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 00:55:50,624 INFO L290 TraceCheckUtils]: 11: Hoare triple {1861#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1862#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 00:55:50,624 INFO L290 TraceCheckUtils]: 12: Hoare triple {1862#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1903#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} is VALID [2022-04-15 00:55:50,625 INFO L290 TraceCheckUtils]: 13: Hoare triple {1903#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {1853#false} is VALID [2022-04-15 00:55:50,625 INFO L272 TraceCheckUtils]: 14: Hoare triple {1853#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1853#false} is VALID [2022-04-15 00:55:50,625 INFO L290 TraceCheckUtils]: 15: Hoare triple {1853#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1853#false} is VALID [2022-04-15 00:55:50,625 INFO L290 TraceCheckUtils]: 16: Hoare triple {1853#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1853#false} is VALID [2022-04-15 00:55:50,625 INFO L290 TraceCheckUtils]: 17: Hoare triple {1853#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1853#false} is VALID [2022-04-15 00:55:50,625 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:50,625 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:55:50,746 INFO L290 TraceCheckUtils]: 17: Hoare triple {1853#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1853#false} is VALID [2022-04-15 00:55:50,746 INFO L290 TraceCheckUtils]: 16: Hoare triple {1853#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1853#false} is VALID [2022-04-15 00:55:50,746 INFO L290 TraceCheckUtils]: 15: Hoare triple {1853#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1853#false} is VALID [2022-04-15 00:55:50,746 INFO L272 TraceCheckUtils]: 14: Hoare triple {1853#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1853#false} is VALID [2022-04-15 00:55:50,746 INFO L290 TraceCheckUtils]: 13: Hoare triple {1931#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {1853#false} is VALID [2022-04-15 00:55:50,747 INFO L290 TraceCheckUtils]: 12: Hoare triple {1935#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1931#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 00:55:50,748 INFO L290 TraceCheckUtils]: 11: Hoare triple {1939#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1935#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-15 00:55:50,749 INFO L290 TraceCheckUtils]: 10: Hoare triple {1943#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1939#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-15 00:55:50,749 INFO L290 TraceCheckUtils]: 9: Hoare triple {1947#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1943#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-15 00:55:50,749 INFO L290 TraceCheckUtils]: 8: Hoare triple {1947#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {1947#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 00:55:50,750 INFO L290 TraceCheckUtils]: 7: Hoare triple {1954#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1947#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 00:55:50,751 INFO L290 TraceCheckUtils]: 6: Hoare triple {1958#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1954#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 00:55:50,751 INFO L290 TraceCheckUtils]: 5: Hoare triple {1852#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1958#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 00:55:50,751 INFO L272 TraceCheckUtils]: 4: Hoare triple {1852#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-15 00:55:50,751 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1852#true} {1852#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-15 00:55:50,751 INFO L290 TraceCheckUtils]: 2: Hoare triple {1852#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-15 00:55:50,751 INFO L290 TraceCheckUtils]: 1: Hoare triple {1852#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1852#true} is VALID [2022-04-15 00:55:50,752 INFO L272 TraceCheckUtils]: 0: Hoare triple {1852#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-15 00:55:50,752 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:50,752 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1491371589] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:55:50,752 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:55:50,752 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 17 [2022-04-15 00:55:50,752 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [202225126] [2022-04-15 00:55:50,752 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:55:50,752 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 16 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-15 00:55:50,753 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:55:50,753 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 16 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:50,772 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:50,772 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-15 00:55:50,773 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:55:50,773 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-15 00:55:50,773 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=221, Unknown=0, NotChecked=0, Total=272 [2022-04-15 00:55:50,773 INFO L87 Difference]: Start difference. First operand 29 states and 37 transitions. Second operand has 17 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 16 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:52,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:52,042 INFO L93 Difference]: Finished difference Result 57 states and 72 transitions. [2022-04-15 00:55:52,042 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-15 00:55:52,042 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 16 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-15 00:55:52,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:55:52,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 16 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:52,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 62 transitions. [2022-04-15 00:55:52,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 16 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:52,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 62 transitions. [2022-04-15 00:55:52,045 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 62 transitions. [2022-04-15 00:55:52,099 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:52,100 INFO L225 Difference]: With dead ends: 57 [2022-04-15 00:55:52,100 INFO L226 Difference]: Without dead ends: 47 [2022-04-15 00:55:52,102 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 272 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=275, Invalid=1365, Unknown=0, NotChecked=0, Total=1640 [2022-04-15 00:55:52,102 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 42 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 259 mSolverCounterSat, 59 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 79 SdHoareTripleChecker+Invalid, 318 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 59 IncrementalHoareTripleChecker+Valid, 259 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-15 00:55:52,102 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [42 Valid, 79 Invalid, 318 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [59 Valid, 259 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-15 00:55:52,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2022-04-15 00:55:52,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 34. [2022-04-15 00:55:52,179 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:55:52,179 INFO L82 GeneralOperation]: Start isEquivalent. First operand 47 states. Second operand has 34 states, 29 states have (on average 1.2758620689655173) internal successors, (37), 29 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:52,179 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand has 34 states, 29 states have (on average 1.2758620689655173) internal successors, (37), 29 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:52,179 INFO L87 Difference]: Start difference. First operand 47 states. Second operand has 34 states, 29 states have (on average 1.2758620689655173) internal successors, (37), 29 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:52,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:52,180 INFO L93 Difference]: Finished difference Result 47 states and 58 transitions. [2022-04-15 00:55:52,180 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 58 transitions. [2022-04-15 00:55:52,180 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:52,180 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:52,181 INFO L74 IsIncluded]: Start isIncluded. First operand has 34 states, 29 states have (on average 1.2758620689655173) internal successors, (37), 29 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 47 states. [2022-04-15 00:55:52,181 INFO L87 Difference]: Start difference. First operand has 34 states, 29 states have (on average 1.2758620689655173) internal successors, (37), 29 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 47 states. [2022-04-15 00:55:52,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:52,182 INFO L93 Difference]: Finished difference Result 47 states and 58 transitions. [2022-04-15 00:55:52,182 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 58 transitions. [2022-04-15 00:55:52,182 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:52,182 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:52,182 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:55:52,182 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:55:52,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 29 states have (on average 1.2758620689655173) internal successors, (37), 29 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:52,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 41 transitions. [2022-04-15 00:55:52,183 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 41 transitions. Word has length 18 [2022-04-15 00:55:52,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:55:52,183 INFO L478 AbstractCegarLoop]: Abstraction has 34 states and 41 transitions. [2022-04-15 00:55:52,183 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 16 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:52,183 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 41 transitions. [2022-04-15 00:55:52,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-15 00:55:52,184 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:55:52,184 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:55:52,200 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2022-04-15 00:55:52,395 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:55:52,396 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:55:52,396 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:55:52,396 INFO L85 PathProgramCache]: Analyzing trace with hash -500658741, now seen corresponding path program 6 times [2022-04-15 00:55:52,396 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:55:52,396 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [615263730] [2022-04-15 00:55:52,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:55:52,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:55:52,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:52,513 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:55:52,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:52,517 INFO L290 TraceCheckUtils]: 0: Hoare triple {2289#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2277#true} is VALID [2022-04-15 00:55:52,517 INFO L290 TraceCheckUtils]: 1: Hoare triple {2277#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-15 00:55:52,517 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2277#true} {2277#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-15 00:55:52,517 INFO L272 TraceCheckUtils]: 0: Hoare triple {2277#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2289#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:55:52,517 INFO L290 TraceCheckUtils]: 1: Hoare triple {2289#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2277#true} is VALID [2022-04-15 00:55:52,517 INFO L290 TraceCheckUtils]: 2: Hoare triple {2277#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-15 00:55:52,518 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2277#true} {2277#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-15 00:55:52,518 INFO L272 TraceCheckUtils]: 4: Hoare triple {2277#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-15 00:55:52,518 INFO L290 TraceCheckUtils]: 5: Hoare triple {2277#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2282#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:55:52,518 INFO L290 TraceCheckUtils]: 6: Hoare triple {2282#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2283#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:55:52,519 INFO L290 TraceCheckUtils]: 7: Hoare triple {2283#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2284#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:55:52,520 INFO L290 TraceCheckUtils]: 8: Hoare triple {2284#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 00:55:52,520 INFO L290 TraceCheckUtils]: 9: Hoare triple {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 00:55:52,520 INFO L290 TraceCheckUtils]: 10: Hoare triple {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 00:55:52,521 INFO L290 TraceCheckUtils]: 11: Hoare triple {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2284#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:55:52,521 INFO L290 TraceCheckUtils]: 12: Hoare triple {2284#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2283#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:55:52,522 INFO L290 TraceCheckUtils]: 13: Hoare triple {2283#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2286#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 00:55:52,523 INFO L290 TraceCheckUtils]: 14: Hoare triple {2286#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {2286#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 00:55:52,523 INFO L272 TraceCheckUtils]: 15: Hoare triple {2286#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2287#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:55:52,525 INFO L290 TraceCheckUtils]: 16: Hoare triple {2287#(not (= |__VERIFIER_assert_#in~cond| 0))} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2288#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:55:52,526 INFO L290 TraceCheckUtils]: 17: Hoare triple {2288#(not (= __VERIFIER_assert_~cond 0))} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2278#false} is VALID [2022-04-15 00:55:52,526 INFO L290 TraceCheckUtils]: 18: Hoare triple {2278#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2278#false} is VALID [2022-04-15 00:55:52,526 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:52,526 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:55:52,526 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [615263730] [2022-04-15 00:55:52,527 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [615263730] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:55:52,527 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [55944256] [2022-04-15 00:55:52,527 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-15 00:55:52,527 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:55:52,527 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:55:52,528 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:55:52,529 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-15 00:55:52,556 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2022-04-15 00:55:52,556 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:55:52,556 INFO L263 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 17 conjunts are in the unsatisfiable core [2022-04-15 00:55:52,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:52,562 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:55:52,686 INFO L272 TraceCheckUtils]: 0: Hoare triple {2277#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-15 00:55:52,687 INFO L290 TraceCheckUtils]: 1: Hoare triple {2277#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2277#true} is VALID [2022-04-15 00:55:52,687 INFO L290 TraceCheckUtils]: 2: Hoare triple {2277#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-15 00:55:52,687 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2277#true} {2277#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-15 00:55:52,687 INFO L272 TraceCheckUtils]: 4: Hoare triple {2277#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-15 00:55:52,689 INFO L290 TraceCheckUtils]: 5: Hoare triple {2277#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2282#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:55:52,689 INFO L290 TraceCheckUtils]: 6: Hoare triple {2282#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2283#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:55:52,690 INFO L290 TraceCheckUtils]: 7: Hoare triple {2283#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2284#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:55:52,691 INFO L290 TraceCheckUtils]: 8: Hoare triple {2284#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 00:55:52,691 INFO L290 TraceCheckUtils]: 9: Hoare triple {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 00:55:52,692 INFO L290 TraceCheckUtils]: 10: Hoare triple {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 00:55:52,692 INFO L290 TraceCheckUtils]: 11: Hoare triple {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2284#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:55:52,693 INFO L290 TraceCheckUtils]: 12: Hoare triple {2284#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2283#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:55:52,694 INFO L290 TraceCheckUtils]: 13: Hoare triple {2283#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2282#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:55:52,694 INFO L290 TraceCheckUtils]: 14: Hoare triple {2282#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {2282#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:55:52,695 INFO L272 TraceCheckUtils]: 15: Hoare triple {2282#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2338#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:55:52,696 INFO L290 TraceCheckUtils]: 16: Hoare triple {2338#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2342#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:55:52,696 INFO L290 TraceCheckUtils]: 17: Hoare triple {2342#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2278#false} is VALID [2022-04-15 00:55:52,696 INFO L290 TraceCheckUtils]: 18: Hoare triple {2278#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2278#false} is VALID [2022-04-15 00:55:52,697 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:52,697 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:55:52,850 INFO L290 TraceCheckUtils]: 18: Hoare triple {2278#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2278#false} is VALID [2022-04-15 00:55:52,851 INFO L290 TraceCheckUtils]: 17: Hoare triple {2342#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2278#false} is VALID [2022-04-15 00:55:52,851 INFO L290 TraceCheckUtils]: 16: Hoare triple {2338#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2342#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:55:52,852 INFO L272 TraceCheckUtils]: 15: Hoare triple {2358#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2338#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:55:52,855 INFO L290 TraceCheckUtils]: 14: Hoare triple {2358#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {2358#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:55:52,855 INFO L290 TraceCheckUtils]: 13: Hoare triple {2365#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2358#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:55:52,856 INFO L290 TraceCheckUtils]: 12: Hoare triple {2369#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2365#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 00:55:52,857 INFO L290 TraceCheckUtils]: 11: Hoare triple {2373#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2369#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 00:55:52,857 INFO L290 TraceCheckUtils]: 10: Hoare triple {2373#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2373#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-15 00:55:52,858 INFO L290 TraceCheckUtils]: 9: Hoare triple {2373#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {2373#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-15 00:55:52,858 INFO L290 TraceCheckUtils]: 8: Hoare triple {2369#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2373#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-15 00:55:52,859 INFO L290 TraceCheckUtils]: 7: Hoare triple {2365#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2369#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 00:55:52,860 INFO L290 TraceCheckUtils]: 6: Hoare triple {2358#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2365#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 00:55:52,860 INFO L290 TraceCheckUtils]: 5: Hoare triple {2277#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2358#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:55:52,860 INFO L272 TraceCheckUtils]: 4: Hoare triple {2277#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-15 00:55:52,860 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2277#true} {2277#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-15 00:55:52,861 INFO L290 TraceCheckUtils]: 2: Hoare triple {2277#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-15 00:55:52,861 INFO L290 TraceCheckUtils]: 1: Hoare triple {2277#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2277#true} is VALID [2022-04-15 00:55:52,861 INFO L272 TraceCheckUtils]: 0: Hoare triple {2277#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-15 00:55:52,861 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:52,861 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [55944256] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:55:52,861 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:55:52,861 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 8] total 16 [2022-04-15 00:55:52,861 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1268218734] [2022-04-15 00:55:52,861 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:55:52,862 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-15 00:55:52,862 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:55:52,863 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:52,890 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:52,890 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-15 00:55:52,890 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:55:52,890 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-15 00:55:52,891 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=203, Unknown=0, NotChecked=0, Total=240 [2022-04-15 00:55:52,891 INFO L87 Difference]: Start difference. First operand 34 states and 41 transitions. Second operand has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:53,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:53,370 INFO L93 Difference]: Finished difference Result 43 states and 50 transitions. [2022-04-15 00:55:53,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-15 00:55:53,371 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-15 00:55:53,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:55:53,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:53,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 30 transitions. [2022-04-15 00:55:53,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:53,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 30 transitions. [2022-04-15 00:55:53,372 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 30 transitions. [2022-04-15 00:55:53,393 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:53,394 INFO L225 Difference]: With dead ends: 43 [2022-04-15 00:55:53,394 INFO L226 Difference]: Without dead ends: 38 [2022-04-15 00:55:53,394 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 32 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=71, Invalid=391, Unknown=0, NotChecked=0, Total=462 [2022-04-15 00:55:53,394 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 15 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 187 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 73 SdHoareTripleChecker+Invalid, 197 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 187 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 00:55:53,395 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [15 Valid, 73 Invalid, 197 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 187 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 00:55:53,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2022-04-15 00:55:53,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 33. [2022-04-15 00:55:53,474 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:55:53,474 INFO L82 GeneralOperation]: Start isEquivalent. First operand 38 states. Second operand has 33 states, 28 states have (on average 1.2857142857142858) internal successors, (36), 28 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:53,475 INFO L74 IsIncluded]: Start isIncluded. First operand 38 states. Second operand has 33 states, 28 states have (on average 1.2857142857142858) internal successors, (36), 28 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:53,475 INFO L87 Difference]: Start difference. First operand 38 states. Second operand has 33 states, 28 states have (on average 1.2857142857142858) internal successors, (36), 28 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:53,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:53,475 INFO L93 Difference]: Finished difference Result 38 states and 45 transitions. [2022-04-15 00:55:53,476 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 45 transitions. [2022-04-15 00:55:53,476 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:53,476 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:53,476 INFO L74 IsIncluded]: Start isIncluded. First operand has 33 states, 28 states have (on average 1.2857142857142858) internal successors, (36), 28 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-15 00:55:53,476 INFO L87 Difference]: Start difference. First operand has 33 states, 28 states have (on average 1.2857142857142858) internal successors, (36), 28 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-15 00:55:53,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:53,476 INFO L93 Difference]: Finished difference Result 38 states and 45 transitions. [2022-04-15 00:55:53,477 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 45 transitions. [2022-04-15 00:55:53,477 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:53,477 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:53,477 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:55:53,477 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:55:53,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 28 states have (on average 1.2857142857142858) internal successors, (36), 28 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:53,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 40 transitions. [2022-04-15 00:55:53,477 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 40 transitions. Word has length 19 [2022-04-15 00:55:53,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:55:53,478 INFO L478 AbstractCegarLoop]: Abstraction has 33 states and 40 transitions. [2022-04-15 00:55:53,478 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:53,478 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 40 transitions. [2022-04-15 00:55:53,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-15 00:55:53,478 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:55:53,478 INFO L499 BasicCegarLoop]: trace histogram [4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:55:53,494 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2022-04-15 00:55:53,679 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:55:53,679 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:55:53,680 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:55:53,680 INFO L85 PathProgramCache]: Analyzing trace with hash 1686168828, now seen corresponding path program 7 times [2022-04-15 00:55:53,680 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:55:53,680 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [117271057] [2022-04-15 00:55:53,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:55:53,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:55:53,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:53,809 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:55:53,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:53,827 INFO L290 TraceCheckUtils]: 0: Hoare triple {2638#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2625#true} is VALID [2022-04-15 00:55:53,827 INFO L290 TraceCheckUtils]: 1: Hoare triple {2625#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-15 00:55:53,827 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2625#true} {2625#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-15 00:55:53,828 INFO L272 TraceCheckUtils]: 0: Hoare triple {2625#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2638#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:55:53,828 INFO L290 TraceCheckUtils]: 1: Hoare triple {2638#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2625#true} is VALID [2022-04-15 00:55:53,828 INFO L290 TraceCheckUtils]: 2: Hoare triple {2625#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-15 00:55:53,828 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2625#true} {2625#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-15 00:55:53,828 INFO L272 TraceCheckUtils]: 4: Hoare triple {2625#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-15 00:55:53,828 INFO L290 TraceCheckUtils]: 5: Hoare triple {2625#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2630#(= main_~y~0 0)} is VALID [2022-04-15 00:55:53,829 INFO L290 TraceCheckUtils]: 6: Hoare triple {2630#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2631#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:55:53,829 INFO L290 TraceCheckUtils]: 7: Hoare triple {2631#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2632#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:55:53,830 INFO L290 TraceCheckUtils]: 8: Hoare triple {2632#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2633#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:55:53,830 INFO L290 TraceCheckUtils]: 9: Hoare triple {2633#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {2633#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:55:53,830 INFO L290 TraceCheckUtils]: 10: Hoare triple {2633#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2634#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 00:55:53,831 INFO L290 TraceCheckUtils]: 11: Hoare triple {2634#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2635#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 00:55:53,831 INFO L290 TraceCheckUtils]: 12: Hoare triple {2635#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2636#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 00:55:53,832 INFO L290 TraceCheckUtils]: 13: Hoare triple {2636#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2637#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 00:55:53,832 INFO L290 TraceCheckUtils]: 14: Hoare triple {2637#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2626#false} is VALID [2022-04-15 00:55:53,833 INFO L290 TraceCheckUtils]: 15: Hoare triple {2626#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {2626#false} is VALID [2022-04-15 00:55:53,833 INFO L272 TraceCheckUtils]: 16: Hoare triple {2626#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2626#false} is VALID [2022-04-15 00:55:53,833 INFO L290 TraceCheckUtils]: 17: Hoare triple {2626#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2626#false} is VALID [2022-04-15 00:55:53,833 INFO L290 TraceCheckUtils]: 18: Hoare triple {2626#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2626#false} is VALID [2022-04-15 00:55:53,833 INFO L290 TraceCheckUtils]: 19: Hoare triple {2626#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2626#false} is VALID [2022-04-15 00:55:53,833 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:53,833 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:55:53,833 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [117271057] [2022-04-15 00:55:53,833 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [117271057] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:55:53,833 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [441713340] [2022-04-15 00:55:53,833 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-15 00:55:53,834 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:55:53,834 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:55:53,847 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:55:53,868 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-15 00:55:53,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:53,896 INFO L263 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 17 conjunts are in the unsatisfiable core [2022-04-15 00:55:53,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:53,901 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:55:54,090 INFO L272 TraceCheckUtils]: 0: Hoare triple {2625#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-15 00:55:54,090 INFO L290 TraceCheckUtils]: 1: Hoare triple {2625#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2625#true} is VALID [2022-04-15 00:55:54,090 INFO L290 TraceCheckUtils]: 2: Hoare triple {2625#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-15 00:55:54,090 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2625#true} {2625#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-15 00:55:54,090 INFO L272 TraceCheckUtils]: 4: Hoare triple {2625#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-15 00:55:54,095 INFO L290 TraceCheckUtils]: 5: Hoare triple {2625#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2630#(= main_~y~0 0)} is VALID [2022-04-15 00:55:54,096 INFO L290 TraceCheckUtils]: 6: Hoare triple {2630#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2631#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:55:54,096 INFO L290 TraceCheckUtils]: 7: Hoare triple {2631#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2632#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:55:54,097 INFO L290 TraceCheckUtils]: 8: Hoare triple {2632#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2633#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:55:54,097 INFO L290 TraceCheckUtils]: 9: Hoare triple {2633#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {2633#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:55:54,098 INFO L290 TraceCheckUtils]: 10: Hoare triple {2633#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2634#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 00:55:54,098 INFO L290 TraceCheckUtils]: 11: Hoare triple {2634#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2635#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 00:55:54,099 INFO L290 TraceCheckUtils]: 12: Hoare triple {2635#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2636#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 00:55:54,099 INFO L290 TraceCheckUtils]: 13: Hoare triple {2636#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2637#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 00:55:54,100 INFO L290 TraceCheckUtils]: 14: Hoare triple {2637#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2626#false} is VALID [2022-04-15 00:55:54,100 INFO L290 TraceCheckUtils]: 15: Hoare triple {2626#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {2626#false} is VALID [2022-04-15 00:55:54,100 INFO L272 TraceCheckUtils]: 16: Hoare triple {2626#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2626#false} is VALID [2022-04-15 00:55:54,100 INFO L290 TraceCheckUtils]: 17: Hoare triple {2626#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2626#false} is VALID [2022-04-15 00:55:54,100 INFO L290 TraceCheckUtils]: 18: Hoare triple {2626#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2626#false} is VALID [2022-04-15 00:55:54,100 INFO L290 TraceCheckUtils]: 19: Hoare triple {2626#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2626#false} is VALID [2022-04-15 00:55:54,100 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:54,100 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:55:54,246 INFO L290 TraceCheckUtils]: 19: Hoare triple {2626#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2626#false} is VALID [2022-04-15 00:55:54,246 INFO L290 TraceCheckUtils]: 18: Hoare triple {2626#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2626#false} is VALID [2022-04-15 00:55:54,246 INFO L290 TraceCheckUtils]: 17: Hoare triple {2626#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2626#false} is VALID [2022-04-15 00:55:54,246 INFO L272 TraceCheckUtils]: 16: Hoare triple {2626#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2626#false} is VALID [2022-04-15 00:55:54,247 INFO L290 TraceCheckUtils]: 15: Hoare triple {2626#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {2626#false} is VALID [2022-04-15 00:55:54,247 INFO L290 TraceCheckUtils]: 14: Hoare triple {2714#(not (< 0 (mod main_~z~0 4294967296)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2626#false} is VALID [2022-04-15 00:55:54,248 INFO L290 TraceCheckUtils]: 13: Hoare triple {2718#(not (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2714#(not (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-15 00:55:54,248 INFO L290 TraceCheckUtils]: 12: Hoare triple {2722#(not (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2718#(not (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-15 00:55:54,249 INFO L290 TraceCheckUtils]: 11: Hoare triple {2726#(not (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2722#(not (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} is VALID [2022-04-15 00:55:54,249 INFO L290 TraceCheckUtils]: 10: Hoare triple {2730#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2726#(not (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} is VALID [2022-04-15 00:55:54,249 INFO L290 TraceCheckUtils]: 9: Hoare triple {2730#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {2730#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-15 00:55:54,250 INFO L290 TraceCheckUtils]: 8: Hoare triple {2737#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2730#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-15 00:55:54,251 INFO L290 TraceCheckUtils]: 7: Hoare triple {2741#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2737#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-15 00:55:54,252 INFO L290 TraceCheckUtils]: 6: Hoare triple {2745#(not (< 0 (mod main_~y~0 4294967296)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2741#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-15 00:55:54,252 INFO L290 TraceCheckUtils]: 5: Hoare triple {2625#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2745#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-15 00:55:54,253 INFO L272 TraceCheckUtils]: 4: Hoare triple {2625#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-15 00:55:54,253 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2625#true} {2625#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-15 00:55:54,253 INFO L290 TraceCheckUtils]: 2: Hoare triple {2625#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-15 00:55:54,253 INFO L290 TraceCheckUtils]: 1: Hoare triple {2625#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2625#true} is VALID [2022-04-15 00:55:54,253 INFO L272 TraceCheckUtils]: 0: Hoare triple {2625#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-15 00:55:54,253 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:54,253 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [441713340] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:55:54,253 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:55:54,253 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 19 [2022-04-15 00:55:54,254 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [921573046] [2022-04-15 00:55:54,254 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:55:54,254 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 18 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-15 00:55:54,254 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:55:54,254 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 18 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:54,274 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:54,274 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-15 00:55:54,274 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:55:54,274 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-15 00:55:54,275 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=299, Unknown=0, NotChecked=0, Total=342 [2022-04-15 00:55:54,275 INFO L87 Difference]: Start difference. First operand 33 states and 40 transitions. Second operand has 19 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 18 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:54,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:54,744 INFO L93 Difference]: Finished difference Result 44 states and 51 transitions. [2022-04-15 00:55:54,745 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-15 00:55:54,745 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 18 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-15 00:55:54,745 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:55:54,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 18 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:54,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 31 transitions. [2022-04-15 00:55:54,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 18 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:54,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 31 transitions. [2022-04-15 00:55:54,747 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 31 transitions. [2022-04-15 00:55:54,772 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:54,773 INFO L225 Difference]: With dead ends: 44 [2022-04-15 00:55:54,773 INFO L226 Difference]: Without dead ends: 33 [2022-04-15 00:55:54,773 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 33 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=100, Invalid=656, Unknown=0, NotChecked=0, Total=756 [2022-04-15 00:55:54,774 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 13 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 163 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 69 SdHoareTripleChecker+Invalid, 178 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 163 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 00:55:54,774 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [13 Valid, 69 Invalid, 178 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 163 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 00:55:54,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2022-04-15 00:55:54,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2022-04-15 00:55:54,862 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:55:54,862 INFO L82 GeneralOperation]: Start isEquivalent. First operand 33 states. Second operand has 33 states, 28 states have (on average 1.25) internal successors, (35), 28 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:54,862 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand has 33 states, 28 states have (on average 1.25) internal successors, (35), 28 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:54,862 INFO L87 Difference]: Start difference. First operand 33 states. Second operand has 33 states, 28 states have (on average 1.25) internal successors, (35), 28 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:54,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:54,863 INFO L93 Difference]: Finished difference Result 33 states and 39 transitions. [2022-04-15 00:55:54,863 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 39 transitions. [2022-04-15 00:55:54,863 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:54,863 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:54,863 INFO L74 IsIncluded]: Start isIncluded. First operand has 33 states, 28 states have (on average 1.25) internal successors, (35), 28 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 33 states. [2022-04-15 00:55:54,863 INFO L87 Difference]: Start difference. First operand has 33 states, 28 states have (on average 1.25) internal successors, (35), 28 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 33 states. [2022-04-15 00:55:54,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:54,864 INFO L93 Difference]: Finished difference Result 33 states and 39 transitions. [2022-04-15 00:55:54,864 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 39 transitions. [2022-04-15 00:55:54,864 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:54,864 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:54,864 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:55:54,864 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:55:54,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 28 states have (on average 1.25) internal successors, (35), 28 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:54,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 39 transitions. [2022-04-15 00:55:54,865 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 39 transitions. Word has length 20 [2022-04-15 00:55:54,865 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:55:54,865 INFO L478 AbstractCegarLoop]: Abstraction has 33 states and 39 transitions. [2022-04-15 00:55:54,865 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 18 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:54,865 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 39 transitions. [2022-04-15 00:55:54,866 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-15 00:55:54,866 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:55:54,866 INFO L499 BasicCegarLoop]: trace histogram [5, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:55:54,895 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-15 00:55:55,082 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-04-15 00:55:55,083 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:55:55,083 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:55:55,083 INFO L85 PathProgramCache]: Analyzing trace with hash -400395012, now seen corresponding path program 8 times [2022-04-15 00:55:55,083 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:55:55,083 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2020203796] [2022-04-15 00:55:55,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:55:55,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:55:55,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:55,186 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:55:55,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:55,193 INFO L290 TraceCheckUtils]: 0: Hoare triple {2994#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2980#true} is VALID [2022-04-15 00:55:55,193 INFO L290 TraceCheckUtils]: 1: Hoare triple {2980#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-15 00:55:55,193 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2980#true} {2980#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-15 00:55:55,193 INFO L272 TraceCheckUtils]: 0: Hoare triple {2980#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2994#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:55:55,193 INFO L290 TraceCheckUtils]: 1: Hoare triple {2994#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2980#true} is VALID [2022-04-15 00:55:55,193 INFO L290 TraceCheckUtils]: 2: Hoare triple {2980#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-15 00:55:55,194 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2980#true} {2980#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-15 00:55:55,194 INFO L272 TraceCheckUtils]: 4: Hoare triple {2980#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-15 00:55:55,194 INFO L290 TraceCheckUtils]: 5: Hoare triple {2980#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2985#(= main_~y~0 0)} is VALID [2022-04-15 00:55:55,194 INFO L290 TraceCheckUtils]: 6: Hoare triple {2985#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2986#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:55:55,195 INFO L290 TraceCheckUtils]: 7: Hoare triple {2986#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2987#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:55:55,195 INFO L290 TraceCheckUtils]: 8: Hoare triple {2987#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2988#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:55:55,196 INFO L290 TraceCheckUtils]: 9: Hoare triple {2988#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2989#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 00:55:55,196 INFO L290 TraceCheckUtils]: 10: Hoare triple {2989#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2990#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 00:55:55,197 INFO L290 TraceCheckUtils]: 11: Hoare triple {2990#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {2990#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 00:55:55,197 INFO L290 TraceCheckUtils]: 12: Hoare triple {2990#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2991#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 00:55:55,197 INFO L290 TraceCheckUtils]: 13: Hoare triple {2991#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2992#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 00:55:55,198 INFO L290 TraceCheckUtils]: 14: Hoare triple {2992#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2993#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 00:55:55,198 INFO L290 TraceCheckUtils]: 15: Hoare triple {2993#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {2981#false} is VALID [2022-04-15 00:55:55,198 INFO L272 TraceCheckUtils]: 16: Hoare triple {2981#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2981#false} is VALID [2022-04-15 00:55:55,199 INFO L290 TraceCheckUtils]: 17: Hoare triple {2981#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2981#false} is VALID [2022-04-15 00:55:55,199 INFO L290 TraceCheckUtils]: 18: Hoare triple {2981#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2981#false} is VALID [2022-04-15 00:55:55,199 INFO L290 TraceCheckUtils]: 19: Hoare triple {2981#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2981#false} is VALID [2022-04-15 00:55:55,199 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:55,199 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:55:55,199 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2020203796] [2022-04-15 00:55:55,199 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2020203796] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:55:55,199 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [417566599] [2022-04-15 00:55:55,199 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 00:55:55,199 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:55:55,199 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:55:55,203 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:55:55,204 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-15 00:55:55,232 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 00:55:55,232 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:55:55,232 INFO L263 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 19 conjunts are in the unsatisfiable core [2022-04-15 00:55:55,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:55:55,239 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:55:55,411 INFO L272 TraceCheckUtils]: 0: Hoare triple {2980#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-15 00:55:55,411 INFO L290 TraceCheckUtils]: 1: Hoare triple {2980#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2980#true} is VALID [2022-04-15 00:55:55,411 INFO L290 TraceCheckUtils]: 2: Hoare triple {2980#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-15 00:55:55,411 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2980#true} {2980#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-15 00:55:55,411 INFO L272 TraceCheckUtils]: 4: Hoare triple {2980#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-15 00:55:55,413 INFO L290 TraceCheckUtils]: 5: Hoare triple {2980#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2985#(= main_~y~0 0)} is VALID [2022-04-15 00:55:55,413 INFO L290 TraceCheckUtils]: 6: Hoare triple {2985#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2986#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:55:55,417 INFO L290 TraceCheckUtils]: 7: Hoare triple {2986#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2987#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:55:55,417 INFO L290 TraceCheckUtils]: 8: Hoare triple {2987#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2988#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:55:55,418 INFO L290 TraceCheckUtils]: 9: Hoare triple {2988#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2989#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 00:55:55,418 INFO L290 TraceCheckUtils]: 10: Hoare triple {2989#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2990#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 00:55:55,419 INFO L290 TraceCheckUtils]: 11: Hoare triple {2990#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {2990#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 00:55:55,419 INFO L290 TraceCheckUtils]: 12: Hoare triple {2990#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2991#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 00:55:55,419 INFO L290 TraceCheckUtils]: 13: Hoare triple {2991#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2992#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 00:55:55,424 INFO L290 TraceCheckUtils]: 14: Hoare triple {2992#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3040#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 00:55:55,425 INFO L290 TraceCheckUtils]: 15: Hoare triple {3040#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {2981#false} is VALID [2022-04-15 00:55:55,425 INFO L272 TraceCheckUtils]: 16: Hoare triple {2981#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2981#false} is VALID [2022-04-15 00:55:55,425 INFO L290 TraceCheckUtils]: 17: Hoare triple {2981#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2981#false} is VALID [2022-04-15 00:55:55,425 INFO L290 TraceCheckUtils]: 18: Hoare triple {2981#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2981#false} is VALID [2022-04-15 00:55:55,425 INFO L290 TraceCheckUtils]: 19: Hoare triple {2981#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2981#false} is VALID [2022-04-15 00:55:55,425 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:55,425 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:55:55,613 INFO L290 TraceCheckUtils]: 19: Hoare triple {2981#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2981#false} is VALID [2022-04-15 00:55:55,613 INFO L290 TraceCheckUtils]: 18: Hoare triple {2981#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2981#false} is VALID [2022-04-15 00:55:55,613 INFO L290 TraceCheckUtils]: 17: Hoare triple {2981#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2981#false} is VALID [2022-04-15 00:55:55,613 INFO L272 TraceCheckUtils]: 16: Hoare triple {2981#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2981#false} is VALID [2022-04-15 00:55:55,613 INFO L290 TraceCheckUtils]: 15: Hoare triple {3068#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {2981#false} is VALID [2022-04-15 00:55:55,614 INFO L290 TraceCheckUtils]: 14: Hoare triple {3072#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3068#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 00:55:55,615 INFO L290 TraceCheckUtils]: 13: Hoare triple {3076#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3072#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-15 00:55:55,615 INFO L290 TraceCheckUtils]: 12: Hoare triple {3080#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3076#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-15 00:55:55,616 INFO L290 TraceCheckUtils]: 11: Hoare triple {3080#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {3080#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 00:55:55,616 INFO L290 TraceCheckUtils]: 10: Hoare triple {3087#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3080#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 00:55:55,617 INFO L290 TraceCheckUtils]: 9: Hoare triple {3091#(< 0 (mod main_~y~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3087#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 00:55:55,617 INFO L290 TraceCheckUtils]: 8: Hoare triple {3095#(< 0 (mod (+ main_~y~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3091#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 00:55:55,618 INFO L290 TraceCheckUtils]: 7: Hoare triple {3099#(< 0 (mod (+ main_~y~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3095#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-15 00:55:55,619 INFO L290 TraceCheckUtils]: 6: Hoare triple {3103#(< 0 (mod (+ main_~y~0 3) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3099#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-15 00:55:55,619 INFO L290 TraceCheckUtils]: 5: Hoare triple {2980#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3103#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-15 00:55:55,619 INFO L272 TraceCheckUtils]: 4: Hoare triple {2980#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-15 00:55:55,619 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2980#true} {2980#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-15 00:55:55,619 INFO L290 TraceCheckUtils]: 2: Hoare triple {2980#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-15 00:55:55,619 INFO L290 TraceCheckUtils]: 1: Hoare triple {2980#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2980#true} is VALID [2022-04-15 00:55:55,620 INFO L272 TraceCheckUtils]: 0: Hoare triple {2980#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-15 00:55:55,620 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:55:55,620 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [417566599] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:55:55,620 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:55:55,620 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11] total 22 [2022-04-15 00:55:55,620 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [645831614] [2022-04-15 00:55:55,620 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:55:55,620 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 21 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-15 00:55:55,621 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:55:55,621 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 21 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:55,645 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:55,646 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-15 00:55:55,646 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:55:55,646 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-15 00:55:55,646 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=373, Unknown=0, NotChecked=0, Total=462 [2022-04-15 00:55:55,646 INFO L87 Difference]: Start difference. First operand 33 states and 39 transitions. Second operand has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 21 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:59,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:59,691 INFO L93 Difference]: Finished difference Result 82 states and 115 transitions. [2022-04-15 00:55:59,691 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2022-04-15 00:55:59,692 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 21 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-15 00:55:59,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:55:59,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 21 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:59,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 115 transitions. [2022-04-15 00:55:59,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 21 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:59,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 115 transitions. [2022-04-15 00:55:59,695 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 50 states and 115 transitions. [2022-04-15 00:55:59,836 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 115 edges. 115 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:55:59,837 INFO L225 Difference]: With dead ends: 82 [2022-04-15 00:55:59,837 INFO L226 Difference]: Without dead ends: 77 [2022-04-15 00:55:59,838 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 31 SyntacticMatches, 1 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1229 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=1065, Invalid=3627, Unknown=0, NotChecked=0, Total=4692 [2022-04-15 00:55:59,839 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 138 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 298 mSolverCounterSat, 157 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 138 SdHoareTripleChecker+Valid, 82 SdHoareTripleChecker+Invalid, 455 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 157 IncrementalHoareTripleChecker+Valid, 298 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-15 00:55:59,839 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [138 Valid, 82 Invalid, 455 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [157 Valid, 298 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-15 00:55:59,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2022-04-15 00:55:59,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 39. [2022-04-15 00:55:59,934 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:55:59,935 INFO L82 GeneralOperation]: Start isEquivalent. First operand 77 states. Second operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:59,935 INFO L74 IsIncluded]: Start isIncluded. First operand 77 states. Second operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:59,935 INFO L87 Difference]: Start difference. First operand 77 states. Second operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:59,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:59,936 INFO L93 Difference]: Finished difference Result 77 states and 97 transitions. [2022-04-15 00:55:59,937 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 97 transitions. [2022-04-15 00:55:59,937 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:59,937 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:59,937 INFO L74 IsIncluded]: Start isIncluded. First operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 77 states. [2022-04-15 00:55:59,937 INFO L87 Difference]: Start difference. First operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 77 states. [2022-04-15 00:55:59,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:55:59,938 INFO L93 Difference]: Finished difference Result 77 states and 97 transitions. [2022-04-15 00:55:59,938 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 97 transitions. [2022-04-15 00:55:59,939 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:55:59,939 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:55:59,939 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:55:59,939 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:55:59,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:59,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 51 transitions. [2022-04-15 00:55:59,941 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 51 transitions. Word has length 20 [2022-04-15 00:55:59,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:55:59,941 INFO L478 AbstractCegarLoop]: Abstraction has 39 states and 51 transitions. [2022-04-15 00:55:59,941 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 21 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:55:59,941 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 51 transitions. [2022-04-15 00:55:59,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-15 00:55:59,942 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:55:59,942 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:55:59,960 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-15 00:56:00,155 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:56:00,156 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:56:00,170 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:56:00,170 INFO L85 PathProgramCache]: Analyzing trace with hash 775905387, now seen corresponding path program 9 times [2022-04-15 00:56:00,170 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:56:00,170 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [185842363] [2022-04-15 00:56:00,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:56:00,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:56:00,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:00,320 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:56:00,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:00,327 INFO L290 TraceCheckUtils]: 0: Hoare triple {3599#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3586#true} is VALID [2022-04-15 00:56:00,327 INFO L290 TraceCheckUtils]: 1: Hoare triple {3586#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-15 00:56:00,327 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3586#true} {3586#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-15 00:56:00,328 INFO L272 TraceCheckUtils]: 0: Hoare triple {3586#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3599#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:56:00,328 INFO L290 TraceCheckUtils]: 1: Hoare triple {3599#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3586#true} is VALID [2022-04-15 00:56:00,328 INFO L290 TraceCheckUtils]: 2: Hoare triple {3586#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-15 00:56:00,328 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3586#true} {3586#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-15 00:56:00,328 INFO L272 TraceCheckUtils]: 4: Hoare triple {3586#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-15 00:56:00,329 INFO L290 TraceCheckUtils]: 5: Hoare triple {3586#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3591#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:56:00,329 INFO L290 TraceCheckUtils]: 6: Hoare triple {3591#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3592#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:56:00,330 INFO L290 TraceCheckUtils]: 7: Hoare triple {3592#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3593#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:56:00,330 INFO L290 TraceCheckUtils]: 8: Hoare triple {3593#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3594#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 00:56:00,331 INFO L290 TraceCheckUtils]: 9: Hoare triple {3594#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 00:56:00,331 INFO L290 TraceCheckUtils]: 10: Hoare triple {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 00:56:00,332 INFO L290 TraceCheckUtils]: 11: Hoare triple {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 00:56:00,332 INFO L290 TraceCheckUtils]: 12: Hoare triple {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3594#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 00:56:00,333 INFO L290 TraceCheckUtils]: 13: Hoare triple {3594#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3593#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:56:00,333 INFO L290 TraceCheckUtils]: 14: Hoare triple {3593#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3592#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:56:00,334 INFO L290 TraceCheckUtils]: 15: Hoare triple {3592#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3596#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 00:56:00,334 INFO L290 TraceCheckUtils]: 16: Hoare triple {3596#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {3596#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 00:56:00,335 INFO L272 TraceCheckUtils]: 17: Hoare triple {3596#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3597#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:56:00,335 INFO L290 TraceCheckUtils]: 18: Hoare triple {3597#(not (= |__VERIFIER_assert_#in~cond| 0))} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3598#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:56:00,336 INFO L290 TraceCheckUtils]: 19: Hoare triple {3598#(not (= __VERIFIER_assert_~cond 0))} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3587#false} is VALID [2022-04-15 00:56:00,336 INFO L290 TraceCheckUtils]: 20: Hoare triple {3587#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3587#false} is VALID [2022-04-15 00:56:00,336 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:00,336 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:56:00,336 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [185842363] [2022-04-15 00:56:00,336 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [185842363] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:56:00,336 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [528733035] [2022-04-15 00:56:00,336 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-15 00:56:00,336 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:56:00,337 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:56:00,337 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:56:00,353 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-15 00:56:00,371 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-15 00:56:00,371 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:56:00,372 INFO L263 TraceCheckSpWp]: Trace formula consists of 98 conjuncts, 21 conjunts are in the unsatisfiable core [2022-04-15 00:56:00,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:00,377 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:56:00,471 INFO L272 TraceCheckUtils]: 0: Hoare triple {3586#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-15 00:56:00,471 INFO L290 TraceCheckUtils]: 1: Hoare triple {3586#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3586#true} is VALID [2022-04-15 00:56:00,472 INFO L290 TraceCheckUtils]: 2: Hoare triple {3586#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-15 00:56:00,472 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3586#true} {3586#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-15 00:56:00,472 INFO L272 TraceCheckUtils]: 4: Hoare triple {3586#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-15 00:56:00,472 INFO L290 TraceCheckUtils]: 5: Hoare triple {3586#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3591#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:56:00,472 INFO L290 TraceCheckUtils]: 6: Hoare triple {3591#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3592#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:56:00,473 INFO L290 TraceCheckUtils]: 7: Hoare triple {3592#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3593#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:56:00,473 INFO L290 TraceCheckUtils]: 8: Hoare triple {3593#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3594#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 00:56:00,474 INFO L290 TraceCheckUtils]: 9: Hoare triple {3594#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 00:56:00,474 INFO L290 TraceCheckUtils]: 10: Hoare triple {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 00:56:00,474 INFO L290 TraceCheckUtils]: 11: Hoare triple {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 00:56:00,475 INFO L290 TraceCheckUtils]: 12: Hoare triple {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3594#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 00:56:00,475 INFO L290 TraceCheckUtils]: 13: Hoare triple {3594#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3593#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:56:00,476 INFO L290 TraceCheckUtils]: 14: Hoare triple {3593#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3592#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:56:00,476 INFO L290 TraceCheckUtils]: 15: Hoare triple {3592#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3591#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:56:00,476 INFO L290 TraceCheckUtils]: 16: Hoare triple {3591#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {3591#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:56:00,477 INFO L272 TraceCheckUtils]: 17: Hoare triple {3591#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3654#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:56:00,477 INFO L290 TraceCheckUtils]: 18: Hoare triple {3654#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3658#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:56:00,477 INFO L290 TraceCheckUtils]: 19: Hoare triple {3658#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3587#false} is VALID [2022-04-15 00:56:00,477 INFO L290 TraceCheckUtils]: 20: Hoare triple {3587#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3587#false} is VALID [2022-04-15 00:56:00,478 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:00,478 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:56:00,580 INFO L290 TraceCheckUtils]: 20: Hoare triple {3587#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3587#false} is VALID [2022-04-15 00:56:00,581 INFO L290 TraceCheckUtils]: 19: Hoare triple {3658#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3587#false} is VALID [2022-04-15 00:56:00,581 INFO L290 TraceCheckUtils]: 18: Hoare triple {3654#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3658#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:56:00,581 INFO L272 TraceCheckUtils]: 17: Hoare triple {3674#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3654#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:56:00,582 INFO L290 TraceCheckUtils]: 16: Hoare triple {3674#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {3674#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:56:00,582 INFO L290 TraceCheckUtils]: 15: Hoare triple {3681#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3674#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:56:00,583 INFO L290 TraceCheckUtils]: 14: Hoare triple {3685#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3681#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 00:56:00,583 INFO L290 TraceCheckUtils]: 13: Hoare triple {3689#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3685#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 00:56:00,584 INFO L290 TraceCheckUtils]: 12: Hoare triple {3693#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3689#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-15 00:56:00,585 INFO L290 TraceCheckUtils]: 11: Hoare triple {3693#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3693#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 00:56:00,585 INFO L290 TraceCheckUtils]: 10: Hoare triple {3693#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {3693#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 00:56:00,585 INFO L290 TraceCheckUtils]: 9: Hoare triple {3689#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3693#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 00:56:00,586 INFO L290 TraceCheckUtils]: 8: Hoare triple {3685#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3689#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-15 00:56:00,587 INFO L290 TraceCheckUtils]: 7: Hoare triple {3681#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3685#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 00:56:00,587 INFO L290 TraceCheckUtils]: 6: Hoare triple {3674#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3681#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 00:56:00,588 INFO L290 TraceCheckUtils]: 5: Hoare triple {3586#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3674#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:56:00,588 INFO L272 TraceCheckUtils]: 4: Hoare triple {3586#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-15 00:56:00,588 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3586#true} {3586#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-15 00:56:00,588 INFO L290 TraceCheckUtils]: 2: Hoare triple {3586#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-15 00:56:00,588 INFO L290 TraceCheckUtils]: 1: Hoare triple {3586#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3586#true} is VALID [2022-04-15 00:56:00,588 INFO L272 TraceCheckUtils]: 0: Hoare triple {3586#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-15 00:56:00,588 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:00,588 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [528733035] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:56:00,588 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:56:00,588 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 18 [2022-04-15 00:56:00,588 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [884242572] [2022-04-15 00:56:00,589 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:56:00,589 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-15 00:56:00,589 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:56:00,589 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:00,610 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:56:00,610 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-15 00:56:00,611 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:56:00,611 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-15 00:56:00,611 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=264, Unknown=0, NotChecked=0, Total=306 [2022-04-15 00:56:00,611 INFO L87 Difference]: Start difference. First operand 39 states and 51 transitions. Second operand has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:01,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:56:01,058 INFO L93 Difference]: Finished difference Result 49 states and 61 transitions. [2022-04-15 00:56:01,058 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-15 00:56:01,058 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-15 00:56:01,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:56:01,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:01,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 32 transitions. [2022-04-15 00:56:01,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:01,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 32 transitions. [2022-04-15 00:56:01,060 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 32 transitions. [2022-04-15 00:56:01,089 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:56:01,090 INFO L225 Difference]: With dead ends: 49 [2022-04-15 00:56:01,090 INFO L226 Difference]: Without dead ends: 44 [2022-04-15 00:56:01,090 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 36 SyntacticMatches, 4 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=81, Invalid=519, Unknown=0, NotChecked=0, Total=600 [2022-04-15 00:56:01,091 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 14 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 197 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 68 SdHoareTripleChecker+Invalid, 208 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 197 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 00:56:01,091 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [14 Valid, 68 Invalid, 208 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 197 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 00:56:01,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2022-04-15 00:56:01,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 38. [2022-04-15 00:56:01,218 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:56:01,218 INFO L82 GeneralOperation]: Start isEquivalent. First operand 44 states. Second operand has 38 states, 33 states have (on average 1.393939393939394) internal successors, (46), 33 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:01,218 INFO L74 IsIncluded]: Start isIncluded. First operand 44 states. Second operand has 38 states, 33 states have (on average 1.393939393939394) internal successors, (46), 33 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:01,218 INFO L87 Difference]: Start difference. First operand 44 states. Second operand has 38 states, 33 states have (on average 1.393939393939394) internal successors, (46), 33 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:01,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:56:01,219 INFO L93 Difference]: Finished difference Result 44 states and 56 transitions. [2022-04-15 00:56:01,219 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 56 transitions. [2022-04-15 00:56:01,219 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:56:01,219 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:56:01,219 INFO L74 IsIncluded]: Start isIncluded. First operand has 38 states, 33 states have (on average 1.393939393939394) internal successors, (46), 33 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 44 states. [2022-04-15 00:56:01,220 INFO L87 Difference]: Start difference. First operand has 38 states, 33 states have (on average 1.393939393939394) internal successors, (46), 33 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 44 states. [2022-04-15 00:56:01,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:56:01,220 INFO L93 Difference]: Finished difference Result 44 states and 56 transitions. [2022-04-15 00:56:01,220 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 56 transitions. [2022-04-15 00:56:01,220 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:56:01,220 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:56:01,220 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:56:01,220 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:56:01,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 33 states have (on average 1.393939393939394) internal successors, (46), 33 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:01,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 50 transitions. [2022-04-15 00:56:01,221 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 50 transitions. Word has length 21 [2022-04-15 00:56:01,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:56:01,221 INFO L478 AbstractCegarLoop]: Abstraction has 38 states and 50 transitions. [2022-04-15 00:56:01,221 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:01,222 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 50 transitions. [2022-04-15 00:56:01,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-15 00:56:01,222 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:56:01,222 INFO L499 BasicCegarLoop]: trace histogram [5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:56:01,253 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-15 00:56:01,435 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-15 00:56:01,435 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:56:01,436 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:56:01,436 INFO L85 PathProgramCache]: Analyzing trace with hash -1690016164, now seen corresponding path program 10 times [2022-04-15 00:56:01,436 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:56:01,436 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [682274932] [2022-04-15 00:56:01,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:56:01,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:56:01,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:01,575 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:56:01,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:01,580 INFO L290 TraceCheckUtils]: 0: Hoare triple {3999#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3984#true} is VALID [2022-04-15 00:56:01,580 INFO L290 TraceCheckUtils]: 1: Hoare triple {3984#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-15 00:56:01,580 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3984#true} {3984#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-15 00:56:01,580 INFO L272 TraceCheckUtils]: 0: Hoare triple {3984#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3999#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:56:01,580 INFO L290 TraceCheckUtils]: 1: Hoare triple {3999#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3984#true} is VALID [2022-04-15 00:56:01,580 INFO L290 TraceCheckUtils]: 2: Hoare triple {3984#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-15 00:56:01,580 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3984#true} {3984#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-15 00:56:01,581 INFO L272 TraceCheckUtils]: 4: Hoare triple {3984#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-15 00:56:01,581 INFO L290 TraceCheckUtils]: 5: Hoare triple {3984#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3989#(= main_~y~0 0)} is VALID [2022-04-15 00:56:01,581 INFO L290 TraceCheckUtils]: 6: Hoare triple {3989#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3990#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:56:01,582 INFO L290 TraceCheckUtils]: 7: Hoare triple {3990#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3991#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:56:01,582 INFO L290 TraceCheckUtils]: 8: Hoare triple {3991#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3992#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:56:01,583 INFO L290 TraceCheckUtils]: 9: Hoare triple {3992#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3993#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 00:56:01,583 INFO L290 TraceCheckUtils]: 10: Hoare triple {3993#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {3993#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 00:56:01,583 INFO L290 TraceCheckUtils]: 11: Hoare triple {3993#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3994#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 00:56:01,584 INFO L290 TraceCheckUtils]: 12: Hoare triple {3994#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3995#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 00:56:01,584 INFO L290 TraceCheckUtils]: 13: Hoare triple {3995#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3996#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 00:56:01,585 INFO L290 TraceCheckUtils]: 14: Hoare triple {3996#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3997#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 00:56:01,585 INFO L290 TraceCheckUtils]: 15: Hoare triple {3997#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3998#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 00:56:01,586 INFO L290 TraceCheckUtils]: 16: Hoare triple {3998#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3985#false} is VALID [2022-04-15 00:56:01,586 INFO L290 TraceCheckUtils]: 17: Hoare triple {3985#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {3985#false} is VALID [2022-04-15 00:56:01,586 INFO L272 TraceCheckUtils]: 18: Hoare triple {3985#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3985#false} is VALID [2022-04-15 00:56:01,586 INFO L290 TraceCheckUtils]: 19: Hoare triple {3985#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3985#false} is VALID [2022-04-15 00:56:01,586 INFO L290 TraceCheckUtils]: 20: Hoare triple {3985#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3985#false} is VALID [2022-04-15 00:56:01,586 INFO L290 TraceCheckUtils]: 21: Hoare triple {3985#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3985#false} is VALID [2022-04-15 00:56:01,586 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:01,586 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:56:01,586 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [682274932] [2022-04-15 00:56:01,586 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [682274932] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:56:01,586 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1537330881] [2022-04-15 00:56:01,586 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 00:56:01,587 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:56:01,587 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:56:01,587 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:56:01,588 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-15 00:56:01,645 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 00:56:01,645 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:56:01,646 INFO L263 TraceCheckSpWp]: Trace formula consists of 103 conjuncts, 21 conjunts are in the unsatisfiable core [2022-04-15 00:56:01,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:01,658 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:56:01,804 INFO L272 TraceCheckUtils]: 0: Hoare triple {3984#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-15 00:56:01,804 INFO L290 TraceCheckUtils]: 1: Hoare triple {3984#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3984#true} is VALID [2022-04-15 00:56:01,804 INFO L290 TraceCheckUtils]: 2: Hoare triple {3984#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-15 00:56:01,804 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3984#true} {3984#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-15 00:56:01,805 INFO L272 TraceCheckUtils]: 4: Hoare triple {3984#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-15 00:56:01,805 INFO L290 TraceCheckUtils]: 5: Hoare triple {3984#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3989#(= main_~y~0 0)} is VALID [2022-04-15 00:56:01,805 INFO L290 TraceCheckUtils]: 6: Hoare triple {3989#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3990#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:56:01,805 INFO L290 TraceCheckUtils]: 7: Hoare triple {3990#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3991#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:56:01,807 INFO L290 TraceCheckUtils]: 8: Hoare triple {3991#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3992#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:56:01,807 INFO L290 TraceCheckUtils]: 9: Hoare triple {3992#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3993#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 00:56:01,807 INFO L290 TraceCheckUtils]: 10: Hoare triple {3993#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {3993#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 00:56:01,807 INFO L290 TraceCheckUtils]: 11: Hoare triple {3993#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3994#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 00:56:01,808 INFO L290 TraceCheckUtils]: 12: Hoare triple {3994#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3995#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 00:56:01,808 INFO L290 TraceCheckUtils]: 13: Hoare triple {3995#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3996#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 00:56:01,809 INFO L290 TraceCheckUtils]: 14: Hoare triple {3996#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3997#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 00:56:01,809 INFO L290 TraceCheckUtils]: 15: Hoare triple {3997#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3998#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 00:56:01,809 INFO L290 TraceCheckUtils]: 16: Hoare triple {3998#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3985#false} is VALID [2022-04-15 00:56:01,809 INFO L290 TraceCheckUtils]: 17: Hoare triple {3985#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {3985#false} is VALID [2022-04-15 00:56:01,810 INFO L272 TraceCheckUtils]: 18: Hoare triple {3985#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3985#false} is VALID [2022-04-15 00:56:01,810 INFO L290 TraceCheckUtils]: 19: Hoare triple {3985#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3985#false} is VALID [2022-04-15 00:56:01,810 INFO L290 TraceCheckUtils]: 20: Hoare triple {3985#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3985#false} is VALID [2022-04-15 00:56:01,810 INFO L290 TraceCheckUtils]: 21: Hoare triple {3985#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3985#false} is VALID [2022-04-15 00:56:01,810 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:01,810 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:56:01,933 INFO L290 TraceCheckUtils]: 21: Hoare triple {3985#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3985#false} is VALID [2022-04-15 00:56:01,933 INFO L290 TraceCheckUtils]: 20: Hoare triple {3985#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3985#false} is VALID [2022-04-15 00:56:01,933 INFO L290 TraceCheckUtils]: 19: Hoare triple {3985#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3985#false} is VALID [2022-04-15 00:56:01,933 INFO L272 TraceCheckUtils]: 18: Hoare triple {3985#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3985#false} is VALID [2022-04-15 00:56:01,933 INFO L290 TraceCheckUtils]: 17: Hoare triple {3985#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {3985#false} is VALID [2022-04-15 00:56:01,933 INFO L290 TraceCheckUtils]: 16: Hoare triple {4081#(not (< 0 (mod main_~z~0 4294967296)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3985#false} is VALID [2022-04-15 00:56:01,934 INFO L290 TraceCheckUtils]: 15: Hoare triple {4085#(not (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4081#(not (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-15 00:56:01,934 INFO L290 TraceCheckUtils]: 14: Hoare triple {4089#(not (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4085#(not (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-15 00:56:01,935 INFO L290 TraceCheckUtils]: 13: Hoare triple {4093#(not (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4089#(not (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} is VALID [2022-04-15 00:56:01,935 INFO L290 TraceCheckUtils]: 12: Hoare triple {4097#(not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4093#(not (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} is VALID [2022-04-15 00:56:01,936 INFO L290 TraceCheckUtils]: 11: Hoare triple {4101#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {4097#(not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)))} is VALID [2022-04-15 00:56:01,936 INFO L290 TraceCheckUtils]: 10: Hoare triple {4101#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {4101#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-15 00:56:01,938 INFO L290 TraceCheckUtils]: 9: Hoare triple {4108#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4101#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-15 00:56:01,939 INFO L290 TraceCheckUtils]: 8: Hoare triple {4112#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4108#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-15 00:56:01,939 INFO L290 TraceCheckUtils]: 7: Hoare triple {4116#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4112#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-15 00:56:01,940 INFO L290 TraceCheckUtils]: 6: Hoare triple {4120#(not (< 0 (mod main_~y~0 4294967296)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4116#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-15 00:56:01,940 INFO L290 TraceCheckUtils]: 5: Hoare triple {3984#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4120#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-15 00:56:01,940 INFO L272 TraceCheckUtils]: 4: Hoare triple {3984#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-15 00:56:01,940 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3984#true} {3984#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-15 00:56:01,940 INFO L290 TraceCheckUtils]: 2: Hoare triple {3984#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-15 00:56:01,940 INFO L290 TraceCheckUtils]: 1: Hoare triple {3984#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3984#true} is VALID [2022-04-15 00:56:01,941 INFO L272 TraceCheckUtils]: 0: Hoare triple {3984#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-15 00:56:01,941 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:01,941 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1537330881] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:56:01,941 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:56:01,941 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 23 [2022-04-15 00:56:01,941 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [91297098] [2022-04-15 00:56:01,942 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:56:01,942 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 22 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-15 00:56:01,942 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:56:01,942 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 22 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:01,958 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:56:01,958 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-15 00:56:01,958 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:56:01,958 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-15 00:56:01,958 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=453, Unknown=0, NotChecked=0, Total=506 [2022-04-15 00:56:01,959 INFO L87 Difference]: Start difference. First operand 38 states and 50 transitions. Second operand has 23 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 22 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:02,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:56:02,408 INFO L93 Difference]: Finished difference Result 50 states and 62 transitions. [2022-04-15 00:56:02,408 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-15 00:56:02,408 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 22 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-15 00:56:02,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:56:02,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 22 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:02,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 33 transitions. [2022-04-15 00:56:02,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 22 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:02,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 33 transitions. [2022-04-15 00:56:02,410 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 33 transitions. [2022-04-15 00:56:02,429 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:56:02,429 INFO L225 Difference]: With dead ends: 50 [2022-04-15 00:56:02,429 INFO L226 Difference]: Without dead ends: 38 [2022-04-15 00:56:02,430 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 35 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=123, Invalid=999, Unknown=0, NotChecked=0, Total=1122 [2022-04-15 00:56:02,430 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 13 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 233 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 251 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 233 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 00:56:02,430 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [13 Valid, 84 Invalid, 251 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 233 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 00:56:02,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2022-04-15 00:56:02,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2022-04-15 00:56:02,505 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:56:02,505 INFO L82 GeneralOperation]: Start isEquivalent. First operand 38 states. Second operand has 38 states, 33 states have (on average 1.3636363636363635) internal successors, (45), 33 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:02,505 INFO L74 IsIncluded]: Start isIncluded. First operand 38 states. Second operand has 38 states, 33 states have (on average 1.3636363636363635) internal successors, (45), 33 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:02,505 INFO L87 Difference]: Start difference. First operand 38 states. Second operand has 38 states, 33 states have (on average 1.3636363636363635) internal successors, (45), 33 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:02,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:56:02,506 INFO L93 Difference]: Finished difference Result 38 states and 49 transitions. [2022-04-15 00:56:02,506 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 49 transitions. [2022-04-15 00:56:02,506 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:56:02,506 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:56:02,506 INFO L74 IsIncluded]: Start isIncluded. First operand has 38 states, 33 states have (on average 1.3636363636363635) internal successors, (45), 33 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-15 00:56:02,506 INFO L87 Difference]: Start difference. First operand has 38 states, 33 states have (on average 1.3636363636363635) internal successors, (45), 33 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-15 00:56:02,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:56:02,507 INFO L93 Difference]: Finished difference Result 38 states and 49 transitions. [2022-04-15 00:56:02,507 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 49 transitions. [2022-04-15 00:56:02,507 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:56:02,507 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:56:02,507 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:56:02,507 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:56:02,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 33 states have (on average 1.3636363636363635) internal successors, (45), 33 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:02,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 49 transitions. [2022-04-15 00:56:02,508 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 49 transitions. Word has length 22 [2022-04-15 00:56:02,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:56:02,508 INFO L478 AbstractCegarLoop]: Abstraction has 38 states and 49 transitions. [2022-04-15 00:56:02,508 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 22 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:02,508 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 49 transitions. [2022-04-15 00:56:02,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-15 00:56:02,508 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:56:02,508 INFO L499 BasicCegarLoop]: trace histogram [6, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:56:02,527 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-15 00:56:02,721 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-15 00:56:02,721 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:56:02,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:56:02,722 INFO L85 PathProgramCache]: Analyzing trace with hash -1948985764, now seen corresponding path program 11 times [2022-04-15 00:56:02,722 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:56:02,722 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1074077869] [2022-04-15 00:56:02,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:56:02,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:56:02,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:02,862 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:56:02,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:02,865 INFO L290 TraceCheckUtils]: 0: Hoare triple {4407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4391#true} is VALID [2022-04-15 00:56:02,865 INFO L290 TraceCheckUtils]: 1: Hoare triple {4391#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-15 00:56:02,865 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4391#true} {4391#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-15 00:56:02,866 INFO L272 TraceCheckUtils]: 0: Hoare triple {4391#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:56:02,866 INFO L290 TraceCheckUtils]: 1: Hoare triple {4407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4391#true} is VALID [2022-04-15 00:56:02,866 INFO L290 TraceCheckUtils]: 2: Hoare triple {4391#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-15 00:56:02,866 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4391#true} {4391#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-15 00:56:02,866 INFO L272 TraceCheckUtils]: 4: Hoare triple {4391#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-15 00:56:02,866 INFO L290 TraceCheckUtils]: 5: Hoare triple {4391#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4396#(= main_~y~0 0)} is VALID [2022-04-15 00:56:02,866 INFO L290 TraceCheckUtils]: 6: Hoare triple {4396#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4397#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:56:02,867 INFO L290 TraceCheckUtils]: 7: Hoare triple {4397#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4398#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:56:02,867 INFO L290 TraceCheckUtils]: 8: Hoare triple {4398#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4399#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:56:02,868 INFO L290 TraceCheckUtils]: 9: Hoare triple {4399#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4400#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 00:56:02,868 INFO L290 TraceCheckUtils]: 10: Hoare triple {4400#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4401#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 00:56:02,869 INFO L290 TraceCheckUtils]: 11: Hoare triple {4401#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4402#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 00:56:02,869 INFO L290 TraceCheckUtils]: 12: Hoare triple {4402#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {4402#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 00:56:02,870 INFO L290 TraceCheckUtils]: 13: Hoare triple {4402#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {4403#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 00:56:02,870 INFO L290 TraceCheckUtils]: 14: Hoare triple {4403#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4404#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 00:56:02,871 INFO L290 TraceCheckUtils]: 15: Hoare triple {4404#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4405#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 00:56:02,871 INFO L290 TraceCheckUtils]: 16: Hoare triple {4405#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4406#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 00:56:02,872 INFO L290 TraceCheckUtils]: 17: Hoare triple {4406#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {4392#false} is VALID [2022-04-15 00:56:02,872 INFO L272 TraceCheckUtils]: 18: Hoare triple {4392#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {4392#false} is VALID [2022-04-15 00:56:02,872 INFO L290 TraceCheckUtils]: 19: Hoare triple {4392#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4392#false} is VALID [2022-04-15 00:56:02,872 INFO L290 TraceCheckUtils]: 20: Hoare triple {4392#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4392#false} is VALID [2022-04-15 00:56:02,872 INFO L290 TraceCheckUtils]: 21: Hoare triple {4392#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4392#false} is VALID [2022-04-15 00:56:02,872 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:02,872 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:56:02,872 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1074077869] [2022-04-15 00:56:02,872 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1074077869] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:56:02,872 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1876865859] [2022-04-15 00:56:02,872 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-15 00:56:02,873 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:56:02,873 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:56:02,873 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:56:02,915 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-15 00:56:02,955 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-15 00:56:02,955 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:56:02,956 INFO L263 TraceCheckSpWp]: Trace formula consists of 103 conjuncts, 23 conjunts are in the unsatisfiable core [2022-04-15 00:56:02,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:02,961 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:56:03,173 INFO L272 TraceCheckUtils]: 0: Hoare triple {4391#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-15 00:56:03,174 INFO L290 TraceCheckUtils]: 1: Hoare triple {4391#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4391#true} is VALID [2022-04-15 00:56:03,174 INFO L290 TraceCheckUtils]: 2: Hoare triple {4391#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-15 00:56:03,174 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4391#true} {4391#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-15 00:56:03,174 INFO L272 TraceCheckUtils]: 4: Hoare triple {4391#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-15 00:56:03,174 INFO L290 TraceCheckUtils]: 5: Hoare triple {4391#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4396#(= main_~y~0 0)} is VALID [2022-04-15 00:56:03,175 INFO L290 TraceCheckUtils]: 6: Hoare triple {4396#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4397#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:56:03,186 INFO L290 TraceCheckUtils]: 7: Hoare triple {4397#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4398#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:56:03,197 INFO L290 TraceCheckUtils]: 8: Hoare triple {4398#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4399#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:56:03,197 INFO L290 TraceCheckUtils]: 9: Hoare triple {4399#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4400#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 00:56:03,198 INFO L290 TraceCheckUtils]: 10: Hoare triple {4400#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4401#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 00:56:03,198 INFO L290 TraceCheckUtils]: 11: Hoare triple {4401#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4402#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 00:56:03,199 INFO L290 TraceCheckUtils]: 12: Hoare triple {4402#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {4402#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 00:56:03,199 INFO L290 TraceCheckUtils]: 13: Hoare triple {4402#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {4403#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 00:56:03,199 INFO L290 TraceCheckUtils]: 14: Hoare triple {4403#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4404#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 00:56:03,200 INFO L290 TraceCheckUtils]: 15: Hoare triple {4404#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4405#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 00:56:03,200 INFO L290 TraceCheckUtils]: 16: Hoare triple {4405#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4459#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 00:56:03,201 INFO L290 TraceCheckUtils]: 17: Hoare triple {4459#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {4392#false} is VALID [2022-04-15 00:56:03,201 INFO L272 TraceCheckUtils]: 18: Hoare triple {4392#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {4392#false} is VALID [2022-04-15 00:56:03,201 INFO L290 TraceCheckUtils]: 19: Hoare triple {4392#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4392#false} is VALID [2022-04-15 00:56:03,201 INFO L290 TraceCheckUtils]: 20: Hoare triple {4392#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4392#false} is VALID [2022-04-15 00:56:03,201 INFO L290 TraceCheckUtils]: 21: Hoare triple {4392#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4392#false} is VALID [2022-04-15 00:56:03,201 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:03,201 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:56:03,432 INFO L290 TraceCheckUtils]: 21: Hoare triple {4392#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4392#false} is VALID [2022-04-15 00:56:03,432 INFO L290 TraceCheckUtils]: 20: Hoare triple {4392#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4392#false} is VALID [2022-04-15 00:56:03,432 INFO L290 TraceCheckUtils]: 19: Hoare triple {4392#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4392#false} is VALID [2022-04-15 00:56:03,432 INFO L272 TraceCheckUtils]: 18: Hoare triple {4392#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {4392#false} is VALID [2022-04-15 00:56:03,432 INFO L290 TraceCheckUtils]: 17: Hoare triple {4487#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {4392#false} is VALID [2022-04-15 00:56:03,434 INFO L290 TraceCheckUtils]: 16: Hoare triple {4491#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4487#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 00:56:03,434 INFO L290 TraceCheckUtils]: 15: Hoare triple {4495#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4491#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-15 00:56:03,435 INFO L290 TraceCheckUtils]: 14: Hoare triple {4499#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4495#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-15 00:56:03,435 INFO L290 TraceCheckUtils]: 13: Hoare triple {4503#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {4499#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-15 00:56:03,436 INFO L290 TraceCheckUtils]: 12: Hoare triple {4503#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {4503#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 00:56:03,436 INFO L290 TraceCheckUtils]: 11: Hoare triple {4510#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4503#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 00:56:03,437 INFO L290 TraceCheckUtils]: 10: Hoare triple {4514#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4510#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 00:56:03,438 INFO L290 TraceCheckUtils]: 9: Hoare triple {4518#(< 0 (mod main_~y~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4514#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 00:56:03,438 INFO L290 TraceCheckUtils]: 8: Hoare triple {4522#(< 0 (mod (+ main_~y~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4518#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 00:56:03,439 INFO L290 TraceCheckUtils]: 7: Hoare triple {4526#(< 0 (mod (+ main_~y~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4522#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-15 00:56:03,440 INFO L290 TraceCheckUtils]: 6: Hoare triple {4530#(< 0 (mod (+ main_~y~0 3) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4526#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-15 00:56:03,440 INFO L290 TraceCheckUtils]: 5: Hoare triple {4391#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4530#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-15 00:56:03,440 INFO L272 TraceCheckUtils]: 4: Hoare triple {4391#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-15 00:56:03,440 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4391#true} {4391#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-15 00:56:03,440 INFO L290 TraceCheckUtils]: 2: Hoare triple {4391#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-15 00:56:03,440 INFO L290 TraceCheckUtils]: 1: Hoare triple {4391#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4391#true} is VALID [2022-04-15 00:56:03,440 INFO L272 TraceCheckUtils]: 0: Hoare triple {4391#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-15 00:56:03,440 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:03,441 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1876865859] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:56:03,441 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:56:03,441 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 26 [2022-04-15 00:56:03,441 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1668281171] [2022-04-15 00:56:03,441 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:56:03,441 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 1.3076923076923077) internal successors, (34), 25 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-15 00:56:03,441 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:56:03,441 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 26 states have (on average 1.3076923076923077) internal successors, (34), 25 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:03,466 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:56:03,466 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-15 00:56:03,467 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:56:03,467 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-15 00:56:03,467 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=116, Invalid=534, Unknown=0, NotChecked=0, Total=650 [2022-04-15 00:56:03,467 INFO L87 Difference]: Start difference. First operand 38 states and 49 transitions. Second operand has 26 states, 26 states have (on average 1.3076923076923077) internal successors, (34), 25 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:13,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:56:13,820 INFO L93 Difference]: Finished difference Result 103 states and 144 transitions. [2022-04-15 00:56:13,820 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2022-04-15 00:56:13,820 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 1.3076923076923077) internal successors, (34), 25 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-15 00:56:13,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:56:13,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.3076923076923077) internal successors, (34), 25 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:13,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 144 transitions. [2022-04-15 00:56:13,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.3076923076923077) internal successors, (34), 25 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:13,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 144 transitions. [2022-04-15 00:56:13,824 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 69 states and 144 transitions. [2022-04-15 00:56:14,138 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 144 edges. 144 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:56:14,140 INFO L225 Difference]: With dead ends: 103 [2022-04-15 00:56:14,140 INFO L226 Difference]: Without dead ends: 98 [2022-04-15 00:56:14,142 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 33 SyntacticMatches, 1 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2398 ImplicationChecksByTransitivity, 8.7s TimeCoverageRelationStatistics Valid=1783, Invalid=6589, Unknown=0, NotChecked=0, Total=8372 [2022-04-15 00:56:14,142 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 195 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 347 mSolverCounterSat, 270 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 195 SdHoareTripleChecker+Valid, 80 SdHoareTripleChecker+Invalid, 617 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 270 IncrementalHoareTripleChecker+Valid, 347 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-15 00:56:14,142 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [195 Valid, 80 Invalid, 617 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [270 Valid, 347 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-15 00:56:14,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2022-04-15 00:56:14,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 50. [2022-04-15 00:56:14,366 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:56:14,366 INFO L82 GeneralOperation]: Start isEquivalent. First operand 98 states. Second operand has 50 states, 45 states have (on average 1.3777777777777778) internal successors, (62), 45 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:14,366 INFO L74 IsIncluded]: Start isIncluded. First operand 98 states. Second operand has 50 states, 45 states have (on average 1.3777777777777778) internal successors, (62), 45 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:14,366 INFO L87 Difference]: Start difference. First operand 98 states. Second operand has 50 states, 45 states have (on average 1.3777777777777778) internal successors, (62), 45 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:14,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:56:14,367 INFO L93 Difference]: Finished difference Result 98 states and 125 transitions. [2022-04-15 00:56:14,368 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 125 transitions. [2022-04-15 00:56:14,368 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:56:14,368 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:56:14,368 INFO L74 IsIncluded]: Start isIncluded. First operand has 50 states, 45 states have (on average 1.3777777777777778) internal successors, (62), 45 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 98 states. [2022-04-15 00:56:14,368 INFO L87 Difference]: Start difference. First operand has 50 states, 45 states have (on average 1.3777777777777778) internal successors, (62), 45 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 98 states. [2022-04-15 00:56:14,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:56:14,369 INFO L93 Difference]: Finished difference Result 98 states and 125 transitions. [2022-04-15 00:56:14,369 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 125 transitions. [2022-04-15 00:56:14,369 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:56:14,370 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:56:14,370 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:56:14,370 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:56:14,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 45 states have (on average 1.3777777777777778) internal successors, (62), 45 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:14,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 66 transitions. [2022-04-15 00:56:14,370 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 66 transitions. Word has length 22 [2022-04-15 00:56:14,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:56:14,371 INFO L478 AbstractCegarLoop]: Abstraction has 50 states and 66 transitions. [2022-04-15 00:56:14,371 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 1.3076923076923077) internal successors, (34), 25 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:14,371 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 66 transitions. [2022-04-15 00:56:14,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-15 00:56:14,371 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:56:14,371 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:56:14,389 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-15 00:56:14,586 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-15 00:56:14,587 INFO L403 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:56:14,587 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:56:14,587 INFO L85 PathProgramCache]: Analyzing trace with hash -279854581, now seen corresponding path program 12 times [2022-04-15 00:56:14,587 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:56:14,587 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1518453484] [2022-04-15 00:56:14,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:56:14,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:56:14,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:14,736 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:56:14,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:14,739 INFO L290 TraceCheckUtils]: 0: Hoare triple {5169#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5155#true} is VALID [2022-04-15 00:56:14,739 INFO L290 TraceCheckUtils]: 1: Hoare triple {5155#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-15 00:56:14,739 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5155#true} {5155#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-15 00:56:14,739 INFO L272 TraceCheckUtils]: 0: Hoare triple {5155#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5169#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:56:14,739 INFO L290 TraceCheckUtils]: 1: Hoare triple {5169#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5155#true} is VALID [2022-04-15 00:56:14,739 INFO L290 TraceCheckUtils]: 2: Hoare triple {5155#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-15 00:56:14,740 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5155#true} {5155#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-15 00:56:14,740 INFO L272 TraceCheckUtils]: 4: Hoare triple {5155#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-15 00:56:14,740 INFO L290 TraceCheckUtils]: 5: Hoare triple {5155#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5160#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:56:14,740 INFO L290 TraceCheckUtils]: 6: Hoare triple {5160#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5161#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:56:14,741 INFO L290 TraceCheckUtils]: 7: Hoare triple {5161#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5162#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:56:14,741 INFO L290 TraceCheckUtils]: 8: Hoare triple {5162#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5163#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 00:56:14,742 INFO L290 TraceCheckUtils]: 9: Hoare triple {5163#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5164#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 00:56:14,742 INFO L290 TraceCheckUtils]: 10: Hoare triple {5164#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} is VALID [2022-04-15 00:56:14,742 INFO L290 TraceCheckUtils]: 11: Hoare triple {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} is VALID [2022-04-15 00:56:14,743 INFO L290 TraceCheckUtils]: 12: Hoare triple {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} is VALID [2022-04-15 00:56:14,743 INFO L290 TraceCheckUtils]: 13: Hoare triple {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5164#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 00:56:14,744 INFO L290 TraceCheckUtils]: 14: Hoare triple {5164#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5163#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 00:56:14,744 INFO L290 TraceCheckUtils]: 15: Hoare triple {5163#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5162#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:56:14,745 INFO L290 TraceCheckUtils]: 16: Hoare triple {5162#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5161#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:56:14,745 INFO L290 TraceCheckUtils]: 17: Hoare triple {5161#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5166#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 00:56:14,746 INFO L290 TraceCheckUtils]: 18: Hoare triple {5166#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {5166#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 00:56:14,746 INFO L272 TraceCheckUtils]: 19: Hoare triple {5166#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {5167#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:56:14,746 INFO L290 TraceCheckUtils]: 20: Hoare triple {5167#(not (= |__VERIFIER_assert_#in~cond| 0))} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5168#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:56:14,747 INFO L290 TraceCheckUtils]: 21: Hoare triple {5168#(not (= __VERIFIER_assert_~cond 0))} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5156#false} is VALID [2022-04-15 00:56:14,747 INFO L290 TraceCheckUtils]: 22: Hoare triple {5156#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5156#false} is VALID [2022-04-15 00:56:14,747 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:14,747 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:56:14,747 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1518453484] [2022-04-15 00:56:14,747 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1518453484] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:56:14,747 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1447417322] [2022-04-15 00:56:14,747 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-15 00:56:14,747 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:56:14,748 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:56:14,764 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:56:14,765 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-15 00:56:14,808 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2022-04-15 00:56:14,808 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:56:14,809 INFO L263 TraceCheckSpWp]: Trace formula consists of 108 conjuncts, 27 conjunts are in the unsatisfiable core [2022-04-15 00:56:14,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:14,818 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:56:14,963 INFO L272 TraceCheckUtils]: 0: Hoare triple {5155#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-15 00:56:14,963 INFO L290 TraceCheckUtils]: 1: Hoare triple {5155#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5155#true} is VALID [2022-04-15 00:56:14,963 INFO L290 TraceCheckUtils]: 2: Hoare triple {5155#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-15 00:56:14,963 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5155#true} {5155#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-15 00:56:14,963 INFO L272 TraceCheckUtils]: 4: Hoare triple {5155#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-15 00:56:14,963 INFO L290 TraceCheckUtils]: 5: Hoare triple {5155#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5160#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:56:14,964 INFO L290 TraceCheckUtils]: 6: Hoare triple {5160#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5161#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:56:14,965 INFO L290 TraceCheckUtils]: 7: Hoare triple {5161#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5162#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:56:14,965 INFO L290 TraceCheckUtils]: 8: Hoare triple {5162#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5163#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 00:56:14,966 INFO L290 TraceCheckUtils]: 9: Hoare triple {5163#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5164#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 00:56:14,966 INFO L290 TraceCheckUtils]: 10: Hoare triple {5164#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} is VALID [2022-04-15 00:56:14,967 INFO L290 TraceCheckUtils]: 11: Hoare triple {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} is VALID [2022-04-15 00:56:14,967 INFO L290 TraceCheckUtils]: 12: Hoare triple {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} is VALID [2022-04-15 00:56:14,968 INFO L290 TraceCheckUtils]: 13: Hoare triple {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5164#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 00:56:14,968 INFO L290 TraceCheckUtils]: 14: Hoare triple {5164#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5163#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 00:56:14,969 INFO L290 TraceCheckUtils]: 15: Hoare triple {5163#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5162#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:56:14,969 INFO L290 TraceCheckUtils]: 16: Hoare triple {5162#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5161#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:56:14,970 INFO L290 TraceCheckUtils]: 17: Hoare triple {5161#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5160#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:56:14,970 INFO L290 TraceCheckUtils]: 18: Hoare triple {5160#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {5160#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:56:14,971 INFO L272 TraceCheckUtils]: 19: Hoare triple {5160#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {5230#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:56:14,971 INFO L290 TraceCheckUtils]: 20: Hoare triple {5230#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5234#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:56:14,972 INFO L290 TraceCheckUtils]: 21: Hoare triple {5234#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5156#false} is VALID [2022-04-15 00:56:14,972 INFO L290 TraceCheckUtils]: 22: Hoare triple {5156#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5156#false} is VALID [2022-04-15 00:56:14,972 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:14,972 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:56:15,167 INFO L290 TraceCheckUtils]: 22: Hoare triple {5156#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5156#false} is VALID [2022-04-15 00:56:15,167 INFO L290 TraceCheckUtils]: 21: Hoare triple {5234#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5156#false} is VALID [2022-04-15 00:56:15,168 INFO L290 TraceCheckUtils]: 20: Hoare triple {5230#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5234#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:56:15,171 INFO L272 TraceCheckUtils]: 19: Hoare triple {5250#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {5230#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:56:15,171 INFO L290 TraceCheckUtils]: 18: Hoare triple {5250#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {5250#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:56:15,172 INFO L290 TraceCheckUtils]: 17: Hoare triple {5257#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5250#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:56:15,173 INFO L290 TraceCheckUtils]: 16: Hoare triple {5261#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5257#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 00:56:15,173 INFO L290 TraceCheckUtils]: 15: Hoare triple {5265#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5261#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 00:56:15,174 INFO L290 TraceCheckUtils]: 14: Hoare triple {5269#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5265#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-15 00:56:15,175 INFO L290 TraceCheckUtils]: 13: Hoare triple {5273#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5269#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 00:56:15,175 INFO L290 TraceCheckUtils]: 12: Hoare triple {5273#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {5273#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-15 00:56:15,175 INFO L290 TraceCheckUtils]: 11: Hoare triple {5273#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {5273#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-15 00:56:15,176 INFO L290 TraceCheckUtils]: 10: Hoare triple {5269#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5273#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-15 00:56:15,177 INFO L290 TraceCheckUtils]: 9: Hoare triple {5265#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5269#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 00:56:15,178 INFO L290 TraceCheckUtils]: 8: Hoare triple {5261#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5265#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-15 00:56:15,178 INFO L290 TraceCheckUtils]: 7: Hoare triple {5257#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5261#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 00:56:15,179 INFO L290 TraceCheckUtils]: 6: Hoare triple {5250#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5257#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 00:56:15,179 INFO L290 TraceCheckUtils]: 5: Hoare triple {5155#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5250#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:56:15,180 INFO L272 TraceCheckUtils]: 4: Hoare triple {5155#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-15 00:56:15,180 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5155#true} {5155#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-15 00:56:15,180 INFO L290 TraceCheckUtils]: 2: Hoare triple {5155#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-15 00:56:15,180 INFO L290 TraceCheckUtils]: 1: Hoare triple {5155#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5155#true} is VALID [2022-04-15 00:56:15,180 INFO L272 TraceCheckUtils]: 0: Hoare triple {5155#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-15 00:56:15,180 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:15,180 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1447417322] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:56:15,180 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:56:15,180 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10, 10] total 20 [2022-04-15 00:56:15,180 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2145880393] [2022-04-15 00:56:15,181 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:56:15,181 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-15 00:56:15,181 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:56:15,181 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:15,216 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:56:15,217 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-15 00:56:15,217 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:56:15,217 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-15 00:56:15,217 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=333, Unknown=0, NotChecked=0, Total=380 [2022-04-15 00:56:15,217 INFO L87 Difference]: Start difference. First operand 50 states and 66 transitions. Second operand has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:15,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:56:15,927 INFO L93 Difference]: Finished difference Result 61 states and 77 transitions. [2022-04-15 00:56:15,928 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-15 00:56:15,928 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-15 00:56:15,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:56:15,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:15,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 34 transitions. [2022-04-15 00:56:15,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:15,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 34 transitions. [2022-04-15 00:56:15,930 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 34 transitions. [2022-04-15 00:56:15,947 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:56:15,948 INFO L225 Difference]: With dead ends: 61 [2022-04-15 00:56:15,948 INFO L226 Difference]: Without dead ends: 56 [2022-04-15 00:56:15,948 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 40 SyntacticMatches, 4 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 83 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=91, Invalid=665, Unknown=0, NotChecked=0, Total=756 [2022-04-15 00:56:15,949 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 14 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 239 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 73 SdHoareTripleChecker+Invalid, 251 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 239 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 00:56:15,949 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [14 Valid, 73 Invalid, 251 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 239 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-15 00:56:15,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2022-04-15 00:56:16,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 53. [2022-04-15 00:56:16,131 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:56:16,131 INFO L82 GeneralOperation]: Start isEquivalent. First operand 56 states. Second operand has 53 states, 48 states have (on average 1.3541666666666667) internal successors, (65), 48 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:16,132 INFO L74 IsIncluded]: Start isIncluded. First operand 56 states. Second operand has 53 states, 48 states have (on average 1.3541666666666667) internal successors, (65), 48 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:16,132 INFO L87 Difference]: Start difference. First operand 56 states. Second operand has 53 states, 48 states have (on average 1.3541666666666667) internal successors, (65), 48 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:16,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:56:16,147 INFO L93 Difference]: Finished difference Result 56 states and 72 transitions. [2022-04-15 00:56:16,147 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 72 transitions. [2022-04-15 00:56:16,147 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:56:16,147 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:56:16,147 INFO L74 IsIncluded]: Start isIncluded. First operand has 53 states, 48 states have (on average 1.3541666666666667) internal successors, (65), 48 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 56 states. [2022-04-15 00:56:16,148 INFO L87 Difference]: Start difference. First operand has 53 states, 48 states have (on average 1.3541666666666667) internal successors, (65), 48 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 56 states. [2022-04-15 00:56:16,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:56:16,148 INFO L93 Difference]: Finished difference Result 56 states and 72 transitions. [2022-04-15 00:56:16,148 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 72 transitions. [2022-04-15 00:56:16,149 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:56:16,149 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:56:16,149 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:56:16,149 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:56:16,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 48 states have (on average 1.3541666666666667) internal successors, (65), 48 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:16,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 69 transitions. [2022-04-15 00:56:16,164 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 69 transitions. Word has length 23 [2022-04-15 00:56:16,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:56:16,164 INFO L478 AbstractCegarLoop]: Abstraction has 53 states and 69 transitions. [2022-04-15 00:56:16,164 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:16,164 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 69 transitions. [2022-04-15 00:56:16,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-15 00:56:16,165 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:56:16,165 INFO L499 BasicCegarLoop]: trace histogram [7, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:56:16,192 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-15 00:56:16,365 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-04-15 00:56:16,366 INFO L403 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:56:16,366 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:56:16,366 INFO L85 PathProgramCache]: Analyzing trace with hash 503040188, now seen corresponding path program 13 times [2022-04-15 00:56:16,366 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:56:16,366 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [943594477] [2022-04-15 00:56:16,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:56:16,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:56:16,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:16,511 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:56:16,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:16,523 INFO L290 TraceCheckUtils]: 0: Hoare triple {5662#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5644#true} is VALID [2022-04-15 00:56:16,523 INFO L290 TraceCheckUtils]: 1: Hoare triple {5644#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-15 00:56:16,523 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5644#true} {5644#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-15 00:56:16,523 INFO L272 TraceCheckUtils]: 0: Hoare triple {5644#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5662#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:56:16,523 INFO L290 TraceCheckUtils]: 1: Hoare triple {5662#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5644#true} is VALID [2022-04-15 00:56:16,523 INFO L290 TraceCheckUtils]: 2: Hoare triple {5644#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-15 00:56:16,523 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5644#true} {5644#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-15 00:56:16,523 INFO L272 TraceCheckUtils]: 4: Hoare triple {5644#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-15 00:56:16,524 INFO L290 TraceCheckUtils]: 5: Hoare triple {5644#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5649#(= main_~y~0 0)} is VALID [2022-04-15 00:56:16,524 INFO L290 TraceCheckUtils]: 6: Hoare triple {5649#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5650#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:56:16,524 INFO L290 TraceCheckUtils]: 7: Hoare triple {5650#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5651#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:56:16,525 INFO L290 TraceCheckUtils]: 8: Hoare triple {5651#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5652#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:56:16,525 INFO L290 TraceCheckUtils]: 9: Hoare triple {5652#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5653#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 00:56:16,526 INFO L290 TraceCheckUtils]: 10: Hoare triple {5653#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5654#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 00:56:16,526 INFO L290 TraceCheckUtils]: 11: Hoare triple {5654#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5655#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 00:56:16,526 INFO L290 TraceCheckUtils]: 12: Hoare triple {5655#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5656#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 00:56:16,527 INFO L290 TraceCheckUtils]: 13: Hoare triple {5656#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {5656#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 00:56:16,527 INFO L290 TraceCheckUtils]: 14: Hoare triple {5656#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {5657#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-15 00:56:16,527 INFO L290 TraceCheckUtils]: 15: Hoare triple {5657#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5658#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 00:56:16,528 INFO L290 TraceCheckUtils]: 16: Hoare triple {5658#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5659#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 00:56:16,528 INFO L290 TraceCheckUtils]: 17: Hoare triple {5659#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5660#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 00:56:16,528 INFO L290 TraceCheckUtils]: 18: Hoare triple {5660#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5661#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 00:56:16,529 INFO L290 TraceCheckUtils]: 19: Hoare triple {5661#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {5645#false} is VALID [2022-04-15 00:56:16,529 INFO L272 TraceCheckUtils]: 20: Hoare triple {5645#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {5645#false} is VALID [2022-04-15 00:56:16,529 INFO L290 TraceCheckUtils]: 21: Hoare triple {5645#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5645#false} is VALID [2022-04-15 00:56:16,529 INFO L290 TraceCheckUtils]: 22: Hoare triple {5645#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5645#false} is VALID [2022-04-15 00:56:16,529 INFO L290 TraceCheckUtils]: 23: Hoare triple {5645#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5645#false} is VALID [2022-04-15 00:56:16,529 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:16,529 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:56:16,529 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [943594477] [2022-04-15 00:56:16,529 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [943594477] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:56:16,530 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1113458800] [2022-04-15 00:56:16,530 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-15 00:56:16,530 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:56:16,530 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:56:16,530 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:56:16,532 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-15 00:56:16,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:16,561 INFO L263 TraceCheckSpWp]: Trace formula consists of 113 conjuncts, 27 conjunts are in the unsatisfiable core [2022-04-15 00:56:16,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:16,565 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:56:16,782 INFO L272 TraceCheckUtils]: 0: Hoare triple {5644#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-15 00:56:16,782 INFO L290 TraceCheckUtils]: 1: Hoare triple {5644#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5644#true} is VALID [2022-04-15 00:56:16,782 INFO L290 TraceCheckUtils]: 2: Hoare triple {5644#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-15 00:56:16,782 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5644#true} {5644#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-15 00:56:16,782 INFO L272 TraceCheckUtils]: 4: Hoare triple {5644#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-15 00:56:16,783 INFO L290 TraceCheckUtils]: 5: Hoare triple {5644#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5649#(= main_~y~0 0)} is VALID [2022-04-15 00:56:16,783 INFO L290 TraceCheckUtils]: 6: Hoare triple {5649#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5650#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:56:16,784 INFO L290 TraceCheckUtils]: 7: Hoare triple {5650#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5651#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:56:16,784 INFO L290 TraceCheckUtils]: 8: Hoare triple {5651#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5652#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:56:16,785 INFO L290 TraceCheckUtils]: 9: Hoare triple {5652#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5653#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 00:56:16,785 INFO L290 TraceCheckUtils]: 10: Hoare triple {5653#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5654#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 00:56:16,786 INFO L290 TraceCheckUtils]: 11: Hoare triple {5654#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5655#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 00:56:16,786 INFO L290 TraceCheckUtils]: 12: Hoare triple {5655#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5656#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 00:56:16,786 INFO L290 TraceCheckUtils]: 13: Hoare triple {5656#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {5656#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 00:56:16,787 INFO L290 TraceCheckUtils]: 14: Hoare triple {5656#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {5657#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-15 00:56:16,787 INFO L290 TraceCheckUtils]: 15: Hoare triple {5657#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5658#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 00:56:16,788 INFO L290 TraceCheckUtils]: 16: Hoare triple {5658#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5659#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 00:56:16,788 INFO L290 TraceCheckUtils]: 17: Hoare triple {5659#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5660#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 00:56:16,789 INFO L290 TraceCheckUtils]: 18: Hoare triple {5660#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5720#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 00:56:16,789 INFO L290 TraceCheckUtils]: 19: Hoare triple {5720#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {5645#false} is VALID [2022-04-15 00:56:16,789 INFO L272 TraceCheckUtils]: 20: Hoare triple {5645#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {5645#false} is VALID [2022-04-15 00:56:16,789 INFO L290 TraceCheckUtils]: 21: Hoare triple {5645#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5645#false} is VALID [2022-04-15 00:56:16,790 INFO L290 TraceCheckUtils]: 22: Hoare triple {5645#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5645#false} is VALID [2022-04-15 00:56:16,790 INFO L290 TraceCheckUtils]: 23: Hoare triple {5645#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5645#false} is VALID [2022-04-15 00:56:16,790 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:16,790 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:56:17,075 INFO L290 TraceCheckUtils]: 23: Hoare triple {5645#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5645#false} is VALID [2022-04-15 00:56:17,075 INFO L290 TraceCheckUtils]: 22: Hoare triple {5645#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5645#false} is VALID [2022-04-15 00:56:17,075 INFO L290 TraceCheckUtils]: 21: Hoare triple {5645#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5645#false} is VALID [2022-04-15 00:56:17,075 INFO L272 TraceCheckUtils]: 20: Hoare triple {5645#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {5645#false} is VALID [2022-04-15 00:56:17,075 INFO L290 TraceCheckUtils]: 19: Hoare triple {5748#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {5645#false} is VALID [2022-04-15 00:56:17,076 INFO L290 TraceCheckUtils]: 18: Hoare triple {5752#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5748#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 00:56:17,077 INFO L290 TraceCheckUtils]: 17: Hoare triple {5756#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5752#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-15 00:56:17,077 INFO L290 TraceCheckUtils]: 16: Hoare triple {5760#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5756#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-15 00:56:17,078 INFO L290 TraceCheckUtils]: 15: Hoare triple {5764#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5760#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-15 00:56:17,078 INFO L290 TraceCheckUtils]: 14: Hoare triple {5768#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {5764#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} is VALID [2022-04-15 00:56:17,079 INFO L290 TraceCheckUtils]: 13: Hoare triple {5768#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {5768#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-15 00:56:17,079 INFO L290 TraceCheckUtils]: 12: Hoare triple {5775#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5768#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-15 00:56:17,080 INFO L290 TraceCheckUtils]: 11: Hoare triple {5779#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5775#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 00:56:17,080 INFO L290 TraceCheckUtils]: 10: Hoare triple {5783#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5779#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 00:56:17,081 INFO L290 TraceCheckUtils]: 9: Hoare triple {5787#(< 0 (mod main_~y~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5783#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 00:56:17,082 INFO L290 TraceCheckUtils]: 8: Hoare triple {5791#(< 0 (mod (+ main_~y~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5787#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 00:56:17,082 INFO L290 TraceCheckUtils]: 7: Hoare triple {5795#(< 0 (mod (+ main_~y~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5791#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-15 00:56:17,083 INFO L290 TraceCheckUtils]: 6: Hoare triple {5799#(< 0 (mod (+ main_~y~0 3) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5795#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-15 00:56:17,083 INFO L290 TraceCheckUtils]: 5: Hoare triple {5644#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5799#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-15 00:56:17,083 INFO L272 TraceCheckUtils]: 4: Hoare triple {5644#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-15 00:56:17,083 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5644#true} {5644#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-15 00:56:17,084 INFO L290 TraceCheckUtils]: 2: Hoare triple {5644#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-15 00:56:17,084 INFO L290 TraceCheckUtils]: 1: Hoare triple {5644#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5644#true} is VALID [2022-04-15 00:56:17,084 INFO L272 TraceCheckUtils]: 0: Hoare triple {5644#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-15 00:56:17,084 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:17,084 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1113458800] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:56:17,084 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:56:17,084 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 15] total 30 [2022-04-15 00:56:17,084 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [154168025] [2022-04-15 00:56:17,084 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:56:17,085 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 1.2666666666666666) internal successors, (38), 29 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-15 00:56:17,085 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:56:17,085 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 30 states, 30 states have (on average 1.2666666666666666) internal successors, (38), 29 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:17,113 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:56:17,113 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-04-15 00:56:17,113 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:56:17,113 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-04-15 00:56:17,113 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=147, Invalid=723, Unknown=0, NotChecked=0, Total=870 [2022-04-15 00:56:17,114 INFO L87 Difference]: Start difference. First operand 53 states and 69 transitions. Second operand has 30 states, 30 states have (on average 1.2666666666666666) internal successors, (38), 29 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:42,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:56:42,836 INFO L93 Difference]: Finished difference Result 135 states and 188 transitions. [2022-04-15 00:56:42,836 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 97 states. [2022-04-15 00:56:42,837 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 1.2666666666666666) internal successors, (38), 29 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-15 00:56:42,837 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:56:42,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.2666666666666666) internal successors, (38), 29 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:42,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 188 transitions. [2022-04-15 00:56:42,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.2666666666666666) internal successors, (38), 29 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:42,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 188 transitions. [2022-04-15 00:56:42,841 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 97 states and 188 transitions. [2022-04-15 00:56:43,292 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 188 edges. 188 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:56:43,294 INFO L225 Difference]: With dead ends: 135 [2022-04-15 00:56:43,294 INFO L226 Difference]: Without dead ends: 130 [2022-04-15 00:56:43,297 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 35 SyntacticMatches, 1 SemanticMatches, 122 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4829 ImplicationChecksByTransitivity, 22.8s TimeCoverageRelationStatistics Valid=3140, Invalid=12112, Unknown=0, NotChecked=0, Total=15252 [2022-04-15 00:56:43,298 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 283 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 491 mSolverCounterSat, 467 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 283 SdHoareTripleChecker+Valid, 83 SdHoareTripleChecker+Invalid, 958 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 467 IncrementalHoareTripleChecker+Valid, 491 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-04-15 00:56:43,298 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [283 Valid, 83 Invalid, 958 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [467 Valid, 491 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-04-15 00:56:43,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2022-04-15 00:56:43,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 63. [2022-04-15 00:56:43,528 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:56:43,529 INFO L82 GeneralOperation]: Start isEquivalent. First operand 130 states. Second operand has 63 states, 58 states have (on average 1.396551724137931) internal successors, (81), 58 states have internal predecessors, (81), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:43,529 INFO L74 IsIncluded]: Start isIncluded. First operand 130 states. Second operand has 63 states, 58 states have (on average 1.396551724137931) internal successors, (81), 58 states have internal predecessors, (81), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:43,546 INFO L87 Difference]: Start difference. First operand 130 states. Second operand has 63 states, 58 states have (on average 1.396551724137931) internal successors, (81), 58 states have internal predecessors, (81), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:43,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:56:43,553 INFO L93 Difference]: Finished difference Result 130 states and 165 transitions. [2022-04-15 00:56:43,553 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 165 transitions. [2022-04-15 00:56:43,558 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:56:43,558 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:56:43,558 INFO L74 IsIncluded]: Start isIncluded. First operand has 63 states, 58 states have (on average 1.396551724137931) internal successors, (81), 58 states have internal predecessors, (81), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 130 states. [2022-04-15 00:56:43,558 INFO L87 Difference]: Start difference. First operand has 63 states, 58 states have (on average 1.396551724137931) internal successors, (81), 58 states have internal predecessors, (81), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 130 states. [2022-04-15 00:56:43,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:56:43,560 INFO L93 Difference]: Finished difference Result 130 states and 165 transitions. [2022-04-15 00:56:43,560 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 165 transitions. [2022-04-15 00:56:43,560 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:56:43,560 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:56:43,560 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:56:43,560 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:56:43,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 58 states have (on average 1.396551724137931) internal successors, (81), 58 states have internal predecessors, (81), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:43,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 85 transitions. [2022-04-15 00:56:43,561 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 85 transitions. Word has length 24 [2022-04-15 00:56:43,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:56:43,562 INFO L478 AbstractCegarLoop]: Abstraction has 63 states and 85 transitions. [2022-04-15 00:56:43,562 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 30 states have (on average 1.2666666666666666) internal successors, (38), 29 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:43,562 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 85 transitions. [2022-04-15 00:56:43,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-15 00:56:43,562 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:56:43,562 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:56:43,589 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2022-04-15 00:56:43,790 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:56:43,790 INFO L403 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:56:43,790 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:56:43,790 INFO L85 PathProgramCache]: Analyzing trace with hash -2103221077, now seen corresponding path program 14 times [2022-04-15 00:56:43,790 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:56:43,790 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2021277336] [2022-04-15 00:56:43,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:56:43,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:56:43,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:44,289 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:56:44,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:44,294 INFO L290 TraceCheckUtils]: 0: Hoare triple {6651#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6630#true} is VALID [2022-04-15 00:56:44,294 INFO L290 TraceCheckUtils]: 1: Hoare triple {6630#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-15 00:56:44,294 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6630#true} {6630#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-15 00:56:44,294 INFO L272 TraceCheckUtils]: 0: Hoare triple {6630#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6651#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:56:44,294 INFO L290 TraceCheckUtils]: 1: Hoare triple {6651#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6630#true} is VALID [2022-04-15 00:56:44,295 INFO L290 TraceCheckUtils]: 2: Hoare triple {6630#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-15 00:56:44,295 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6630#true} {6630#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-15 00:56:44,296 INFO L272 TraceCheckUtils]: 4: Hoare triple {6630#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-15 00:56:44,296 INFO L290 TraceCheckUtils]: 5: Hoare triple {6630#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6635#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:56:44,297 INFO L290 TraceCheckUtils]: 6: Hoare triple {6635#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6636#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:56:44,298 INFO L290 TraceCheckUtils]: 7: Hoare triple {6636#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6637#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293)) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:56:44,298 INFO L290 TraceCheckUtils]: 8: Hoare triple {6637#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293)) (<= main_~n~0 (+ main_~x~0 2)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6638#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)) (<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296)))))} is VALID [2022-04-15 00:56:44,299 INFO L290 TraceCheckUtils]: 9: Hoare triple {6638#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)) (<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296)))))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6639#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 00:56:44,301 INFO L290 TraceCheckUtils]: 10: Hoare triple {6639#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 4) main_~n~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6640#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296)))))} is VALID [2022-04-15 00:56:44,302 INFO L290 TraceCheckUtils]: 11: Hoare triple {6640#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296)))))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6641#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= main_~n~0 (+ main_~x~0 6)) (<= (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-15 00:56:44,303 INFO L290 TraceCheckUtils]: 12: Hoare triple {6641#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= main_~n~0 (+ main_~x~0 6)) (<= (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {6642#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~n~0 (+ main_~x~0 6)) (<= (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-15 00:56:44,303 INFO L290 TraceCheckUtils]: 13: Hoare triple {6642#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~n~0 (+ main_~x~0 6)) (<= (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {6642#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~n~0 (+ main_~x~0 6)) (<= (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-15 00:56:44,304 INFO L290 TraceCheckUtils]: 14: Hoare triple {6642#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~n~0 (+ main_~x~0 6)) (<= (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6643#(and (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967300 (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0))} is VALID [2022-04-15 00:56:44,305 INFO L290 TraceCheckUtils]: 15: Hoare triple {6643#(and (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967300 (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6644#(and (<= (+ (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) 2) main_~x~0) (<= main_~n~0 (+ main_~x~0 4)) (<= main_~x~0 (+ 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-15 00:56:44,307 INFO L290 TraceCheckUtils]: 16: Hoare triple {6644#(and (<= (+ (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) 2) main_~x~0) (<= main_~n~0 (+ main_~x~0 4)) (<= main_~x~0 (+ 2 (* (div main_~n~0 4294967296) 4294967296))))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6645#(and (<= main_~n~0 (+ main_~x~0 3)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 3) main_~x~0) (<= main_~x~0 (+ 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-15 00:56:44,308 INFO L290 TraceCheckUtils]: 17: Hoare triple {6645#(and (<= main_~n~0 (+ main_~x~0 3)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 3) main_~x~0) (<= main_~x~0 (+ 3 (* (div main_~n~0 4294967296) 4294967296))))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6646#(and (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 4)) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:56:44,309 INFO L290 TraceCheckUtils]: 18: Hoare triple {6646#(and (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 4)) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6647#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 5) main_~x~0) (<= main_~x~0 (+ 5 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:56:44,310 INFO L290 TraceCheckUtils]: 19: Hoare triple {6647#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 5) main_~x~0) (<= main_~x~0 (+ 5 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6648#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 00:56:44,310 INFO L290 TraceCheckUtils]: 20: Hoare triple {6648#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {6648#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 00:56:44,311 INFO L272 TraceCheckUtils]: 21: Hoare triple {6648#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {6649#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:56:44,312 INFO L290 TraceCheckUtils]: 22: Hoare triple {6649#(not (= |__VERIFIER_assert_#in~cond| 0))} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6650#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:56:44,317 INFO L290 TraceCheckUtils]: 23: Hoare triple {6650#(not (= __VERIFIER_assert_~cond 0))} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6631#false} is VALID [2022-04-15 00:56:44,317 INFO L290 TraceCheckUtils]: 24: Hoare triple {6631#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6631#false} is VALID [2022-04-15 00:56:44,317 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:44,317 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:56:44,317 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2021277336] [2022-04-15 00:56:44,317 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2021277336] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:56:44,318 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2052265459] [2022-04-15 00:56:44,318 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 00:56:44,318 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:56:44,318 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:56:44,323 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:56:44,324 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-15 00:56:44,357 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 00:56:44,357 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:56:44,358 INFO L263 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 29 conjunts are in the unsatisfiable core [2022-04-15 00:56:44,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:44,364 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:56:44,602 INFO L272 TraceCheckUtils]: 0: Hoare triple {6630#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-15 00:56:44,603 INFO L290 TraceCheckUtils]: 1: Hoare triple {6630#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6630#true} is VALID [2022-04-15 00:56:44,603 INFO L290 TraceCheckUtils]: 2: Hoare triple {6630#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-15 00:56:44,603 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6630#true} {6630#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-15 00:56:44,603 INFO L272 TraceCheckUtils]: 4: Hoare triple {6630#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-15 00:56:44,603 INFO L290 TraceCheckUtils]: 5: Hoare triple {6630#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6635#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:56:44,604 INFO L290 TraceCheckUtils]: 6: Hoare triple {6635#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6673#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-15 00:56:44,604 INFO L290 TraceCheckUtils]: 7: Hoare triple {6673#(= (+ main_~x~0 1) main_~n~0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6677#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-15 00:56:44,605 INFO L290 TraceCheckUtils]: 8: Hoare triple {6677#(= main_~n~0 (+ main_~x~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6681#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} is VALID [2022-04-15 00:56:44,605 INFO L290 TraceCheckUtils]: 9: Hoare triple {6681#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6685#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} is VALID [2022-04-15 00:56:44,606 INFO L290 TraceCheckUtils]: 10: Hoare triple {6685#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6689#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} is VALID [2022-04-15 00:56:44,606 INFO L290 TraceCheckUtils]: 11: Hoare triple {6689#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6693#(= (+ main_~x~0 1) (+ main_~n~0 (- 5)))} is VALID [2022-04-15 00:56:44,607 INFO L290 TraceCheckUtils]: 12: Hoare triple {6693#(= (+ main_~x~0 1) (+ main_~n~0 (- 5)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {6693#(= (+ main_~x~0 1) (+ main_~n~0 (- 5)))} is VALID [2022-04-15 00:56:44,607 INFO L290 TraceCheckUtils]: 13: Hoare triple {6693#(= (+ main_~x~0 1) (+ main_~n~0 (- 5)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {6693#(= (+ main_~x~0 1) (+ main_~n~0 (- 5)))} is VALID [2022-04-15 00:56:44,608 INFO L290 TraceCheckUtils]: 14: Hoare triple {6693#(= (+ main_~x~0 1) (+ main_~n~0 (- 5)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6689#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} is VALID [2022-04-15 00:56:44,608 INFO L290 TraceCheckUtils]: 15: Hoare triple {6689#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6685#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} is VALID [2022-04-15 00:56:44,609 INFO L290 TraceCheckUtils]: 16: Hoare triple {6685#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6681#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} is VALID [2022-04-15 00:56:44,609 INFO L290 TraceCheckUtils]: 17: Hoare triple {6681#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6677#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-15 00:56:44,610 INFO L290 TraceCheckUtils]: 18: Hoare triple {6677#(= main_~n~0 (+ main_~x~0 2))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6673#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-15 00:56:44,610 INFO L290 TraceCheckUtils]: 19: Hoare triple {6673#(= (+ main_~x~0 1) main_~n~0)} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6635#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:56:44,610 INFO L290 TraceCheckUtils]: 20: Hoare triple {6635#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {6635#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:56:44,611 INFO L272 TraceCheckUtils]: 21: Hoare triple {6635#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {6724#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:56:44,611 INFO L290 TraceCheckUtils]: 22: Hoare triple {6724#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6728#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:56:44,612 INFO L290 TraceCheckUtils]: 23: Hoare triple {6728#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6631#false} is VALID [2022-04-15 00:56:44,612 INFO L290 TraceCheckUtils]: 24: Hoare triple {6631#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6631#false} is VALID [2022-04-15 00:56:44,612 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:44,612 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:56:44,928 INFO L290 TraceCheckUtils]: 24: Hoare triple {6631#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6631#false} is VALID [2022-04-15 00:56:44,929 INFO L290 TraceCheckUtils]: 23: Hoare triple {6728#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6631#false} is VALID [2022-04-15 00:56:44,929 INFO L290 TraceCheckUtils]: 22: Hoare triple {6724#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6728#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:56:44,930 INFO L272 TraceCheckUtils]: 21: Hoare triple {6744#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {6724#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:56:44,930 INFO L290 TraceCheckUtils]: 20: Hoare triple {6744#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {6744#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:56:44,931 INFO L290 TraceCheckUtils]: 19: Hoare triple {6751#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6744#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:56:44,931 INFO L290 TraceCheckUtils]: 18: Hoare triple {6755#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6751#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 00:56:44,932 INFO L290 TraceCheckUtils]: 17: Hoare triple {6759#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6755#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 00:56:44,933 INFO L290 TraceCheckUtils]: 16: Hoare triple {6763#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6759#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-15 00:56:44,934 INFO L290 TraceCheckUtils]: 15: Hoare triple {6767#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6763#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 00:56:44,934 INFO L290 TraceCheckUtils]: 14: Hoare triple {6771#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6767#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-15 00:56:44,935 INFO L290 TraceCheckUtils]: 13: Hoare triple {6771#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {6771#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-15 00:56:44,935 INFO L290 TraceCheckUtils]: 12: Hoare triple {6771#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {6771#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-15 00:56:44,937 INFO L290 TraceCheckUtils]: 11: Hoare triple {6767#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6771#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-15 00:56:44,938 INFO L290 TraceCheckUtils]: 10: Hoare triple {6763#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6767#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-15 00:56:44,938 INFO L290 TraceCheckUtils]: 9: Hoare triple {6759#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6763#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 00:56:44,939 INFO L290 TraceCheckUtils]: 8: Hoare triple {6755#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6759#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-15 00:56:44,940 INFO L290 TraceCheckUtils]: 7: Hoare triple {6751#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6755#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 00:56:44,940 INFO L290 TraceCheckUtils]: 6: Hoare triple {6744#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6751#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 00:56:44,941 INFO L290 TraceCheckUtils]: 5: Hoare triple {6630#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6744#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:56:44,941 INFO L272 TraceCheckUtils]: 4: Hoare triple {6630#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-15 00:56:44,941 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6630#true} {6630#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-15 00:56:44,941 INFO L290 TraceCheckUtils]: 2: Hoare triple {6630#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-15 00:56:44,941 INFO L290 TraceCheckUtils]: 1: Hoare triple {6630#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6630#true} is VALID [2022-04-15 00:56:44,941 INFO L272 TraceCheckUtils]: 0: Hoare triple {6630#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-15 00:56:44,941 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:44,941 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2052265459] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:56:44,942 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:56:44,942 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 11, 11] total 34 [2022-04-15 00:56:44,942 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1831759601] [2022-04-15 00:56:44,942 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:56:44,942 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.6176470588235294) internal successors, (55), 31 states have internal predecessors, (55), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-15 00:56:44,942 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:56:44,942 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 34 states, 34 states have (on average 1.6176470588235294) internal successors, (55), 31 states have internal predecessors, (55), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:45,024 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:56:45,024 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-04-15 00:56:45,024 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:56:45,025 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-04-15 00:56:45,025 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=1016, Unknown=0, NotChecked=0, Total=1122 [2022-04-15 00:56:45,025 INFO L87 Difference]: Start difference. First operand 63 states and 85 transitions. Second operand has 34 states, 34 states have (on average 1.6176470588235294) internal successors, (55), 31 states have internal predecessors, (55), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:47,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:56:47,077 INFO L93 Difference]: Finished difference Result 78 states and 100 transitions. [2022-04-15 00:56:47,077 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-15 00:56:47,077 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.6176470588235294) internal successors, (55), 31 states have internal predecessors, (55), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-15 00:56:47,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:56:47,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.6176470588235294) internal successors, (55), 31 states have internal predecessors, (55), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:47,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 43 transitions. [2022-04-15 00:56:47,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.6176470588235294) internal successors, (55), 31 states have internal predecessors, (55), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:47,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 43 transitions. [2022-04-15 00:56:47,079 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 43 transitions. [2022-04-15 00:56:47,131 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:56:47,132 INFO L225 Difference]: With dead ends: 78 [2022-04-15 00:56:47,132 INFO L226 Difference]: Without dead ends: 73 [2022-04-15 00:56:47,133 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 30 SyntacticMatches, 7 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 528 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=209, Invalid=2143, Unknown=0, NotChecked=0, Total=2352 [2022-04-15 00:56:47,133 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 21 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 455 mSolverCounterSat, 21 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 94 SdHoareTripleChecker+Invalid, 476 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 21 IncrementalHoareTripleChecker+Valid, 455 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-15 00:56:47,133 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [21 Valid, 94 Invalid, 476 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [21 Valid, 455 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-15 00:56:47,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2022-04-15 00:56:47,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 64. [2022-04-15 00:56:47,530 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:56:47,530 INFO L82 GeneralOperation]: Start isEquivalent. First operand 73 states. Second operand has 64 states, 59 states have (on average 1.3898305084745763) internal successors, (82), 59 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:47,530 INFO L74 IsIncluded]: Start isIncluded. First operand 73 states. Second operand has 64 states, 59 states have (on average 1.3898305084745763) internal successors, (82), 59 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:47,530 INFO L87 Difference]: Start difference. First operand 73 states. Second operand has 64 states, 59 states have (on average 1.3898305084745763) internal successors, (82), 59 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:47,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:56:47,532 INFO L93 Difference]: Finished difference Result 73 states and 95 transitions. [2022-04-15 00:56:47,532 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 95 transitions. [2022-04-15 00:56:47,532 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:56:47,532 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:56:47,532 INFO L74 IsIncluded]: Start isIncluded. First operand has 64 states, 59 states have (on average 1.3898305084745763) internal successors, (82), 59 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 73 states. [2022-04-15 00:56:47,532 INFO L87 Difference]: Start difference. First operand has 64 states, 59 states have (on average 1.3898305084745763) internal successors, (82), 59 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 73 states. [2022-04-15 00:56:47,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:56:47,533 INFO L93 Difference]: Finished difference Result 73 states and 95 transitions. [2022-04-15 00:56:47,533 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 95 transitions. [2022-04-15 00:56:47,534 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:56:47,534 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:56:47,534 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:56:47,534 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:56:47,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 59 states have (on average 1.3898305084745763) internal successors, (82), 59 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:47,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 86 transitions. [2022-04-15 00:56:47,535 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 86 transitions. Word has length 25 [2022-04-15 00:56:47,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:56:47,535 INFO L478 AbstractCegarLoop]: Abstraction has 64 states and 86 transitions. [2022-04-15 00:56:47,535 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 1.6176470588235294) internal successors, (55), 31 states have internal predecessors, (55), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:47,535 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 86 transitions. [2022-04-15 00:56:47,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-15 00:56:47,537 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:56:47,537 INFO L499 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:56:47,553 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2022-04-15 00:56:47,750 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-15 00:56:47,751 INFO L403 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:56:47,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:56:47,751 INFO L85 PathProgramCache]: Analyzing trace with hash 1183323307, now seen corresponding path program 2 times [2022-04-15 00:56:47,751 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:56:47,751 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2098515687] [2022-04-15 00:56:47,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:56:47,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:56:47,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:47,948 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:56:47,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:47,951 INFO L290 TraceCheckUtils]: 0: Hoare triple {7264#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7245#true} is VALID [2022-04-15 00:56:47,951 INFO L290 TraceCheckUtils]: 1: Hoare triple {7245#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-15 00:56:47,951 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7245#true} {7245#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-15 00:56:47,951 INFO L272 TraceCheckUtils]: 0: Hoare triple {7245#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7264#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:56:47,951 INFO L290 TraceCheckUtils]: 1: Hoare triple {7264#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7245#true} is VALID [2022-04-15 00:56:47,952 INFO L290 TraceCheckUtils]: 2: Hoare triple {7245#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-15 00:56:47,952 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7245#true} {7245#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-15 00:56:47,952 INFO L272 TraceCheckUtils]: 4: Hoare triple {7245#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-15 00:56:47,952 INFO L290 TraceCheckUtils]: 5: Hoare triple {7245#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7250#(= main_~y~0 0)} is VALID [2022-04-15 00:56:47,952 INFO L290 TraceCheckUtils]: 6: Hoare triple {7250#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7251#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:56:47,953 INFO L290 TraceCheckUtils]: 7: Hoare triple {7251#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7252#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:56:47,953 INFO L290 TraceCheckUtils]: 8: Hoare triple {7252#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7253#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:56:47,954 INFO L290 TraceCheckUtils]: 9: Hoare triple {7253#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7254#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 00:56:47,954 INFO L290 TraceCheckUtils]: 10: Hoare triple {7254#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7255#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 00:56:47,955 INFO L290 TraceCheckUtils]: 11: Hoare triple {7255#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7256#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 00:56:47,955 INFO L290 TraceCheckUtils]: 12: Hoare triple {7256#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7257#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 00:56:47,956 INFO L290 TraceCheckUtils]: 13: Hoare triple {7257#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7258#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 00:56:47,957 INFO L290 TraceCheckUtils]: 14: Hoare triple {7258#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7259#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 00:56:47,957 INFO L290 TraceCheckUtils]: 15: Hoare triple {7259#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7260#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 00:56:47,958 INFO L290 TraceCheckUtils]: 16: Hoare triple {7260#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7261#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 00:56:47,958 INFO L290 TraceCheckUtils]: 17: Hoare triple {7261#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7262#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 00:56:47,958 INFO L290 TraceCheckUtils]: 18: Hoare triple {7262#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {7262#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 00:56:47,959 INFO L290 TraceCheckUtils]: 19: Hoare triple {7262#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {7263#(and (<= (div main_~z~0 4294967296) 0) (<= 12 main_~z~0))} is VALID [2022-04-15 00:56:47,959 INFO L290 TraceCheckUtils]: 20: Hoare triple {7263#(and (<= (div main_~z~0 4294967296) 0) (<= 12 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {7246#false} is VALID [2022-04-15 00:56:47,959 INFO L272 TraceCheckUtils]: 21: Hoare triple {7246#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {7246#false} is VALID [2022-04-15 00:56:47,959 INFO L290 TraceCheckUtils]: 22: Hoare triple {7246#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7246#false} is VALID [2022-04-15 00:56:47,960 INFO L290 TraceCheckUtils]: 23: Hoare triple {7246#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7246#false} is VALID [2022-04-15 00:56:47,960 INFO L290 TraceCheckUtils]: 24: Hoare triple {7246#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7246#false} is VALID [2022-04-15 00:56:47,960 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:47,960 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:56:47,960 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2098515687] [2022-04-15 00:56:47,960 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2098515687] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:56:47,960 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1285473476] [2022-04-15 00:56:47,960 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 00:56:47,960 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:56:47,960 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:56:47,961 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:56:47,962 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-15 00:56:47,994 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 00:56:47,994 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:56:47,994 INFO L263 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 29 conjunts are in the unsatisfiable core [2022-04-15 00:56:48,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:56:48,000 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:56:48,206 INFO L272 TraceCheckUtils]: 0: Hoare triple {7245#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-15 00:56:48,206 INFO L290 TraceCheckUtils]: 1: Hoare triple {7245#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7245#true} is VALID [2022-04-15 00:56:48,207 INFO L290 TraceCheckUtils]: 2: Hoare triple {7245#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-15 00:56:48,207 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7245#true} {7245#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-15 00:56:48,207 INFO L272 TraceCheckUtils]: 4: Hoare triple {7245#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-15 00:56:48,207 INFO L290 TraceCheckUtils]: 5: Hoare triple {7245#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7250#(= main_~y~0 0)} is VALID [2022-04-15 00:56:48,208 INFO L290 TraceCheckUtils]: 6: Hoare triple {7250#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7251#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:56:48,208 INFO L290 TraceCheckUtils]: 7: Hoare triple {7251#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7252#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:56:48,209 INFO L290 TraceCheckUtils]: 8: Hoare triple {7252#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7253#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:56:48,230 INFO L290 TraceCheckUtils]: 9: Hoare triple {7253#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7254#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 00:56:48,231 INFO L290 TraceCheckUtils]: 10: Hoare triple {7254#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7255#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 00:56:48,232 INFO L290 TraceCheckUtils]: 11: Hoare triple {7255#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7256#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 00:56:48,232 INFO L290 TraceCheckUtils]: 12: Hoare triple {7256#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7257#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 00:56:48,233 INFO L290 TraceCheckUtils]: 13: Hoare triple {7257#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7258#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 00:56:48,233 INFO L290 TraceCheckUtils]: 14: Hoare triple {7258#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7259#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 00:56:48,234 INFO L290 TraceCheckUtils]: 15: Hoare triple {7259#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7260#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 00:56:48,234 INFO L290 TraceCheckUtils]: 16: Hoare triple {7260#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7261#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 00:56:48,235 INFO L290 TraceCheckUtils]: 17: Hoare triple {7261#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7262#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 00:56:48,235 INFO L290 TraceCheckUtils]: 18: Hoare triple {7262#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {7262#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 00:56:48,236 INFO L290 TraceCheckUtils]: 19: Hoare triple {7262#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {7325#(and (<= main_~z~0 12) (<= 12 main_~z~0))} is VALID [2022-04-15 00:56:48,236 INFO L290 TraceCheckUtils]: 20: Hoare triple {7325#(and (<= main_~z~0 12) (<= 12 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {7246#false} is VALID [2022-04-15 00:56:48,236 INFO L272 TraceCheckUtils]: 21: Hoare triple {7246#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {7246#false} is VALID [2022-04-15 00:56:48,236 INFO L290 TraceCheckUtils]: 22: Hoare triple {7246#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7246#false} is VALID [2022-04-15 00:56:48,236 INFO L290 TraceCheckUtils]: 23: Hoare triple {7246#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7246#false} is VALID [2022-04-15 00:56:48,236 INFO L290 TraceCheckUtils]: 24: Hoare triple {7246#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7246#false} is VALID [2022-04-15 00:56:48,237 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:48,237 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:56:48,579 INFO L290 TraceCheckUtils]: 24: Hoare triple {7246#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7246#false} is VALID [2022-04-15 00:56:48,580 INFO L290 TraceCheckUtils]: 23: Hoare triple {7246#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7246#false} is VALID [2022-04-15 00:56:48,580 INFO L290 TraceCheckUtils]: 22: Hoare triple {7246#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7246#false} is VALID [2022-04-15 00:56:48,580 INFO L272 TraceCheckUtils]: 21: Hoare triple {7246#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {7246#false} is VALID [2022-04-15 00:56:48,580 INFO L290 TraceCheckUtils]: 20: Hoare triple {7353#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {7246#false} is VALID [2022-04-15 00:56:48,580 INFO L290 TraceCheckUtils]: 19: Hoare triple {7357#(< 0 (mod main_~y~0 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {7353#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 00:56:48,581 INFO L290 TraceCheckUtils]: 18: Hoare triple {7357#(< 0 (mod main_~y~0 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {7357#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 00:56:48,581 INFO L290 TraceCheckUtils]: 17: Hoare triple {7364#(< 0 (mod (+ main_~y~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7357#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 00:56:48,582 INFO L290 TraceCheckUtils]: 16: Hoare triple {7368#(< 0 (mod (+ main_~y~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7364#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-15 00:56:48,583 INFO L290 TraceCheckUtils]: 15: Hoare triple {7372#(< 0 (mod (+ main_~y~0 3) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7368#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-15 00:56:48,583 INFO L290 TraceCheckUtils]: 14: Hoare triple {7376#(< 0 (mod (+ main_~y~0 4) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7372#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-15 00:56:48,584 INFO L290 TraceCheckUtils]: 13: Hoare triple {7380#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7376#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-15 00:56:48,584 INFO L290 TraceCheckUtils]: 12: Hoare triple {7384#(< 0 (mod (+ main_~y~0 6) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7380#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-15 00:56:48,585 INFO L290 TraceCheckUtils]: 11: Hoare triple {7388#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7384#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-15 00:56:48,586 INFO L290 TraceCheckUtils]: 10: Hoare triple {7392#(< 0 (mod (+ main_~y~0 8) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7388#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-15 00:56:48,586 INFO L290 TraceCheckUtils]: 9: Hoare triple {7396#(< 0 (mod (+ main_~y~0 9) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7392#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-15 00:56:48,587 INFO L290 TraceCheckUtils]: 8: Hoare triple {7400#(< 0 (mod (+ main_~y~0 10) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7396#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-15 00:56:48,587 INFO L290 TraceCheckUtils]: 7: Hoare triple {7404#(< 0 (mod (+ main_~y~0 11) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7400#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-15 00:56:48,588 INFO L290 TraceCheckUtils]: 6: Hoare triple {7408#(< 0 (mod (+ main_~y~0 12) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7404#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-15 00:56:48,588 INFO L290 TraceCheckUtils]: 5: Hoare triple {7245#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7408#(< 0 (mod (+ main_~y~0 12) 4294967296))} is VALID [2022-04-15 00:56:48,588 INFO L272 TraceCheckUtils]: 4: Hoare triple {7245#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-15 00:56:48,589 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7245#true} {7245#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-15 00:56:48,589 INFO L290 TraceCheckUtils]: 2: Hoare triple {7245#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-15 00:56:48,589 INFO L290 TraceCheckUtils]: 1: Hoare triple {7245#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7245#true} is VALID [2022-04-15 00:56:48,589 INFO L272 TraceCheckUtils]: 0: Hoare triple {7245#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-15 00:56:48,589 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:56:48,589 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1285473476] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:56:48,589 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:56:48,589 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16] total 32 [2022-04-15 00:56:48,589 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1044334738] [2022-04-15 00:56:48,590 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:56:48,590 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 1.25) internal successors, (40), 31 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-15 00:56:48,590 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:56:48,590 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 32 states, 32 states have (on average 1.25) internal successors, (40), 31 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:56:48,617 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:56:48,617 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-04-15 00:56:48,617 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:56:48,617 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-04-15 00:56:48,618 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=232, Invalid=760, Unknown=0, NotChecked=0, Total=992 [2022-04-15 00:56:48,618 INFO L87 Difference]: Start difference. First operand 64 states and 86 transitions. Second operand has 32 states, 32 states have (on average 1.25) internal successors, (40), 31 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:22,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:57:22,732 INFO L93 Difference]: Finished difference Result 185 states and 248 transitions. [2022-04-15 00:57:22,732 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2022-04-15 00:57:22,732 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 1.25) internal successors, (40), 31 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-15 00:57:22,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:57:22,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.25) internal successors, (40), 31 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:22,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 186 transitions. [2022-04-15 00:57:22,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.25) internal successors, (40), 31 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:22,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 186 transitions. [2022-04-15 00:57:22,736 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 51 states and 186 transitions. [2022-04-15 00:57:22,922 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 186 edges. 186 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:57:22,924 INFO L225 Difference]: With dead ends: 185 [2022-04-15 00:57:22,924 INFO L226 Difference]: Without dead ends: 180 [2022-04-15 00:57:22,926 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 36 SyntacticMatches, 1 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1361 ImplicationChecksByTransitivity, 29.9s TimeCoverageRelationStatistics Valid=1536, Invalid=4784, Unknown=0, NotChecked=0, Total=6320 [2022-04-15 00:57:22,926 INFO L913 BasicCegarLoop]: 33 mSDtfsCounter, 676 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 908 mSolverCounterSat, 259 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 676 SdHoareTripleChecker+Valid, 115 SdHoareTripleChecker+Invalid, 1167 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 259 IncrementalHoareTripleChecker+Valid, 908 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-04-15 00:57:22,926 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [676 Valid, 115 Invalid, 1167 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [259 Valid, 908 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2022-04-15 00:57:22,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2022-04-15 00:57:23,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 73. [2022-04-15 00:57:23,357 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:57:23,357 INFO L82 GeneralOperation]: Start isEquivalent. First operand 180 states. Second operand has 73 states, 68 states have (on average 1.4264705882352942) internal successors, (97), 68 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:23,357 INFO L74 IsIncluded]: Start isIncluded. First operand 180 states. Second operand has 73 states, 68 states have (on average 1.4264705882352942) internal successors, (97), 68 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:23,358 INFO L87 Difference]: Start difference. First operand 180 states. Second operand has 73 states, 68 states have (on average 1.4264705882352942) internal successors, (97), 68 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:23,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:57:23,360 INFO L93 Difference]: Finished difference Result 180 states and 230 transitions. [2022-04-15 00:57:23,360 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 230 transitions. [2022-04-15 00:57:23,360 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:57:23,360 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:57:23,360 INFO L74 IsIncluded]: Start isIncluded. First operand has 73 states, 68 states have (on average 1.4264705882352942) internal successors, (97), 68 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 180 states. [2022-04-15 00:57:23,360 INFO L87 Difference]: Start difference. First operand has 73 states, 68 states have (on average 1.4264705882352942) internal successors, (97), 68 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 180 states. [2022-04-15 00:57:23,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:57:23,362 INFO L93 Difference]: Finished difference Result 180 states and 230 transitions. [2022-04-15 00:57:23,362 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 230 transitions. [2022-04-15 00:57:23,363 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:57:23,363 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:57:23,363 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:57:23,363 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:57:23,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 68 states have (on average 1.4264705882352942) internal successors, (97), 68 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:23,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 101 transitions. [2022-04-15 00:57:23,364 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 101 transitions. Word has length 25 [2022-04-15 00:57:23,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:57:23,364 INFO L478 AbstractCegarLoop]: Abstraction has 73 states and 101 transitions. [2022-04-15 00:57:23,364 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 32 states have (on average 1.25) internal successors, (40), 31 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:23,364 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 101 transitions. [2022-04-15 00:57:23,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-15 00:57:23,365 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:57:23,365 INFO L499 BasicCegarLoop]: trace histogram [8, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:57:23,382 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-15 00:57:23,581 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:57:23,581 INFO L403 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:57:23,581 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:57:23,581 INFO L85 PathProgramCache]: Analyzing trace with hash 147465884, now seen corresponding path program 15 times [2022-04-15 00:57:23,582 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:57:23,582 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [481171645] [2022-04-15 00:57:23,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:57:23,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:57:23,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:57:23,749 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:57:23,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:57:23,753 INFO L290 TraceCheckUtils]: 0: Hoare triple {8374#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8357#true} is VALID [2022-04-15 00:57:23,753 INFO L290 TraceCheckUtils]: 1: Hoare triple {8357#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-15 00:57:23,753 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8357#true} {8357#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-15 00:57:23,753 INFO L272 TraceCheckUtils]: 0: Hoare triple {8357#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8374#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:57:23,753 INFO L290 TraceCheckUtils]: 1: Hoare triple {8374#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8357#true} is VALID [2022-04-15 00:57:23,753 INFO L290 TraceCheckUtils]: 2: Hoare triple {8357#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-15 00:57:23,753 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8357#true} {8357#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-15 00:57:23,754 INFO L272 TraceCheckUtils]: 4: Hoare triple {8357#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-15 00:57:23,754 INFO L290 TraceCheckUtils]: 5: Hoare triple {8357#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8362#(= main_~y~0 0)} is VALID [2022-04-15 00:57:23,754 INFO L290 TraceCheckUtils]: 6: Hoare triple {8362#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8363#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:57:23,755 INFO L290 TraceCheckUtils]: 7: Hoare triple {8363#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8364#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:57:23,755 INFO L290 TraceCheckUtils]: 8: Hoare triple {8364#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8365#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:57:23,756 INFO L290 TraceCheckUtils]: 9: Hoare triple {8365#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8366#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 00:57:23,756 INFO L290 TraceCheckUtils]: 10: Hoare triple {8366#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8367#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 00:57:23,757 INFO L290 TraceCheckUtils]: 11: Hoare triple {8367#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {8367#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 00:57:23,757 INFO L290 TraceCheckUtils]: 12: Hoare triple {8367#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {8368#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 00:57:23,758 INFO L290 TraceCheckUtils]: 13: Hoare triple {8368#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8369#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 00:57:23,758 INFO L290 TraceCheckUtils]: 14: Hoare triple {8369#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8370#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 00:57:23,759 INFO L290 TraceCheckUtils]: 15: Hoare triple {8370#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8371#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 00:57:23,759 INFO L290 TraceCheckUtils]: 16: Hoare triple {8371#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8372#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 00:57:23,760 INFO L290 TraceCheckUtils]: 17: Hoare triple {8372#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8373#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 00:57:23,760 INFO L290 TraceCheckUtils]: 18: Hoare triple {8373#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8358#false} is VALID [2022-04-15 00:57:23,760 INFO L290 TraceCheckUtils]: 19: Hoare triple {8358#false} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8358#false} is VALID [2022-04-15 00:57:23,760 INFO L290 TraceCheckUtils]: 20: Hoare triple {8358#false} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8358#false} is VALID [2022-04-15 00:57:23,760 INFO L290 TraceCheckUtils]: 21: Hoare triple {8358#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {8358#false} is VALID [2022-04-15 00:57:23,761 INFO L272 TraceCheckUtils]: 22: Hoare triple {8358#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {8358#false} is VALID [2022-04-15 00:57:23,761 INFO L290 TraceCheckUtils]: 23: Hoare triple {8358#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8358#false} is VALID [2022-04-15 00:57:23,761 INFO L290 TraceCheckUtils]: 24: Hoare triple {8358#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {8358#false} is VALID [2022-04-15 00:57:23,761 INFO L290 TraceCheckUtils]: 25: Hoare triple {8358#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8358#false} is VALID [2022-04-15 00:57:23,761 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 18 proven. 30 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-15 00:57:23,761 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:57:23,761 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [481171645] [2022-04-15 00:57:23,761 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [481171645] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:57:23,761 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1114441667] [2022-04-15 00:57:23,761 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-15 00:57:23,761 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:57:23,762 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:57:23,762 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:57:23,763 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-15 00:57:23,823 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-04-15 00:57:23,823 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:57:23,824 INFO L263 TraceCheckSpWp]: Trace formula consists of 123 conjuncts, 31 conjunts are in the unsatisfiable core [2022-04-15 00:57:23,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:57:23,829 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:57:24,023 INFO L272 TraceCheckUtils]: 0: Hoare triple {8357#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-15 00:57:24,024 INFO L290 TraceCheckUtils]: 1: Hoare triple {8357#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8357#true} is VALID [2022-04-15 00:57:24,024 INFO L290 TraceCheckUtils]: 2: Hoare triple {8357#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-15 00:57:24,024 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8357#true} {8357#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-15 00:57:24,024 INFO L272 TraceCheckUtils]: 4: Hoare triple {8357#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-15 00:57:24,024 INFO L290 TraceCheckUtils]: 5: Hoare triple {8357#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8362#(= main_~y~0 0)} is VALID [2022-04-15 00:57:24,025 INFO L290 TraceCheckUtils]: 6: Hoare triple {8362#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8363#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:57:24,025 INFO L290 TraceCheckUtils]: 7: Hoare triple {8363#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8364#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:57:24,025 INFO L290 TraceCheckUtils]: 8: Hoare triple {8364#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8365#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:57:24,026 INFO L290 TraceCheckUtils]: 9: Hoare triple {8365#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8366#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 00:57:24,026 INFO L290 TraceCheckUtils]: 10: Hoare triple {8366#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8367#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 00:57:24,027 INFO L290 TraceCheckUtils]: 11: Hoare triple {8367#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {8367#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 00:57:24,027 INFO L290 TraceCheckUtils]: 12: Hoare triple {8367#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {8368#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 00:57:24,027 INFO L290 TraceCheckUtils]: 13: Hoare triple {8368#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8369#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 00:57:24,028 INFO L290 TraceCheckUtils]: 14: Hoare triple {8369#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8370#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 00:57:24,028 INFO L290 TraceCheckUtils]: 15: Hoare triple {8370#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8371#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 00:57:24,029 INFO L290 TraceCheckUtils]: 16: Hoare triple {8371#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8372#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 00:57:24,029 INFO L290 TraceCheckUtils]: 17: Hoare triple {8372#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8373#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 00:57:24,030 INFO L290 TraceCheckUtils]: 18: Hoare triple {8373#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8432#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} is VALID [2022-04-15 00:57:24,030 INFO L290 TraceCheckUtils]: 19: Hoare triple {8432#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8436#(and (<= (+ main_~z~0 2) 0) (<= 0 (+ main_~z~0 2)))} is VALID [2022-04-15 00:57:24,030 INFO L290 TraceCheckUtils]: 20: Hoare triple {8436#(and (<= (+ main_~z~0 2) 0) (<= 0 (+ main_~z~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8440#(and (<= 0 (+ main_~z~0 3)) (<= (+ main_~z~0 3) 0))} is VALID [2022-04-15 00:57:24,031 INFO L290 TraceCheckUtils]: 21: Hoare triple {8440#(and (<= 0 (+ main_~z~0 3)) (<= (+ main_~z~0 3) 0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {8358#false} is VALID [2022-04-15 00:57:24,031 INFO L272 TraceCheckUtils]: 22: Hoare triple {8358#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {8358#false} is VALID [2022-04-15 00:57:24,031 INFO L290 TraceCheckUtils]: 23: Hoare triple {8358#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8358#false} is VALID [2022-04-15 00:57:24,031 INFO L290 TraceCheckUtils]: 24: Hoare triple {8358#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {8358#false} is VALID [2022-04-15 00:57:24,031 INFO L290 TraceCheckUtils]: 25: Hoare triple {8358#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8358#false} is VALID [2022-04-15 00:57:24,031 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:57:24,031 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:57:24,296 INFO L290 TraceCheckUtils]: 25: Hoare triple {8358#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8358#false} is VALID [2022-04-15 00:57:24,296 INFO L290 TraceCheckUtils]: 24: Hoare triple {8358#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {8358#false} is VALID [2022-04-15 00:57:24,296 INFO L290 TraceCheckUtils]: 23: Hoare triple {8358#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8358#false} is VALID [2022-04-15 00:57:24,296 INFO L272 TraceCheckUtils]: 22: Hoare triple {8358#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {8358#false} is VALID [2022-04-15 00:57:24,296 INFO L290 TraceCheckUtils]: 21: Hoare triple {8468#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {8358#false} is VALID [2022-04-15 00:57:24,297 INFO L290 TraceCheckUtils]: 20: Hoare triple {8472#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8468#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 00:57:24,298 INFO L290 TraceCheckUtils]: 19: Hoare triple {8476#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8472#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-15 00:57:24,299 INFO L290 TraceCheckUtils]: 18: Hoare triple {8480#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8476#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-15 00:57:24,299 INFO L290 TraceCheckUtils]: 17: Hoare triple {8484#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8480#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-15 00:57:24,300 INFO L290 TraceCheckUtils]: 16: Hoare triple {8488#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8484#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} is VALID [2022-04-15 00:57:24,301 INFO L290 TraceCheckUtils]: 15: Hoare triple {8492#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8488#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} is VALID [2022-04-15 00:57:24,301 INFO L290 TraceCheckUtils]: 14: Hoare triple {8496#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8492#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} is VALID [2022-04-15 00:57:24,302 INFO L290 TraceCheckUtils]: 13: Hoare triple {8500#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8496#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} is VALID [2022-04-15 00:57:24,302 INFO L290 TraceCheckUtils]: 12: Hoare triple {8504#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {8500#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} is VALID [2022-04-15 00:57:24,302 INFO L290 TraceCheckUtils]: 11: Hoare triple {8504#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {8504#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} is VALID [2022-04-15 00:57:24,302 INFO L290 TraceCheckUtils]: 10: Hoare triple {8511#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8504#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} is VALID [2022-04-15 00:57:24,303 INFO L290 TraceCheckUtils]: 9: Hoare triple {8515#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8511#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-15 00:57:24,303 INFO L290 TraceCheckUtils]: 8: Hoare triple {8519#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8515#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-15 00:57:24,304 INFO L290 TraceCheckUtils]: 7: Hoare triple {8523#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8519#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-15 00:57:24,305 INFO L290 TraceCheckUtils]: 6: Hoare triple {8527#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8523#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-15 00:57:24,305 INFO L290 TraceCheckUtils]: 5: Hoare triple {8357#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8527#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 00:57:24,305 INFO L272 TraceCheckUtils]: 4: Hoare triple {8357#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-15 00:57:24,305 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8357#true} {8357#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-15 00:57:24,305 INFO L290 TraceCheckUtils]: 2: Hoare triple {8357#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-15 00:57:24,305 INFO L290 TraceCheckUtils]: 1: Hoare triple {8357#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8357#true} is VALID [2022-04-15 00:57:24,305 INFO L272 TraceCheckUtils]: 0: Hoare triple {8357#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-15 00:57:24,305 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:57:24,305 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1114441667] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:57:24,306 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:57:24,306 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17, 17] total 33 [2022-04-15 00:57:24,306 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [977269374] [2022-04-15 00:57:24,306 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:57:24,307 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 1.303030303030303) internal successors, (43), 32 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-15 00:57:24,308 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:57:24,308 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 33 states, 33 states have (on average 1.303030303030303) internal successors, (43), 32 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:24,328 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:57:24,328 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2022-04-15 00:57:24,328 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:57:24,329 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2022-04-15 00:57:24,329 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=885, Unknown=0, NotChecked=0, Total=1056 [2022-04-15 00:57:24,331 INFO L87 Difference]: Start difference. First operand 73 states and 101 transitions. Second operand has 33 states, 33 states have (on average 1.303030303030303) internal successors, (43), 32 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:50,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:57:50,375 INFO L93 Difference]: Finished difference Result 146 states and 196 transitions. [2022-04-15 00:57:50,375 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 81 states. [2022-04-15 00:57:50,376 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 1.303030303030303) internal successors, (43), 32 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-15 00:57:50,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:57:50,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 1.303030303030303) internal successors, (43), 32 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:50,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 140 transitions. [2022-04-15 00:57:50,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 1.303030303030303) internal successors, (43), 32 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:50,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 140 transitions. [2022-04-15 00:57:50,379 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 81 states and 140 transitions. [2022-04-15 00:57:50,722 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 140 edges. 140 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:57:50,723 INFO L225 Difference]: With dead ends: 146 [2022-04-15 00:57:50,724 INFO L226 Difference]: Without dead ends: 131 [2022-04-15 00:57:50,726 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 35 SyntacticMatches, 1 SemanticMatches, 109 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3028 ImplicationChecksByTransitivity, 14.0s TimeCoverageRelationStatistics Valid=1479, Invalid=10731, Unknown=0, NotChecked=0, Total=12210 [2022-04-15 00:57:50,726 INFO L913 BasicCegarLoop]: 19 mSDtfsCounter, 115 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 680 mSolverCounterSat, 267 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 115 SdHoareTripleChecker+Valid, 106 SdHoareTripleChecker+Invalid, 947 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 267 IncrementalHoareTripleChecker+Valid, 680 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.6s IncrementalHoareTripleChecker+Time [2022-04-15 00:57:50,726 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [115 Valid, 106 Invalid, 947 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [267 Valid, 680 Invalid, 0 Unknown, 0 Unchecked, 4.6s Time] [2022-04-15 00:57:50,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2022-04-15 00:57:51,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 88. [2022-04-15 00:57:51,571 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:57:51,572 INFO L82 GeneralOperation]: Start isEquivalent. First operand 131 states. Second operand has 88 states, 83 states have (on average 1.3373493975903614) internal successors, (111), 83 states have internal predecessors, (111), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:51,572 INFO L74 IsIncluded]: Start isIncluded. First operand 131 states. Second operand has 88 states, 83 states have (on average 1.3373493975903614) internal successors, (111), 83 states have internal predecessors, (111), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:51,572 INFO L87 Difference]: Start difference. First operand 131 states. Second operand has 88 states, 83 states have (on average 1.3373493975903614) internal successors, (111), 83 states have internal predecessors, (111), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:51,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:57:51,577 INFO L93 Difference]: Finished difference Result 131 states and 171 transitions. [2022-04-15 00:57:51,577 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 171 transitions. [2022-04-15 00:57:51,577 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:57:51,577 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:57:51,578 INFO L74 IsIncluded]: Start isIncluded. First operand has 88 states, 83 states have (on average 1.3373493975903614) internal successors, (111), 83 states have internal predecessors, (111), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 131 states. [2022-04-15 00:57:51,578 INFO L87 Difference]: Start difference. First operand has 88 states, 83 states have (on average 1.3373493975903614) internal successors, (111), 83 states have internal predecessors, (111), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 131 states. [2022-04-15 00:57:51,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:57:51,592 INFO L93 Difference]: Finished difference Result 131 states and 171 transitions. [2022-04-15 00:57:51,592 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 171 transitions. [2022-04-15 00:57:51,595 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:57:51,595 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:57:51,595 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:57:51,596 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:57:51,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 83 states have (on average 1.3373493975903614) internal successors, (111), 83 states have internal predecessors, (111), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:51,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 115 transitions. [2022-04-15 00:57:51,598 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 115 transitions. Word has length 26 [2022-04-15 00:57:51,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:57:51,598 INFO L478 AbstractCegarLoop]: Abstraction has 88 states and 115 transitions. [2022-04-15 00:57:51,598 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 1.303030303030303) internal successors, (43), 32 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:51,599 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 115 transitions. [2022-04-15 00:57:51,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-15 00:57:51,599 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:57:51,599 INFO L499 BasicCegarLoop]: trace histogram [7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:57:51,624 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-04-15 00:57:51,824 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:57:51,826 INFO L403 AbstractCegarLoop]: === Iteration 21 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:57:51,826 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:57:51,826 INFO L85 PathProgramCache]: Analyzing trace with hash 1693111883, now seen corresponding path program 16 times [2022-04-15 00:57:51,826 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:57:51,826 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1014485475] [2022-04-15 00:57:51,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:57:51,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:57:51,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:57:52,379 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:57:52,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:57:52,386 INFO L290 TraceCheckUtils]: 0: Hoare triple {9419#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9396#true} is VALID [2022-04-15 00:57:52,386 INFO L290 TraceCheckUtils]: 1: Hoare triple {9396#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-15 00:57:52,386 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9396#true} {9396#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-15 00:57:52,387 INFO L272 TraceCheckUtils]: 0: Hoare triple {9396#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9419#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:57:52,387 INFO L290 TraceCheckUtils]: 1: Hoare triple {9419#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9396#true} is VALID [2022-04-15 00:57:52,387 INFO L290 TraceCheckUtils]: 2: Hoare triple {9396#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-15 00:57:52,387 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9396#true} {9396#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-15 00:57:52,387 INFO L272 TraceCheckUtils]: 4: Hoare triple {9396#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-15 00:57:52,387 INFO L290 TraceCheckUtils]: 5: Hoare triple {9396#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9401#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:57:52,388 INFO L290 TraceCheckUtils]: 6: Hoare triple {9401#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9402#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:57:52,389 INFO L290 TraceCheckUtils]: 7: Hoare triple {9402#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9403#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293)) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:57:52,389 INFO L290 TraceCheckUtils]: 8: Hoare triple {9403#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293)) (<= main_~n~0 (+ main_~x~0 2)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9404#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)) (<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296)))))} is VALID [2022-04-15 00:57:52,390 INFO L290 TraceCheckUtils]: 9: Hoare triple {9404#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)) (<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296)))))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9405#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 00:57:52,391 INFO L290 TraceCheckUtils]: 10: Hoare triple {9405#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 4) main_~n~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9406#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296)))))} is VALID [2022-04-15 00:57:52,392 INFO L290 TraceCheckUtils]: 11: Hoare triple {9406#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296)))))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9407#(and (<= main_~x~0 (+ 4294967289 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~n~0 (+ main_~x~0 6)) (<= (+ main_~x~0 6) main_~n~0))} is VALID [2022-04-15 00:57:52,393 INFO L290 TraceCheckUtils]: 12: Hoare triple {9407#(and (<= main_~x~0 (+ 4294967289 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~n~0 (+ main_~x~0 6)) (<= (+ main_~x~0 6) main_~n~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9408#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (* 4294967296 (div (+ 4294967302 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296)) main_~x~0) (<= main_~n~0 (+ 7 main_~x~0)))} is VALID [2022-04-15 00:57:52,394 INFO L290 TraceCheckUtils]: 13: Hoare triple {9408#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (* 4294967296 (div (+ 4294967302 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296)) main_~x~0) (<= main_~n~0 (+ 7 main_~x~0)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {9409#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (* 4294967296 (div (+ 4294967302 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296)) main_~x~0) (<= main_~n~0 (+ 7 main_~x~0)))} is VALID [2022-04-15 00:57:52,394 INFO L290 TraceCheckUtils]: 14: Hoare triple {9409#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (* 4294967296 (div (+ 4294967302 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296)) main_~x~0) (<= main_~n~0 (+ 7 main_~x~0)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {9409#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (* 4294967296 (div (+ 4294967302 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296)) main_~x~0) (<= main_~n~0 (+ 7 main_~x~0)))} is VALID [2022-04-15 00:57:52,395 INFO L290 TraceCheckUtils]: 15: Hoare triple {9409#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (* 4294967296 (div (+ 4294967302 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296)) main_~x~0) (<= main_~n~0 (+ 7 main_~x~0)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9410#(and (<= (+ (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0) (<= main_~n~0 (+ main_~x~0 6)) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 00:57:52,396 INFO L290 TraceCheckUtils]: 16: Hoare triple {9410#(and (<= (+ (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0) (<= main_~n~0 (+ main_~x~0 6)) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9411#(and (<= main_~x~0 (+ 2 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ 5 main_~x~0)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967300 (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0))} is VALID [2022-04-15 00:57:52,398 INFO L290 TraceCheckUtils]: 17: Hoare triple {9411#(and (<= main_~x~0 (+ 2 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ 5 main_~x~0)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967300 (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9412#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) 3) main_~x~0) (<= main_~x~0 (+ 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-15 00:57:52,399 INFO L290 TraceCheckUtils]: 18: Hoare triple {9412#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) 3) main_~x~0) (<= main_~x~0 (+ 3 (* (div main_~n~0 4294967296) 4294967296))))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9413#(and (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 4)) (<= main_~n~0 (+ main_~x~0 3)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 4) main_~x~0))} is VALID [2022-04-15 00:57:52,400 INFO L290 TraceCheckUtils]: 19: Hoare triple {9413#(and (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 4)) (<= main_~n~0 (+ main_~x~0 3)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 4) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9414#(and (<= main_~x~0 (+ 5 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 5) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 00:57:52,401 INFO L290 TraceCheckUtils]: 20: Hoare triple {9414#(and (<= main_~x~0 (+ 5 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 5) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9415#(and (<= main_~x~0 (+ 6 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 6) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 00:57:52,402 INFO L290 TraceCheckUtils]: 21: Hoare triple {9415#(and (<= main_~x~0 (+ 6 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 6) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9416#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 00:57:52,403 INFO L290 TraceCheckUtils]: 22: Hoare triple {9416#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {9416#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 00:57:52,403 INFO L272 TraceCheckUtils]: 23: Hoare triple {9416#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {9417#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:57:52,404 INFO L290 TraceCheckUtils]: 24: Hoare triple {9417#(not (= |__VERIFIER_assert_#in~cond| 0))} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9418#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:57:52,404 INFO L290 TraceCheckUtils]: 25: Hoare triple {9418#(not (= __VERIFIER_assert_~cond 0))} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {9397#false} is VALID [2022-04-15 00:57:52,404 INFO L290 TraceCheckUtils]: 26: Hoare triple {9397#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9397#false} is VALID [2022-04-15 00:57:52,404 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:57:52,404 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:57:52,404 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1014485475] [2022-04-15 00:57:52,405 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1014485475] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:57:52,405 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1186262656] [2022-04-15 00:57:52,405 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 00:57:52,405 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:57:52,405 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:57:52,406 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:57:52,407 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-15 00:57:52,439 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 00:57:52,439 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:57:52,440 INFO L263 TraceCheckSpWp]: Trace formula consists of 128 conjuncts, 33 conjunts are in the unsatisfiable core [2022-04-15 00:57:52,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:57:52,448 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:57:52,694 INFO L272 TraceCheckUtils]: 0: Hoare triple {9396#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-15 00:57:52,694 INFO L290 TraceCheckUtils]: 1: Hoare triple {9396#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9396#true} is VALID [2022-04-15 00:57:52,694 INFO L290 TraceCheckUtils]: 2: Hoare triple {9396#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-15 00:57:52,694 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9396#true} {9396#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-15 00:57:52,694 INFO L272 TraceCheckUtils]: 4: Hoare triple {9396#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-15 00:57:52,695 INFO L290 TraceCheckUtils]: 5: Hoare triple {9396#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9401#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:57:52,695 INFO L290 TraceCheckUtils]: 6: Hoare triple {9401#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9441#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-15 00:57:52,696 INFO L290 TraceCheckUtils]: 7: Hoare triple {9441#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9445#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} is VALID [2022-04-15 00:57:52,696 INFO L290 TraceCheckUtils]: 8: Hoare triple {9445#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9449#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} is VALID [2022-04-15 00:57:52,697 INFO L290 TraceCheckUtils]: 9: Hoare triple {9449#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9453#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} is VALID [2022-04-15 00:57:52,697 INFO L290 TraceCheckUtils]: 10: Hoare triple {9453#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9457#(= (+ main_~n~0 (- 3)) (+ main_~x~0 2))} is VALID [2022-04-15 00:57:52,697 INFO L290 TraceCheckUtils]: 11: Hoare triple {9457#(= (+ main_~n~0 (- 3)) (+ main_~x~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9461#(= (+ main_~n~0 (- 3)) (+ main_~x~0 3))} is VALID [2022-04-15 00:57:52,698 INFO L290 TraceCheckUtils]: 12: Hoare triple {9461#(= (+ main_~n~0 (- 3)) (+ main_~x~0 3))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9465#(= (+ main_~n~0 (- 3)) (+ main_~x~0 4))} is VALID [2022-04-15 00:57:52,698 INFO L290 TraceCheckUtils]: 13: Hoare triple {9465#(= (+ main_~n~0 (- 3)) (+ main_~x~0 4))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {9465#(= (+ main_~n~0 (- 3)) (+ main_~x~0 4))} is VALID [2022-04-15 00:57:52,698 INFO L290 TraceCheckUtils]: 14: Hoare triple {9465#(= (+ main_~n~0 (- 3)) (+ main_~x~0 4))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {9465#(= (+ main_~n~0 (- 3)) (+ main_~x~0 4))} is VALID [2022-04-15 00:57:52,699 INFO L290 TraceCheckUtils]: 15: Hoare triple {9465#(= (+ main_~n~0 (- 3)) (+ main_~x~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9461#(= (+ main_~n~0 (- 3)) (+ main_~x~0 3))} is VALID [2022-04-15 00:57:52,699 INFO L290 TraceCheckUtils]: 16: Hoare triple {9461#(= (+ main_~n~0 (- 3)) (+ main_~x~0 3))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9457#(= (+ main_~n~0 (- 3)) (+ main_~x~0 2))} is VALID [2022-04-15 00:57:52,700 INFO L290 TraceCheckUtils]: 17: Hoare triple {9457#(= (+ main_~n~0 (- 3)) (+ main_~x~0 2))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9453#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} is VALID [2022-04-15 00:57:52,700 INFO L290 TraceCheckUtils]: 18: Hoare triple {9453#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9449#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} is VALID [2022-04-15 00:57:52,701 INFO L290 TraceCheckUtils]: 19: Hoare triple {9449#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9445#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} is VALID [2022-04-15 00:57:52,701 INFO L290 TraceCheckUtils]: 20: Hoare triple {9445#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9441#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-15 00:57:52,702 INFO L290 TraceCheckUtils]: 21: Hoare triple {9441#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9401#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:57:52,702 INFO L290 TraceCheckUtils]: 22: Hoare triple {9401#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {9401#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 00:57:52,703 INFO L272 TraceCheckUtils]: 23: Hoare triple {9401#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {9499#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:57:52,703 INFO L290 TraceCheckUtils]: 24: Hoare triple {9499#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9503#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:57:52,703 INFO L290 TraceCheckUtils]: 25: Hoare triple {9503#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {9397#false} is VALID [2022-04-15 00:57:52,703 INFO L290 TraceCheckUtils]: 26: Hoare triple {9397#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9397#false} is VALID [2022-04-15 00:57:52,703 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:57:52,703 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:57:53,055 INFO L290 TraceCheckUtils]: 26: Hoare triple {9397#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9397#false} is VALID [2022-04-15 00:57:53,056 INFO L290 TraceCheckUtils]: 25: Hoare triple {9503#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {9397#false} is VALID [2022-04-15 00:57:53,056 INFO L290 TraceCheckUtils]: 24: Hoare triple {9499#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9503#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:57:53,057 INFO L272 TraceCheckUtils]: 23: Hoare triple {9519#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {9499#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:57:53,057 INFO L290 TraceCheckUtils]: 22: Hoare triple {9519#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {9519#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:57:53,058 INFO L290 TraceCheckUtils]: 21: Hoare triple {9526#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9519#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:57:53,059 INFO L290 TraceCheckUtils]: 20: Hoare triple {9530#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9526#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 00:57:53,059 INFO L290 TraceCheckUtils]: 19: Hoare triple {9534#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9530#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 00:57:53,060 INFO L290 TraceCheckUtils]: 18: Hoare triple {9538#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9534#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-15 00:57:53,061 INFO L290 TraceCheckUtils]: 17: Hoare triple {9542#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9538#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 00:57:53,062 INFO L290 TraceCheckUtils]: 16: Hoare triple {9546#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9542#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-15 00:57:53,063 INFO L290 TraceCheckUtils]: 15: Hoare triple {9550#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9546#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-15 00:57:53,063 INFO L290 TraceCheckUtils]: 14: Hoare triple {9550#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {9550#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-15 00:57:53,063 INFO L290 TraceCheckUtils]: 13: Hoare triple {9550#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {9550#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-15 00:57:53,064 INFO L290 TraceCheckUtils]: 12: Hoare triple {9546#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9550#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-15 00:57:53,065 INFO L290 TraceCheckUtils]: 11: Hoare triple {9542#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9546#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-15 00:57:53,066 INFO L290 TraceCheckUtils]: 10: Hoare triple {9538#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9542#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-15 00:57:53,066 INFO L290 TraceCheckUtils]: 9: Hoare triple {9534#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9538#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 00:57:53,067 INFO L290 TraceCheckUtils]: 8: Hoare triple {9530#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9534#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-15 00:57:53,068 INFO L290 TraceCheckUtils]: 7: Hoare triple {9526#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9530#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 00:57:53,068 INFO L290 TraceCheckUtils]: 6: Hoare triple {9519#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9526#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 00:57:53,069 INFO L290 TraceCheckUtils]: 5: Hoare triple {9396#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9519#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 00:57:53,069 INFO L272 TraceCheckUtils]: 4: Hoare triple {9396#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-15 00:57:53,069 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9396#true} {9396#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-15 00:57:53,069 INFO L290 TraceCheckUtils]: 2: Hoare triple {9396#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-15 00:57:53,069 INFO L290 TraceCheckUtils]: 1: Hoare triple {9396#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9396#true} is VALID [2022-04-15 00:57:53,069 INFO L272 TraceCheckUtils]: 0: Hoare triple {9396#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-15 00:57:53,069 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:57:53,069 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1186262656] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:57:53,069 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:57:53,070 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 12, 12] total 38 [2022-04-15 00:57:53,070 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [355116740] [2022-04-15 00:57:53,070 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:57:53,070 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.605263157894737) internal successors, (61), 35 states have internal predecessors, (61), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-15 00:57:53,070 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:57:53,070 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 38 states, 38 states have (on average 1.605263157894737) internal successors, (61), 35 states have internal predecessors, (61), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:53,133 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:57:53,134 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-04-15 00:57:53,134 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:57:53,134 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-04-15 00:57:53,134 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=1286, Unknown=0, NotChecked=0, Total=1406 [2022-04-15 00:57:53,135 INFO L87 Difference]: Start difference. First operand 88 states and 115 transitions. Second operand has 38 states, 38 states have (on average 1.605263157894737) internal successors, (61), 35 states have internal predecessors, (61), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:56,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:57:56,227 INFO L93 Difference]: Finished difference Result 100 states and 127 transitions. [2022-04-15 00:57:56,227 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-04-15 00:57:56,227 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.605263157894737) internal successors, (61), 35 states have internal predecessors, (61), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-15 00:57:56,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:57:56,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.605263157894737) internal successors, (61), 35 states have internal predecessors, (61), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:56,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 46 transitions. [2022-04-15 00:57:56,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.605263157894737) internal successors, (61), 35 states have internal predecessors, (61), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:56,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 46 transitions. [2022-04-15 00:57:56,229 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 20 states and 46 transitions. [2022-04-15 00:57:56,276 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:57:56,277 INFO L225 Difference]: With dead ends: 100 [2022-04-15 00:57:56,277 INFO L226 Difference]: Without dead ends: 95 [2022-04-15 00:57:56,278 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 33 SyntacticMatches, 6 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 671 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=237, Invalid=2733, Unknown=0, NotChecked=0, Total=2970 [2022-04-15 00:57:56,278 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 24 mSDsluCounter, 107 mSDsCounter, 0 mSdLazyCounter, 660 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 683 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 660 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-15 00:57:56,278 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [24 Valid, 119 Invalid, 683 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 660 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-15 00:57:56,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2022-04-15 00:57:57,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 82. [2022-04-15 00:57:57,093 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:57:57,093 INFO L82 GeneralOperation]: Start isEquivalent. First operand 95 states. Second operand has 82 states, 77 states have (on average 1.3636363636363635) internal successors, (105), 77 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:57,094 INFO L74 IsIncluded]: Start isIncluded. First operand 95 states. Second operand has 82 states, 77 states have (on average 1.3636363636363635) internal successors, (105), 77 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:57,094 INFO L87 Difference]: Start difference. First operand 95 states. Second operand has 82 states, 77 states have (on average 1.3636363636363635) internal successors, (105), 77 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:57,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:57:57,095 INFO L93 Difference]: Finished difference Result 95 states and 122 transitions. [2022-04-15 00:57:57,095 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 122 transitions. [2022-04-15 00:57:57,095 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:57:57,095 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:57:57,095 INFO L74 IsIncluded]: Start isIncluded. First operand has 82 states, 77 states have (on average 1.3636363636363635) internal successors, (105), 77 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 95 states. [2022-04-15 00:57:57,095 INFO L87 Difference]: Start difference. First operand has 82 states, 77 states have (on average 1.3636363636363635) internal successors, (105), 77 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 95 states. [2022-04-15 00:57:57,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:57:57,096 INFO L93 Difference]: Finished difference Result 95 states and 122 transitions. [2022-04-15 00:57:57,096 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 122 transitions. [2022-04-15 00:57:57,096 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:57:57,097 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:57:57,097 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:57:57,097 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:57:57,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 77 states have (on average 1.3636363636363635) internal successors, (105), 77 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:57,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 109 transitions. [2022-04-15 00:57:57,098 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 109 transitions. Word has length 27 [2022-04-15 00:57:57,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:57:57,098 INFO L478 AbstractCegarLoop]: Abstraction has 82 states and 109 transitions. [2022-04-15 00:57:57,098 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 38 states have (on average 1.605263157894737) internal successors, (61), 35 states have internal predecessors, (61), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:57,098 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 109 transitions. [2022-04-15 00:57:57,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-15 00:57:57,098 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:57:57,098 INFO L499 BasicCegarLoop]: trace histogram [9, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:57:57,114 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-04-15 00:57:57,299 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:57:57,299 INFO L403 AbstractCegarLoop]: === Iteration 22 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:57:57,299 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:57:57,299 INFO L85 PathProgramCache]: Analyzing trace with hash 1931429451, now seen corresponding path program 17 times [2022-04-15 00:57:57,299 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:57:57,299 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1836472851] [2022-04-15 00:57:57,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:57:57,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:57:57,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:57:57,523 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:57:57,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:57:57,526 INFO L290 TraceCheckUtils]: 0: Hoare triple {10170#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10149#true} is VALID [2022-04-15 00:57:57,526 INFO L290 TraceCheckUtils]: 1: Hoare triple {10149#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-15 00:57:57,526 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10149#true} {10149#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-15 00:57:57,527 INFO L272 TraceCheckUtils]: 0: Hoare triple {10149#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10170#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:57:57,527 INFO L290 TraceCheckUtils]: 1: Hoare triple {10170#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10149#true} is VALID [2022-04-15 00:57:57,527 INFO L290 TraceCheckUtils]: 2: Hoare triple {10149#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-15 00:57:57,527 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10149#true} {10149#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-15 00:57:57,527 INFO L272 TraceCheckUtils]: 4: Hoare triple {10149#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-15 00:57:57,527 INFO L290 TraceCheckUtils]: 5: Hoare triple {10149#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10154#(= main_~y~0 0)} is VALID [2022-04-15 00:57:57,528 INFO L290 TraceCheckUtils]: 6: Hoare triple {10154#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10155#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:57:57,528 INFO L290 TraceCheckUtils]: 7: Hoare triple {10155#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10156#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:57:57,529 INFO L290 TraceCheckUtils]: 8: Hoare triple {10156#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10157#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:57:57,529 INFO L290 TraceCheckUtils]: 9: Hoare triple {10157#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10158#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 00:57:57,530 INFO L290 TraceCheckUtils]: 10: Hoare triple {10158#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10159#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 00:57:57,530 INFO L290 TraceCheckUtils]: 11: Hoare triple {10159#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10160#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 00:57:57,531 INFO L290 TraceCheckUtils]: 12: Hoare triple {10160#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10161#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 00:57:57,531 INFO L290 TraceCheckUtils]: 13: Hoare triple {10161#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10162#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 00:57:57,532 INFO L290 TraceCheckUtils]: 14: Hoare triple {10162#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10163#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 00:57:57,532 INFO L290 TraceCheckUtils]: 15: Hoare triple {10163#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {10163#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 00:57:57,532 INFO L290 TraceCheckUtils]: 16: Hoare triple {10163#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {10164#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-15 00:57:57,533 INFO L290 TraceCheckUtils]: 17: Hoare triple {10164#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10165#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-15 00:57:57,533 INFO L290 TraceCheckUtils]: 18: Hoare triple {10165#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10166#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-15 00:57:57,534 INFO L290 TraceCheckUtils]: 19: Hoare triple {10166#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10167#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 00:57:57,535 INFO L290 TraceCheckUtils]: 20: Hoare triple {10167#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10168#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 00:57:57,535 INFO L290 TraceCheckUtils]: 21: Hoare triple {10168#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10169#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 00:57:57,535 INFO L290 TraceCheckUtils]: 22: Hoare triple {10169#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {10150#false} is VALID [2022-04-15 00:57:57,536 INFO L272 TraceCheckUtils]: 23: Hoare triple {10150#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {10150#false} is VALID [2022-04-15 00:57:57,536 INFO L290 TraceCheckUtils]: 24: Hoare triple {10150#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10150#false} is VALID [2022-04-15 00:57:57,536 INFO L290 TraceCheckUtils]: 25: Hoare triple {10150#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {10150#false} is VALID [2022-04-15 00:57:57,536 INFO L290 TraceCheckUtils]: 26: Hoare triple {10150#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10150#false} is VALID [2022-04-15 00:57:57,536 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:57:57,536 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:57:57,536 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1836472851] [2022-04-15 00:57:57,536 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1836472851] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:57:57,536 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [227419879] [2022-04-15 00:57:57,536 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-15 00:57:57,536 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:57:57,537 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:57:57,539 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:57:57,569 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-04-15 00:57:57,713 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2022-04-15 00:57:57,713 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:57:57,714 INFO L263 TraceCheckSpWp]: Trace formula consists of 128 conjuncts, 33 conjunts are in the unsatisfiable core [2022-04-15 00:57:57,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:57:57,722 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:57:57,986 INFO L272 TraceCheckUtils]: 0: Hoare triple {10149#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-15 00:57:57,986 INFO L290 TraceCheckUtils]: 1: Hoare triple {10149#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10149#true} is VALID [2022-04-15 00:57:57,986 INFO L290 TraceCheckUtils]: 2: Hoare triple {10149#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-15 00:57:57,986 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10149#true} {10149#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-15 00:57:57,986 INFO L272 TraceCheckUtils]: 4: Hoare triple {10149#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-15 00:57:57,986 INFO L290 TraceCheckUtils]: 5: Hoare triple {10149#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10154#(= main_~y~0 0)} is VALID [2022-04-15 00:57:57,987 INFO L290 TraceCheckUtils]: 6: Hoare triple {10154#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10155#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:57:57,987 INFO L290 TraceCheckUtils]: 7: Hoare triple {10155#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10156#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:57:57,988 INFO L290 TraceCheckUtils]: 8: Hoare triple {10156#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10157#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:57:57,988 INFO L290 TraceCheckUtils]: 9: Hoare triple {10157#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10158#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 00:57:57,989 INFO L290 TraceCheckUtils]: 10: Hoare triple {10158#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10159#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 00:57:57,990 INFO L290 TraceCheckUtils]: 11: Hoare triple {10159#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10160#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 00:57:57,990 INFO L290 TraceCheckUtils]: 12: Hoare triple {10160#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10161#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 00:57:57,991 INFO L290 TraceCheckUtils]: 13: Hoare triple {10161#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10162#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 00:57:57,991 INFO L290 TraceCheckUtils]: 14: Hoare triple {10162#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10163#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 00:57:57,991 INFO L290 TraceCheckUtils]: 15: Hoare triple {10163#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {10163#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 00:57:57,992 INFO L290 TraceCheckUtils]: 16: Hoare triple {10163#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {10164#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-15 00:57:57,992 INFO L290 TraceCheckUtils]: 17: Hoare triple {10164#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10165#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-15 00:57:57,993 INFO L290 TraceCheckUtils]: 18: Hoare triple {10165#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10166#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-15 00:57:57,993 INFO L290 TraceCheckUtils]: 19: Hoare triple {10166#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10167#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 00:57:57,994 INFO L290 TraceCheckUtils]: 20: Hoare triple {10167#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10168#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 00:57:57,994 INFO L290 TraceCheckUtils]: 21: Hoare triple {10168#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10237#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 00:57:57,995 INFO L290 TraceCheckUtils]: 22: Hoare triple {10237#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {10150#false} is VALID [2022-04-15 00:57:57,995 INFO L272 TraceCheckUtils]: 23: Hoare triple {10150#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {10150#false} is VALID [2022-04-15 00:57:57,995 INFO L290 TraceCheckUtils]: 24: Hoare triple {10150#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10150#false} is VALID [2022-04-15 00:57:57,995 INFO L290 TraceCheckUtils]: 25: Hoare triple {10150#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {10150#false} is VALID [2022-04-15 00:57:57,995 INFO L290 TraceCheckUtils]: 26: Hoare triple {10150#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10150#false} is VALID [2022-04-15 00:57:57,995 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:57:57,995 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:57:58,400 INFO L290 TraceCheckUtils]: 26: Hoare triple {10150#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10150#false} is VALID [2022-04-15 00:57:58,400 INFO L290 TraceCheckUtils]: 25: Hoare triple {10150#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {10150#false} is VALID [2022-04-15 00:57:58,400 INFO L290 TraceCheckUtils]: 24: Hoare triple {10150#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10150#false} is VALID [2022-04-15 00:57:58,400 INFO L272 TraceCheckUtils]: 23: Hoare triple {10150#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {10150#false} is VALID [2022-04-15 00:57:58,401 INFO L290 TraceCheckUtils]: 22: Hoare triple {10265#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {10150#false} is VALID [2022-04-15 00:57:58,402 INFO L290 TraceCheckUtils]: 21: Hoare triple {10269#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10265#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 00:57:58,402 INFO L290 TraceCheckUtils]: 20: Hoare triple {10273#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10269#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-15 00:57:58,403 INFO L290 TraceCheckUtils]: 19: Hoare triple {10277#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10273#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-15 00:57:58,403 INFO L290 TraceCheckUtils]: 18: Hoare triple {10281#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10277#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-15 00:57:58,404 INFO L290 TraceCheckUtils]: 17: Hoare triple {10285#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10281#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} is VALID [2022-04-15 00:57:58,404 INFO L290 TraceCheckUtils]: 16: Hoare triple {10289#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {10285#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} is VALID [2022-04-15 00:57:58,405 INFO L290 TraceCheckUtils]: 15: Hoare triple {10289#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {10289#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-15 00:57:58,405 INFO L290 TraceCheckUtils]: 14: Hoare triple {10296#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10289#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-15 00:57:58,406 INFO L290 TraceCheckUtils]: 13: Hoare triple {10300#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10296#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-15 00:57:58,407 INFO L290 TraceCheckUtils]: 12: Hoare triple {10304#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10300#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 00:57:58,407 INFO L290 TraceCheckUtils]: 11: Hoare triple {10308#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10304#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 00:57:58,408 INFO L290 TraceCheckUtils]: 10: Hoare triple {10312#(< 0 (mod main_~y~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10308#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 00:57:58,409 INFO L290 TraceCheckUtils]: 9: Hoare triple {10316#(< 0 (mod (+ main_~y~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10312#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 00:57:58,409 INFO L290 TraceCheckUtils]: 8: Hoare triple {10320#(< 0 (mod (+ main_~y~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10316#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-15 00:57:58,410 INFO L290 TraceCheckUtils]: 7: Hoare triple {10324#(< 0 (mod (+ main_~y~0 3) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10320#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-15 00:57:58,410 INFO L290 TraceCheckUtils]: 6: Hoare triple {10328#(< 0 (mod (+ main_~y~0 4) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10324#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-15 00:57:58,411 INFO L290 TraceCheckUtils]: 5: Hoare triple {10149#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10328#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-15 00:57:58,411 INFO L272 TraceCheckUtils]: 4: Hoare triple {10149#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-15 00:57:58,411 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10149#true} {10149#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-15 00:57:58,411 INFO L290 TraceCheckUtils]: 2: Hoare triple {10149#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-15 00:57:58,411 INFO L290 TraceCheckUtils]: 1: Hoare triple {10149#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10149#true} is VALID [2022-04-15 00:57:58,411 INFO L272 TraceCheckUtils]: 0: Hoare triple {10149#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-15 00:57:58,411 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:57:58,411 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [227419879] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:57:58,412 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:57:58,412 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 18, 18] total 36 [2022-04-15 00:57:58,412 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [922355352] [2022-04-15 00:57:58,412 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:57:58,412 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.2222222222222223) internal successors, (44), 35 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-15 00:57:58,412 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:57:58,412 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 36 states, 36 states have (on average 1.2222222222222223) internal successors, (44), 35 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:57:58,445 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:57:58,445 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-04-15 00:57:58,445 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:57:58,446 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-04-15 00:57:58,446 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=207, Invalid=1053, Unknown=0, NotChecked=0, Total=1260 [2022-04-15 00:57:58,446 INFO L87 Difference]: Start difference. First operand 82 states and 109 transitions. Second operand has 36 states, 36 states have (on average 1.2222222222222223) internal successors, (44), 35 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:58:29,250 WARN L232 SmtUtils]: Spent 5.21s on a formula simplification that was a NOOP. DAG size: 62 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 00:59:50,958 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:59:50,958 INFO L93 Difference]: Finished difference Result 197 states and 273 transitions. [2022-04-15 00:59:50,958 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 139 states. [2022-04-15 00:59:50,959 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.2222222222222223) internal successors, (44), 35 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-15 00:59:50,959 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:59:50,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.2222222222222223) internal successors, (44), 35 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:59:50,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 250 transitions. [2022-04-15 00:59:50,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.2222222222222223) internal successors, (44), 35 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:59:50,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 250 transitions. [2022-04-15 00:59:50,965 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 139 states and 250 transitions. [2022-04-15 00:59:51,978 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 250 edges. 250 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:59:51,981 INFO L225 Difference]: With dead ends: 197 [2022-04-15 00:59:51,981 INFO L226 Difference]: Without dead ends: 192 [2022-04-15 00:59:51,983 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 209 GetRequests, 38 SyntacticMatches, 1 SemanticMatches, 170 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10109 ImplicationChecksByTransitivity, 104.8s TimeCoverageRelationStatistics Valid=6000, Invalid=23411, Unknown=1, NotChecked=0, Total=29412 [2022-04-15 00:59:51,984 INFO L913 BasicCegarLoop]: 19 mSDtfsCounter, 405 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 783 mSolverCounterSat, 839 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 405 SdHoareTripleChecker+Valid, 106 SdHoareTripleChecker+Invalid, 1622 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 839 IncrementalHoareTripleChecker+Valid, 783 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2022-04-15 00:59:51,984 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [405 Valid, 106 Invalid, 1622 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [839 Valid, 783 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2022-04-15 00:59:51,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2022-04-15 00:59:52,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 91. [2022-04-15 00:59:52,770 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:59:52,770 INFO L82 GeneralOperation]: Start isEquivalent. First operand 192 states. Second operand has 91 states, 86 states have (on average 1.372093023255814) internal successors, (118), 86 states have internal predecessors, (118), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:59:52,770 INFO L74 IsIncluded]: Start isIncluded. First operand 192 states. Second operand has 91 states, 86 states have (on average 1.372093023255814) internal successors, (118), 86 states have internal predecessors, (118), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:59:52,770 INFO L87 Difference]: Start difference. First operand 192 states. Second operand has 91 states, 86 states have (on average 1.372093023255814) internal successors, (118), 86 states have internal predecessors, (118), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:59:52,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:59:52,774 INFO L93 Difference]: Finished difference Result 192 states and 242 transitions. [2022-04-15 00:59:52,774 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 242 transitions. [2022-04-15 00:59:52,774 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:59:52,774 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:59:52,775 INFO L74 IsIncluded]: Start isIncluded. First operand has 91 states, 86 states have (on average 1.372093023255814) internal successors, (118), 86 states have internal predecessors, (118), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 192 states. [2022-04-15 00:59:52,775 INFO L87 Difference]: Start difference. First operand has 91 states, 86 states have (on average 1.372093023255814) internal successors, (118), 86 states have internal predecessors, (118), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 192 states. [2022-04-15 00:59:52,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:59:52,777 INFO L93 Difference]: Finished difference Result 192 states and 242 transitions. [2022-04-15 00:59:52,777 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 242 transitions. [2022-04-15 00:59:52,777 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:59:52,777 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:59:52,778 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:59:52,778 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:59:52,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 86 states have (on average 1.372093023255814) internal successors, (118), 86 states have internal predecessors, (118), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:59:52,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 122 transitions. [2022-04-15 00:59:52,779 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 122 transitions. Word has length 27 [2022-04-15 00:59:52,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:59:52,779 INFO L478 AbstractCegarLoop]: Abstraction has 91 states and 122 transitions. [2022-04-15 00:59:52,779 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 1.2222222222222223) internal successors, (44), 35 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:59:52,779 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 122 transitions. [2022-04-15 00:59:52,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-15 00:59:52,779 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:59:52,780 INFO L499 BasicCegarLoop]: trace histogram [9, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:59:52,785 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-04-15 00:59:52,983 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:59:52,984 INFO L403 AbstractCegarLoop]: === Iteration 23 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:59:52,984 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:59:52,984 INFO L85 PathProgramCache]: Analyzing trace with hash -1312423940, now seen corresponding path program 18 times [2022-04-15 00:59:52,984 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:59:52,984 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [350806589] [2022-04-15 00:59:52,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:59:52,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:59:53,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:59:53,128 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:59:53,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:59:53,134 INFO L290 TraceCheckUtils]: 0: Hoare triple {11558#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11539#true} is VALID [2022-04-15 00:59:53,134 INFO L290 TraceCheckUtils]: 1: Hoare triple {11539#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-15 00:59:53,134 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11539#true} {11539#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-15 00:59:53,134 INFO L272 TraceCheckUtils]: 0: Hoare triple {11539#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11558#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:59:53,134 INFO L290 TraceCheckUtils]: 1: Hoare triple {11558#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11539#true} is VALID [2022-04-15 00:59:53,134 INFO L290 TraceCheckUtils]: 2: Hoare triple {11539#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-15 00:59:53,134 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11539#true} {11539#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-15 00:59:53,134 INFO L272 TraceCheckUtils]: 4: Hoare triple {11539#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-15 00:59:53,135 INFO L290 TraceCheckUtils]: 5: Hoare triple {11539#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11544#(= main_~y~0 0)} is VALID [2022-04-15 00:59:53,135 INFO L290 TraceCheckUtils]: 6: Hoare triple {11544#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11545#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:59:53,135 INFO L290 TraceCheckUtils]: 7: Hoare triple {11545#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11546#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:59:53,136 INFO L290 TraceCheckUtils]: 8: Hoare triple {11546#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11547#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:59:53,136 INFO L290 TraceCheckUtils]: 9: Hoare triple {11547#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11548#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 00:59:53,137 INFO L290 TraceCheckUtils]: 10: Hoare triple {11548#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11549#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 00:59:53,137 INFO L290 TraceCheckUtils]: 11: Hoare triple {11549#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11550#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 00:59:53,137 INFO L290 TraceCheckUtils]: 12: Hoare triple {11550#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {11550#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 00:59:53,137 INFO L290 TraceCheckUtils]: 13: Hoare triple {11550#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {11551#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 00:59:53,138 INFO L290 TraceCheckUtils]: 14: Hoare triple {11551#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11552#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 00:59:53,138 INFO L290 TraceCheckUtils]: 15: Hoare triple {11552#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11553#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 00:59:53,139 INFO L290 TraceCheckUtils]: 16: Hoare triple {11553#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11554#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 00:59:53,139 INFO L290 TraceCheckUtils]: 17: Hoare triple {11554#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11555#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 00:59:53,139 INFO L290 TraceCheckUtils]: 18: Hoare triple {11555#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11556#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 00:59:53,140 INFO L290 TraceCheckUtils]: 19: Hoare triple {11556#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11557#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 00:59:53,140 INFO L290 TraceCheckUtils]: 20: Hoare triple {11557#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11540#false} is VALID [2022-04-15 00:59:53,140 INFO L290 TraceCheckUtils]: 21: Hoare triple {11540#false} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11540#false} is VALID [2022-04-15 00:59:53,140 INFO L290 TraceCheckUtils]: 22: Hoare triple {11540#false} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11540#false} is VALID [2022-04-15 00:59:53,140 INFO L290 TraceCheckUtils]: 23: Hoare triple {11540#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {11540#false} is VALID [2022-04-15 00:59:53,141 INFO L272 TraceCheckUtils]: 24: Hoare triple {11540#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {11540#false} is VALID [2022-04-15 00:59:53,141 INFO L290 TraceCheckUtils]: 25: Hoare triple {11540#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11540#false} is VALID [2022-04-15 00:59:53,141 INFO L290 TraceCheckUtils]: 26: Hoare triple {11540#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {11540#false} is VALID [2022-04-15 00:59:53,141 INFO L290 TraceCheckUtils]: 27: Hoare triple {11540#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11540#false} is VALID [2022-04-15 00:59:53,141 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 21 proven. 42 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-15 00:59:53,141 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:59:53,141 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [350806589] [2022-04-15 00:59:53,141 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [350806589] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:59:53,141 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1042988042] [2022-04-15 00:59:53,141 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-15 00:59:53,141 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:59:53,142 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:59:53,142 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:59:53,146 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-04-15 00:59:53,206 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2022-04-15 00:59:53,206 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:59:53,207 INFO L263 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 35 conjunts are in the unsatisfiable core [2022-04-15 00:59:53,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:59:53,223 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:59:53,430 INFO L272 TraceCheckUtils]: 0: Hoare triple {11539#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-15 00:59:53,430 INFO L290 TraceCheckUtils]: 1: Hoare triple {11539#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11539#true} is VALID [2022-04-15 00:59:53,430 INFO L290 TraceCheckUtils]: 2: Hoare triple {11539#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-15 00:59:53,430 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11539#true} {11539#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-15 00:59:53,430 INFO L272 TraceCheckUtils]: 4: Hoare triple {11539#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-15 00:59:53,430 INFO L290 TraceCheckUtils]: 5: Hoare triple {11539#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11544#(= main_~y~0 0)} is VALID [2022-04-15 00:59:53,431 INFO L290 TraceCheckUtils]: 6: Hoare triple {11544#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11545#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 00:59:53,431 INFO L290 TraceCheckUtils]: 7: Hoare triple {11545#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11546#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 00:59:53,432 INFO L290 TraceCheckUtils]: 8: Hoare triple {11546#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11547#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 00:59:53,432 INFO L290 TraceCheckUtils]: 9: Hoare triple {11547#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11548#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 00:59:53,437 INFO L290 TraceCheckUtils]: 10: Hoare triple {11548#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11549#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 00:59:53,437 INFO L290 TraceCheckUtils]: 11: Hoare triple {11549#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11550#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 00:59:53,438 INFO L290 TraceCheckUtils]: 12: Hoare triple {11550#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {11550#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 00:59:53,438 INFO L290 TraceCheckUtils]: 13: Hoare triple {11550#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {11551#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 00:59:53,438 INFO L290 TraceCheckUtils]: 14: Hoare triple {11551#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11552#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 00:59:53,439 INFO L290 TraceCheckUtils]: 15: Hoare triple {11552#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11553#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 00:59:53,439 INFO L290 TraceCheckUtils]: 16: Hoare triple {11553#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11554#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 00:59:53,440 INFO L290 TraceCheckUtils]: 17: Hoare triple {11554#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11555#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 00:59:53,440 INFO L290 TraceCheckUtils]: 18: Hoare triple {11555#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11556#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 00:59:53,440 INFO L290 TraceCheckUtils]: 19: Hoare triple {11556#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11557#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 00:59:53,441 INFO L290 TraceCheckUtils]: 20: Hoare triple {11557#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11622#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} is VALID [2022-04-15 00:59:53,441 INFO L290 TraceCheckUtils]: 21: Hoare triple {11622#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11626#(and (<= (+ main_~z~0 2) 0) (<= 0 (+ main_~z~0 2)))} is VALID [2022-04-15 00:59:53,442 INFO L290 TraceCheckUtils]: 22: Hoare triple {11626#(and (<= (+ main_~z~0 2) 0) (<= 0 (+ main_~z~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11630#(and (<= 0 (+ main_~z~0 3)) (<= (+ main_~z~0 3) 0))} is VALID [2022-04-15 00:59:53,442 INFO L290 TraceCheckUtils]: 23: Hoare triple {11630#(and (<= 0 (+ main_~z~0 3)) (<= (+ main_~z~0 3) 0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {11540#false} is VALID [2022-04-15 00:59:53,442 INFO L272 TraceCheckUtils]: 24: Hoare triple {11540#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {11540#false} is VALID [2022-04-15 00:59:53,442 INFO L290 TraceCheckUtils]: 25: Hoare triple {11540#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11540#false} is VALID [2022-04-15 00:59:53,442 INFO L290 TraceCheckUtils]: 26: Hoare triple {11540#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {11540#false} is VALID [2022-04-15 00:59:53,442 INFO L290 TraceCheckUtils]: 27: Hoare triple {11540#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11540#false} is VALID [2022-04-15 00:59:53,443 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:59:53,443 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:59:53,747 INFO L290 TraceCheckUtils]: 27: Hoare triple {11540#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11540#false} is VALID [2022-04-15 00:59:53,747 INFO L290 TraceCheckUtils]: 26: Hoare triple {11540#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {11540#false} is VALID [2022-04-15 00:59:53,747 INFO L290 TraceCheckUtils]: 25: Hoare triple {11540#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11540#false} is VALID [2022-04-15 00:59:53,747 INFO L272 TraceCheckUtils]: 24: Hoare triple {11540#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {11540#false} is VALID [2022-04-15 00:59:53,747 INFO L290 TraceCheckUtils]: 23: Hoare triple {11658#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {11540#false} is VALID [2022-04-15 00:59:53,748 INFO L290 TraceCheckUtils]: 22: Hoare triple {11662#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11658#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 00:59:53,749 INFO L290 TraceCheckUtils]: 21: Hoare triple {11666#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11662#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-15 00:59:53,749 INFO L290 TraceCheckUtils]: 20: Hoare triple {11670#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11666#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-15 00:59:53,750 INFO L290 TraceCheckUtils]: 19: Hoare triple {11674#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11670#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-15 00:59:53,750 INFO L290 TraceCheckUtils]: 18: Hoare triple {11678#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11674#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} is VALID [2022-04-15 00:59:53,751 INFO L290 TraceCheckUtils]: 17: Hoare triple {11682#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11678#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} is VALID [2022-04-15 00:59:53,751 INFO L290 TraceCheckUtils]: 16: Hoare triple {11686#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11682#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} is VALID [2022-04-15 00:59:53,752 INFO L290 TraceCheckUtils]: 15: Hoare triple {11690#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11686#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} is VALID [2022-04-15 00:59:53,752 INFO L290 TraceCheckUtils]: 14: Hoare triple {11694#(< 0 (mod (+ main_~z~0 4294967287) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11690#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} is VALID [2022-04-15 00:59:53,753 INFO L290 TraceCheckUtils]: 13: Hoare triple {11698#(< 0 (mod (+ main_~y~0 4294967287) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {11694#(< 0 (mod (+ main_~z~0 4294967287) 4294967296))} is VALID [2022-04-15 00:59:53,753 INFO L290 TraceCheckUtils]: 12: Hoare triple {11698#(< 0 (mod (+ main_~y~0 4294967287) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {11698#(< 0 (mod (+ main_~y~0 4294967287) 4294967296))} is VALID [2022-04-15 00:59:53,753 INFO L290 TraceCheckUtils]: 11: Hoare triple {11705#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11698#(< 0 (mod (+ main_~y~0 4294967287) 4294967296))} is VALID [2022-04-15 00:59:53,754 INFO L290 TraceCheckUtils]: 10: Hoare triple {11709#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11705#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} is VALID [2022-04-15 00:59:53,754 INFO L290 TraceCheckUtils]: 9: Hoare triple {11713#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11709#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-15 00:59:53,755 INFO L290 TraceCheckUtils]: 8: Hoare triple {11717#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11713#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-15 00:59:53,755 INFO L290 TraceCheckUtils]: 7: Hoare triple {11721#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11717#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-15 00:59:53,756 INFO L290 TraceCheckUtils]: 6: Hoare triple {11725#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11721#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-15 00:59:53,756 INFO L290 TraceCheckUtils]: 5: Hoare triple {11539#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11725#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 00:59:53,756 INFO L272 TraceCheckUtils]: 4: Hoare triple {11539#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-15 00:59:53,756 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11539#true} {11539#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-15 00:59:53,756 INFO L290 TraceCheckUtils]: 2: Hoare triple {11539#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-15 00:59:53,756 INFO L290 TraceCheckUtils]: 1: Hoare triple {11539#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11539#true} is VALID [2022-04-15 00:59:53,756 INFO L272 TraceCheckUtils]: 0: Hoare triple {11539#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-15 00:59:53,757 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:59:53,757 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1042988042] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:59:53,757 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:59:53,757 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 19, 19] total 37 [2022-04-15 00:59:53,759 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1952073039] [2022-04-15 00:59:53,759 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:59:53,759 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-15 00:59:53,759 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:59:53,759 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:59:53,799 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:59:53,799 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-04-15 00:59:53,799 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:59:53,800 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-04-15 00:59:53,800 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=209, Invalid=1123, Unknown=0, NotChecked=0, Total=1332 [2022-04-15 00:59:53,800 INFO L87 Difference]: Start difference. First operand 91 states and 122 transitions. Second operand has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:41,413 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.00s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-15 01:00:59,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:59,938 INFO L93 Difference]: Finished difference Result 176 states and 229 transitions. [2022-04-15 01:00:59,938 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 101 states. [2022-04-15 01:00:59,938 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-15 01:00:59,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:00:59,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:59,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 162 transitions. [2022-04-15 01:00:59,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:59,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 162 transitions. [2022-04-15 01:00:59,948 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 101 states and 162 transitions. [2022-04-15 01:01:00,596 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 162 edges. 162 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:01:00,598 INFO L225 Difference]: With dead ends: 176 [2022-04-15 01:01:00,598 INFO L226 Difference]: Without dead ends: 160 [2022-04-15 01:01:00,599 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 37 SyntacticMatches, 1 SemanticMatches, 133 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4792 ImplicationChecksByTransitivity, 36.5s TimeCoverageRelationStatistics Valid=2094, Invalid=15996, Unknown=0, NotChecked=0, Total=18090 [2022-04-15 01:01:00,599 INFO L913 BasicCegarLoop]: 22 mSDtfsCounter, 151 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 796 mSolverCounterSat, 413 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 13.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 151 SdHoareTripleChecker+Valid, 109 SdHoareTripleChecker+Invalid, 1209 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 413 IncrementalHoareTripleChecker+Valid, 796 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 13.7s IncrementalHoareTripleChecker+Time [2022-04-15 01:01:00,600 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [151 Valid, 109 Invalid, 1209 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [413 Valid, 796 Invalid, 0 Unknown, 0 Unchecked, 13.7s Time] [2022-04-15 01:01:00,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2022-04-15 01:01:01,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 103. [2022-04-15 01:01:01,997 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:01:01,998 INFO L82 GeneralOperation]: Start isEquivalent. First operand 160 states. Second operand has 103 states, 98 states have (on average 1.316326530612245) internal successors, (129), 98 states have internal predecessors, (129), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:01,998 INFO L74 IsIncluded]: Start isIncluded. First operand 160 states. Second operand has 103 states, 98 states have (on average 1.316326530612245) internal successors, (129), 98 states have internal predecessors, (129), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:01,998 INFO L87 Difference]: Start difference. First operand 160 states. Second operand has 103 states, 98 states have (on average 1.316326530612245) internal successors, (129), 98 states have internal predecessors, (129), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:02,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:02,017 INFO L93 Difference]: Finished difference Result 160 states and 205 transitions. [2022-04-15 01:01:02,017 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 205 transitions. [2022-04-15 01:01:02,017 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:01:02,017 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:01:02,018 INFO L74 IsIncluded]: Start isIncluded. First operand has 103 states, 98 states have (on average 1.316326530612245) internal successors, (129), 98 states have internal predecessors, (129), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 160 states. [2022-04-15 01:01:02,018 INFO L87 Difference]: Start difference. First operand has 103 states, 98 states have (on average 1.316326530612245) internal successors, (129), 98 states have internal predecessors, (129), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 160 states. [2022-04-15 01:01:02,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:02,025 INFO L93 Difference]: Finished difference Result 160 states and 205 transitions. [2022-04-15 01:01:02,025 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 205 transitions. [2022-04-15 01:01:02,025 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:01:02,025 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:01:02,025 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:01:02,025 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:01:02,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 103 states, 98 states have (on average 1.316326530612245) internal successors, (129), 98 states have internal predecessors, (129), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:02,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 133 transitions. [2022-04-15 01:01:02,028 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 133 transitions. Word has length 28 [2022-04-15 01:01:02,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:01:02,028 INFO L478 AbstractCegarLoop]: Abstraction has 103 states and 133 transitions. [2022-04-15 01:01:02,029 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:02,029 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 133 transitions. [2022-04-15 01:01:02,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-15 01:01:02,030 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:01:02,030 INFO L499 BasicCegarLoop]: trace histogram [8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:01:02,066 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-04-15 01:01:02,244 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-04-15 01:01:02,245 INFO L403 AbstractCegarLoop]: === Iteration 24 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:01:02,245 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:01:02,245 INFO L85 PathProgramCache]: Analyzing trace with hash -1865987861, now seen corresponding path program 19 times [2022-04-15 01:01:02,245 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:01:02,245 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1874443724] [2022-04-15 01:01:02,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:01:02,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:01:02,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:02,933 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:01:02,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:02,936 INFO L290 TraceCheckUtils]: 0: Hoare triple {12804#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12779#true} is VALID [2022-04-15 01:01:02,936 INFO L290 TraceCheckUtils]: 1: Hoare triple {12779#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-15 01:01:02,936 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12779#true} {12779#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-15 01:01:02,937 INFO L272 TraceCheckUtils]: 0: Hoare triple {12779#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12804#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:01:02,937 INFO L290 TraceCheckUtils]: 1: Hoare triple {12804#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12779#true} is VALID [2022-04-15 01:01:02,937 INFO L290 TraceCheckUtils]: 2: Hoare triple {12779#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-15 01:01:02,937 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12779#true} {12779#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-15 01:01:02,937 INFO L272 TraceCheckUtils]: 4: Hoare triple {12779#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-15 01:01:02,937 INFO L290 TraceCheckUtils]: 5: Hoare triple {12779#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {12784#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:01:02,938 INFO L290 TraceCheckUtils]: 6: Hoare triple {12784#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12785#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 01:01:02,939 INFO L290 TraceCheckUtils]: 7: Hoare triple {12785#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12786#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293)) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 01:01:02,941 INFO L290 TraceCheckUtils]: 8: Hoare triple {12786#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293)) (<= main_~n~0 (+ main_~x~0 2)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12787#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)) (<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296)))))} is VALID [2022-04-15 01:01:02,942 INFO L290 TraceCheckUtils]: 9: Hoare triple {12787#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)) (<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296)))))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12788#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 01:01:02,943 INFO L290 TraceCheckUtils]: 10: Hoare triple {12788#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 4) main_~n~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12789#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296)))))} is VALID [2022-04-15 01:01:02,944 INFO L290 TraceCheckUtils]: 11: Hoare triple {12789#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296)))))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12790#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~n~0 (+ main_~x~0 6)) (<= (+ main_~x~0 6) main_~n~0))} is VALID [2022-04-15 01:01:02,944 INFO L290 TraceCheckUtils]: 12: Hoare triple {12790#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~n~0 (+ main_~x~0 6)) (<= (+ main_~x~0 6) main_~n~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12791#(and (<= (+ 7 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967288 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~n~0 (+ 7 main_~x~0)))} is VALID [2022-04-15 01:01:02,946 INFO L290 TraceCheckUtils]: 13: Hoare triple {12791#(and (<= (+ 7 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967288 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~n~0 (+ 7 main_~x~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12792#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= main_~n~0 (+ main_~x~0 8)) (<= (* (div (+ 4294967303 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-15 01:01:02,947 INFO L290 TraceCheckUtils]: 14: Hoare triple {12792#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= main_~n~0 (+ main_~x~0 8)) (<= (* (div (+ 4294967303 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {12793#(and (<= main_~n~0 (+ main_~x~0 8)) (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (* (div (+ 4294967303 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-15 01:01:02,948 INFO L290 TraceCheckUtils]: 15: Hoare triple {12793#(and (<= main_~n~0 (+ main_~x~0 8)) (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (* (div (+ 4294967303 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {12793#(and (<= main_~n~0 (+ main_~x~0 8)) (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (* (div (+ 4294967303 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-15 01:01:02,949 INFO L290 TraceCheckUtils]: 16: Hoare triple {12793#(and (<= main_~n~0 (+ main_~x~0 8)) (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (* (div (+ 4294967303 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12794#(and (<= (+ 1 (* 4294967296 (div (+ 4294967302 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296))) main_~x~0) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)) (<= main_~n~0 (+ 7 main_~x~0)))} is VALID [2022-04-15 01:01:02,950 INFO L290 TraceCheckUtils]: 17: Hoare triple {12794#(and (<= (+ 1 (* 4294967296 (div (+ 4294967302 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296))) main_~x~0) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)) (<= main_~n~0 (+ 7 main_~x~0)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12795#(and (<= main_~x~0 (+ 2 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ main_~x~0 6)) (<= (+ 2 (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296)) main_~x~0))} is VALID [2022-04-15 01:01:02,952 INFO L290 TraceCheckUtils]: 18: Hoare triple {12795#(and (<= main_~x~0 (+ 2 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ main_~x~0 6)) (<= (+ 2 (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296)) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12796#(and (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967300 (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} is VALID [2022-04-15 01:01:02,953 INFO L290 TraceCheckUtils]: 19: Hoare triple {12796#(and (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967300 (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12797#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) 4) main_~x~0))} is VALID [2022-04-15 01:01:02,955 INFO L290 TraceCheckUtils]: 20: Hoare triple {12797#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) 4) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12798#(and (<= main_~x~0 (+ 5 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ main_~x~0 3)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 5) main_~x~0))} is VALID [2022-04-15 01:01:02,956 INFO L290 TraceCheckUtils]: 21: Hoare triple {12798#(and (<= main_~x~0 (+ 5 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ main_~x~0 3)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 5) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12799#(and (<= main_~x~0 (+ 6 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 6) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 01:01:02,957 INFO L290 TraceCheckUtils]: 22: Hoare triple {12799#(and (<= main_~x~0 (+ 6 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 6) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12800#(and (<= main_~x~0 (+ 7 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ 7 (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296)) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 01:01:02,959 INFO L290 TraceCheckUtils]: 23: Hoare triple {12800#(and (<= main_~x~0 (+ 7 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ 7 (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296)) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12801#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:01:02,959 INFO L290 TraceCheckUtils]: 24: Hoare triple {12801#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {12801#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:01:02,960 INFO L272 TraceCheckUtils]: 25: Hoare triple {12801#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {12802#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 01:01:02,960 INFO L290 TraceCheckUtils]: 26: Hoare triple {12802#(not (= |__VERIFIER_assert_#in~cond| 0))} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12803#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 01:01:02,961 INFO L290 TraceCheckUtils]: 27: Hoare triple {12803#(not (= __VERIFIER_assert_~cond 0))} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {12780#false} is VALID [2022-04-15 01:01:02,961 INFO L290 TraceCheckUtils]: 28: Hoare triple {12780#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12780#false} is VALID [2022-04-15 01:01:02,961 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:01:02,961 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:01:02,961 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1874443724] [2022-04-15 01:01:02,961 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1874443724] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:01:02,961 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1498785437] [2022-04-15 01:01:02,962 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-15 01:01:02,962 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:01:02,962 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:01:02,963 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:01:02,963 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-04-15 01:01:03,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:03,002 INFO L263 TraceCheckSpWp]: Trace formula consists of 138 conjuncts, 37 conjunts are in the unsatisfiable core [2022-04-15 01:01:03,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:03,009 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:01:03,345 INFO L272 TraceCheckUtils]: 0: Hoare triple {12779#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-15 01:01:03,346 INFO L290 TraceCheckUtils]: 1: Hoare triple {12779#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12779#true} is VALID [2022-04-15 01:01:03,346 INFO L290 TraceCheckUtils]: 2: Hoare triple {12779#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-15 01:01:03,346 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12779#true} {12779#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-15 01:01:03,346 INFO L272 TraceCheckUtils]: 4: Hoare triple {12779#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-15 01:01:03,361 INFO L290 TraceCheckUtils]: 5: Hoare triple {12779#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {12784#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:01:03,361 INFO L290 TraceCheckUtils]: 6: Hoare triple {12784#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12826#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-15 01:01:03,362 INFO L290 TraceCheckUtils]: 7: Hoare triple {12826#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12830#(= (+ main_~x~0 2 (* (- 1) main_~n~0)) 0)} is VALID [2022-04-15 01:01:03,363 INFO L290 TraceCheckUtils]: 8: Hoare triple {12830#(= (+ main_~x~0 2 (* (- 1) main_~n~0)) 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12834#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} is VALID [2022-04-15 01:01:03,363 INFO L290 TraceCheckUtils]: 9: Hoare triple {12834#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12838#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} is VALID [2022-04-15 01:01:03,364 INFO L290 TraceCheckUtils]: 10: Hoare triple {12838#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12842#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} is VALID [2022-04-15 01:01:03,365 INFO L290 TraceCheckUtils]: 11: Hoare triple {12842#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12846#(= (+ main_~x~0 2) (+ main_~n~0 (- 4)))} is VALID [2022-04-15 01:01:03,366 INFO L290 TraceCheckUtils]: 12: Hoare triple {12846#(= (+ main_~x~0 2) (+ main_~n~0 (- 4)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12850#(= (+ main_~x~0 3) (+ main_~n~0 (- 4)))} is VALID [2022-04-15 01:01:03,367 INFO L290 TraceCheckUtils]: 13: Hoare triple {12850#(= (+ main_~x~0 3) (+ main_~n~0 (- 4)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12854#(= (+ main_~x~0 4) (+ main_~n~0 (- 4)))} is VALID [2022-04-15 01:01:03,367 INFO L290 TraceCheckUtils]: 14: Hoare triple {12854#(= (+ main_~x~0 4) (+ main_~n~0 (- 4)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {12854#(= (+ main_~x~0 4) (+ main_~n~0 (- 4)))} is VALID [2022-04-15 01:01:03,367 INFO L290 TraceCheckUtils]: 15: Hoare triple {12854#(= (+ main_~x~0 4) (+ main_~n~0 (- 4)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {12854#(= (+ main_~x~0 4) (+ main_~n~0 (- 4)))} is VALID [2022-04-15 01:01:03,368 INFO L290 TraceCheckUtils]: 16: Hoare triple {12854#(= (+ main_~x~0 4) (+ main_~n~0 (- 4)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12850#(= (+ main_~x~0 3) (+ main_~n~0 (- 4)))} is VALID [2022-04-15 01:01:03,369 INFO L290 TraceCheckUtils]: 17: Hoare triple {12850#(= (+ main_~x~0 3) (+ main_~n~0 (- 4)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12846#(= (+ main_~x~0 2) (+ main_~n~0 (- 4)))} is VALID [2022-04-15 01:01:03,369 INFO L290 TraceCheckUtils]: 18: Hoare triple {12846#(= (+ main_~x~0 2) (+ main_~n~0 (- 4)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12842#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} is VALID [2022-04-15 01:01:03,370 INFO L290 TraceCheckUtils]: 19: Hoare triple {12842#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12838#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} is VALID [2022-04-15 01:01:03,370 INFO L290 TraceCheckUtils]: 20: Hoare triple {12838#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12834#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} is VALID [2022-04-15 01:01:03,371 INFO L290 TraceCheckUtils]: 21: Hoare triple {12834#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12830#(= (+ main_~x~0 2 (* (- 1) main_~n~0)) 0)} is VALID [2022-04-15 01:01:03,372 INFO L290 TraceCheckUtils]: 22: Hoare triple {12830#(= (+ main_~x~0 2 (* (- 1) main_~n~0)) 0)} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12826#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-15 01:01:03,372 INFO L290 TraceCheckUtils]: 23: Hoare triple {12826#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12784#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:01:03,373 INFO L290 TraceCheckUtils]: 24: Hoare triple {12784#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {12784#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:01:03,373 INFO L272 TraceCheckUtils]: 25: Hoare triple {12784#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {12891#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:01:03,374 INFO L290 TraceCheckUtils]: 26: Hoare triple {12891#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12895#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:01:03,374 INFO L290 TraceCheckUtils]: 27: Hoare triple {12895#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {12780#false} is VALID [2022-04-15 01:01:03,374 INFO L290 TraceCheckUtils]: 28: Hoare triple {12780#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12780#false} is VALID [2022-04-15 01:01:03,374 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:01:03,374 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:01:03,877 INFO L290 TraceCheckUtils]: 28: Hoare triple {12780#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12780#false} is VALID [2022-04-15 01:01:03,877 INFO L290 TraceCheckUtils]: 27: Hoare triple {12895#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {12780#false} is VALID [2022-04-15 01:01:03,878 INFO L290 TraceCheckUtils]: 26: Hoare triple {12891#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12895#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:01:03,878 INFO L272 TraceCheckUtils]: 25: Hoare triple {12911#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {12891#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:01:03,878 INFO L290 TraceCheckUtils]: 24: Hoare triple {12911#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {12911#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:01:03,879 INFO L290 TraceCheckUtils]: 23: Hoare triple {12918#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12911#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:01:03,880 INFO L290 TraceCheckUtils]: 22: Hoare triple {12922#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12918#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:01:03,881 INFO L290 TraceCheckUtils]: 21: Hoare triple {12926#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12922#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:01:03,882 INFO L290 TraceCheckUtils]: 20: Hoare triple {12930#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12926#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-15 01:01:03,882 INFO L290 TraceCheckUtils]: 19: Hoare triple {12934#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12930#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 01:01:03,884 INFO L290 TraceCheckUtils]: 18: Hoare triple {12938#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12934#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-15 01:01:03,884 INFO L290 TraceCheckUtils]: 17: Hoare triple {12942#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12938#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-15 01:01:03,885 INFO L290 TraceCheckUtils]: 16: Hoare triple {12946#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 8) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12942#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-15 01:01:03,885 INFO L290 TraceCheckUtils]: 15: Hoare triple {12946#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 8) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {12946#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-15 01:01:03,886 INFO L290 TraceCheckUtils]: 14: Hoare triple {12946#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 8) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {12946#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-15 01:01:03,890 INFO L290 TraceCheckUtils]: 13: Hoare triple {12942#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12946#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-15 01:01:03,890 INFO L290 TraceCheckUtils]: 12: Hoare triple {12938#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12942#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-15 01:01:03,891 INFO L290 TraceCheckUtils]: 11: Hoare triple {12934#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12938#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-15 01:01:03,892 INFO L290 TraceCheckUtils]: 10: Hoare triple {12930#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12934#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-15 01:01:03,893 INFO L290 TraceCheckUtils]: 9: Hoare triple {12926#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12930#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 01:01:03,893 INFO L290 TraceCheckUtils]: 8: Hoare triple {12922#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12926#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-15 01:01:03,894 INFO L290 TraceCheckUtils]: 7: Hoare triple {12918#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12922#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:01:03,895 INFO L290 TraceCheckUtils]: 6: Hoare triple {12911#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12918#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:01:03,896 INFO L290 TraceCheckUtils]: 5: Hoare triple {12779#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {12911#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:01:03,896 INFO L272 TraceCheckUtils]: 4: Hoare triple {12779#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-15 01:01:03,896 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12779#true} {12779#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-15 01:01:03,896 INFO L290 TraceCheckUtils]: 2: Hoare triple {12779#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-15 01:01:03,896 INFO L290 TraceCheckUtils]: 1: Hoare triple {12779#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12779#true} is VALID [2022-04-15 01:01:03,896 INFO L272 TraceCheckUtils]: 0: Hoare triple {12779#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-15 01:01:03,896 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:01:03,896 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1498785437] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:01:03,897 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:01:03,897 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 13, 13] total 42 [2022-04-15 01:01:03,897 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1084884654] [2022-04-15 01:01:03,897 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:01:03,898 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 39 states have internal predecessors, (67), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-15 01:01:03,898 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:01:03,898 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 39 states have internal predecessors, (67), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:03,973 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 74 edges. 74 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:01:03,974 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-04-15 01:01:03,974 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:01:03,974 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-04-15 01:01:03,974 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=1588, Unknown=0, NotChecked=0, Total=1722 [2022-04-15 01:01:03,975 INFO L87 Difference]: Start difference. First operand 103 states and 133 transitions. Second operand has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 39 states have internal predecessors, (67), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:08,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:08,342 INFO L93 Difference]: Finished difference Result 126 states and 156 transitions. [2022-04-15 01:01:08,342 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-04-15 01:01:08,342 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 39 states have internal predecessors, (67), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-15 01:01:08,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:01:08,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 39 states have internal predecessors, (67), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:08,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 49 transitions. [2022-04-15 01:01:08,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 39 states have internal predecessors, (67), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:08,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 49 transitions. [2022-04-15 01:01:08,344 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 22 states and 49 transitions. [2022-04-15 01:01:08,417 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:01:08,418 INFO L225 Difference]: With dead ends: 126 [2022-04-15 01:01:08,418 INFO L226 Difference]: Without dead ends: 121 [2022-04-15 01:01:08,419 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 34 SyntacticMatches, 7 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 849 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=265, Invalid=3395, Unknown=0, NotChecked=0, Total=3660 [2022-04-15 01:01:08,420 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 23 mSDsluCounter, 112 mSDsCounter, 0 mSdLazyCounter, 757 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 124 SdHoareTripleChecker+Invalid, 782 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 757 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-04-15 01:01:08,420 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [23 Valid, 124 Invalid, 782 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 757 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-04-15 01:01:08,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2022-04-15 01:01:09,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 104. [2022-04-15 01:01:09,367 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:01:09,368 INFO L82 GeneralOperation]: Start isEquivalent. First operand 121 states. Second operand has 104 states, 99 states have (on average 1.3131313131313131) internal successors, (130), 99 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:09,368 INFO L74 IsIncluded]: Start isIncluded. First operand 121 states. Second operand has 104 states, 99 states have (on average 1.3131313131313131) internal successors, (130), 99 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:09,368 INFO L87 Difference]: Start difference. First operand 121 states. Second operand has 104 states, 99 states have (on average 1.3131313131313131) internal successors, (130), 99 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:09,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:09,369 INFO L93 Difference]: Finished difference Result 121 states and 151 transitions. [2022-04-15 01:01:09,369 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 151 transitions. [2022-04-15 01:01:09,369 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:01:09,369 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:01:09,369 INFO L74 IsIncluded]: Start isIncluded. First operand has 104 states, 99 states have (on average 1.3131313131313131) internal successors, (130), 99 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 121 states. [2022-04-15 01:01:09,370 INFO L87 Difference]: Start difference. First operand has 104 states, 99 states have (on average 1.3131313131313131) internal successors, (130), 99 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 121 states. [2022-04-15 01:01:09,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:09,375 INFO L93 Difference]: Finished difference Result 121 states and 151 transitions. [2022-04-15 01:01:09,375 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 151 transitions. [2022-04-15 01:01:09,375 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:01:09,375 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:01:09,375 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:01:09,375 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:01:09,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 104 states, 99 states have (on average 1.3131313131313131) internal successors, (130), 99 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:09,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 134 transitions. [2022-04-15 01:01:09,377 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 134 transitions. Word has length 29 [2022-04-15 01:01:09,377 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:01:09,377 INFO L478 AbstractCegarLoop]: Abstraction has 104 states and 134 transitions. [2022-04-15 01:01:09,377 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 39 states have internal predecessors, (67), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:09,377 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 134 transitions. [2022-04-15 01:01:09,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-15 01:01:09,377 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:01:09,377 INFO L499 BasicCegarLoop]: trace histogram [10, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:01:09,393 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Ended with exit code 0 [2022-04-15 01:01:09,583 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2022-04-15 01:01:09,583 INFO L403 AbstractCegarLoop]: === Iteration 25 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:01:09,584 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:01:09,584 INFO L85 PathProgramCache]: Analyzing trace with hash 163949148, now seen corresponding path program 20 times [2022-04-15 01:01:09,584 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:01:09,584 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [563803747] [2022-04-15 01:01:09,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:01:09,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:01:09,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:09,857 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:01:09,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:09,860 INFO L290 TraceCheckUtils]: 0: Hoare triple {13718#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13697#true} is VALID [2022-04-15 01:01:09,860 INFO L290 TraceCheckUtils]: 1: Hoare triple {13697#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-15 01:01:09,860 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13697#true} {13697#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-15 01:01:09,861 INFO L272 TraceCheckUtils]: 0: Hoare triple {13697#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13718#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:01:09,861 INFO L290 TraceCheckUtils]: 1: Hoare triple {13718#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13697#true} is VALID [2022-04-15 01:01:09,861 INFO L290 TraceCheckUtils]: 2: Hoare triple {13697#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-15 01:01:09,861 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13697#true} {13697#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-15 01:01:09,861 INFO L272 TraceCheckUtils]: 4: Hoare triple {13697#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-15 01:01:09,861 INFO L290 TraceCheckUtils]: 5: Hoare triple {13697#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13702#(= main_~y~0 0)} is VALID [2022-04-15 01:01:09,862 INFO L290 TraceCheckUtils]: 6: Hoare triple {13702#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13703#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:01:09,862 INFO L290 TraceCheckUtils]: 7: Hoare triple {13703#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13704#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:01:09,863 INFO L290 TraceCheckUtils]: 8: Hoare triple {13704#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13705#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:01:09,864 INFO L290 TraceCheckUtils]: 9: Hoare triple {13705#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13706#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:01:09,864 INFO L290 TraceCheckUtils]: 10: Hoare triple {13706#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13707#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:01:09,865 INFO L290 TraceCheckUtils]: 11: Hoare triple {13707#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13708#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:01:09,865 INFO L290 TraceCheckUtils]: 12: Hoare triple {13708#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13709#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:01:09,866 INFO L290 TraceCheckUtils]: 13: Hoare triple {13709#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {13709#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:01:09,866 INFO L290 TraceCheckUtils]: 14: Hoare triple {13709#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {13710#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-15 01:01:09,866 INFO L290 TraceCheckUtils]: 15: Hoare triple {13710#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13711#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 01:01:09,867 INFO L290 TraceCheckUtils]: 16: Hoare triple {13711#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13712#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:01:09,868 INFO L290 TraceCheckUtils]: 17: Hoare triple {13712#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13713#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:01:09,868 INFO L290 TraceCheckUtils]: 18: Hoare triple {13713#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13714#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:01:09,869 INFO L290 TraceCheckUtils]: 19: Hoare triple {13714#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13715#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:01:09,869 INFO L290 TraceCheckUtils]: 20: Hoare triple {13715#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13716#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 01:01:09,870 INFO L290 TraceCheckUtils]: 21: Hoare triple {13716#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13717#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 01:01:09,870 INFO L290 TraceCheckUtils]: 22: Hoare triple {13717#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13698#false} is VALID [2022-04-15 01:01:09,870 INFO L290 TraceCheckUtils]: 23: Hoare triple {13698#false} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13698#false} is VALID [2022-04-15 01:01:09,870 INFO L290 TraceCheckUtils]: 24: Hoare triple {13698#false} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13698#false} is VALID [2022-04-15 01:01:09,871 INFO L290 TraceCheckUtils]: 25: Hoare triple {13698#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {13698#false} is VALID [2022-04-15 01:01:09,871 INFO L272 TraceCheckUtils]: 26: Hoare triple {13698#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {13698#false} is VALID [2022-04-15 01:01:09,871 INFO L290 TraceCheckUtils]: 27: Hoare triple {13698#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13698#false} is VALID [2022-04-15 01:01:09,871 INFO L290 TraceCheckUtils]: 28: Hoare triple {13698#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {13698#false} is VALID [2022-04-15 01:01:09,871 INFO L290 TraceCheckUtils]: 29: Hoare triple {13698#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13698#false} is VALID [2022-04-15 01:01:09,871 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 24 proven. 56 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-15 01:01:09,871 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:01:09,871 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [563803747] [2022-04-15 01:01:09,871 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [563803747] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:01:09,871 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [726663828] [2022-04-15 01:01:09,871 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 01:01:09,872 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:01:09,872 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:01:09,887 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:01:09,893 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-04-15 01:01:10,019 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 01:01:10,019 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:01:10,020 INFO L263 TraceCheckSpWp]: Trace formula consists of 143 conjuncts, 39 conjunts are in the unsatisfiable core [2022-04-15 01:01:10,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:10,028 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:01:10,352 INFO L272 TraceCheckUtils]: 0: Hoare triple {13697#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-15 01:01:10,352 INFO L290 TraceCheckUtils]: 1: Hoare triple {13697#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13697#true} is VALID [2022-04-15 01:01:10,352 INFO L290 TraceCheckUtils]: 2: Hoare triple {13697#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-15 01:01:10,352 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13697#true} {13697#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-15 01:01:10,352 INFO L272 TraceCheckUtils]: 4: Hoare triple {13697#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-15 01:01:10,353 INFO L290 TraceCheckUtils]: 5: Hoare triple {13697#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13702#(= main_~y~0 0)} is VALID [2022-04-15 01:01:10,353 INFO L290 TraceCheckUtils]: 6: Hoare triple {13702#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13703#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:01:10,354 INFO L290 TraceCheckUtils]: 7: Hoare triple {13703#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13704#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:01:10,354 INFO L290 TraceCheckUtils]: 8: Hoare triple {13704#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13705#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:01:10,355 INFO L290 TraceCheckUtils]: 9: Hoare triple {13705#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13706#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:01:10,355 INFO L290 TraceCheckUtils]: 10: Hoare triple {13706#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13707#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:01:10,356 INFO L290 TraceCheckUtils]: 11: Hoare triple {13707#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13708#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:01:10,356 INFO L290 TraceCheckUtils]: 12: Hoare triple {13708#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13709#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:01:10,357 INFO L290 TraceCheckUtils]: 13: Hoare triple {13709#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {13709#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:01:10,357 INFO L290 TraceCheckUtils]: 14: Hoare triple {13709#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {13710#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-15 01:01:10,358 INFO L290 TraceCheckUtils]: 15: Hoare triple {13710#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13711#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 01:01:10,358 INFO L290 TraceCheckUtils]: 16: Hoare triple {13711#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13712#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:01:10,359 INFO L290 TraceCheckUtils]: 17: Hoare triple {13712#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13713#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:01:10,359 INFO L290 TraceCheckUtils]: 18: Hoare triple {13713#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13714#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:01:10,360 INFO L290 TraceCheckUtils]: 19: Hoare triple {13714#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13715#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:01:10,360 INFO L290 TraceCheckUtils]: 20: Hoare triple {13715#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13716#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 01:01:10,361 INFO L290 TraceCheckUtils]: 21: Hoare triple {13716#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13717#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 01:01:10,361 INFO L290 TraceCheckUtils]: 22: Hoare triple {13717#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13788#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} is VALID [2022-04-15 01:01:10,362 INFO L290 TraceCheckUtils]: 23: Hoare triple {13788#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13792#(and (<= (+ main_~z~0 2) 0) (<= 0 (+ main_~z~0 2)))} is VALID [2022-04-15 01:01:10,362 INFO L290 TraceCheckUtils]: 24: Hoare triple {13792#(and (<= (+ main_~z~0 2) 0) (<= 0 (+ main_~z~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13796#(and (<= 0 (+ main_~z~0 3)) (<= (+ main_~z~0 3) 0))} is VALID [2022-04-15 01:01:10,363 INFO L290 TraceCheckUtils]: 25: Hoare triple {13796#(and (<= 0 (+ main_~z~0 3)) (<= (+ main_~z~0 3) 0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {13698#false} is VALID [2022-04-15 01:01:10,363 INFO L272 TraceCheckUtils]: 26: Hoare triple {13698#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {13698#false} is VALID [2022-04-15 01:01:10,363 INFO L290 TraceCheckUtils]: 27: Hoare triple {13698#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13698#false} is VALID [2022-04-15 01:01:10,363 INFO L290 TraceCheckUtils]: 28: Hoare triple {13698#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {13698#false} is VALID [2022-04-15 01:01:10,363 INFO L290 TraceCheckUtils]: 29: Hoare triple {13698#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13698#false} is VALID [2022-04-15 01:01:10,363 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 0 proven. 83 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:01:10,363 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:01:10,797 INFO L290 TraceCheckUtils]: 29: Hoare triple {13698#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13698#false} is VALID [2022-04-15 01:01:10,797 INFO L290 TraceCheckUtils]: 28: Hoare triple {13698#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {13698#false} is VALID [2022-04-15 01:01:10,797 INFO L290 TraceCheckUtils]: 27: Hoare triple {13698#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13698#false} is VALID [2022-04-15 01:01:10,797 INFO L272 TraceCheckUtils]: 26: Hoare triple {13698#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {13698#false} is VALID [2022-04-15 01:01:10,797 INFO L290 TraceCheckUtils]: 25: Hoare triple {13824#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {13698#false} is VALID [2022-04-15 01:01:10,798 INFO L290 TraceCheckUtils]: 24: Hoare triple {13828#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13824#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 01:01:10,799 INFO L290 TraceCheckUtils]: 23: Hoare triple {13832#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13828#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-15 01:01:10,800 INFO L290 TraceCheckUtils]: 22: Hoare triple {13836#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13832#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-15 01:01:10,800 INFO L290 TraceCheckUtils]: 21: Hoare triple {13840#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13836#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-15 01:01:10,801 INFO L290 TraceCheckUtils]: 20: Hoare triple {13844#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13840#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} is VALID [2022-04-15 01:01:10,801 INFO L290 TraceCheckUtils]: 19: Hoare triple {13848#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13844#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} is VALID [2022-04-15 01:01:10,802 INFO L290 TraceCheckUtils]: 18: Hoare triple {13852#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13848#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} is VALID [2022-04-15 01:01:10,802 INFO L290 TraceCheckUtils]: 17: Hoare triple {13856#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13852#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} is VALID [2022-04-15 01:01:10,803 INFO L290 TraceCheckUtils]: 16: Hoare triple {13860#(< 0 (mod (+ main_~z~0 4294967287) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13856#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} is VALID [2022-04-15 01:01:10,804 INFO L290 TraceCheckUtils]: 15: Hoare triple {13864#(< 0 (mod (+ main_~z~0 4294967286) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13860#(< 0 (mod (+ main_~z~0 4294967287) 4294967296))} is VALID [2022-04-15 01:01:10,804 INFO L290 TraceCheckUtils]: 14: Hoare triple {13868#(< 0 (mod (+ main_~y~0 4294967286) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {13864#(< 0 (mod (+ main_~z~0 4294967286) 4294967296))} is VALID [2022-04-15 01:01:10,804 INFO L290 TraceCheckUtils]: 13: Hoare triple {13868#(< 0 (mod (+ main_~y~0 4294967286) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {13868#(< 0 (mod (+ main_~y~0 4294967286) 4294967296))} is VALID [2022-04-15 01:01:10,805 INFO L290 TraceCheckUtils]: 12: Hoare triple {13875#(< 0 (mod (+ main_~y~0 4294967287) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13868#(< 0 (mod (+ main_~y~0 4294967286) 4294967296))} is VALID [2022-04-15 01:01:10,805 INFO L290 TraceCheckUtils]: 11: Hoare triple {13879#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13875#(< 0 (mod (+ main_~y~0 4294967287) 4294967296))} is VALID [2022-04-15 01:01:10,806 INFO L290 TraceCheckUtils]: 10: Hoare triple {13883#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13879#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} is VALID [2022-04-15 01:01:10,806 INFO L290 TraceCheckUtils]: 9: Hoare triple {13887#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13883#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-15 01:01:10,807 INFO L290 TraceCheckUtils]: 8: Hoare triple {13891#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13887#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-15 01:01:10,808 INFO L290 TraceCheckUtils]: 7: Hoare triple {13895#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13891#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-15 01:01:10,808 INFO L290 TraceCheckUtils]: 6: Hoare triple {13899#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13895#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-15 01:01:10,808 INFO L290 TraceCheckUtils]: 5: Hoare triple {13697#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13899#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 01:01:10,808 INFO L272 TraceCheckUtils]: 4: Hoare triple {13697#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-15 01:01:10,809 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13697#true} {13697#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-15 01:01:10,809 INFO L290 TraceCheckUtils]: 2: Hoare triple {13697#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-15 01:01:10,809 INFO L290 TraceCheckUtils]: 1: Hoare triple {13697#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13697#true} is VALID [2022-04-15 01:01:10,809 INFO L272 TraceCheckUtils]: 0: Hoare triple {13697#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-15 01:01:10,809 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 0 proven. 83 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:01:10,809 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [726663828] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:01:10,809 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:01:10,809 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 21, 21] total 41 [2022-04-15 01:01:10,809 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2124336321] [2022-04-15 01:01:10,809 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:01:10,810 INFO L78 Accepts]: Start accepts. Automaton has has 41 states, 41 states have (on average 1.2439024390243902) internal successors, (51), 40 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-15 01:01:10,810 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:01:10,810 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 41 states, 41 states have (on average 1.2439024390243902) internal successors, (51), 40 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:10,838 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:01:10,838 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 41 states [2022-04-15 01:01:10,838 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:01:10,838 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2022-04-15 01:01:10,839 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=251, Invalid=1389, Unknown=0, NotChecked=0, Total=1640 [2022-04-15 01:01:10,839 INFO L87 Difference]: Start difference. First operand 104 states and 134 transitions. Second operand has 41 states, 41 states have (on average 1.2439024390243902) internal successors, (51), 40 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:02:25,717 WARN L232 SmtUtils]: Spent 8.05s on a formula simplification that was a NOOP. DAG size: 69 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:02:45,317 WARN L232 SmtUtils]: Spent 7.08s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:03:07,300 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.16s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-15 01:03:53,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:53,897 INFO L93 Difference]: Finished difference Result 192 states and 250 transitions. [2022-04-15 01:03:53,897 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 123 states. [2022-04-15 01:03:53,898 INFO L78 Accepts]: Start accepts. Automaton has has 41 states, 41 states have (on average 1.2439024390243902) internal successors, (51), 40 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-15 01:03:53,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:03:53,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 1.2439024390243902) internal successors, (51), 40 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:53,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 194 transitions. [2022-04-15 01:03:53,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 1.2439024390243902) internal successors, (51), 40 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:53,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 194 transitions. [2022-04-15 01:03:53,902 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 123 states and 194 transitions. [2022-04-15 01:03:55,424 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 194 edges. 194 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:55,426 INFO L225 Difference]: With dead ends: 192 [2022-04-15 01:03:55,426 INFO L226 Difference]: Without dead ends: 175 [2022-04-15 01:03:55,428 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 39 SyntacticMatches, 1 SemanticMatches, 159 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7207 ImplicationChecksByTransitivity, 91.7s TimeCoverageRelationStatistics Valid=2894, Invalid=22866, Unknown=0, NotChecked=0, Total=25760 [2022-04-15 01:03:55,428 INFO L913 BasicCegarLoop]: 24 mSDtfsCounter, 186 mSDsluCounter, 107 mSDsCounter, 0 mSdLazyCounter, 1018 mSolverCounterSat, 507 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 32.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 186 SdHoareTripleChecker+Valid, 131 SdHoareTripleChecker+Invalid, 1525 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 507 IncrementalHoareTripleChecker+Valid, 1018 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 32.2s IncrementalHoareTripleChecker+Time [2022-04-15 01:03:55,428 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [186 Valid, 131 Invalid, 1525 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [507 Valid, 1018 Invalid, 0 Unknown, 0 Unchecked, 32.2s Time] [2022-04-15 01:03:55,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2022-04-15 01:03:57,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 106. [2022-04-15 01:03:57,071 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:03:57,071 INFO L82 GeneralOperation]: Start isEquivalent. First operand 175 states. Second operand has 106 states, 101 states have (on average 1.297029702970297) internal successors, (131), 101 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:57,071 INFO L74 IsIncluded]: Start isIncluded. First operand 175 states. Second operand has 106 states, 101 states have (on average 1.297029702970297) internal successors, (131), 101 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:57,071 INFO L87 Difference]: Start difference. First operand 175 states. Second operand has 106 states, 101 states have (on average 1.297029702970297) internal successors, (131), 101 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:57,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:57,085 INFO L93 Difference]: Finished difference Result 175 states and 223 transitions. [2022-04-15 01:03:57,085 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 223 transitions. [2022-04-15 01:03:57,085 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:57,085 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:57,085 INFO L74 IsIncluded]: Start isIncluded. First operand has 106 states, 101 states have (on average 1.297029702970297) internal successors, (131), 101 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 175 states. [2022-04-15 01:03:57,086 INFO L87 Difference]: Start difference. First operand has 106 states, 101 states have (on average 1.297029702970297) internal successors, (131), 101 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 175 states. [2022-04-15 01:03:57,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:57,087 INFO L93 Difference]: Finished difference Result 175 states and 223 transitions. [2022-04-15 01:03:57,087 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 223 transitions. [2022-04-15 01:03:57,088 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:57,088 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:57,088 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:03:57,088 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:03:57,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 106 states, 101 states have (on average 1.297029702970297) internal successors, (131), 101 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:57,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 135 transitions. [2022-04-15 01:03:57,089 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 135 transitions. Word has length 30 [2022-04-15 01:03:57,089 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:03:57,089 INFO L478 AbstractCegarLoop]: Abstraction has 106 states and 135 transitions. [2022-04-15 01:03:57,089 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 41 states, 41 states have (on average 1.2439024390243902) internal successors, (51), 40 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:57,089 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 135 transitions. [2022-04-15 01:03:57,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-15 01:03:57,090 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:03:57,090 INFO L499 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:03:57,108 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-04-15 01:03:57,293 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24,23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:03:57,294 INFO L403 AbstractCegarLoop]: === Iteration 26 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:03:57,294 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:03:57,294 INFO L85 PathProgramCache]: Analyzing trace with hash -1790751268, now seen corresponding path program 21 times [2022-04-15 01:03:57,294 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:03:57,294 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1635011631] [2022-04-15 01:03:57,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:57,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:03:57,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:57,556 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:03:57,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:57,559 INFO L290 TraceCheckUtils]: 0: Hoare triple {15089#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15065#true} is VALID [2022-04-15 01:03:57,559 INFO L290 TraceCheckUtils]: 1: Hoare triple {15065#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-15 01:03:57,559 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15065#true} {15065#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-15 01:03:57,559 INFO L272 TraceCheckUtils]: 0: Hoare triple {15065#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15089#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:03:57,559 INFO L290 TraceCheckUtils]: 1: Hoare triple {15089#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15065#true} is VALID [2022-04-15 01:03:57,559 INFO L290 TraceCheckUtils]: 2: Hoare triple {15065#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-15 01:03:57,559 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15065#true} {15065#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-15 01:03:57,560 INFO L272 TraceCheckUtils]: 4: Hoare triple {15065#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-15 01:03:57,560 INFO L290 TraceCheckUtils]: 5: Hoare triple {15065#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15070#(= main_~y~0 0)} is VALID [2022-04-15 01:03:57,560 INFO L290 TraceCheckUtils]: 6: Hoare triple {15070#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15071#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:03:57,560 INFO L290 TraceCheckUtils]: 7: Hoare triple {15071#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15072#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:03:57,561 INFO L290 TraceCheckUtils]: 8: Hoare triple {15072#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15073#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:03:57,561 INFO L290 TraceCheckUtils]: 9: Hoare triple {15073#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15074#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:03:57,562 INFO L290 TraceCheckUtils]: 10: Hoare triple {15074#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15075#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:03:57,562 INFO L290 TraceCheckUtils]: 11: Hoare triple {15075#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15076#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:03:57,562 INFO L290 TraceCheckUtils]: 12: Hoare triple {15076#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15077#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:03:57,563 INFO L290 TraceCheckUtils]: 13: Hoare triple {15077#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15078#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:03:57,563 INFO L290 TraceCheckUtils]: 14: Hoare triple {15078#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15079#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:03:57,564 INFO L290 TraceCheckUtils]: 15: Hoare triple {15079#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15080#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 01:03:57,564 INFO L290 TraceCheckUtils]: 16: Hoare triple {15080#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15081#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 01:03:57,564 INFO L290 TraceCheckUtils]: 17: Hoare triple {15081#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15082#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 01:03:57,565 INFO L290 TraceCheckUtils]: 18: Hoare triple {15082#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15083#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-15 01:03:57,565 INFO L290 TraceCheckUtils]: 19: Hoare triple {15083#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15084#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-15 01:03:57,566 INFO L290 TraceCheckUtils]: 20: Hoare triple {15084#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15085#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-15 01:03:57,566 INFO L290 TraceCheckUtils]: 21: Hoare triple {15085#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15086#(and (<= 16 main_~y~0) (<= main_~y~0 16))} is VALID [2022-04-15 01:03:57,566 INFO L290 TraceCheckUtils]: 22: Hoare triple {15086#(and (<= 16 main_~y~0) (<= main_~y~0 16))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {15086#(and (<= 16 main_~y~0) (<= main_~y~0 16))} is VALID [2022-04-15 01:03:57,567 INFO L290 TraceCheckUtils]: 23: Hoare triple {15086#(and (<= 16 main_~y~0) (<= main_~y~0 16))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {15087#(and (<= 16 main_~z~0) (<= main_~z~0 16))} is VALID [2022-04-15 01:03:57,567 INFO L290 TraceCheckUtils]: 24: Hoare triple {15087#(and (<= 16 main_~z~0) (<= main_~z~0 16))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15088#(and (<= (div main_~z~0 4294967296) 0) (<= 15 main_~z~0))} is VALID [2022-04-15 01:03:57,567 INFO L290 TraceCheckUtils]: 25: Hoare triple {15088#(and (<= (div main_~z~0 4294967296) 0) (<= 15 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {15066#false} is VALID [2022-04-15 01:03:57,567 INFO L272 TraceCheckUtils]: 26: Hoare triple {15066#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {15066#false} is VALID [2022-04-15 01:03:57,567 INFO L290 TraceCheckUtils]: 27: Hoare triple {15066#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15066#false} is VALID [2022-04-15 01:03:57,568 INFO L290 TraceCheckUtils]: 28: Hoare triple {15066#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {15066#false} is VALID [2022-04-15 01:03:57,568 INFO L290 TraceCheckUtils]: 29: Hoare triple {15066#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15066#false} is VALID [2022-04-15 01:03:57,568 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 137 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:57,568 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:03:57,568 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1635011631] [2022-04-15 01:03:57,568 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1635011631] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:03:57,568 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1495727359] [2022-04-15 01:03:57,568 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-15 01:03:57,568 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:03:57,568 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:03:57,569 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:03:57,570 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-04-15 01:03:57,794 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2022-04-15 01:03:57,794 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:03:57,796 INFO L263 TraceCheckSpWp]: Trace formula consists of 143 conjuncts, 39 conjunts are in the unsatisfiable core [2022-04-15 01:03:57,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:57,803 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:03:58,096 INFO L272 TraceCheckUtils]: 0: Hoare triple {15065#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-15 01:03:58,096 INFO L290 TraceCheckUtils]: 1: Hoare triple {15065#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15065#true} is VALID [2022-04-15 01:03:58,097 INFO L290 TraceCheckUtils]: 2: Hoare triple {15065#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-15 01:03:58,097 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15065#true} {15065#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-15 01:03:58,097 INFO L272 TraceCheckUtils]: 4: Hoare triple {15065#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-15 01:03:58,097 INFO L290 TraceCheckUtils]: 5: Hoare triple {15065#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15070#(= main_~y~0 0)} is VALID [2022-04-15 01:03:58,097 INFO L290 TraceCheckUtils]: 6: Hoare triple {15070#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15071#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:03:58,098 INFO L290 TraceCheckUtils]: 7: Hoare triple {15071#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15072#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:03:58,098 INFO L290 TraceCheckUtils]: 8: Hoare triple {15072#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15073#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:03:58,098 INFO L290 TraceCheckUtils]: 9: Hoare triple {15073#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15074#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:03:58,099 INFO L290 TraceCheckUtils]: 10: Hoare triple {15074#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15075#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:03:58,099 INFO L290 TraceCheckUtils]: 11: Hoare triple {15075#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15076#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:03:58,100 INFO L290 TraceCheckUtils]: 12: Hoare triple {15076#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15077#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:03:58,100 INFO L290 TraceCheckUtils]: 13: Hoare triple {15077#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15078#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:03:58,100 INFO L290 TraceCheckUtils]: 14: Hoare triple {15078#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15079#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:03:58,101 INFO L290 TraceCheckUtils]: 15: Hoare triple {15079#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15080#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 01:03:58,101 INFO L290 TraceCheckUtils]: 16: Hoare triple {15080#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15081#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 01:03:58,102 INFO L290 TraceCheckUtils]: 17: Hoare triple {15081#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15082#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 01:03:58,102 INFO L290 TraceCheckUtils]: 18: Hoare triple {15082#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15083#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-15 01:03:58,102 INFO L290 TraceCheckUtils]: 19: Hoare triple {15083#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15084#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-15 01:03:58,103 INFO L290 TraceCheckUtils]: 20: Hoare triple {15084#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15085#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-15 01:03:58,103 INFO L290 TraceCheckUtils]: 21: Hoare triple {15085#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15086#(and (<= 16 main_~y~0) (<= main_~y~0 16))} is VALID [2022-04-15 01:03:58,103 INFO L290 TraceCheckUtils]: 22: Hoare triple {15086#(and (<= 16 main_~y~0) (<= main_~y~0 16))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {15086#(and (<= 16 main_~y~0) (<= main_~y~0 16))} is VALID [2022-04-15 01:03:58,104 INFO L290 TraceCheckUtils]: 23: Hoare triple {15086#(and (<= 16 main_~y~0) (<= main_~y~0 16))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {15087#(and (<= 16 main_~z~0) (<= main_~z~0 16))} is VALID [2022-04-15 01:03:58,104 INFO L290 TraceCheckUtils]: 24: Hoare triple {15087#(and (<= 16 main_~z~0) (<= main_~z~0 16))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15165#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-15 01:03:58,104 INFO L290 TraceCheckUtils]: 25: Hoare triple {15165#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {15066#false} is VALID [2022-04-15 01:03:58,104 INFO L272 TraceCheckUtils]: 26: Hoare triple {15066#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {15066#false} is VALID [2022-04-15 01:03:58,104 INFO L290 TraceCheckUtils]: 27: Hoare triple {15066#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15066#false} is VALID [2022-04-15 01:03:58,104 INFO L290 TraceCheckUtils]: 28: Hoare triple {15066#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {15066#false} is VALID [2022-04-15 01:03:58,105 INFO L290 TraceCheckUtils]: 29: Hoare triple {15066#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15066#false} is VALID [2022-04-15 01:03:58,105 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 137 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:58,105 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:03:58,493 INFO L290 TraceCheckUtils]: 29: Hoare triple {15066#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15066#false} is VALID [2022-04-15 01:03:58,493 INFO L290 TraceCheckUtils]: 28: Hoare triple {15066#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {15066#false} is VALID [2022-04-15 01:03:58,493 INFO L290 TraceCheckUtils]: 27: Hoare triple {15066#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15066#false} is VALID [2022-04-15 01:03:58,493 INFO L272 TraceCheckUtils]: 26: Hoare triple {15066#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {15066#false} is VALID [2022-04-15 01:03:58,493 INFO L290 TraceCheckUtils]: 25: Hoare triple {15193#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {15066#false} is VALID [2022-04-15 01:03:58,494 INFO L290 TraceCheckUtils]: 24: Hoare triple {15197#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15193#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 01:03:58,494 INFO L290 TraceCheckUtils]: 23: Hoare triple {15201#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {15197#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-15 01:03:58,495 INFO L290 TraceCheckUtils]: 22: Hoare triple {15201#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {15201#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:03:58,495 INFO L290 TraceCheckUtils]: 21: Hoare triple {15208#(< 0 (mod main_~y~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15201#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:03:58,496 INFO L290 TraceCheckUtils]: 20: Hoare triple {15212#(< 0 (mod (+ main_~y~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15208#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:03:58,496 INFO L290 TraceCheckUtils]: 19: Hoare triple {15216#(< 0 (mod (+ main_~y~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15212#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-15 01:03:58,497 INFO L290 TraceCheckUtils]: 18: Hoare triple {15220#(< 0 (mod (+ main_~y~0 3) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15216#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-15 01:03:58,497 INFO L290 TraceCheckUtils]: 17: Hoare triple {15224#(< 0 (mod (+ main_~y~0 4) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15220#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-15 01:03:58,498 INFO L290 TraceCheckUtils]: 16: Hoare triple {15228#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15224#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-15 01:03:58,498 INFO L290 TraceCheckUtils]: 15: Hoare triple {15232#(< 0 (mod (+ main_~y~0 6) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15228#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-15 01:03:58,499 INFO L290 TraceCheckUtils]: 14: Hoare triple {15236#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15232#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-15 01:03:58,499 INFO L290 TraceCheckUtils]: 13: Hoare triple {15240#(< 0 (mod (+ main_~y~0 8) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15236#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-15 01:03:58,500 INFO L290 TraceCheckUtils]: 12: Hoare triple {15244#(< 0 (mod (+ main_~y~0 9) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15240#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-15 01:03:58,500 INFO L290 TraceCheckUtils]: 11: Hoare triple {15248#(< 0 (mod (+ main_~y~0 10) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15244#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-15 01:03:58,501 INFO L290 TraceCheckUtils]: 10: Hoare triple {15252#(< 0 (mod (+ main_~y~0 11) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15248#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-15 01:03:58,501 INFO L290 TraceCheckUtils]: 9: Hoare triple {15256#(< 0 (mod (+ main_~y~0 12) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15252#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-15 01:03:58,502 INFO L290 TraceCheckUtils]: 8: Hoare triple {15260#(< 0 (mod (+ main_~y~0 13) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15256#(< 0 (mod (+ main_~y~0 12) 4294967296))} is VALID [2022-04-15 01:03:58,502 INFO L290 TraceCheckUtils]: 7: Hoare triple {15264#(< 0 (mod (+ main_~y~0 14) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15260#(< 0 (mod (+ main_~y~0 13) 4294967296))} is VALID [2022-04-15 01:03:58,503 INFO L290 TraceCheckUtils]: 6: Hoare triple {15268#(< 0 (mod (+ main_~y~0 15) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15264#(< 0 (mod (+ main_~y~0 14) 4294967296))} is VALID [2022-04-15 01:03:58,503 INFO L290 TraceCheckUtils]: 5: Hoare triple {15065#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15268#(< 0 (mod (+ main_~y~0 15) 4294967296))} is VALID [2022-04-15 01:03:58,503 INFO L272 TraceCheckUtils]: 4: Hoare triple {15065#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-15 01:03:58,503 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15065#true} {15065#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-15 01:03:58,503 INFO L290 TraceCheckUtils]: 2: Hoare triple {15065#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-15 01:03:58,503 INFO L290 TraceCheckUtils]: 1: Hoare triple {15065#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15065#true} is VALID [2022-04-15 01:03:58,503 INFO L272 TraceCheckUtils]: 0: Hoare triple {15065#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-15 01:03:58,504 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 137 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:58,504 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1495727359] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:03:58,504 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:03:58,504 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 21] total 42 [2022-04-15 01:03:58,504 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1765843983] [2022-04-15 01:03:58,504 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:03:58,505 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 1.1904761904761905) internal successors, (50), 41 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-15 01:03:58,505 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:03:58,505 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 42 states, 42 states have (on average 1.1904761904761905) internal successors, (50), 41 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:58,528 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:58,529 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-04-15 01:03:58,529 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:03:58,529 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-04-15 01:03:58,529 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=376, Invalid=1346, Unknown=0, NotChecked=0, Total=1722 [2022-04-15 01:03:58,529 INFO L87 Difference]: Start difference. First operand 106 states and 135 transitions. Second operand has 42 states, 42 states have (on average 1.1904761904761905) internal successors, (50), 41 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:26,209 WARN L232 SmtUtils]: Spent 14.02s on a formula simplification that was a NOOP. DAG size: 76 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:04:47,933 WARN L232 SmtUtils]: Spent 10.11s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:05:15,623 WARN L232 SmtUtils]: Spent 14.00s on a formula simplification that was a NOOP. DAG size: 82 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:05:30,669 WARN L232 SmtUtils]: Spent 6.19s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:05:51,459 WARN L232 SmtUtils]: Spent 10.49s on a formula simplification that was a NOOP. DAG size: 79 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:06:09,691 WARN L232 SmtUtils]: Spent 10.76s on a formula simplification that was a NOOP. DAG size: 78 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:06:40,759 WARN L232 SmtUtils]: Spent 9.09s on a formula simplification that was a NOOP. DAG size: 75 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:06:42,910 WARN L833 $PredicateComparison]: unable to prove that (and (< 0 (mod (+ 2 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4294967295 c_main_~z~0) 4294967296)) (= |c_#NULL.base| |c_old(#NULL.base)|) (< 0 (mod (+ 11 c_main_~y~0) 4294967296)) (< 0 (mod c_main_~y~0 4294967296)) (< 0 (mod (+ 13 c_main_~y~0) 4294967296)) (< 0 (mod (+ 3 c_main_~y~0) 4294967296)) (< 0 (mod (+ c_main_~y~0 1) 4294967296)) (< 0 (mod (+ 4294967295 c_main_~y~0) 4294967296)) (< 0 (mod (+ 8 c_main_~y~0) 4294967296)) (< 0 (mod c_main_~z~0 4294967296)) (< 0 (mod (+ 6 c_main_~y~0) 4294967296)) (< 0 (mod (+ 5 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4 c_main_~y~0) 4294967296)) (< 0 (mod (+ 9 c_main_~y~0) 4294967296)) (< 0 (mod (+ 10 c_main_~y~0) 4294967296)) (= |c_#NULL.offset| |c_old(#NULL.offset)|) (< 0 (mod (+ 7 c_main_~y~0) 4294967296)) (< 0 (mod (+ 12 c_main_~y~0) 4294967296))) is different from false [2022-04-15 01:07:16,839 WARN L232 SmtUtils]: Spent 15.92s on a formula simplification that was a NOOP. DAG size: 80 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:07:26,950 WARN L232 SmtUtils]: Spent 6.97s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:07:49,204 WARN L232 SmtUtils]: Spent 8.19s on a formula simplification that was a NOOP. DAG size: 76 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:09:32,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:09:32,469 INFO L93 Difference]: Finished difference Result 269 states and 363 transitions. [2022-04-15 01:09:32,469 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 117 states. [2022-04-15 01:09:32,470 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 1.1904761904761905) internal successors, (50), 41 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-15 01:09:32,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:09:32,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.1904761904761905) internal successors, (50), 41 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:32,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 261 transitions. [2022-04-15 01:09:32,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.1904761904761905) internal successors, (50), 41 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:32,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 261 transitions. [2022-04-15 01:09:32,478 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 117 states and 261 transitions. [2022-04-15 01:09:33,681 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 261 edges. 261 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:09:33,685 INFO L225 Difference]: With dead ends: 269 [2022-04-15 01:09:33,685 INFO L226 Difference]: Without dead ends: 264 [2022-04-15 01:09:33,688 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 41 SyntacticMatches, 1 SemanticMatches, 153 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 7138 ImplicationChecksByTransitivity, 323.0s TimeCoverageRelationStatistics Valid=5126, Invalid=18431, Unknown=9, NotChecked=304, Total=23870 [2022-04-15 01:09:33,689 INFO L913 BasicCegarLoop]: 36 mSDtfsCounter, 860 mSDsluCounter, 122 mSDsCounter, 0 mSdLazyCounter, 1443 mSolverCounterSat, 554 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 860 SdHoareTripleChecker+Valid, 158 SdHoareTripleChecker+Invalid, 1998 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 554 IncrementalHoareTripleChecker+Valid, 1443 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 1 IncrementalHoareTripleChecker+Unchecked, 3.0s IncrementalHoareTripleChecker+Time [2022-04-15 01:09:33,690 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [860 Valid, 158 Invalid, 1998 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [554 Valid, 1443 Invalid, 0 Unknown, 1 Unchecked, 3.0s Time] [2022-04-15 01:09:33,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 264 states. [2022-04-15 01:09:35,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 264 to 121. [2022-04-15 01:09:35,526 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:09:35,526 INFO L82 GeneralOperation]: Start isEquivalent. First operand 264 states. Second operand has 121 states, 116 states have (on average 1.3275862068965518) internal successors, (154), 116 states have internal predecessors, (154), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:35,526 INFO L74 IsIncluded]: Start isIncluded. First operand 264 states. Second operand has 121 states, 116 states have (on average 1.3275862068965518) internal successors, (154), 116 states have internal predecessors, (154), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:35,526 INFO L87 Difference]: Start difference. First operand 264 states. Second operand has 121 states, 116 states have (on average 1.3275862068965518) internal successors, (154), 116 states have internal predecessors, (154), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:35,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:09:35,529 INFO L93 Difference]: Finished difference Result 264 states and 334 transitions. [2022-04-15 01:09:35,529 INFO L276 IsEmpty]: Start isEmpty. Operand 264 states and 334 transitions. [2022-04-15 01:09:35,530 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:09:35,530 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:09:35,530 INFO L74 IsIncluded]: Start isIncluded. First operand has 121 states, 116 states have (on average 1.3275862068965518) internal successors, (154), 116 states have internal predecessors, (154), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 264 states. [2022-04-15 01:09:35,530 INFO L87 Difference]: Start difference. First operand has 121 states, 116 states have (on average 1.3275862068965518) internal successors, (154), 116 states have internal predecessors, (154), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 264 states. [2022-04-15 01:09:35,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:09:35,533 INFO L93 Difference]: Finished difference Result 264 states and 334 transitions. [2022-04-15 01:09:35,533 INFO L276 IsEmpty]: Start isEmpty. Operand 264 states and 334 transitions. [2022-04-15 01:09:35,533 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:09:35,535 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:09:35,535 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:09:35,535 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:09:35,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 121 states, 116 states have (on average 1.3275862068965518) internal successors, (154), 116 states have internal predecessors, (154), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:35,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 158 transitions. [2022-04-15 01:09:35,537 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 158 transitions. Word has length 30 [2022-04-15 01:09:35,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:09:35,537 INFO L478 AbstractCegarLoop]: Abstraction has 121 states and 158 transitions. [2022-04-15 01:09:35,537 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 42 states, 42 states have (on average 1.1904761904761905) internal successors, (50), 41 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:35,537 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 158 transitions. [2022-04-15 01:09:35,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-15 01:09:35,540 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:09:35,540 INFO L499 BasicCegarLoop]: trace histogram [9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:09:35,545 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Ended with exit code 0 [2022-04-15 01:09:35,744 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25,24 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:09:35,745 INFO L403 AbstractCegarLoop]: === Iteration 27 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:09:35,745 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:09:35,745 INFO L85 PathProgramCache]: Analyzing trace with hash 788777611, now seen corresponding path program 22 times [2022-04-15 01:09:35,745 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:09:35,745 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1985773699] [2022-04-15 01:09:35,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:09:35,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:09:35,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:09:36,427 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:09:36,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:09:36,441 INFO L290 TraceCheckUtils]: 0: Hoare triple {16796#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16769#true} is VALID [2022-04-15 01:09:36,441 INFO L290 TraceCheckUtils]: 1: Hoare triple {16769#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16769#true} is VALID [2022-04-15 01:09:36,441 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16769#true} {16769#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16769#true} is VALID [2022-04-15 01:09:36,444 INFO L272 TraceCheckUtils]: 0: Hoare triple {16769#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16796#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:09:36,444 INFO L290 TraceCheckUtils]: 1: Hoare triple {16796#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16769#true} is VALID [2022-04-15 01:09:36,444 INFO L290 TraceCheckUtils]: 2: Hoare triple {16769#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16769#true} is VALID [2022-04-15 01:09:36,444 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16769#true} {16769#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16769#true} is VALID [2022-04-15 01:09:36,444 INFO L272 TraceCheckUtils]: 4: Hoare triple {16769#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16769#true} is VALID [2022-04-15 01:09:36,444 INFO L290 TraceCheckUtils]: 5: Hoare triple {16769#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16774#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:09:36,445 INFO L290 TraceCheckUtils]: 6: Hoare triple {16774#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16775#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 01:09:36,446 INFO L290 TraceCheckUtils]: 7: Hoare triple {16775#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16776#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293)) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 01:09:36,447 INFO L290 TraceCheckUtils]: 8: Hoare triple {16776#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293)) (<= main_~n~0 (+ main_~x~0 2)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16777#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)) (<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296)))))} is VALID [2022-04-15 01:09:36,448 INFO L290 TraceCheckUtils]: 9: Hoare triple {16777#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)) (<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296)))))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16778#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 01:09:36,449 INFO L290 TraceCheckUtils]: 10: Hoare triple {16778#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 4) main_~n~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16779#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296)))))} is VALID [2022-04-15 01:09:36,450 INFO L290 TraceCheckUtils]: 11: Hoare triple {16779#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296)))))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16780#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~n~0 (+ main_~x~0 6)) (<= (+ main_~x~0 6) main_~n~0))} is VALID [2022-04-15 01:09:36,452 INFO L290 TraceCheckUtils]: 12: Hoare triple {16780#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~n~0 (+ main_~x~0 6)) (<= (+ main_~x~0 6) main_~n~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16781#(and (<= (+ 7 main_~x~0) main_~n~0) (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~n~0 (+ 7 main_~x~0)))} is VALID [2022-04-15 01:09:36,452 INFO L290 TraceCheckUtils]: 13: Hoare triple {16781#(and (<= (+ 7 main_~x~0) main_~n~0) (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~n~0 (+ 7 main_~x~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16782#(and (<= main_~n~0 (+ main_~x~0 8)) (<= main_~x~0 (+ 4294967287 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 8) main_~n~0))} is VALID [2022-04-15 01:09:36,465 INFO L290 TraceCheckUtils]: 14: Hoare triple {16782#(and (<= main_~n~0 (+ main_~x~0 8)) (<= main_~x~0 (+ 4294967287 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 8) main_~n~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16783#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= main_~n~0 (+ main_~x~0 9)) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967304) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-15 01:09:36,466 INFO L290 TraceCheckUtils]: 15: Hoare triple {16783#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= main_~n~0 (+ main_~x~0 9)) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967304) 4294967296) 4294967296) main_~x~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {16784#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~n~0 (+ main_~x~0 9)) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967304) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-15 01:09:36,466 INFO L290 TraceCheckUtils]: 16: Hoare triple {16784#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~n~0 (+ main_~x~0 9)) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967304) 4294967296) 4294967296) main_~x~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {16784#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~n~0 (+ main_~x~0 9)) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967304) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-15 01:09:36,467 INFO L290 TraceCheckUtils]: 17: Hoare triple {16784#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~n~0 (+ main_~x~0 9)) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967304) 4294967296) 4294967296) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16785#(and (<= (+ 1 (* (div (+ 4294967303 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296)) main_~x~0) (<= main_~n~0 (+ main_~x~0 8)) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:09:36,468 INFO L290 TraceCheckUtils]: 18: Hoare triple {16785#(and (<= (+ 1 (* (div (+ 4294967303 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296)) main_~x~0) (<= main_~n~0 (+ main_~x~0 8)) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16786#(and (<= main_~x~0 (+ 2 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ 7 main_~x~0)) (<= (+ 2 (* 4294967296 (div (+ 4294967302 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296))) main_~x~0))} is VALID [2022-04-15 01:09:36,469 INFO L290 TraceCheckUtils]: 19: Hoare triple {16786#(and (<= main_~x~0 (+ 2 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ 7 main_~x~0)) (<= (+ 2 (* 4294967296 (div (+ 4294967302 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296))) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16787#(and (<= main_~n~0 (+ main_~x~0 6)) (<= (+ 3 (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296)) main_~x~0) (<= main_~x~0 (+ 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-15 01:09:36,470 INFO L290 TraceCheckUtils]: 20: Hoare triple {16787#(and (<= main_~n~0 (+ main_~x~0 6)) (<= (+ 3 (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296)) main_~x~0) (<= main_~x~0 (+ 3 (* (div main_~n~0 4294967296) 4294967296))))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16788#(and (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967300 (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} is VALID [2022-04-15 01:09:36,471 INFO L290 TraceCheckUtils]: 21: Hoare triple {16788#(and (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967300 (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16789#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~x~0 (+ 5 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) 5) main_~x~0))} is VALID [2022-04-15 01:09:36,473 INFO L290 TraceCheckUtils]: 22: Hoare triple {16789#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~x~0 (+ 5 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) 5) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16790#(and (<= main_~x~0 (+ 6 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ main_~x~0 3)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 6) main_~x~0))} is VALID [2022-04-15 01:09:36,474 INFO L290 TraceCheckUtils]: 23: Hoare triple {16790#(and (<= main_~x~0 (+ 6 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ main_~x~0 3)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 6) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16791#(and (<= main_~x~0 (+ 7 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 7) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 01:09:36,475 INFO L290 TraceCheckUtils]: 24: Hoare triple {16791#(and (<= main_~x~0 (+ 7 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 7) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16792#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 8) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 8)))} is VALID [2022-04-15 01:09:36,476 INFO L290 TraceCheckUtils]: 25: Hoare triple {16792#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 8) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 8)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16793#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:09:36,476 INFO L290 TraceCheckUtils]: 26: Hoare triple {16793#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {16793#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:09:36,477 INFO L272 TraceCheckUtils]: 27: Hoare triple {16793#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {16794#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 01:09:36,477 INFO L290 TraceCheckUtils]: 28: Hoare triple {16794#(not (= |__VERIFIER_assert_#in~cond| 0))} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16795#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 01:09:36,477 INFO L290 TraceCheckUtils]: 29: Hoare triple {16795#(not (= __VERIFIER_assert_~cond 0))} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {16770#false} is VALID [2022-04-15 01:09:36,477 INFO L290 TraceCheckUtils]: 30: Hoare triple {16770#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16770#false} is VALID [2022-04-15 01:09:36,478 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:09:36,478 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:09:36,478 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1985773699] [2022-04-15 01:09:36,478 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1985773699] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:09:36,478 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1974225889] [2022-04-15 01:09:36,478 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 01:09:36,478 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:09:36,478 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:09:36,479 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:09:36,480 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-04-15 01:09:36,518 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 01:09:36,518 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:09:36,519 INFO L263 TraceCheckSpWp]: Trace formula consists of 148 conjuncts, 41 conjunts are in the unsatisfiable core [2022-04-15 01:09:36,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:09:36,525 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:09:36,844 INFO L272 TraceCheckUtils]: 0: Hoare triple {16769#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16769#true} is VALID [2022-04-15 01:09:36,844 INFO L290 TraceCheckUtils]: 1: Hoare triple {16769#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16769#true} is VALID [2022-04-15 01:09:36,844 INFO L290 TraceCheckUtils]: 2: Hoare triple {16769#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16769#true} is VALID [2022-04-15 01:09:36,844 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16769#true} {16769#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16769#true} is VALID [2022-04-15 01:09:36,845 INFO L272 TraceCheckUtils]: 4: Hoare triple {16769#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16769#true} is VALID [2022-04-15 01:09:36,845 INFO L290 TraceCheckUtils]: 5: Hoare triple {16769#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16774#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:09:36,845 INFO L290 TraceCheckUtils]: 6: Hoare triple {16774#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16818#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-15 01:09:36,846 INFO L290 TraceCheckUtils]: 7: Hoare triple {16818#(= (+ main_~x~0 1) main_~n~0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16822#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-15 01:09:36,846 INFO L290 TraceCheckUtils]: 8: Hoare triple {16822#(= main_~n~0 (+ main_~x~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16826#(= (+ main_~x~0 3) main_~n~0)} is VALID [2022-04-15 01:09:36,846 INFO L290 TraceCheckUtils]: 9: Hoare triple {16826#(= (+ main_~x~0 3) main_~n~0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16830#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} is VALID [2022-04-15 01:09:36,847 INFO L290 TraceCheckUtils]: 10: Hoare triple {16830#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16834#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} is VALID [2022-04-15 01:09:36,847 INFO L290 TraceCheckUtils]: 11: Hoare triple {16834#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16838#(= (+ main_~x~0 2) (+ main_~n~0 (- 4)))} is VALID [2022-04-15 01:09:36,848 INFO L290 TraceCheckUtils]: 12: Hoare triple {16838#(= (+ main_~x~0 2) (+ main_~n~0 (- 4)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16842#(= (+ main_~x~0 3) (+ main_~n~0 (- 4)))} is VALID [2022-04-15 01:09:36,848 INFO L290 TraceCheckUtils]: 13: Hoare triple {16842#(= (+ main_~x~0 3) (+ main_~n~0 (- 4)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16846#(= (+ main_~x~0 1) (+ main_~n~0 (- 7)))} is VALID [2022-04-15 01:09:36,849 INFO L290 TraceCheckUtils]: 14: Hoare triple {16846#(= (+ main_~x~0 1) (+ main_~n~0 (- 7)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16850#(= (+ main_~x~0 2) (+ main_~n~0 (- 7)))} is VALID [2022-04-15 01:09:36,849 INFO L290 TraceCheckUtils]: 15: Hoare triple {16850#(= (+ main_~x~0 2) (+ main_~n~0 (- 7)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {16850#(= (+ main_~x~0 2) (+ main_~n~0 (- 7)))} is VALID [2022-04-15 01:09:36,849 INFO L290 TraceCheckUtils]: 16: Hoare triple {16850#(= (+ main_~x~0 2) (+ main_~n~0 (- 7)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {16850#(= (+ main_~x~0 2) (+ main_~n~0 (- 7)))} is VALID [2022-04-15 01:09:36,849 INFO L290 TraceCheckUtils]: 17: Hoare triple {16850#(= (+ main_~x~0 2) (+ main_~n~0 (- 7)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16846#(= (+ main_~x~0 1) (+ main_~n~0 (- 7)))} is VALID [2022-04-15 01:09:36,850 INFO L290 TraceCheckUtils]: 18: Hoare triple {16846#(= (+ main_~x~0 1) (+ main_~n~0 (- 7)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16842#(= (+ main_~x~0 3) (+ main_~n~0 (- 4)))} is VALID [2022-04-15 01:09:36,850 INFO L290 TraceCheckUtils]: 19: Hoare triple {16842#(= (+ main_~x~0 3) (+ main_~n~0 (- 4)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16838#(= (+ main_~x~0 2) (+ main_~n~0 (- 4)))} is VALID [2022-04-15 01:09:36,851 INFO L290 TraceCheckUtils]: 20: Hoare triple {16838#(= (+ main_~x~0 2) (+ main_~n~0 (- 4)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16834#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} is VALID [2022-04-15 01:09:36,851 INFO L290 TraceCheckUtils]: 21: Hoare triple {16834#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16830#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} is VALID [2022-04-15 01:09:36,851 INFO L290 TraceCheckUtils]: 22: Hoare triple {16830#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16826#(= (+ main_~x~0 3) main_~n~0)} is VALID [2022-04-15 01:09:36,852 INFO L290 TraceCheckUtils]: 23: Hoare triple {16826#(= (+ main_~x~0 3) main_~n~0)} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16822#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-15 01:09:36,852 INFO L290 TraceCheckUtils]: 24: Hoare triple {16822#(= main_~n~0 (+ main_~x~0 2))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16818#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-15 01:09:36,853 INFO L290 TraceCheckUtils]: 25: Hoare triple {16818#(= (+ main_~x~0 1) main_~n~0)} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16774#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:09:36,853 INFO L290 TraceCheckUtils]: 26: Hoare triple {16774#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {16774#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:09:36,853 INFO L272 TraceCheckUtils]: 27: Hoare triple {16774#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {16890#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:09:36,854 INFO L290 TraceCheckUtils]: 28: Hoare triple {16890#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16894#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:09:36,854 INFO L290 TraceCheckUtils]: 29: Hoare triple {16894#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {16770#false} is VALID [2022-04-15 01:09:36,854 INFO L290 TraceCheckUtils]: 30: Hoare triple {16770#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16770#false} is VALID [2022-04-15 01:09:36,854 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:09:36,854 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:09:37,398 INFO L290 TraceCheckUtils]: 30: Hoare triple {16770#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16770#false} is VALID [2022-04-15 01:09:37,398 INFO L290 TraceCheckUtils]: 29: Hoare triple {16894#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {16770#false} is VALID [2022-04-15 01:09:37,399 INFO L290 TraceCheckUtils]: 28: Hoare triple {16890#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16894#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:09:37,399 INFO L272 TraceCheckUtils]: 27: Hoare triple {16910#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {16890#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:09:37,400 INFO L290 TraceCheckUtils]: 26: Hoare triple {16910#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {16910#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:09:37,401 INFO L290 TraceCheckUtils]: 25: Hoare triple {16917#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16910#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:09:37,401 INFO L290 TraceCheckUtils]: 24: Hoare triple {16921#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16917#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:09:37,402 INFO L290 TraceCheckUtils]: 23: Hoare triple {16925#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16921#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:09:37,403 INFO L290 TraceCheckUtils]: 22: Hoare triple {16929#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16925#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-15 01:09:37,404 INFO L290 TraceCheckUtils]: 21: Hoare triple {16933#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16929#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 01:09:37,404 INFO L290 TraceCheckUtils]: 20: Hoare triple {16937#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16933#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-15 01:09:37,405 INFO L290 TraceCheckUtils]: 19: Hoare triple {16941#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16937#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-15 01:09:37,406 INFO L290 TraceCheckUtils]: 18: Hoare triple {16945#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 8) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16941#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-15 01:09:37,407 INFO L290 TraceCheckUtils]: 17: Hoare triple {16949#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 9) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16945#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-15 01:09:37,407 INFO L290 TraceCheckUtils]: 16: Hoare triple {16949#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 9) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {16949#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 9) 4294967296))} is VALID [2022-04-15 01:09:37,407 INFO L290 TraceCheckUtils]: 15: Hoare triple {16949#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 9) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {16949#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 9) 4294967296))} is VALID [2022-04-15 01:09:37,408 INFO L290 TraceCheckUtils]: 14: Hoare triple {16945#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 8) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16949#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 9) 4294967296))} is VALID [2022-04-15 01:09:37,409 INFO L290 TraceCheckUtils]: 13: Hoare triple {16941#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16945#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-15 01:09:37,410 INFO L290 TraceCheckUtils]: 12: Hoare triple {16937#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16941#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-15 01:09:37,411 INFO L290 TraceCheckUtils]: 11: Hoare triple {16933#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16937#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-15 01:09:37,411 INFO L290 TraceCheckUtils]: 10: Hoare triple {16929#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16933#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-15 01:09:37,412 INFO L290 TraceCheckUtils]: 9: Hoare triple {16925#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16929#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 01:09:37,413 INFO L290 TraceCheckUtils]: 8: Hoare triple {16921#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16925#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-15 01:09:37,413 INFO L290 TraceCheckUtils]: 7: Hoare triple {16917#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16921#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:09:37,414 INFO L290 TraceCheckUtils]: 6: Hoare triple {16910#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16917#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:09:37,415 INFO L290 TraceCheckUtils]: 5: Hoare triple {16769#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16910#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:09:37,415 INFO L272 TraceCheckUtils]: 4: Hoare triple {16769#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16769#true} is VALID [2022-04-15 01:09:37,415 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16769#true} {16769#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16769#true} is VALID [2022-04-15 01:09:37,415 INFO L290 TraceCheckUtils]: 2: Hoare triple {16769#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16769#true} is VALID [2022-04-15 01:09:37,415 INFO L290 TraceCheckUtils]: 1: Hoare triple {16769#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16769#true} is VALID [2022-04-15 01:09:37,415 INFO L272 TraceCheckUtils]: 0: Hoare triple {16769#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16769#true} is VALID [2022-04-15 01:09:37,415 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:09:37,415 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1974225889] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:09:37,416 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:09:37,416 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 14, 14] total 46 [2022-04-15 01:09:37,416 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [459785412] [2022-04-15 01:09:37,416 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:09:37,416 INFO L78 Accepts]: Start accepts. Automaton has has 46 states, 46 states have (on average 1.5869565217391304) internal successors, (73), 43 states have internal predecessors, (73), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-15 01:09:37,416 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:09:37,416 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 46 states, 46 states have (on average 1.5869565217391304) internal successors, (73), 43 states have internal predecessors, (73), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:37,480 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 80 edges. 80 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:09:37,480 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 46 states [2022-04-15 01:09:37,480 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:09:37,481 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2022-04-15 01:09:37,481 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=148, Invalid=1922, Unknown=0, NotChecked=0, Total=2070 [2022-04-15 01:09:37,481 INFO L87 Difference]: Start difference. First operand 121 states and 158 transitions. Second operand has 46 states, 46 states have (on average 1.5869565217391304) internal successors, (73), 43 states have internal predecessors, (73), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:41,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:09:41,697 INFO L93 Difference]: Finished difference Result 137 states and 174 transitions. [2022-04-15 01:09:41,697 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-04-15 01:09:41,697 INFO L78 Accepts]: Start accepts. Automaton has has 46 states, 46 states have (on average 1.5869565217391304) internal successors, (73), 43 states have internal predecessors, (73), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-15 01:09:41,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:09:41,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.5869565217391304) internal successors, (73), 43 states have internal predecessors, (73), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:41,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 52 transitions. [2022-04-15 01:09:41,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.5869565217391304) internal successors, (73), 43 states have internal predecessors, (73), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:41,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 52 transitions. [2022-04-15 01:09:41,698 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 24 states and 52 transitions. [2022-04-15 01:09:41,745 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:09:41,747 INFO L225 Difference]: With dead ends: 137 [2022-04-15 01:09:41,747 INFO L226 Difference]: Without dead ends: 132 [2022-04-15 01:09:41,747 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 34 SyntacticMatches, 9 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1049 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=293, Invalid=4129, Unknown=0, NotChecked=0, Total=4422 [2022-04-15 01:09:41,748 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 23 mSDsluCounter, 107 mSDsCounter, 0 mSdLazyCounter, 791 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 818 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 791 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-15 01:09:41,748 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [23 Valid, 119 Invalid, 818 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 791 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-04-15 01:09:41,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2022-04-15 01:09:43,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 113. [2022-04-15 01:09:43,396 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:09:43,397 INFO L82 GeneralOperation]: Start isEquivalent. First operand 132 states. Second operand has 113 states, 108 states have (on average 1.3518518518518519) internal successors, (146), 108 states have internal predecessors, (146), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:43,397 INFO L74 IsIncluded]: Start isIncluded. First operand 132 states. Second operand has 113 states, 108 states have (on average 1.3518518518518519) internal successors, (146), 108 states have internal predecessors, (146), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:43,397 INFO L87 Difference]: Start difference. First operand 132 states. Second operand has 113 states, 108 states have (on average 1.3518518518518519) internal successors, (146), 108 states have internal predecessors, (146), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:43,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:09:43,398 INFO L93 Difference]: Finished difference Result 132 states and 169 transitions. [2022-04-15 01:09:43,398 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 169 transitions. [2022-04-15 01:09:43,398 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:09:43,398 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:09:43,399 INFO L74 IsIncluded]: Start isIncluded. First operand has 113 states, 108 states have (on average 1.3518518518518519) internal successors, (146), 108 states have internal predecessors, (146), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 132 states. [2022-04-15 01:09:43,399 INFO L87 Difference]: Start difference. First operand has 113 states, 108 states have (on average 1.3518518518518519) internal successors, (146), 108 states have internal predecessors, (146), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 132 states. [2022-04-15 01:09:43,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:09:43,400 INFO L93 Difference]: Finished difference Result 132 states and 169 transitions. [2022-04-15 01:09:43,400 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 169 transitions. [2022-04-15 01:09:43,401 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:09:43,401 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:09:43,401 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:09:43,401 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:09:43,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 113 states, 108 states have (on average 1.3518518518518519) internal successors, (146), 108 states have internal predecessors, (146), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:43,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 150 transitions. [2022-04-15 01:09:43,402 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 150 transitions. Word has length 31 [2022-04-15 01:09:43,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:09:43,402 INFO L478 AbstractCegarLoop]: Abstraction has 113 states and 150 transitions. [2022-04-15 01:09:43,402 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 46 states, 46 states have (on average 1.5869565217391304) internal successors, (73), 43 states have internal predecessors, (73), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:43,402 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 150 transitions. [2022-04-15 01:09:43,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-15 01:09:43,403 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:09:43,403 INFO L499 BasicCegarLoop]: trace histogram [12, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:09:43,421 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2022-04-15 01:09:43,621 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2022-04-15 01:09:43,621 INFO L403 AbstractCegarLoop]: === Iteration 28 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:09:43,621 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:09:43,621 INFO L85 PathProgramCache]: Analyzing trace with hash 1872693003, now seen corresponding path program 23 times [2022-04-15 01:09:43,621 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:09:43,622 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1658158885] [2022-04-15 01:09:43,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:09:43,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:09:43,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:09:43,940 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:09:43,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:09:43,943 INFO L290 TraceCheckUtils]: 0: Hoare triple {17792#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17767#true} is VALID [2022-04-15 01:09:43,943 INFO L290 TraceCheckUtils]: 1: Hoare triple {17767#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17767#true} is VALID [2022-04-15 01:09:43,943 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {17767#true} {17767#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17767#true} is VALID [2022-04-15 01:09:43,944 INFO L272 TraceCheckUtils]: 0: Hoare triple {17767#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17792#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:09:43,944 INFO L290 TraceCheckUtils]: 1: Hoare triple {17792#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17767#true} is VALID [2022-04-15 01:09:43,944 INFO L290 TraceCheckUtils]: 2: Hoare triple {17767#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17767#true} is VALID [2022-04-15 01:09:43,944 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17767#true} {17767#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17767#true} is VALID [2022-04-15 01:09:43,944 INFO L272 TraceCheckUtils]: 4: Hoare triple {17767#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17767#true} is VALID [2022-04-15 01:09:43,944 INFO L290 TraceCheckUtils]: 5: Hoare triple {17767#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {17772#(= main_~y~0 0)} is VALID [2022-04-15 01:09:43,945 INFO L290 TraceCheckUtils]: 6: Hoare triple {17772#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17773#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:09:43,945 INFO L290 TraceCheckUtils]: 7: Hoare triple {17773#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17774#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:09:43,946 INFO L290 TraceCheckUtils]: 8: Hoare triple {17774#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17775#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:09:43,946 INFO L290 TraceCheckUtils]: 9: Hoare triple {17775#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17776#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:09:43,947 INFO L290 TraceCheckUtils]: 10: Hoare triple {17776#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17777#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:09:43,947 INFO L290 TraceCheckUtils]: 11: Hoare triple {17777#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17778#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:09:43,948 INFO L290 TraceCheckUtils]: 12: Hoare triple {17778#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17779#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:09:43,948 INFO L290 TraceCheckUtils]: 13: Hoare triple {17779#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17780#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:09:43,949 INFO L290 TraceCheckUtils]: 14: Hoare triple {17780#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17781#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:09:43,950 INFO L290 TraceCheckUtils]: 15: Hoare triple {17781#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17782#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 01:09:43,950 INFO L290 TraceCheckUtils]: 16: Hoare triple {17782#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17783#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 01:09:43,951 INFO L290 TraceCheckUtils]: 17: Hoare triple {17783#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17784#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 01:09:43,951 INFO L290 TraceCheckUtils]: 18: Hoare triple {17784#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {17784#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 01:09:43,951 INFO L290 TraceCheckUtils]: 19: Hoare triple {17784#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {17785#(and (<= main_~z~0 12) (<= 12 main_~z~0))} is VALID [2022-04-15 01:09:43,952 INFO L290 TraceCheckUtils]: 20: Hoare triple {17785#(and (<= main_~z~0 12) (<= 12 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17786#(and (<= main_~z~0 11) (<= 11 main_~z~0))} is VALID [2022-04-15 01:09:43,952 INFO L290 TraceCheckUtils]: 21: Hoare triple {17786#(and (<= main_~z~0 11) (<= 11 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17787#(and (<= main_~z~0 10) (<= 10 main_~z~0))} is VALID [2022-04-15 01:09:43,953 INFO L290 TraceCheckUtils]: 22: Hoare triple {17787#(and (<= main_~z~0 10) (<= 10 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17788#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-15 01:09:43,953 INFO L290 TraceCheckUtils]: 23: Hoare triple {17788#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17789#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-15 01:09:43,954 INFO L290 TraceCheckUtils]: 24: Hoare triple {17789#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17790#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-15 01:09:43,955 INFO L290 TraceCheckUtils]: 25: Hoare triple {17790#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17791#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} is VALID [2022-04-15 01:09:43,955 INFO L290 TraceCheckUtils]: 26: Hoare triple {17791#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {17768#false} is VALID [2022-04-15 01:09:43,955 INFO L272 TraceCheckUtils]: 27: Hoare triple {17768#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {17768#false} is VALID [2022-04-15 01:09:43,955 INFO L290 TraceCheckUtils]: 28: Hoare triple {17768#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17768#false} is VALID [2022-04-15 01:09:43,955 INFO L290 TraceCheckUtils]: 29: Hoare triple {17768#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {17768#false} is VALID [2022-04-15 01:09:43,955 INFO L290 TraceCheckUtils]: 30: Hoare triple {17768#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17768#false} is VALID [2022-04-15 01:09:43,956 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 99 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:09:43,956 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:09:43,956 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1658158885] [2022-04-15 01:09:43,956 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1658158885] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:09:43,956 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [709147662] [2022-04-15 01:09:43,956 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-15 01:09:43,956 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:09:43,956 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:09:43,957 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:09:43,958 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-04-15 01:09:44,371 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2022-04-15 01:09:44,371 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:09:44,373 INFO L263 TraceCheckSpWp]: Trace formula consists of 148 conjuncts, 41 conjunts are in the unsatisfiable core [2022-04-15 01:09:44,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:09:44,381 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:09:44,654 INFO L272 TraceCheckUtils]: 0: Hoare triple {17767#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17767#true} is VALID [2022-04-15 01:09:44,654 INFO L290 TraceCheckUtils]: 1: Hoare triple {17767#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17767#true} is VALID [2022-04-15 01:09:44,654 INFO L290 TraceCheckUtils]: 2: Hoare triple {17767#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17767#true} is VALID [2022-04-15 01:09:44,654 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17767#true} {17767#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17767#true} is VALID [2022-04-15 01:09:44,654 INFO L272 TraceCheckUtils]: 4: Hoare triple {17767#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17767#true} is VALID [2022-04-15 01:09:44,655 INFO L290 TraceCheckUtils]: 5: Hoare triple {17767#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {17772#(= main_~y~0 0)} is VALID [2022-04-15 01:09:44,655 INFO L290 TraceCheckUtils]: 6: Hoare triple {17772#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17773#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:09:44,655 INFO L290 TraceCheckUtils]: 7: Hoare triple {17773#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17774#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:09:44,656 INFO L290 TraceCheckUtils]: 8: Hoare triple {17774#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17775#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:09:44,657 INFO L290 TraceCheckUtils]: 9: Hoare triple {17775#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17776#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:09:44,657 INFO L290 TraceCheckUtils]: 10: Hoare triple {17776#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17777#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:09:44,658 INFO L290 TraceCheckUtils]: 11: Hoare triple {17777#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17778#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:09:44,658 INFO L290 TraceCheckUtils]: 12: Hoare triple {17778#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17779#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:09:44,659 INFO L290 TraceCheckUtils]: 13: Hoare triple {17779#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17780#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:09:44,659 INFO L290 TraceCheckUtils]: 14: Hoare triple {17780#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17781#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:09:44,660 INFO L290 TraceCheckUtils]: 15: Hoare triple {17781#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17782#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 01:09:44,660 INFO L290 TraceCheckUtils]: 16: Hoare triple {17782#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17783#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 01:09:44,661 INFO L290 TraceCheckUtils]: 17: Hoare triple {17783#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17784#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 01:09:44,661 INFO L290 TraceCheckUtils]: 18: Hoare triple {17784#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {17784#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 01:09:44,661 INFO L290 TraceCheckUtils]: 19: Hoare triple {17784#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {17785#(and (<= main_~z~0 12) (<= 12 main_~z~0))} is VALID [2022-04-15 01:09:44,662 INFO L290 TraceCheckUtils]: 20: Hoare triple {17785#(and (<= main_~z~0 12) (<= 12 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17786#(and (<= main_~z~0 11) (<= 11 main_~z~0))} is VALID [2022-04-15 01:09:44,663 INFO L290 TraceCheckUtils]: 21: Hoare triple {17786#(and (<= main_~z~0 11) (<= 11 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17787#(and (<= main_~z~0 10) (<= 10 main_~z~0))} is VALID [2022-04-15 01:09:44,663 INFO L290 TraceCheckUtils]: 22: Hoare triple {17787#(and (<= main_~z~0 10) (<= 10 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17788#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-15 01:09:44,664 INFO L290 TraceCheckUtils]: 23: Hoare triple {17788#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17789#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-15 01:09:44,664 INFO L290 TraceCheckUtils]: 24: Hoare triple {17789#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17790#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-15 01:09:44,665 INFO L290 TraceCheckUtils]: 25: Hoare triple {17790#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17871#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 01:09:44,665 INFO L290 TraceCheckUtils]: 26: Hoare triple {17871#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {17768#false} is VALID [2022-04-15 01:09:44,665 INFO L272 TraceCheckUtils]: 27: Hoare triple {17768#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {17768#false} is VALID [2022-04-15 01:09:44,665 INFO L290 TraceCheckUtils]: 28: Hoare triple {17768#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17768#false} is VALID [2022-04-15 01:09:44,665 INFO L290 TraceCheckUtils]: 29: Hoare triple {17768#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {17768#false} is VALID [2022-04-15 01:09:44,665 INFO L290 TraceCheckUtils]: 30: Hoare triple {17768#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17768#false} is VALID [2022-04-15 01:09:44,666 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 99 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:09:44,666 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:09:45,263 INFO L290 TraceCheckUtils]: 30: Hoare triple {17768#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17768#false} is VALID [2022-04-15 01:09:45,263 INFO L290 TraceCheckUtils]: 29: Hoare triple {17768#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {17768#false} is VALID [2022-04-15 01:09:45,263 INFO L290 TraceCheckUtils]: 28: Hoare triple {17768#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17768#false} is VALID [2022-04-15 01:09:45,263 INFO L272 TraceCheckUtils]: 27: Hoare triple {17768#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {17768#false} is VALID [2022-04-15 01:09:45,263 INFO L290 TraceCheckUtils]: 26: Hoare triple {17899#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {17768#false} is VALID [2022-04-15 01:09:45,264 INFO L290 TraceCheckUtils]: 25: Hoare triple {17903#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17899#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 01:09:45,265 INFO L290 TraceCheckUtils]: 24: Hoare triple {17907#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17903#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-15 01:09:45,265 INFO L290 TraceCheckUtils]: 23: Hoare triple {17911#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17907#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-15 01:09:45,266 INFO L290 TraceCheckUtils]: 22: Hoare triple {17915#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17911#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-15 01:09:45,267 INFO L290 TraceCheckUtils]: 21: Hoare triple {17919#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17915#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} is VALID [2022-04-15 01:09:45,267 INFO L290 TraceCheckUtils]: 20: Hoare triple {17923#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17919#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} is VALID [2022-04-15 01:09:45,267 INFO L290 TraceCheckUtils]: 19: Hoare triple {17927#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {17923#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} is VALID [2022-04-15 01:09:45,268 INFO L290 TraceCheckUtils]: 18: Hoare triple {17927#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {17927#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-15 01:09:45,268 INFO L290 TraceCheckUtils]: 17: Hoare triple {17934#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17927#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-15 01:09:45,269 INFO L290 TraceCheckUtils]: 16: Hoare triple {17938#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17934#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-15 01:09:45,269 INFO L290 TraceCheckUtils]: 15: Hoare triple {17942#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17938#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-15 01:09:45,270 INFO L290 TraceCheckUtils]: 14: Hoare triple {17946#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17942#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 01:09:45,270 INFO L290 TraceCheckUtils]: 13: Hoare triple {17950#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17946#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 01:09:45,271 INFO L290 TraceCheckUtils]: 12: Hoare triple {17954#(< 0 (mod main_~y~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17950#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:09:45,271 INFO L290 TraceCheckUtils]: 11: Hoare triple {17958#(< 0 (mod (+ main_~y~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17954#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:09:45,272 INFO L290 TraceCheckUtils]: 10: Hoare triple {17962#(< 0 (mod (+ main_~y~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17958#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-15 01:09:45,272 INFO L290 TraceCheckUtils]: 9: Hoare triple {17966#(< 0 (mod (+ main_~y~0 3) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17962#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-15 01:09:45,273 INFO L290 TraceCheckUtils]: 8: Hoare triple {17970#(< 0 (mod (+ main_~y~0 4) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17966#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-15 01:09:45,273 INFO L290 TraceCheckUtils]: 7: Hoare triple {17974#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17970#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-15 01:09:45,274 INFO L290 TraceCheckUtils]: 6: Hoare triple {17978#(< 0 (mod (+ main_~y~0 6) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17974#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-15 01:09:45,274 INFO L290 TraceCheckUtils]: 5: Hoare triple {17767#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {17978#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-15 01:09:45,274 INFO L272 TraceCheckUtils]: 4: Hoare triple {17767#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17767#true} is VALID [2022-04-15 01:09:45,274 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17767#true} {17767#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17767#true} is VALID [2022-04-15 01:09:45,274 INFO L290 TraceCheckUtils]: 2: Hoare triple {17767#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17767#true} is VALID [2022-04-15 01:09:45,275 INFO L290 TraceCheckUtils]: 1: Hoare triple {17767#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17767#true} is VALID [2022-04-15 01:09:45,275 INFO L272 TraceCheckUtils]: 0: Hoare triple {17767#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17767#true} is VALID [2022-04-15 01:09:45,275 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 99 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:09:45,275 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [709147662] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:09:45,275 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:09:45,275 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 22, 22] total 44 [2022-04-15 01:09:45,277 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1808301304] [2022-04-15 01:09:45,277 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:09:45,278 INFO L78 Accepts]: Start accepts. Automaton has has 44 states, 44 states have (on average 1.1818181818181819) internal successors, (52), 43 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-15 01:09:45,278 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:09:45,278 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 44 states, 44 states have (on average 1.1818181818181819) internal successors, (52), 43 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:45,304 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:09:45,304 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 44 states [2022-04-15 01:09:45,304 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:09:45,305 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2022-04-15 01:09:45,306 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=308, Invalid=1584, Unknown=0, NotChecked=0, Total=1892 [2022-04-15 01:09:45,306 INFO L87 Difference]: Start difference. First operand 113 states and 150 transitions. Second operand has 44 states, 44 states have (on average 1.1818181818181819) internal successors, (52), 43 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1)