/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de32.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-e106359-m [2022-04-15 01:00:34,361 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-15 01:00:34,362 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-15 01:00:34,389 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-15 01:00:34,390 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-15 01:00:34,390 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-15 01:00:34,391 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-15 01:00:34,392 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-15 01:00:34,394 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-15 01:00:34,394 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-15 01:00:34,395 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-15 01:00:34,396 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-15 01:00:34,397 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-15 01:00:34,400 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-15 01:00:34,400 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-15 01:00:34,401 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-15 01:00:34,401 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-15 01:00:34,402 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-15 01:00:34,403 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-15 01:00:34,404 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-15 01:00:34,405 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-15 01:00:34,407 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-15 01:00:34,409 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-15 01:00:34,410 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-15 01:00:34,411 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-15 01:00:34,418 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-04-15 01:00:34,419 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-04-15 01:00:34,419 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-04-15 01:00:34,419 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-04-15 01:00:34,419 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-04-15 01:00:34,420 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-04-15 01:00:34,420 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-04-15 01:00:34,421 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-04-15 01:00:34,421 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-04-15 01:00:34,421 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-04-15 01:00:34,422 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-04-15 01:00:34,422 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-04-15 01:00:34,422 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-04-15 01:00:34,423 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-04-15 01:00:34,423 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-15 01:00:34,423 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-15 01:00:34,424 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-15 01:00:34,424 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-15 01:00:34,438 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-15 01:00:34,438 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-15 01:00:34,439 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-15 01:00:34,439 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-15 01:00:34,439 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-15 01:00:34,439 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-15 01:00:34,440 INFO L138 SettingsManager]: * Use SBE=true [2022-04-15 01:00:34,440 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-15 01:00:34,440 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-15 01:00:34,440 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-15 01:00:34,440 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-15 01:00:34,440 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-15 01:00:34,440 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-15 01:00:34,440 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-15 01:00:34,441 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-15 01:00:34,441 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-15 01:00:34,441 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-15 01:00:34,441 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-15 01:00:34,441 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-15 01:00:34,441 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-15 01:00:34,441 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-15 01:00:34,441 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-15 01:00:34,442 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-15 01:00:34,442 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-15 01:00:34,442 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-15 01:00:34,442 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-15 01:00:34,442 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-15 01:00:34,442 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-15 01:00:34,443 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-15 01:00:34,443 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-15 01:00:34,624 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-15 01:00:34,645 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-15 01:00:34,647 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-15 01:00:34,648 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-15 01:00:34,648 INFO L275 PluginConnector]: CDTParser initialized [2022-04-15 01:00:34,650 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de32.c [2022-04-15 01:00:34,701 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9c7f8ea24/2f176893765b4b7b83d1c80b37706f5b/FLAG5152e288e [2022-04-15 01:00:35,059 INFO L306 CDTParser]: Found 1 translation units. [2022-04-15 01:00:35,060 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de32.c [2022-04-15 01:00:35,064 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9c7f8ea24/2f176893765b4b7b83d1c80b37706f5b/FLAG5152e288e [2022-04-15 01:00:35,080 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9c7f8ea24/2f176893765b4b7b83d1c80b37706f5b [2022-04-15 01:00:35,081 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-15 01:00:35,083 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-15 01:00:35,085 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-15 01:00:35,085 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-15 01:00:35,088 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-15 01:00:35,092 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.04 01:00:35" (1/1) ... [2022-04-15 01:00:35,094 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3cf3bf90 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:00:35, skipping insertion in model container [2022-04-15 01:00:35,094 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.04 01:00:35" (1/1) ... [2022-04-15 01:00:35,099 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-15 01:00:35,109 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-15 01:00:35,267 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de32.c[368,381] [2022-04-15 01:00:35,277 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-15 01:00:35,285 INFO L203 MainTranslator]: Completed pre-run [2022-04-15 01:00:35,296 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de32.c[368,381] [2022-04-15 01:00:35,299 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-15 01:00:35,309 INFO L208 MainTranslator]: Completed translation [2022-04-15 01:00:35,309 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:00:35 WrapperNode [2022-04-15 01:00:35,309 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-15 01:00:35,311 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-15 01:00:35,311 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-15 01:00:35,311 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-15 01:00:35,317 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:00:35" (1/1) ... [2022-04-15 01:00:35,317 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:00:35" (1/1) ... [2022-04-15 01:00:35,321 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:00:35" (1/1) ... [2022-04-15 01:00:35,322 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:00:35" (1/1) ... [2022-04-15 01:00:35,325 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:00:35" (1/1) ... [2022-04-15 01:00:35,328 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:00:35" (1/1) ... [2022-04-15 01:00:35,329 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:00:35" (1/1) ... [2022-04-15 01:00:35,329 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-15 01:00:35,330 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-15 01:00:35,330 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-15 01:00:35,330 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-15 01:00:35,331 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:00:35" (1/1) ... [2022-04-15 01:00:35,336 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-15 01:00:35,342 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:00:35,351 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-15 01:00:35,355 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-15 01:00:35,374 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-15 01:00:35,374 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-15 01:00:35,375 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-15 01:00:35,375 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-15 01:00:35,375 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-15 01:00:35,375 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-15 01:00:35,375 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-15 01:00:35,375 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-15 01:00:35,375 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-15 01:00:35,375 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-15 01:00:35,375 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-15 01:00:35,375 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-15 01:00:35,375 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-15 01:00:35,375 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-15 01:00:35,375 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-15 01:00:35,375 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-15 01:00:35,376 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-15 01:00:35,376 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-15 01:00:35,418 INFO L234 CfgBuilder]: Building ICFG [2022-04-15 01:00:35,420 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-15 01:00:35,613 INFO L275 CfgBuilder]: Performing block encoding [2022-04-15 01:00:35,617 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-15 01:00:35,617 INFO L299 CfgBuilder]: Removed 3 assume(true) statements. [2022-04-15 01:00:35,618 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 01:00:35 BoogieIcfgContainer [2022-04-15 01:00:35,618 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-15 01:00:35,619 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-15 01:00:35,619 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-15 01:00:35,620 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-15 01:00:35,621 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 01:00:35" (1/1) ... [2022-04-15 01:00:35,623 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-15 01:00:35,644 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 15.04 01:00:35 BasicIcfg [2022-04-15 01:00:35,644 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-15 01:00:35,645 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-15 01:00:35,645 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-15 01:00:35,648 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-15 01:00:35,649 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.04 01:00:35" (1/4) ... [2022-04-15 01:00:35,649 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@544d0cb1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.04 01:00:35, skipping insertion in model container [2022-04-15 01:00:35,649 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:00:35" (2/4) ... [2022-04-15 01:00:35,649 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@544d0cb1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.04 01:00:35, skipping insertion in model container [2022-04-15 01:00:35,649 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 01:00:35" (3/4) ... [2022-04-15 01:00:35,650 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@544d0cb1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.04 01:00:35, skipping insertion in model container [2022-04-15 01:00:35,650 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 15.04 01:00:35" (4/4) ... [2022-04-15 01:00:35,650 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de32.cqvasr [2022-04-15 01:00:35,653 INFO L202 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-15 01:00:35,654 INFO L161 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-15 01:00:35,686 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-15 01:00:35,690 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-15 01:00:35,691 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-15 01:00:35,705 INFO L276 IsEmpty]: Start isEmpty. Operand has 22 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 15 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-15 01:00:35,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-15 01:00:35,708 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:00:35,709 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:00:35,709 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:00:35,715 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:00:35,716 INFO L85 PathProgramCache]: Analyzing trace with hash -1909530012, now seen corresponding path program 1 times [2022-04-15 01:00:35,722 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:00:35,722 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [928070626] [2022-04-15 01:00:35,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:35,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:00:35,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:35,846 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:00:35,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:35,869 INFO L290 TraceCheckUtils]: 0: Hoare triple {30#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25#true} is VALID [2022-04-15 01:00:35,869 INFO L290 TraceCheckUtils]: 1: Hoare triple {25#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-15 01:00:35,869 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25#true} {25#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-15 01:00:35,871 INFO L272 TraceCheckUtils]: 0: Hoare triple {25#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:00:35,872 INFO L290 TraceCheckUtils]: 1: Hoare triple {30#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25#true} is VALID [2022-04-15 01:00:35,873 INFO L290 TraceCheckUtils]: 2: Hoare triple {25#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-15 01:00:35,873 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25#true} {25#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-15 01:00:35,873 INFO L272 TraceCheckUtils]: 4: Hoare triple {25#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-15 01:00:35,874 INFO L290 TraceCheckUtils]: 5: Hoare triple {25#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {25#true} is VALID [2022-04-15 01:00:35,875 INFO L290 TraceCheckUtils]: 6: Hoare triple {25#true} [70] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-15 01:00:35,876 INFO L290 TraceCheckUtils]: 7: Hoare triple {26#false} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {26#false} is VALID [2022-04-15 01:00:35,876 INFO L290 TraceCheckUtils]: 8: Hoare triple {26#false} [74] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-15 01:00:35,876 INFO L290 TraceCheckUtils]: 9: Hoare triple {26#false} [77] L29-1-->L29-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-15 01:00:35,876 INFO L272 TraceCheckUtils]: 10: Hoare triple {26#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {26#false} is VALID [2022-04-15 01:00:35,876 INFO L290 TraceCheckUtils]: 11: Hoare triple {26#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {26#false} is VALID [2022-04-15 01:00:35,877 INFO L290 TraceCheckUtils]: 12: Hoare triple {26#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-15 01:00:35,877 INFO L290 TraceCheckUtils]: 13: Hoare triple {26#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-15 01:00:35,877 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:00:35,877 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:00:35,878 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [928070626] [2022-04-15 01:00:35,879 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [928070626] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 01:00:35,879 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 01:00:35,879 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-15 01:00:35,881 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [501629065] [2022-04-15 01:00:35,881 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 01:00:35,885 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-15 01:00:35,885 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:00:35,888 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:35,916 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:35,916 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-15 01:00:35,916 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:00:35,935 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-15 01:00:35,936 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-15 01:00:35,938 INFO L87 Difference]: Start difference. First operand has 22 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 15 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:36,008 INFO L93 Difference]: Finished difference Result 37 states and 48 transitions. [2022-04-15 01:00:36,008 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-15 01:00:36,009 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-15 01:00:36,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:00:36,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 48 transitions. [2022-04-15 01:00:36,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 48 transitions. [2022-04-15 01:00:36,021 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 48 transitions. [2022-04-15 01:00:36,078 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:36,083 INFO L225 Difference]: With dead ends: 37 [2022-04-15 01:00:36,083 INFO L226 Difference]: Without dead ends: 15 [2022-04-15 01:00:36,086 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-15 01:00:36,089 INFO L913 BasicCegarLoop]: 23 mSDtfsCounter, 15 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 26 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 01:00:36,090 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [16 Valid, 26 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 01:00:36,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2022-04-15 01:00:36,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2022-04-15 01:00:36,121 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:00:36,122 INFO L82 GeneralOperation]: Start isEquivalent. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,123 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,123 INFO L87 Difference]: Start difference. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:36,126 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-15 01:00:36,127 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-15 01:00:36,127 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:36,127 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:36,127 INFO L74 IsIncluded]: Start isIncluded. First operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-15 01:00:36,127 INFO L87 Difference]: Start difference. First operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-15 01:00:36,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:36,132 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-15 01:00:36,133 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-15 01:00:36,133 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:36,133 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:36,133 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:00:36,134 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:00:36,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 17 transitions. [2022-04-15 01:00:36,138 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 17 transitions. Word has length 14 [2022-04-15 01:00:36,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:00:36,141 INFO L478 AbstractCegarLoop]: Abstraction has 15 states and 17 transitions. [2022-04-15 01:00:36,141 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,142 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-15 01:00:36,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-15 01:00:36,142 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:00:36,142 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:00:36,142 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-15 01:00:36,143 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:00:36,143 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:00:36,143 INFO L85 PathProgramCache]: Analyzing trace with hash -137167005, now seen corresponding path program 1 times [2022-04-15 01:00:36,143 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:00:36,143 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [908934104] [2022-04-15 01:00:36,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:36,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:00:36,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:36,233 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:00:36,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:36,246 INFO L290 TraceCheckUtils]: 0: Hoare triple {142#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {134#true} is VALID [2022-04-15 01:00:36,246 INFO L290 TraceCheckUtils]: 1: Hoare triple {134#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-15 01:00:36,246 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {134#true} {134#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-15 01:00:36,248 INFO L272 TraceCheckUtils]: 0: Hoare triple {134#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {142#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:00:36,248 INFO L290 TraceCheckUtils]: 1: Hoare triple {142#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {134#true} is VALID [2022-04-15 01:00:36,248 INFO L290 TraceCheckUtils]: 2: Hoare triple {134#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-15 01:00:36,248 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {134#true} {134#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-15 01:00:36,248 INFO L272 TraceCheckUtils]: 4: Hoare triple {134#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-15 01:00:36,248 INFO L290 TraceCheckUtils]: 5: Hoare triple {134#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {134#true} is VALID [2022-04-15 01:00:36,249 INFO L290 TraceCheckUtils]: 6: Hoare triple {134#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {139#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} is VALID [2022-04-15 01:00:36,250 INFO L290 TraceCheckUtils]: 7: Hoare triple {139#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {139#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} is VALID [2022-04-15 01:00:36,251 INFO L290 TraceCheckUtils]: 8: Hoare triple {139#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {139#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} is VALID [2022-04-15 01:00:36,252 INFO L290 TraceCheckUtils]: 9: Hoare triple {139#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {139#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} is VALID [2022-04-15 01:00:36,252 INFO L272 TraceCheckUtils]: 10: Hoare triple {139#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {140#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 01:00:36,253 INFO L290 TraceCheckUtils]: 11: Hoare triple {140#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {141#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 01:00:36,253 INFO L290 TraceCheckUtils]: 12: Hoare triple {141#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {135#false} is VALID [2022-04-15 01:00:36,254 INFO L290 TraceCheckUtils]: 13: Hoare triple {135#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {135#false} is VALID [2022-04-15 01:00:36,255 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:00:36,255 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:00:36,255 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [908934104] [2022-04-15 01:00:36,255 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [908934104] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 01:00:36,255 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 01:00:36,255 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-15 01:00:36,256 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2106109157] [2022-04-15 01:00:36,256 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 01:00:36,256 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-15 01:00:36,257 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:00:36,257 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,270 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:36,271 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-15 01:00:36,271 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:00:36,271 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-15 01:00:36,272 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-04-15 01:00:36,272 INFO L87 Difference]: Start difference. First operand 15 states and 17 transitions. Second operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:36,404 INFO L93 Difference]: Finished difference Result 22 states and 25 transitions. [2022-04-15 01:00:36,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-15 01:00:36,404 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-15 01:00:36,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:00:36,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 25 transitions. [2022-04-15 01:00:36,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 25 transitions. [2022-04-15 01:00:36,408 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 25 transitions. [2022-04-15 01:00:36,431 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:36,432 INFO L225 Difference]: With dead ends: 22 [2022-04-15 01:00:36,433 INFO L226 Difference]: Without dead ends: 17 [2022-04-15 01:00:36,436 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2022-04-15 01:00:36,438 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 15 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 01:00:36,438 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [15 Valid, 31 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 01:00:36,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-04-15 01:00:36,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-04-15 01:00:36,442 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:00:36,443 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,443 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,444 INFO L87 Difference]: Start difference. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:36,445 INFO L93 Difference]: Finished difference Result 17 states and 20 transitions. [2022-04-15 01:00:36,445 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 20 transitions. [2022-04-15 01:00:36,445 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:36,446 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:36,446 INFO L74 IsIncluded]: Start isIncluded. First operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-15 01:00:36,446 INFO L87 Difference]: Start difference. First operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-15 01:00:36,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:36,447 INFO L93 Difference]: Finished difference Result 17 states and 20 transitions. [2022-04-15 01:00:36,447 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 20 transitions. [2022-04-15 01:00:36,447 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:36,448 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:36,448 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:00:36,448 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:00:36,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 20 transitions. [2022-04-15 01:00:36,450 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 20 transitions. Word has length 14 [2022-04-15 01:00:36,450 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:00:36,450 INFO L478 AbstractCegarLoop]: Abstraction has 17 states and 20 transitions. [2022-04-15 01:00:36,451 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,451 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 20 transitions. [2022-04-15 01:00:36,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-15 01:00:36,451 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:00:36,451 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:00:36,451 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-15 01:00:36,452 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:00:36,452 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:00:36,452 INFO L85 PathProgramCache]: Analyzing trace with hash 69510770, now seen corresponding path program 1 times [2022-04-15 01:00:36,452 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:00:36,452 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1692328882] [2022-04-15 01:00:36,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:36,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:00:36,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:36,525 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:00:36,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:36,536 INFO L290 TraceCheckUtils]: 0: Hoare triple {250#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {244#true} is VALID [2022-04-15 01:00:36,536 INFO L290 TraceCheckUtils]: 1: Hoare triple {244#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {244#true} is VALID [2022-04-15 01:00:36,537 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {244#true} {244#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {244#true} is VALID [2022-04-15 01:00:36,537 INFO L272 TraceCheckUtils]: 0: Hoare triple {244#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {250#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:00:36,537 INFO L290 TraceCheckUtils]: 1: Hoare triple {250#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {244#true} is VALID [2022-04-15 01:00:36,538 INFO L290 TraceCheckUtils]: 2: Hoare triple {244#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {244#true} is VALID [2022-04-15 01:00:36,547 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {244#true} {244#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {244#true} is VALID [2022-04-15 01:00:36,547 INFO L272 TraceCheckUtils]: 4: Hoare triple {244#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {244#true} is VALID [2022-04-15 01:00:36,548 INFO L290 TraceCheckUtils]: 5: Hoare triple {244#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {249#(= main_~y~0 0)} is VALID [2022-04-15 01:00:36,549 INFO L290 TraceCheckUtils]: 6: Hoare triple {249#(= main_~y~0 0)} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {249#(= main_~y~0 0)} is VALID [2022-04-15 01:00:36,549 INFO L290 TraceCheckUtils]: 7: Hoare triple {249#(= main_~y~0 0)} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {249#(= main_~y~0 0)} is VALID [2022-04-15 01:00:36,549 INFO L290 TraceCheckUtils]: 8: Hoare triple {249#(= main_~y~0 0)} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {249#(= main_~y~0 0)} is VALID [2022-04-15 01:00:36,550 INFO L290 TraceCheckUtils]: 9: Hoare triple {249#(= main_~y~0 0)} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {245#false} is VALID [2022-04-15 01:00:36,550 INFO L290 TraceCheckUtils]: 10: Hoare triple {245#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {245#false} is VALID [2022-04-15 01:00:36,550 INFO L272 TraceCheckUtils]: 11: Hoare triple {245#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {245#false} is VALID [2022-04-15 01:00:36,553 INFO L290 TraceCheckUtils]: 12: Hoare triple {245#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {245#false} is VALID [2022-04-15 01:00:36,553 INFO L290 TraceCheckUtils]: 13: Hoare triple {245#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {245#false} is VALID [2022-04-15 01:00:36,555 INFO L290 TraceCheckUtils]: 14: Hoare triple {245#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {245#false} is VALID [2022-04-15 01:00:36,555 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:00:36,555 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:00:36,555 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1692328882] [2022-04-15 01:00:36,555 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1692328882] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 01:00:36,556 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 01:00:36,556 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-15 01:00:36,556 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1521290122] [2022-04-15 01:00:36,556 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 01:00:36,556 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-15 01:00:36,556 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:00:36,557 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,569 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:36,570 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-15 01:00:36,570 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:00:36,570 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-15 01:00:36,570 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-15 01:00:36,578 INFO L87 Difference]: Start difference. First operand 17 states and 20 transitions. Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:36,645 INFO L93 Difference]: Finished difference Result 30 states and 37 transitions. [2022-04-15 01:00:36,645 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-15 01:00:36,645 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-15 01:00:36,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:00:36,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 31 transitions. [2022-04-15 01:00:36,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 31 transitions. [2022-04-15 01:00:36,649 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 31 transitions. [2022-04-15 01:00:36,676 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:36,677 INFO L225 Difference]: With dead ends: 30 [2022-04-15 01:00:36,678 INFO L226 Difference]: Without dead ends: 23 [2022-04-15 01:00:36,684 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-15 01:00:36,688 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 18 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 21 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 01:00:36,689 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [18 Valid, 21 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 01:00:36,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-04-15 01:00:36,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 22. [2022-04-15 01:00:36,697 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:00:36,698 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,698 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,699 INFO L87 Difference]: Start difference. First operand 23 states. Second operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:36,701 INFO L93 Difference]: Finished difference Result 23 states and 28 transitions. [2022-04-15 01:00:36,701 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 28 transitions. [2022-04-15 01:00:36,701 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:36,702 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:36,702 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-15 01:00:36,702 INFO L87 Difference]: Start difference. First operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-15 01:00:36,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:36,707 INFO L93 Difference]: Finished difference Result 23 states and 28 transitions. [2022-04-15 01:00:36,707 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 28 transitions. [2022-04-15 01:00:36,708 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:36,708 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:36,708 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:00:36,708 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:00:36,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 27 transitions. [2022-04-15 01:00:36,709 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 27 transitions. Word has length 15 [2022-04-15 01:00:36,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:00:36,709 INFO L478 AbstractCegarLoop]: Abstraction has 22 states and 27 transitions. [2022-04-15 01:00:36,710 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,710 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-15 01:00:36,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-15 01:00:36,710 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:00:36,710 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:00:36,710 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-15 01:00:36,710 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:00:36,711 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:00:36,711 INFO L85 PathProgramCache]: Analyzing trace with hash 842497847, now seen corresponding path program 1 times [2022-04-15 01:00:36,711 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:00:36,711 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2064117311] [2022-04-15 01:00:36,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:36,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:00:36,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:36,767 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:00:36,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:36,780 INFO L290 TraceCheckUtils]: 0: Hoare triple {387#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {380#true} is VALID [2022-04-15 01:00:36,781 INFO L290 TraceCheckUtils]: 1: Hoare triple {380#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {380#true} is VALID [2022-04-15 01:00:36,781 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {380#true} {380#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {380#true} is VALID [2022-04-15 01:00:36,793 INFO L272 TraceCheckUtils]: 0: Hoare triple {380#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {387#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:00:36,794 INFO L290 TraceCheckUtils]: 1: Hoare triple {387#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {380#true} is VALID [2022-04-15 01:00:36,794 INFO L290 TraceCheckUtils]: 2: Hoare triple {380#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {380#true} is VALID [2022-04-15 01:00:36,794 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {380#true} {380#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {380#true} is VALID [2022-04-15 01:00:36,795 INFO L272 TraceCheckUtils]: 4: Hoare triple {380#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {380#true} is VALID [2022-04-15 01:00:36,795 INFO L290 TraceCheckUtils]: 5: Hoare triple {380#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {385#(= main_~y~0 0)} is VALID [2022-04-15 01:00:36,796 INFO L290 TraceCheckUtils]: 6: Hoare triple {385#(= main_~y~0 0)} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {385#(= main_~y~0 0)} is VALID [2022-04-15 01:00:36,796 INFO L290 TraceCheckUtils]: 7: Hoare triple {385#(= main_~y~0 0)} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {386#(= main_~z~0 0)} is VALID [2022-04-15 01:00:36,797 INFO L290 TraceCheckUtils]: 8: Hoare triple {386#(= main_~z~0 0)} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {381#false} is VALID [2022-04-15 01:00:36,797 INFO L290 TraceCheckUtils]: 9: Hoare triple {381#false} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {381#false} is VALID [2022-04-15 01:00:36,797 INFO L290 TraceCheckUtils]: 10: Hoare triple {381#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {381#false} is VALID [2022-04-15 01:00:36,798 INFO L272 TraceCheckUtils]: 11: Hoare triple {381#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {381#false} is VALID [2022-04-15 01:00:36,798 INFO L290 TraceCheckUtils]: 12: Hoare triple {381#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {381#false} is VALID [2022-04-15 01:00:36,798 INFO L290 TraceCheckUtils]: 13: Hoare triple {381#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {381#false} is VALID [2022-04-15 01:00:36,798 INFO L290 TraceCheckUtils]: 14: Hoare triple {381#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {381#false} is VALID [2022-04-15 01:00:36,798 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:00:36,798 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:00:36,799 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2064117311] [2022-04-15 01:00:36,799 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2064117311] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 01:00:36,799 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 01:00:36,799 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-15 01:00:36,799 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [88277925] [2022-04-15 01:00:36,799 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 01:00:36,799 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-15 01:00:36,800 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:00:36,800 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,810 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:36,811 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-15 01:00:36,811 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:00:36,812 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-15 01:00:36,812 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-15 01:00:36,812 INFO L87 Difference]: Start difference. First operand 22 states and 27 transitions. Second operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:36,880 INFO L93 Difference]: Finished difference Result 27 states and 31 transitions. [2022-04-15 01:00:36,880 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-15 01:00:36,880 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-15 01:00:36,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:00:36,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 28 transitions. [2022-04-15 01:00:36,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 28 transitions. [2022-04-15 01:00:36,882 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 28 transitions. [2022-04-15 01:00:36,903 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:36,904 INFO L225 Difference]: With dead ends: 27 [2022-04-15 01:00:36,904 INFO L226 Difference]: Without dead ends: 18 [2022-04-15 01:00:36,904 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-04-15 01:00:36,905 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 14 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 27 SdHoareTripleChecker+Invalid, 29 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 01:00:36,905 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [14 Valid, 27 Invalid, 29 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 01:00:36,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2022-04-15 01:00:36,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2022-04-15 01:00:36,907 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:00:36,907 INFO L82 GeneralOperation]: Start isEquivalent. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,908 INFO L74 IsIncluded]: Start isIncluded. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,908 INFO L87 Difference]: Start difference. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:36,909 INFO L93 Difference]: Finished difference Result 18 states and 21 transitions. [2022-04-15 01:00:36,909 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 21 transitions. [2022-04-15 01:00:36,909 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:36,909 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:36,909 INFO L74 IsIncluded]: Start isIncluded. First operand has 18 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18 states. [2022-04-15 01:00:36,910 INFO L87 Difference]: Start difference. First operand has 18 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18 states. [2022-04-15 01:00:36,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:36,912 INFO L93 Difference]: Finished difference Result 18 states and 21 transitions. [2022-04-15 01:00:36,912 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 21 transitions. [2022-04-15 01:00:36,912 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:36,912 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:36,912 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:00:36,913 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:00:36,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 21 transitions. [2022-04-15 01:00:36,915 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 21 transitions. Word has length 15 [2022-04-15 01:00:36,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:00:36,915 INFO L478 AbstractCegarLoop]: Abstraction has 18 states and 21 transitions. [2022-04-15 01:00:36,915 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:36,916 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 21 transitions. [2022-04-15 01:00:36,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-15 01:00:36,916 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:00:36,916 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:00:36,916 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-04-15 01:00:36,916 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:00:36,917 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:00:36,917 INFO L85 PathProgramCache]: Analyzing trace with hash -1435685474, now seen corresponding path program 1 times [2022-04-15 01:00:36,917 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:00:36,917 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [446425036] [2022-04-15 01:00:36,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:36,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:00:36,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:37,004 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:00:37,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:37,014 INFO L290 TraceCheckUtils]: 0: Hoare triple {507#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {499#true} is VALID [2022-04-15 01:00:37,014 INFO L290 TraceCheckUtils]: 1: Hoare triple {499#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-15 01:00:37,014 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {499#true} {499#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-15 01:00:37,015 INFO L272 TraceCheckUtils]: 0: Hoare triple {499#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {507#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:00:37,015 INFO L290 TraceCheckUtils]: 1: Hoare triple {507#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {499#true} is VALID [2022-04-15 01:00:37,015 INFO L290 TraceCheckUtils]: 2: Hoare triple {499#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-15 01:00:37,015 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {499#true} {499#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-15 01:00:37,016 INFO L272 TraceCheckUtils]: 4: Hoare triple {499#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-15 01:00:37,016 INFO L290 TraceCheckUtils]: 5: Hoare triple {499#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {504#(= main_~y~0 0)} is VALID [2022-04-15 01:00:37,016 INFO L290 TraceCheckUtils]: 6: Hoare triple {504#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {505#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:37,017 INFO L290 TraceCheckUtils]: 7: Hoare triple {505#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {505#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:37,018 INFO L290 TraceCheckUtils]: 8: Hoare triple {505#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {506#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-15 01:00:37,018 INFO L290 TraceCheckUtils]: 9: Hoare triple {506#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-15 01:00:37,018 INFO L290 TraceCheckUtils]: 10: Hoare triple {500#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {500#false} is VALID [2022-04-15 01:00:37,018 INFO L290 TraceCheckUtils]: 11: Hoare triple {500#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-15 01:00:37,019 INFO L272 TraceCheckUtils]: 12: Hoare triple {500#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {500#false} is VALID [2022-04-15 01:00:37,019 INFO L290 TraceCheckUtils]: 13: Hoare triple {500#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {500#false} is VALID [2022-04-15 01:00:37,019 INFO L290 TraceCheckUtils]: 14: Hoare triple {500#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-15 01:00:37,019 INFO L290 TraceCheckUtils]: 15: Hoare triple {500#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-15 01:00:37,019 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 01:00:37,020 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:00:37,020 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [446425036] [2022-04-15 01:00:37,020 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [446425036] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:00:37,021 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1012829518] [2022-04-15 01:00:37,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:37,021 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:37,021 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:00:37,029 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:00:37,030 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-15 01:00:37,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:37,065 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-15 01:00:37,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:37,112 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:00:37,229 INFO L272 TraceCheckUtils]: 0: Hoare triple {499#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-15 01:00:37,230 INFO L290 TraceCheckUtils]: 1: Hoare triple {499#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {499#true} is VALID [2022-04-15 01:00:37,230 INFO L290 TraceCheckUtils]: 2: Hoare triple {499#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-15 01:00:37,230 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {499#true} {499#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-15 01:00:37,230 INFO L272 TraceCheckUtils]: 4: Hoare triple {499#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-15 01:00:37,231 INFO L290 TraceCheckUtils]: 5: Hoare triple {499#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {504#(= main_~y~0 0)} is VALID [2022-04-15 01:00:37,231 INFO L290 TraceCheckUtils]: 6: Hoare triple {504#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {505#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:37,232 INFO L290 TraceCheckUtils]: 7: Hoare triple {505#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {505#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:37,232 INFO L290 TraceCheckUtils]: 8: Hoare triple {505#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {535#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:37,233 INFO L290 TraceCheckUtils]: 9: Hoare triple {535#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-15 01:00:37,233 INFO L290 TraceCheckUtils]: 10: Hoare triple {500#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {500#false} is VALID [2022-04-15 01:00:37,233 INFO L290 TraceCheckUtils]: 11: Hoare triple {500#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-15 01:00:37,233 INFO L272 TraceCheckUtils]: 12: Hoare triple {500#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {500#false} is VALID [2022-04-15 01:00:37,234 INFO L290 TraceCheckUtils]: 13: Hoare triple {500#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {500#false} is VALID [2022-04-15 01:00:37,234 INFO L290 TraceCheckUtils]: 14: Hoare triple {500#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-15 01:00:37,234 INFO L290 TraceCheckUtils]: 15: Hoare triple {500#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-15 01:00:37,234 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 01:00:37,234 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:00:37,313 INFO L290 TraceCheckUtils]: 15: Hoare triple {500#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-15 01:00:37,313 INFO L290 TraceCheckUtils]: 14: Hoare triple {500#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-15 01:00:37,314 INFO L290 TraceCheckUtils]: 13: Hoare triple {500#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {500#false} is VALID [2022-04-15 01:00:37,314 INFO L272 TraceCheckUtils]: 12: Hoare triple {500#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {500#false} is VALID [2022-04-15 01:00:37,314 INFO L290 TraceCheckUtils]: 11: Hoare triple {500#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-15 01:00:37,314 INFO L290 TraceCheckUtils]: 10: Hoare triple {572#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {500#false} is VALID [2022-04-15 01:00:37,315 INFO L290 TraceCheckUtils]: 9: Hoare triple {576#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {572#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-15 01:00:37,316 INFO L290 TraceCheckUtils]: 8: Hoare triple {499#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {576#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-15 01:00:37,316 INFO L290 TraceCheckUtils]: 7: Hoare triple {499#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-15 01:00:37,317 INFO L290 TraceCheckUtils]: 6: Hoare triple {499#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {499#true} is VALID [2022-04-15 01:00:37,318 INFO L290 TraceCheckUtils]: 5: Hoare triple {499#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {499#true} is VALID [2022-04-15 01:00:37,318 INFO L272 TraceCheckUtils]: 4: Hoare triple {499#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-15 01:00:37,319 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {499#true} {499#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-15 01:00:37,319 INFO L290 TraceCheckUtils]: 2: Hoare triple {499#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-15 01:00:37,328 INFO L290 TraceCheckUtils]: 1: Hoare triple {499#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {499#true} is VALID [2022-04-15 01:00:37,329 INFO L272 TraceCheckUtils]: 0: Hoare triple {499#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-15 01:00:37,329 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 01:00:37,329 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1012829518] provided 1 perfect and 1 imperfect interpolant sequences [2022-04-15 01:00:37,329 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-04-15 01:00:37,329 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6, 5] total 9 [2022-04-15 01:00:37,329 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [779959447] [2022-04-15 01:00:37,330 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 01:00:37,330 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-15 01:00:37,331 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:00:37,331 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:37,346 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:37,346 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-15 01:00:37,346 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:00:37,346 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-15 01:00:37,347 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-04-15 01:00:37,347 INFO L87 Difference]: Start difference. First operand 18 states and 21 transitions. Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:37,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:37,404 INFO L93 Difference]: Finished difference Result 24 states and 27 transitions. [2022-04-15 01:00:37,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-15 01:00:37,404 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-15 01:00:37,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:00:37,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:37,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 27 transitions. [2022-04-15 01:00:37,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:37,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 27 transitions. [2022-04-15 01:00:37,408 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 27 transitions. [2022-04-15 01:00:37,431 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:37,432 INFO L225 Difference]: With dead ends: 24 [2022-04-15 01:00:37,432 INFO L226 Difference]: Without dead ends: 17 [2022-04-15 01:00:37,433 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 30 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-04-15 01:00:37,433 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 1 mSDsluCounter, 21 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 35 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 01:00:37,434 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [1 Valid, 35 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 01:00:37,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-04-15 01:00:37,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-04-15 01:00:37,440 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:00:37,440 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:37,440 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:37,440 INFO L87 Difference]: Start difference. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:37,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:37,441 INFO L93 Difference]: Finished difference Result 17 states and 19 transitions. [2022-04-15 01:00:37,441 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions. [2022-04-15 01:00:37,441 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:37,441 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:37,442 INFO L74 IsIncluded]: Start isIncluded. First operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-15 01:00:37,442 INFO L87 Difference]: Start difference. First operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-15 01:00:37,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:37,442 INFO L93 Difference]: Finished difference Result 17 states and 19 transitions. [2022-04-15 01:00:37,442 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions. [2022-04-15 01:00:37,443 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:37,443 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:37,443 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:00:37,443 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:00:37,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:37,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 19 transitions. [2022-04-15 01:00:37,443 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 19 transitions. Word has length 16 [2022-04-15 01:00:37,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:00:37,444 INFO L478 AbstractCegarLoop]: Abstraction has 17 states and 19 transitions. [2022-04-15 01:00:37,444 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:37,444 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions. [2022-04-15 01:00:37,444 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-15 01:00:37,444 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:00:37,444 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:00:37,463 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-15 01:00:37,655 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:37,656 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:00:37,656 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:00:37,656 INFO L85 PathProgramCache]: Analyzing trace with hash -662698397, now seen corresponding path program 1 times [2022-04-15 01:00:37,656 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:00:37,656 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [185027408] [2022-04-15 01:00:37,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:37,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:00:37,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:37,696 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:00:37,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:37,700 INFO L290 TraceCheckUtils]: 0: Hoare triple {710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {703#true} is VALID [2022-04-15 01:00:37,701 INFO L290 TraceCheckUtils]: 1: Hoare triple {703#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-15 01:00:37,701 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {703#true} {703#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-15 01:00:37,701 INFO L272 TraceCheckUtils]: 0: Hoare triple {703#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:00:37,701 INFO L290 TraceCheckUtils]: 1: Hoare triple {710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {703#true} is VALID [2022-04-15 01:00:37,701 INFO L290 TraceCheckUtils]: 2: Hoare triple {703#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-15 01:00:37,702 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {703#true} {703#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-15 01:00:37,702 INFO L272 TraceCheckUtils]: 4: Hoare triple {703#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-15 01:00:37,702 INFO L290 TraceCheckUtils]: 5: Hoare triple {703#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {708#(= main_~y~0 0)} is VALID [2022-04-15 01:00:37,702 INFO L290 TraceCheckUtils]: 6: Hoare triple {708#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-15 01:00:37,703 INFO L290 TraceCheckUtils]: 7: Hoare triple {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-15 01:00:37,703 INFO L290 TraceCheckUtils]: 8: Hoare triple {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-15 01:00:37,704 INFO L290 TraceCheckUtils]: 9: Hoare triple {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-15 01:00:37,704 INFO L290 TraceCheckUtils]: 10: Hoare triple {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-15 01:00:37,704 INFO L290 TraceCheckUtils]: 11: Hoare triple {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {704#false} is VALID [2022-04-15 01:00:37,705 INFO L272 TraceCheckUtils]: 12: Hoare triple {704#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {704#false} is VALID [2022-04-15 01:00:37,705 INFO L290 TraceCheckUtils]: 13: Hoare triple {704#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {704#false} is VALID [2022-04-15 01:00:37,705 INFO L290 TraceCheckUtils]: 14: Hoare triple {704#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {704#false} is VALID [2022-04-15 01:00:37,705 INFO L290 TraceCheckUtils]: 15: Hoare triple {704#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {704#false} is VALID [2022-04-15 01:00:37,705 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 01:00:37,705 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:00:37,705 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [185027408] [2022-04-15 01:00:37,705 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [185027408] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:00:37,705 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1116480492] [2022-04-15 01:00:37,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:37,706 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:37,706 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:00:37,707 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:00:37,708 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-15 01:00:37,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:37,741 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-15 01:00:37,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:37,745 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:00:37,813 INFO L272 TraceCheckUtils]: 0: Hoare triple {703#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-15 01:00:37,813 INFO L290 TraceCheckUtils]: 1: Hoare triple {703#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {703#true} is VALID [2022-04-15 01:00:37,814 INFO L290 TraceCheckUtils]: 2: Hoare triple {703#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-15 01:00:37,814 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {703#true} {703#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-15 01:00:37,814 INFO L272 TraceCheckUtils]: 4: Hoare triple {703#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-15 01:00:37,814 INFO L290 TraceCheckUtils]: 5: Hoare triple {703#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {708#(= main_~y~0 0)} is VALID [2022-04-15 01:00:37,814 INFO L290 TraceCheckUtils]: 6: Hoare triple {708#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {732#(= main_~y~0 1)} is VALID [2022-04-15 01:00:37,815 INFO L290 TraceCheckUtils]: 7: Hoare triple {732#(= main_~y~0 1)} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {732#(= main_~y~0 1)} is VALID [2022-04-15 01:00:37,815 INFO L290 TraceCheckUtils]: 8: Hoare triple {732#(= main_~y~0 1)} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {739#(and (= main_~z~0 main_~y~0) (= main_~y~0 1))} is VALID [2022-04-15 01:00:37,815 INFO L290 TraceCheckUtils]: 9: Hoare triple {739#(and (= main_~z~0 main_~y~0) (= main_~y~0 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {732#(= main_~y~0 1)} is VALID [2022-04-15 01:00:37,816 INFO L290 TraceCheckUtils]: 10: Hoare triple {732#(= main_~y~0 1)} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {732#(= main_~y~0 1)} is VALID [2022-04-15 01:00:37,816 INFO L290 TraceCheckUtils]: 11: Hoare triple {732#(= main_~y~0 1)} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {704#false} is VALID [2022-04-15 01:00:37,816 INFO L272 TraceCheckUtils]: 12: Hoare triple {704#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {704#false} is VALID [2022-04-15 01:00:37,816 INFO L290 TraceCheckUtils]: 13: Hoare triple {704#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {704#false} is VALID [2022-04-15 01:00:37,816 INFO L290 TraceCheckUtils]: 14: Hoare triple {704#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {704#false} is VALID [2022-04-15 01:00:37,816 INFO L290 TraceCheckUtils]: 15: Hoare triple {704#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {704#false} is VALID [2022-04-15 01:00:37,817 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:00:37,817 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:00:37,879 INFO L290 TraceCheckUtils]: 15: Hoare triple {704#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {704#false} is VALID [2022-04-15 01:00:37,879 INFO L290 TraceCheckUtils]: 14: Hoare triple {704#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {704#false} is VALID [2022-04-15 01:00:37,879 INFO L290 TraceCheckUtils]: 13: Hoare triple {704#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {704#false} is VALID [2022-04-15 01:00:37,879 INFO L272 TraceCheckUtils]: 12: Hoare triple {704#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {704#false} is VALID [2022-04-15 01:00:37,880 INFO L290 TraceCheckUtils]: 11: Hoare triple {773#(< 0 (mod main_~y~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {704#false} is VALID [2022-04-15 01:00:37,880 INFO L290 TraceCheckUtils]: 10: Hoare triple {773#(< 0 (mod main_~y~0 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {773#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:00:37,881 INFO L290 TraceCheckUtils]: 9: Hoare triple {780#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {773#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:00:37,881 INFO L290 TraceCheckUtils]: 8: Hoare triple {703#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {780#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-15 01:00:37,881 INFO L290 TraceCheckUtils]: 7: Hoare triple {703#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-15 01:00:37,881 INFO L290 TraceCheckUtils]: 6: Hoare triple {703#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {703#true} is VALID [2022-04-15 01:00:37,882 INFO L290 TraceCheckUtils]: 5: Hoare triple {703#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {703#true} is VALID [2022-04-15 01:00:37,882 INFO L272 TraceCheckUtils]: 4: Hoare triple {703#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-15 01:00:37,883 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {703#true} {703#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-15 01:00:37,883 INFO L290 TraceCheckUtils]: 2: Hoare triple {703#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-15 01:00:37,883 INFO L290 TraceCheckUtils]: 1: Hoare triple {703#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {703#true} is VALID [2022-04-15 01:00:37,883 INFO L272 TraceCheckUtils]: 0: Hoare triple {703#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-15 01:00:37,883 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 01:00:37,883 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1116480492] provided 1 perfect and 1 imperfect interpolant sequences [2022-04-15 01:00:37,883 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-04-15 01:00:37,883 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [5, 5] total 9 [2022-04-15 01:00:37,884 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [341913877] [2022-04-15 01:00:37,884 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 01:00:37,884 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-15 01:00:37,884 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:00:37,884 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:37,912 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:37,912 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-15 01:00:37,912 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:00:37,912 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-15 01:00:37,912 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2022-04-15 01:00:37,913 INFO L87 Difference]: Start difference. First operand 17 states and 19 transitions. Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:38,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:38,001 INFO L93 Difference]: Finished difference Result 23 states and 25 transitions. [2022-04-15 01:00:38,002 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-15 01:00:38,002 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-15 01:00:38,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:00:38,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:38,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 24 transitions. [2022-04-15 01:00:38,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:38,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 24 transitions. [2022-04-15 01:00:38,004 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 24 transitions. [2022-04-15 01:00:38,023 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:38,023 INFO L225 Difference]: With dead ends: 23 [2022-04-15 01:00:38,024 INFO L226 Difference]: Without dead ends: 18 [2022-04-15 01:00:38,024 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2022-04-15 01:00:38,024 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 1 mSDsluCounter, 20 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 36 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 01:00:38,025 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [1 Valid, 36 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 01:00:38,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2022-04-15 01:00:38,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2022-04-15 01:00:38,031 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:00:38,032 INFO L82 GeneralOperation]: Start isEquivalent. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:38,032 INFO L74 IsIncluded]: Start isIncluded. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:38,032 INFO L87 Difference]: Start difference. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:38,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:38,032 INFO L93 Difference]: Finished difference Result 18 states and 20 transitions. [2022-04-15 01:00:38,032 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 20 transitions. [2022-04-15 01:00:38,033 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:38,033 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:38,033 INFO L74 IsIncluded]: Start isIncluded. First operand has 18 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18 states. [2022-04-15 01:00:38,033 INFO L87 Difference]: Start difference. First operand has 18 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18 states. [2022-04-15 01:00:38,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:38,033 INFO L93 Difference]: Finished difference Result 18 states and 20 transitions. [2022-04-15 01:00:38,034 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 20 transitions. [2022-04-15 01:00:38,034 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:38,034 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:38,034 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:00:38,034 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:00:38,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:38,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 20 transitions. [2022-04-15 01:00:38,035 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 20 transitions. Word has length 16 [2022-04-15 01:00:38,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:00:38,035 INFO L478 AbstractCegarLoop]: Abstraction has 18 states and 20 transitions. [2022-04-15 01:00:38,035 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:38,035 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 20 transitions. [2022-04-15 01:00:38,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-15 01:00:38,035 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:00:38,035 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:00:38,051 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-15 01:00:38,236 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2022-04-15 01:00:38,236 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:00:38,236 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:00:38,236 INFO L85 PathProgramCache]: Analyzing trace with hash 957906802, now seen corresponding path program 1 times [2022-04-15 01:00:38,237 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:00:38,237 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [645014690] [2022-04-15 01:00:38,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:38,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:00:38,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:38,304 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:00:38,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:38,310 INFO L290 TraceCheckUtils]: 0: Hoare triple {918#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {909#true} is VALID [2022-04-15 01:00:38,310 INFO L290 TraceCheckUtils]: 1: Hoare triple {909#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-15 01:00:38,310 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {909#true} {909#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-15 01:00:38,311 INFO L272 TraceCheckUtils]: 0: Hoare triple {909#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {918#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:00:38,311 INFO L290 TraceCheckUtils]: 1: Hoare triple {918#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {909#true} is VALID [2022-04-15 01:00:38,311 INFO L290 TraceCheckUtils]: 2: Hoare triple {909#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-15 01:00:38,311 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {909#true} {909#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-15 01:00:38,311 INFO L272 TraceCheckUtils]: 4: Hoare triple {909#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-15 01:00:38,311 INFO L290 TraceCheckUtils]: 5: Hoare triple {909#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {909#true} is VALID [2022-04-15 01:00:38,311 INFO L290 TraceCheckUtils]: 6: Hoare triple {909#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {909#true} is VALID [2022-04-15 01:00:38,312 INFO L290 TraceCheckUtils]: 7: Hoare triple {909#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-15 01:00:38,313 INFO L290 TraceCheckUtils]: 8: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-15 01:00:38,314 INFO L290 TraceCheckUtils]: 9: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-15 01:00:38,314 INFO L290 TraceCheckUtils]: 10: Hoare triple {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-15 01:00:38,316 INFO L290 TraceCheckUtils]: 11: Hoare triple {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-15 01:00:38,317 INFO L290 TraceCheckUtils]: 12: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-15 01:00:38,317 INFO L272 TraceCheckUtils]: 13: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {916#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 01:00:38,318 INFO L290 TraceCheckUtils]: 14: Hoare triple {916#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {917#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 01:00:38,318 INFO L290 TraceCheckUtils]: 15: Hoare triple {917#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {910#false} is VALID [2022-04-15 01:00:38,318 INFO L290 TraceCheckUtils]: 16: Hoare triple {910#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {910#false} is VALID [2022-04-15 01:00:38,319 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 01:00:38,319 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:00:38,319 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [645014690] [2022-04-15 01:00:38,319 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [645014690] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:00:38,319 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [711700927] [2022-04-15 01:00:38,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:38,319 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:38,319 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:00:38,330 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:00:38,330 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-15 01:00:38,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:38,366 INFO L263 TraceCheckSpWp]: Trace formula consists of 74 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 01:00:38,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:38,372 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:00:38,633 INFO L272 TraceCheckUtils]: 0: Hoare triple {909#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-15 01:00:38,634 INFO L290 TraceCheckUtils]: 1: Hoare triple {909#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {909#true} is VALID [2022-04-15 01:00:38,634 INFO L290 TraceCheckUtils]: 2: Hoare triple {909#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-15 01:00:38,634 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {909#true} {909#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-15 01:00:38,634 INFO L272 TraceCheckUtils]: 4: Hoare triple {909#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-15 01:00:38,634 INFO L290 TraceCheckUtils]: 5: Hoare triple {909#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {909#true} is VALID [2022-04-15 01:00:38,634 INFO L290 TraceCheckUtils]: 6: Hoare triple {909#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {909#true} is VALID [2022-04-15 01:00:38,635 INFO L290 TraceCheckUtils]: 7: Hoare triple {909#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-15 01:00:38,636 INFO L290 TraceCheckUtils]: 8: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-15 01:00:38,639 INFO L290 TraceCheckUtils]: 9: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-15 01:00:38,640 INFO L290 TraceCheckUtils]: 10: Hoare triple {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-15 01:00:38,641 INFO L290 TraceCheckUtils]: 11: Hoare triple {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-15 01:00:38,641 INFO L290 TraceCheckUtils]: 12: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-15 01:00:38,642 INFO L272 TraceCheckUtils]: 13: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {961#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:00:38,643 INFO L290 TraceCheckUtils]: 14: Hoare triple {961#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {965#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:00:38,643 INFO L290 TraceCheckUtils]: 15: Hoare triple {965#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {910#false} is VALID [2022-04-15 01:00:38,643 INFO L290 TraceCheckUtils]: 16: Hoare triple {910#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {910#false} is VALID [2022-04-15 01:00:38,644 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 01:00:38,644 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:00:38,786 INFO L290 TraceCheckUtils]: 16: Hoare triple {910#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {910#false} is VALID [2022-04-15 01:00:38,787 INFO L290 TraceCheckUtils]: 15: Hoare triple {965#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {910#false} is VALID [2022-04-15 01:00:38,788 INFO L290 TraceCheckUtils]: 14: Hoare triple {961#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {965#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:00:38,790 INFO L272 TraceCheckUtils]: 13: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {961#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:00:38,791 INFO L290 TraceCheckUtils]: 12: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-15 01:00:38,791 INFO L290 TraceCheckUtils]: 11: Hoare triple {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-15 01:00:38,792 INFO L290 TraceCheckUtils]: 10: Hoare triple {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-15 01:00:38,793 INFO L290 TraceCheckUtils]: 9: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-15 01:00:38,793 INFO L290 TraceCheckUtils]: 8: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-15 01:00:38,794 INFO L290 TraceCheckUtils]: 7: Hoare triple {909#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-15 01:00:38,794 INFO L290 TraceCheckUtils]: 6: Hoare triple {909#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {909#true} is VALID [2022-04-15 01:00:38,794 INFO L290 TraceCheckUtils]: 5: Hoare triple {909#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {909#true} is VALID [2022-04-15 01:00:38,794 INFO L272 TraceCheckUtils]: 4: Hoare triple {909#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-15 01:00:38,794 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {909#true} {909#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-15 01:00:38,795 INFO L290 TraceCheckUtils]: 2: Hoare triple {909#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-15 01:00:38,795 INFO L290 TraceCheckUtils]: 1: Hoare triple {909#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {909#true} is VALID [2022-04-15 01:00:38,795 INFO L272 TraceCheckUtils]: 0: Hoare triple {909#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-15 01:00:38,795 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 01:00:38,795 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [711700927] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:00:38,795 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:00:38,795 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6] total 9 [2022-04-15 01:00:38,796 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1758336154] [2022-04-15 01:00:38,796 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:00:38,796 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 1.7777777777777777) internal successors, (16), 6 states have internal predecessors, (16), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-15 01:00:38,796 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:00:38,796 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 1.7777777777777777) internal successors, (16), 6 states have internal predecessors, (16), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:38,813 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:38,813 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-04-15 01:00:38,813 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:00:38,813 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-04-15 01:00:38,813 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2022-04-15 01:00:38,813 INFO L87 Difference]: Start difference. First operand 18 states and 20 transitions. Second operand has 9 states, 9 states have (on average 1.7777777777777777) internal successors, (16), 6 states have internal predecessors, (16), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:39,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:39,055 INFO L93 Difference]: Finished difference Result 26 states and 29 transitions. [2022-04-15 01:00:39,055 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-15 01:00:39,055 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 1.7777777777777777) internal successors, (16), 6 states have internal predecessors, (16), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-15 01:00:39,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:00:39,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.7777777777777777) internal successors, (16), 6 states have internal predecessors, (16), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:39,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 27 transitions. [2022-04-15 01:00:39,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.7777777777777777) internal successors, (16), 6 states have internal predecessors, (16), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:39,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 27 transitions. [2022-04-15 01:00:39,057 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 27 transitions. [2022-04-15 01:00:39,085 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:39,085 INFO L225 Difference]: With dead ends: 26 [2022-04-15 01:00:39,085 INFO L226 Difference]: Without dead ends: 21 [2022-04-15 01:00:39,086 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 32 SyntacticMatches, 4 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2022-04-15 01:00:39,087 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 15 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 41 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 01:00:39,087 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [15 Valid, 41 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 01:00:39,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2022-04-15 01:00:39,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 20. [2022-04-15 01:00:39,104 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:00:39,104 INFO L82 GeneralOperation]: Start isEquivalent. First operand 21 states. Second operand has 20 states, 15 states have (on average 1.2666666666666666) internal successors, (19), 15 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:39,105 INFO L74 IsIncluded]: Start isIncluded. First operand 21 states. Second operand has 20 states, 15 states have (on average 1.2666666666666666) internal successors, (19), 15 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:39,105 INFO L87 Difference]: Start difference. First operand 21 states. Second operand has 20 states, 15 states have (on average 1.2666666666666666) internal successors, (19), 15 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:39,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:39,107 INFO L93 Difference]: Finished difference Result 21 states and 24 transitions. [2022-04-15 01:00:39,107 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 24 transitions. [2022-04-15 01:00:39,107 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:39,107 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:39,107 INFO L74 IsIncluded]: Start isIncluded. First operand has 20 states, 15 states have (on average 1.2666666666666666) internal successors, (19), 15 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 21 states. [2022-04-15 01:00:39,108 INFO L87 Difference]: Start difference. First operand has 20 states, 15 states have (on average 1.2666666666666666) internal successors, (19), 15 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 21 states. [2022-04-15 01:00:39,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:39,109 INFO L93 Difference]: Finished difference Result 21 states and 24 transitions. [2022-04-15 01:00:39,109 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 24 transitions. [2022-04-15 01:00:39,110 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:39,110 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:39,110 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:00:39,110 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:00:39,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 15 states have (on average 1.2666666666666666) internal successors, (19), 15 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:39,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 23 transitions. [2022-04-15 01:00:39,111 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 23 transitions. Word has length 17 [2022-04-15 01:00:39,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:00:39,111 INFO L478 AbstractCegarLoop]: Abstraction has 20 states and 23 transitions. [2022-04-15 01:00:39,111 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 1.7777777777777777) internal successors, (16), 6 states have internal predecessors, (16), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:39,112 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 23 transitions. [2022-04-15 01:00:39,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-15 01:00:39,113 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:00:39,113 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:00:39,132 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-15 01:00:39,329 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:39,330 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:00:39,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:00:39,330 INFO L85 PathProgramCache]: Analyzing trace with hash -342939581, now seen corresponding path program 2 times [2022-04-15 01:00:39,330 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:00:39,331 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1495544674] [2022-04-15 01:00:39,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:39,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:00:39,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:39,375 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:00:39,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:39,379 INFO L290 TraceCheckUtils]: 0: Hoare triple {1149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1142#true} is VALID [2022-04-15 01:00:39,379 INFO L290 TraceCheckUtils]: 1: Hoare triple {1142#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-15 01:00:39,379 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1142#true} {1142#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-15 01:00:39,380 INFO L272 TraceCheckUtils]: 0: Hoare triple {1142#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:00:39,380 INFO L290 TraceCheckUtils]: 1: Hoare triple {1149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1142#true} is VALID [2022-04-15 01:00:39,380 INFO L290 TraceCheckUtils]: 2: Hoare triple {1142#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-15 01:00:39,380 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1142#true} {1142#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-15 01:00:39,380 INFO L272 TraceCheckUtils]: 4: Hoare triple {1142#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-15 01:00:39,382 INFO L290 TraceCheckUtils]: 5: Hoare triple {1142#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1147#(= main_~y~0 0)} is VALID [2022-04-15 01:00:39,383 INFO L290 TraceCheckUtils]: 6: Hoare triple {1147#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:39,383 INFO L290 TraceCheckUtils]: 7: Hoare triple {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:39,383 INFO L290 TraceCheckUtils]: 8: Hoare triple {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:39,384 INFO L290 TraceCheckUtils]: 9: Hoare triple {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:39,384 INFO L290 TraceCheckUtils]: 10: Hoare triple {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:39,385 INFO L290 TraceCheckUtils]: 11: Hoare triple {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1147#(= main_~y~0 0)} is VALID [2022-04-15 01:00:39,385 INFO L290 TraceCheckUtils]: 12: Hoare triple {1147#(= main_~y~0 0)} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1143#false} is VALID [2022-04-15 01:00:39,385 INFO L290 TraceCheckUtils]: 13: Hoare triple {1143#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1143#false} is VALID [2022-04-15 01:00:39,385 INFO L272 TraceCheckUtils]: 14: Hoare triple {1143#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1143#false} is VALID [2022-04-15 01:00:39,385 INFO L290 TraceCheckUtils]: 15: Hoare triple {1143#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1143#false} is VALID [2022-04-15 01:00:39,386 INFO L290 TraceCheckUtils]: 16: Hoare triple {1143#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1143#false} is VALID [2022-04-15 01:00:39,386 INFO L290 TraceCheckUtils]: 17: Hoare triple {1143#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1143#false} is VALID [2022-04-15 01:00:39,386 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 01:00:39,386 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:00:39,386 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1495544674] [2022-04-15 01:00:39,386 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1495544674] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:00:39,386 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1117665500] [2022-04-15 01:00:39,386 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 01:00:39,386 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:39,386 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:00:39,387 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:00:39,388 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-15 01:00:39,430 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 01:00:39,431 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:00:39,431 INFO L263 TraceCheckSpWp]: Trace formula consists of 79 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-15 01:00:39,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:39,438 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:00:39,560 INFO L272 TraceCheckUtils]: 0: Hoare triple {1142#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-15 01:00:39,561 INFO L290 TraceCheckUtils]: 1: Hoare triple {1142#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1142#true} is VALID [2022-04-15 01:00:39,561 INFO L290 TraceCheckUtils]: 2: Hoare triple {1142#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-15 01:00:39,561 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1142#true} {1142#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-15 01:00:39,561 INFO L272 TraceCheckUtils]: 4: Hoare triple {1142#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-15 01:00:39,562 INFO L290 TraceCheckUtils]: 5: Hoare triple {1142#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1147#(= main_~y~0 0)} is VALID [2022-04-15 01:00:39,563 INFO L290 TraceCheckUtils]: 6: Hoare triple {1147#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:39,564 INFO L290 TraceCheckUtils]: 7: Hoare triple {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:39,566 INFO L290 TraceCheckUtils]: 8: Hoare triple {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {1177#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:39,567 INFO L290 TraceCheckUtils]: 9: Hoare triple {1177#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1181#(and (<= 1 main_~y~0) (= main_~y~0 (+ main_~z~0 1)) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:39,568 INFO L290 TraceCheckUtils]: 10: Hoare triple {1181#(and (<= 1 main_~y~0) (= main_~y~0 (+ main_~z~0 1)) (<= main_~y~0 1))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:39,568 INFO L290 TraceCheckUtils]: 11: Hoare triple {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1147#(= main_~y~0 0)} is VALID [2022-04-15 01:00:39,569 INFO L290 TraceCheckUtils]: 12: Hoare triple {1147#(= main_~y~0 0)} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1143#false} is VALID [2022-04-15 01:00:39,569 INFO L290 TraceCheckUtils]: 13: Hoare triple {1143#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1143#false} is VALID [2022-04-15 01:00:39,569 INFO L272 TraceCheckUtils]: 14: Hoare triple {1143#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1143#false} is VALID [2022-04-15 01:00:39,569 INFO L290 TraceCheckUtils]: 15: Hoare triple {1143#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1143#false} is VALID [2022-04-15 01:00:39,569 INFO L290 TraceCheckUtils]: 16: Hoare triple {1143#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1143#false} is VALID [2022-04-15 01:00:39,570 INFO L290 TraceCheckUtils]: 17: Hoare triple {1143#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1143#false} is VALID [2022-04-15 01:00:39,570 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:00:39,570 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:00:39,684 INFO L290 TraceCheckUtils]: 17: Hoare triple {1143#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1143#false} is VALID [2022-04-15 01:00:39,684 INFO L290 TraceCheckUtils]: 16: Hoare triple {1143#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1143#false} is VALID [2022-04-15 01:00:39,684 INFO L290 TraceCheckUtils]: 15: Hoare triple {1143#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1143#false} is VALID [2022-04-15 01:00:39,684 INFO L272 TraceCheckUtils]: 14: Hoare triple {1143#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1143#false} is VALID [2022-04-15 01:00:39,684 INFO L290 TraceCheckUtils]: 13: Hoare triple {1143#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1143#false} is VALID [2022-04-15 01:00:39,685 INFO L290 TraceCheckUtils]: 12: Hoare triple {1221#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1143#false} is VALID [2022-04-15 01:00:39,686 INFO L290 TraceCheckUtils]: 11: Hoare triple {1225#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1221#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-15 01:00:39,687 INFO L290 TraceCheckUtils]: 10: Hoare triple {1229#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {1225#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-15 01:00:39,688 INFO L290 TraceCheckUtils]: 9: Hoare triple {1233#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1229#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-15 01:00:39,688 INFO L290 TraceCheckUtils]: 8: Hoare triple {1142#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {1233#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-15 01:00:39,688 INFO L290 TraceCheckUtils]: 7: Hoare triple {1142#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-15 01:00:39,689 INFO L290 TraceCheckUtils]: 6: Hoare triple {1142#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1142#true} is VALID [2022-04-15 01:00:39,689 INFO L290 TraceCheckUtils]: 5: Hoare triple {1142#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1142#true} is VALID [2022-04-15 01:00:39,689 INFO L272 TraceCheckUtils]: 4: Hoare triple {1142#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-15 01:00:39,689 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1142#true} {1142#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-15 01:00:39,689 INFO L290 TraceCheckUtils]: 2: Hoare triple {1142#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-15 01:00:39,689 INFO L290 TraceCheckUtils]: 1: Hoare triple {1142#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1142#true} is VALID [2022-04-15 01:00:39,689 INFO L272 TraceCheckUtils]: 0: Hoare triple {1142#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-15 01:00:39,689 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 01:00:39,690 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1117665500] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:00:39,690 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:00:39,690 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 6, 6] total 11 [2022-04-15 01:00:39,690 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [260957388] [2022-04-15 01:00:39,690 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:00:39,691 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 2.3636363636363638) internal successors, (26), 10 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-15 01:00:39,691 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:00:39,691 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 11 states, 11 states have (on average 2.3636363636363638) internal successors, (26), 10 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:39,716 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:39,716 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-04-15 01:00:39,716 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:00:39,717 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-04-15 01:00:39,717 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2022-04-15 01:00:39,717 INFO L87 Difference]: Start difference. First operand 20 states and 23 transitions. Second operand has 11 states, 11 states have (on average 2.3636363636363638) internal successors, (26), 10 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:40,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:40,005 INFO L93 Difference]: Finished difference Result 35 states and 41 transitions. [2022-04-15 01:00:40,005 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-15 01:00:40,005 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 2.3636363636363638) internal successors, (26), 10 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-15 01:00:40,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:00:40,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 2.3636363636363638) internal successors, (26), 10 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:40,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 40 transitions. [2022-04-15 01:00:40,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 2.3636363636363638) internal successors, (26), 10 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:40,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 40 transitions. [2022-04-15 01:00:40,010 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 40 transitions. [2022-04-15 01:00:40,052 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:40,052 INFO L225 Difference]: With dead ends: 35 [2022-04-15 01:00:40,053 INFO L226 Difference]: Without dead ends: 20 [2022-04-15 01:00:40,053 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 30 SyntacticMatches, 3 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=102, Invalid=278, Unknown=0, NotChecked=0, Total=380 [2022-04-15 01:00:40,054 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 24 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 61 mSolverCounterSat, 21 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 34 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 21 IncrementalHoareTripleChecker+Valid, 61 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 01:00:40,055 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [24 Valid, 34 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [21 Valid, 61 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 01:00:40,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2022-04-15 01:00:40,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2022-04-15 01:00:40,067 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:00:40,067 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20 states. Second operand has 20 states, 15 states have (on average 1.2) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:40,067 INFO L74 IsIncluded]: Start isIncluded. First operand 20 states. Second operand has 20 states, 15 states have (on average 1.2) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:40,067 INFO L87 Difference]: Start difference. First operand 20 states. Second operand has 20 states, 15 states have (on average 1.2) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:40,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:40,068 INFO L93 Difference]: Finished difference Result 20 states and 22 transitions. [2022-04-15 01:00:40,068 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 22 transitions. [2022-04-15 01:00:40,069 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:40,069 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:40,069 INFO L74 IsIncluded]: Start isIncluded. First operand has 20 states, 15 states have (on average 1.2) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20 states. [2022-04-15 01:00:40,069 INFO L87 Difference]: Start difference. First operand has 20 states, 15 states have (on average 1.2) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20 states. [2022-04-15 01:00:40,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:40,070 INFO L93 Difference]: Finished difference Result 20 states and 22 transitions. [2022-04-15 01:00:40,070 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 22 transitions. [2022-04-15 01:00:40,070 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:40,070 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:40,070 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:00:40,070 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:00:40,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 15 states have (on average 1.2) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:40,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 22 transitions. [2022-04-15 01:00:40,071 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 22 transitions. Word has length 18 [2022-04-15 01:00:40,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:00:40,071 INFO L478 AbstractCegarLoop]: Abstraction has 20 states and 22 transitions. [2022-04-15 01:00:40,071 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 2.3636363636363638) internal successors, (26), 10 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:40,071 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 22 transitions. [2022-04-15 01:00:40,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-15 01:00:40,071 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:00:40,071 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:00:40,087 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-15 01:00:40,288 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:40,288 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:00:40,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:00:40,288 INFO L85 PathProgramCache]: Analyzing trace with hash 302088562, now seen corresponding path program 3 times [2022-04-15 01:00:40,288 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:00:40,289 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [622660205] [2022-04-15 01:00:40,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:40,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:00:40,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:40,351 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:00:40,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:40,357 INFO L290 TraceCheckUtils]: 0: Hoare triple {1414#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1405#true} is VALID [2022-04-15 01:00:40,357 INFO L290 TraceCheckUtils]: 1: Hoare triple {1405#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-15 01:00:40,357 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1405#true} {1405#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-15 01:00:40,357 INFO L272 TraceCheckUtils]: 0: Hoare triple {1405#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1414#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:00:40,358 INFO L290 TraceCheckUtils]: 1: Hoare triple {1414#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1405#true} is VALID [2022-04-15 01:00:40,358 INFO L290 TraceCheckUtils]: 2: Hoare triple {1405#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-15 01:00:40,358 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1405#true} {1405#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-15 01:00:40,358 INFO L272 TraceCheckUtils]: 4: Hoare triple {1405#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-15 01:00:40,358 INFO L290 TraceCheckUtils]: 5: Hoare triple {1405#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1410#(= main_~y~0 0)} is VALID [2022-04-15 01:00:40,359 INFO L290 TraceCheckUtils]: 6: Hoare triple {1410#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1411#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:40,359 INFO L290 TraceCheckUtils]: 7: Hoare triple {1411#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:40,360 INFO L290 TraceCheckUtils]: 8: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:40,360 INFO L290 TraceCheckUtils]: 9: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:40,360 INFO L290 TraceCheckUtils]: 10: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:40,361 INFO L290 TraceCheckUtils]: 11: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:40,361 INFO L290 TraceCheckUtils]: 12: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:40,361 INFO L290 TraceCheckUtils]: 13: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1413#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-15 01:00:40,362 INFO L290 TraceCheckUtils]: 14: Hoare triple {1413#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1406#false} is VALID [2022-04-15 01:00:40,362 INFO L272 TraceCheckUtils]: 15: Hoare triple {1406#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1406#false} is VALID [2022-04-15 01:00:40,362 INFO L290 TraceCheckUtils]: 16: Hoare triple {1406#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1406#false} is VALID [2022-04-15 01:00:40,362 INFO L290 TraceCheckUtils]: 17: Hoare triple {1406#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1406#false} is VALID [2022-04-15 01:00:40,363 INFO L290 TraceCheckUtils]: 18: Hoare triple {1406#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1406#false} is VALID [2022-04-15 01:00:40,364 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-15 01:00:40,364 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:00:40,364 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [622660205] [2022-04-15 01:00:40,364 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [622660205] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:00:40,364 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [218226271] [2022-04-15 01:00:40,364 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-15 01:00:40,364 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:40,364 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:00:40,367 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:00:40,375 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-15 01:00:40,403 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-04-15 01:00:40,403 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:00:40,404 INFO L263 TraceCheckSpWp]: Trace formula consists of 84 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-15 01:00:40,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:40,411 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:00:40,642 INFO L272 TraceCheckUtils]: 0: Hoare triple {1405#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-15 01:00:40,642 INFO L290 TraceCheckUtils]: 1: Hoare triple {1405#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1405#true} is VALID [2022-04-15 01:00:40,642 INFO L290 TraceCheckUtils]: 2: Hoare triple {1405#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-15 01:00:40,643 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1405#true} {1405#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-15 01:00:40,643 INFO L272 TraceCheckUtils]: 4: Hoare triple {1405#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-15 01:00:40,643 INFO L290 TraceCheckUtils]: 5: Hoare triple {1405#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1410#(= main_~y~0 0)} is VALID [2022-04-15 01:00:40,646 INFO L290 TraceCheckUtils]: 6: Hoare triple {1410#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1411#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:40,647 INFO L290 TraceCheckUtils]: 7: Hoare triple {1411#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:40,647 INFO L290 TraceCheckUtils]: 8: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:40,647 INFO L290 TraceCheckUtils]: 9: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {1445#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:40,648 INFO L290 TraceCheckUtils]: 10: Hoare triple {1445#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1449#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-15 01:00:40,648 INFO L290 TraceCheckUtils]: 11: Hoare triple {1449#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:40,649 INFO L290 TraceCheckUtils]: 12: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:40,649 INFO L290 TraceCheckUtils]: 13: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1411#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:40,650 INFO L290 TraceCheckUtils]: 14: Hoare triple {1411#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1406#false} is VALID [2022-04-15 01:00:40,650 INFO L272 TraceCheckUtils]: 15: Hoare triple {1406#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1406#false} is VALID [2022-04-15 01:00:40,650 INFO L290 TraceCheckUtils]: 16: Hoare triple {1406#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1406#false} is VALID [2022-04-15 01:00:40,650 INFO L290 TraceCheckUtils]: 17: Hoare triple {1406#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1406#false} is VALID [2022-04-15 01:00:40,650 INFO L290 TraceCheckUtils]: 18: Hoare triple {1406#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1406#false} is VALID [2022-04-15 01:00:40,651 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:00:40,651 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:00:40,751 INFO L290 TraceCheckUtils]: 18: Hoare triple {1406#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1406#false} is VALID [2022-04-15 01:00:40,752 INFO L290 TraceCheckUtils]: 17: Hoare triple {1406#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1406#false} is VALID [2022-04-15 01:00:40,752 INFO L290 TraceCheckUtils]: 16: Hoare triple {1406#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1406#false} is VALID [2022-04-15 01:00:40,752 INFO L272 TraceCheckUtils]: 15: Hoare triple {1406#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1406#false} is VALID [2022-04-15 01:00:40,752 INFO L290 TraceCheckUtils]: 14: Hoare triple {1486#(< 0 (mod main_~y~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1406#false} is VALID [2022-04-15 01:00:40,753 INFO L290 TraceCheckUtils]: 13: Hoare triple {1490#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1486#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:00:40,753 INFO L290 TraceCheckUtils]: 12: Hoare triple {1490#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {1490#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:00:40,754 INFO L290 TraceCheckUtils]: 11: Hoare triple {1497#(or (< 0 (mod (+ main_~y~0 4294967295) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1490#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:00:40,755 INFO L290 TraceCheckUtils]: 10: Hoare triple {1501#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1497#(or (< 0 (mod (+ main_~y~0 4294967295) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-15 01:00:40,756 INFO L290 TraceCheckUtils]: 9: Hoare triple {1405#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {1501#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-15 01:00:40,756 INFO L290 TraceCheckUtils]: 8: Hoare triple {1405#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-15 01:00:40,756 INFO L290 TraceCheckUtils]: 7: Hoare triple {1405#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1405#true} is VALID [2022-04-15 01:00:40,756 INFO L290 TraceCheckUtils]: 6: Hoare triple {1405#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1405#true} is VALID [2022-04-15 01:00:40,756 INFO L290 TraceCheckUtils]: 5: Hoare triple {1405#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1405#true} is VALID [2022-04-15 01:00:40,756 INFO L272 TraceCheckUtils]: 4: Hoare triple {1405#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-15 01:00:40,756 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1405#true} {1405#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-15 01:00:40,756 INFO L290 TraceCheckUtils]: 2: Hoare triple {1405#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-15 01:00:40,756 INFO L290 TraceCheckUtils]: 1: Hoare triple {1405#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1405#true} is VALID [2022-04-15 01:00:40,756 INFO L272 TraceCheckUtils]: 0: Hoare triple {1405#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-15 01:00:40,757 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-15 01:00:40,757 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [218226271] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:00:40,757 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:00:40,757 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 6] total 13 [2022-04-15 01:00:40,757 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2133614155] [2022-04-15 01:00:40,757 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:00:40,758 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.230769230769231) internal successors, (29), 12 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-15 01:00:40,758 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:00:40,758 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 2.230769230769231) internal successors, (29), 12 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:40,782 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:40,782 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-15 01:00:40,782 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:00:40,782 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-15 01:00:40,783 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=108, Unknown=0, NotChecked=0, Total=156 [2022-04-15 01:00:40,783 INFO L87 Difference]: Start difference. First operand 20 states and 22 transitions. Second operand has 13 states, 13 states have (on average 2.230769230769231) internal successors, (29), 12 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:41,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:41,176 INFO L93 Difference]: Finished difference Result 47 states and 58 transitions. [2022-04-15 01:00:41,176 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-15 01:00:41,176 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.230769230769231) internal successors, (29), 12 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-15 01:00:41,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:00:41,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.230769230769231) internal successors, (29), 12 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:41,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 54 transitions. [2022-04-15 01:00:41,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.230769230769231) internal successors, (29), 12 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:41,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 54 transitions. [2022-04-15 01:00:41,179 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 54 transitions. [2022-04-15 01:00:41,232 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:41,234 INFO L225 Difference]: With dead ends: 47 [2022-04-15 01:00:41,234 INFO L226 Difference]: Without dead ends: 41 [2022-04-15 01:00:41,234 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 38 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 106 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=154, Invalid=398, Unknown=0, NotChecked=0, Total=552 [2022-04-15 01:00:41,234 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 51 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 89 mSolverCounterSat, 40 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 51 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 40 IncrementalHoareTripleChecker+Valid, 89 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 01:00:41,235 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [51 Valid, 39 Invalid, 129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [40 Valid, 89 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 01:00:41,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2022-04-15 01:00:41,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 29. [2022-04-15 01:00:41,264 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:00:41,264 INFO L82 GeneralOperation]: Start isEquivalent. First operand 41 states. Second operand has 29 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 24 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:41,270 INFO L74 IsIncluded]: Start isIncluded. First operand 41 states. Second operand has 29 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 24 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:41,271 INFO L87 Difference]: Start difference. First operand 41 states. Second operand has 29 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 24 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:41,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:41,272 INFO L93 Difference]: Finished difference Result 41 states and 48 transitions. [2022-04-15 01:00:41,272 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 48 transitions. [2022-04-15 01:00:41,272 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:41,272 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:41,272 INFO L74 IsIncluded]: Start isIncluded. First operand has 29 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 24 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 41 states. [2022-04-15 01:00:41,273 INFO L87 Difference]: Start difference. First operand has 29 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 24 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 41 states. [2022-04-15 01:00:41,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:41,274 INFO L93 Difference]: Finished difference Result 41 states and 48 transitions. [2022-04-15 01:00:41,274 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 48 transitions. [2022-04-15 01:00:41,274 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:41,274 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:41,274 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:00:41,274 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:00:41,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 24 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:41,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 33 transitions. [2022-04-15 01:00:41,275 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 33 transitions. Word has length 19 [2022-04-15 01:00:41,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:00:41,275 INFO L478 AbstractCegarLoop]: Abstraction has 29 states and 33 transitions. [2022-04-15 01:00:41,275 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 2.230769230769231) internal successors, (29), 12 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:41,275 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 33 transitions. [2022-04-15 01:00:41,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-15 01:00:41,275 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:00:41,275 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:00:41,319 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-15 01:00:41,503 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:41,504 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:00:41,504 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:00:41,504 INFO L85 PathProgramCache]: Analyzing trace with hash 801531459, now seen corresponding path program 4 times [2022-04-15 01:00:41,504 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:00:41,504 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [811489120] [2022-04-15 01:00:41,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:41,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:00:41,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:41,581 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:00:41,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:41,586 INFO L290 TraceCheckUtils]: 0: Hoare triple {1771#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1761#true} is VALID [2022-04-15 01:00:41,586 INFO L290 TraceCheckUtils]: 1: Hoare triple {1761#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-15 01:00:41,586 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1761#true} {1761#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-15 01:00:41,586 INFO L272 TraceCheckUtils]: 0: Hoare triple {1761#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1771#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:00:41,587 INFO L290 TraceCheckUtils]: 1: Hoare triple {1771#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1761#true} is VALID [2022-04-15 01:00:41,587 INFO L290 TraceCheckUtils]: 2: Hoare triple {1761#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-15 01:00:41,587 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1761#true} {1761#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-15 01:00:41,587 INFO L272 TraceCheckUtils]: 4: Hoare triple {1761#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-15 01:00:41,587 INFO L290 TraceCheckUtils]: 5: Hoare triple {1761#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1761#true} is VALID [2022-04-15 01:00:41,587 INFO L290 TraceCheckUtils]: 6: Hoare triple {1761#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1761#true} is VALID [2022-04-15 01:00:41,587 INFO L290 TraceCheckUtils]: 7: Hoare triple {1761#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1761#true} is VALID [2022-04-15 01:00:41,588 INFO L290 TraceCheckUtils]: 8: Hoare triple {1761#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:41,588 INFO L290 TraceCheckUtils]: 9: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:41,589 INFO L290 TraceCheckUtils]: 10: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:41,589 INFO L290 TraceCheckUtils]: 11: Hoare triple {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:41,590 INFO L290 TraceCheckUtils]: 12: Hoare triple {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:41,590 INFO L290 TraceCheckUtils]: 13: Hoare triple {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:41,591 INFO L290 TraceCheckUtils]: 14: Hoare triple {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:41,592 INFO L290 TraceCheckUtils]: 15: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:41,593 INFO L272 TraceCheckUtils]: 16: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1769#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 01:00:41,593 INFO L290 TraceCheckUtils]: 17: Hoare triple {1769#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1770#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 01:00:41,593 INFO L290 TraceCheckUtils]: 18: Hoare triple {1770#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1762#false} is VALID [2022-04-15 01:00:41,593 INFO L290 TraceCheckUtils]: 19: Hoare triple {1762#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#false} is VALID [2022-04-15 01:00:41,593 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-15 01:00:41,594 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:00:41,594 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [811489120] [2022-04-15 01:00:41,594 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [811489120] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:00:41,594 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1635939784] [2022-04-15 01:00:41,594 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 01:00:41,594 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:41,594 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:00:41,595 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:00:41,595 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-15 01:00:41,630 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 01:00:41,630 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:00:41,630 INFO L263 TraceCheckSpWp]: Trace formula consists of 89 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-15 01:00:41,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:41,642 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:00:41,838 INFO L272 TraceCheckUtils]: 0: Hoare triple {1761#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-15 01:00:41,838 INFO L290 TraceCheckUtils]: 1: Hoare triple {1761#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1761#true} is VALID [2022-04-15 01:00:41,838 INFO L290 TraceCheckUtils]: 2: Hoare triple {1761#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-15 01:00:41,838 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1761#true} {1761#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-15 01:00:41,838 INFO L272 TraceCheckUtils]: 4: Hoare triple {1761#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-15 01:00:41,838 INFO L290 TraceCheckUtils]: 5: Hoare triple {1761#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1761#true} is VALID [2022-04-15 01:00:41,838 INFO L290 TraceCheckUtils]: 6: Hoare triple {1761#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1761#true} is VALID [2022-04-15 01:00:41,839 INFO L290 TraceCheckUtils]: 7: Hoare triple {1761#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1761#true} is VALID [2022-04-15 01:00:41,844 INFO L290 TraceCheckUtils]: 8: Hoare triple {1761#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:41,845 INFO L290 TraceCheckUtils]: 9: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:41,845 INFO L290 TraceCheckUtils]: 10: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:41,846 INFO L290 TraceCheckUtils]: 11: Hoare triple {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:41,846 INFO L290 TraceCheckUtils]: 12: Hoare triple {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:41,847 INFO L290 TraceCheckUtils]: 13: Hoare triple {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:41,849 INFO L290 TraceCheckUtils]: 14: Hoare triple {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:41,849 INFO L290 TraceCheckUtils]: 15: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:41,850 INFO L272 TraceCheckUtils]: 16: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1823#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:00:41,850 INFO L290 TraceCheckUtils]: 17: Hoare triple {1823#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1827#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:00:41,851 INFO L290 TraceCheckUtils]: 18: Hoare triple {1827#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1762#false} is VALID [2022-04-15 01:00:41,851 INFO L290 TraceCheckUtils]: 19: Hoare triple {1762#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#false} is VALID [2022-04-15 01:00:41,851 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-15 01:00:41,851 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:00:42,118 INFO L290 TraceCheckUtils]: 19: Hoare triple {1762#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#false} is VALID [2022-04-15 01:00:42,119 INFO L290 TraceCheckUtils]: 18: Hoare triple {1827#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1762#false} is VALID [2022-04-15 01:00:42,119 INFO L290 TraceCheckUtils]: 17: Hoare triple {1823#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1827#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:00:42,120 INFO L272 TraceCheckUtils]: 16: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1823#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:00:42,120 INFO L290 TraceCheckUtils]: 15: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:42,121 INFO L290 TraceCheckUtils]: 14: Hoare triple {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:42,122 INFO L290 TraceCheckUtils]: 13: Hoare triple {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:42,122 INFO L290 TraceCheckUtils]: 12: Hoare triple {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:42,123 INFO L290 TraceCheckUtils]: 11: Hoare triple {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:42,124 INFO L290 TraceCheckUtils]: 10: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:42,124 INFO L290 TraceCheckUtils]: 9: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:42,125 INFO L290 TraceCheckUtils]: 8: Hoare triple {1761#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:42,125 INFO L290 TraceCheckUtils]: 7: Hoare triple {1761#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1761#true} is VALID [2022-04-15 01:00:42,125 INFO L290 TraceCheckUtils]: 6: Hoare triple {1761#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1761#true} is VALID [2022-04-15 01:00:42,125 INFO L290 TraceCheckUtils]: 5: Hoare triple {1761#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1761#true} is VALID [2022-04-15 01:00:42,125 INFO L272 TraceCheckUtils]: 4: Hoare triple {1761#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-15 01:00:42,125 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1761#true} {1761#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-15 01:00:42,125 INFO L290 TraceCheckUtils]: 2: Hoare triple {1761#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-15 01:00:42,125 INFO L290 TraceCheckUtils]: 1: Hoare triple {1761#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1761#true} is VALID [2022-04-15 01:00:42,125 INFO L272 TraceCheckUtils]: 0: Hoare triple {1761#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-15 01:00:42,126 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-15 01:00:42,126 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1635939784] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:00:42,126 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:00:42,126 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 10 [2022-04-15 01:00:42,126 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [346382874] [2022-04-15 01:00:42,126 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:00:42,127 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 1.8) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-15 01:00:42,127 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:00:42,127 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 1.8) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:42,146 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:42,146 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-15 01:00:42,146 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:00:42,146 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-15 01:00:42,147 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2022-04-15 01:00:42,147 INFO L87 Difference]: Start difference. First operand 29 states and 33 transitions. Second operand has 10 states, 10 states have (on average 1.8) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:42,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:42,410 INFO L93 Difference]: Finished difference Result 42 states and 48 transitions. [2022-04-15 01:00:42,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-15 01:00:42,410 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 1.8) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-15 01:00:42,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:00:42,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.8) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:42,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 29 transitions. [2022-04-15 01:00:42,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.8) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:42,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 29 transitions. [2022-04-15 01:00:42,412 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 29 transitions. [2022-04-15 01:00:42,436 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:42,436 INFO L225 Difference]: With dead ends: 42 [2022-04-15 01:00:42,437 INFO L226 Difference]: Without dead ends: 34 [2022-04-15 01:00:42,437 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 39 SyntacticMatches, 3 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2022-04-15 01:00:42,437 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 16 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 46 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 01:00:42,437 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [16 Valid, 46 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 01:00:42,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2022-04-15 01:00:42,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 32. [2022-04-15 01:00:42,468 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:00:42,468 INFO L82 GeneralOperation]: Start isEquivalent. First operand 34 states. Second operand has 32 states, 27 states have (on average 1.2222222222222223) internal successors, (33), 27 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:42,468 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand has 32 states, 27 states have (on average 1.2222222222222223) internal successors, (33), 27 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:42,470 INFO L87 Difference]: Start difference. First operand 34 states. Second operand has 32 states, 27 states have (on average 1.2222222222222223) internal successors, (33), 27 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:42,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:42,471 INFO L93 Difference]: Finished difference Result 34 states and 39 transitions. [2022-04-15 01:00:42,471 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 39 transitions. [2022-04-15 01:00:42,471 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:42,472 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:42,472 INFO L74 IsIncluded]: Start isIncluded. First operand has 32 states, 27 states have (on average 1.2222222222222223) internal successors, (33), 27 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-15 01:00:42,472 INFO L87 Difference]: Start difference. First operand has 32 states, 27 states have (on average 1.2222222222222223) internal successors, (33), 27 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-15 01:00:42,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:42,473 INFO L93 Difference]: Finished difference Result 34 states and 39 transitions. [2022-04-15 01:00:42,473 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 39 transitions. [2022-04-15 01:00:42,473 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:42,473 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:42,473 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:00:42,473 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:00:42,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 27 states have (on average 1.2222222222222223) internal successors, (33), 27 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:42,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 37 transitions. [2022-04-15 01:00:42,474 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 37 transitions. Word has length 20 [2022-04-15 01:00:42,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:00:42,474 INFO L478 AbstractCegarLoop]: Abstraction has 32 states and 37 transitions. [2022-04-15 01:00:42,474 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 1.8) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:42,474 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 37 transitions. [2022-04-15 01:00:42,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-15 01:00:42,475 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:00:42,475 INFO L499 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:00:42,496 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-15 01:00:42,698 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:42,699 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:00:42,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:00:42,699 INFO L85 PathProgramCache]: Analyzing trace with hash -1084369129, now seen corresponding path program 5 times [2022-04-15 01:00:42,699 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:00:42,699 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [203327608] [2022-04-15 01:00:42,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:42,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:00:42,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:42,782 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:00:42,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:42,788 INFO L290 TraceCheckUtils]: 0: Hoare triple {2094#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2083#true} is VALID [2022-04-15 01:00:42,788 INFO L290 TraceCheckUtils]: 1: Hoare triple {2083#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-15 01:00:42,788 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2083#true} {2083#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-15 01:00:42,788 INFO L272 TraceCheckUtils]: 0: Hoare triple {2083#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2094#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:00:42,788 INFO L290 TraceCheckUtils]: 1: Hoare triple {2094#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2083#true} is VALID [2022-04-15 01:00:42,788 INFO L290 TraceCheckUtils]: 2: Hoare triple {2083#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-15 01:00:42,788 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2083#true} {2083#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-15 01:00:42,789 INFO L272 TraceCheckUtils]: 4: Hoare triple {2083#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-15 01:00:42,789 INFO L290 TraceCheckUtils]: 5: Hoare triple {2083#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2088#(= main_~y~0 0)} is VALID [2022-04-15 01:00:42,789 INFO L290 TraceCheckUtils]: 6: Hoare triple {2088#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2089#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:42,790 INFO L290 TraceCheckUtils]: 7: Hoare triple {2089#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2090#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:42,790 INFO L290 TraceCheckUtils]: 8: Hoare triple {2090#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2090#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:42,790 INFO L290 TraceCheckUtils]: 9: Hoare triple {2090#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {2091#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:00:42,791 INFO L290 TraceCheckUtils]: 10: Hoare triple {2091#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2092#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 01:00:42,791 INFO L290 TraceCheckUtils]: 11: Hoare triple {2092#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2093#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 01:00:42,792 INFO L290 TraceCheckUtils]: 12: Hoare triple {2093#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2084#false} is VALID [2022-04-15 01:00:42,792 INFO L290 TraceCheckUtils]: 13: Hoare triple {2084#false} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-15 01:00:42,792 INFO L290 TraceCheckUtils]: 14: Hoare triple {2084#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2084#false} is VALID [2022-04-15 01:00:42,792 INFO L290 TraceCheckUtils]: 15: Hoare triple {2084#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2084#false} is VALID [2022-04-15 01:00:42,792 INFO L290 TraceCheckUtils]: 16: Hoare triple {2084#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-15 01:00:42,792 INFO L272 TraceCheckUtils]: 17: Hoare triple {2084#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2084#false} is VALID [2022-04-15 01:00:42,792 INFO L290 TraceCheckUtils]: 18: Hoare triple {2084#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2084#false} is VALID [2022-04-15 01:00:42,792 INFO L290 TraceCheckUtils]: 19: Hoare triple {2084#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-15 01:00:42,793 INFO L290 TraceCheckUtils]: 20: Hoare triple {2084#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-15 01:00:42,793 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-15 01:00:42,793 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:00:42,793 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [203327608] [2022-04-15 01:00:42,793 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [203327608] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:00:42,793 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1805447454] [2022-04-15 01:00:42,793 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-15 01:00:42,793 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:42,793 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:00:42,794 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:00:42,795 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-15 01:00:42,826 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2022-04-15 01:00:42,826 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:00:42,827 INFO L263 TraceCheckSpWp]: Trace formula consists of 94 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-15 01:00:42,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:42,832 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:00:42,946 INFO L272 TraceCheckUtils]: 0: Hoare triple {2083#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-15 01:00:42,947 INFO L290 TraceCheckUtils]: 1: Hoare triple {2083#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2083#true} is VALID [2022-04-15 01:00:42,947 INFO L290 TraceCheckUtils]: 2: Hoare triple {2083#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-15 01:00:42,947 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2083#true} {2083#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-15 01:00:42,947 INFO L272 TraceCheckUtils]: 4: Hoare triple {2083#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-15 01:00:42,947 INFO L290 TraceCheckUtils]: 5: Hoare triple {2083#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2088#(= main_~y~0 0)} is VALID [2022-04-15 01:00:42,948 INFO L290 TraceCheckUtils]: 6: Hoare triple {2088#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2089#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:42,948 INFO L290 TraceCheckUtils]: 7: Hoare triple {2089#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2090#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:42,949 INFO L290 TraceCheckUtils]: 8: Hoare triple {2090#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2090#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:42,949 INFO L290 TraceCheckUtils]: 9: Hoare triple {2090#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {2125#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:42,949 INFO L290 TraceCheckUtils]: 10: Hoare triple {2125#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2129#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-15 01:00:42,950 INFO L290 TraceCheckUtils]: 11: Hoare triple {2129#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2133#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)))} is VALID [2022-04-15 01:00:42,951 INFO L290 TraceCheckUtils]: 12: Hoare triple {2133#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2084#false} is VALID [2022-04-15 01:00:42,951 INFO L290 TraceCheckUtils]: 13: Hoare triple {2084#false} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-15 01:00:42,951 INFO L290 TraceCheckUtils]: 14: Hoare triple {2084#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2084#false} is VALID [2022-04-15 01:00:42,951 INFO L290 TraceCheckUtils]: 15: Hoare triple {2084#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2084#false} is VALID [2022-04-15 01:00:42,951 INFO L290 TraceCheckUtils]: 16: Hoare triple {2084#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-15 01:00:42,951 INFO L272 TraceCheckUtils]: 17: Hoare triple {2084#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2084#false} is VALID [2022-04-15 01:00:42,951 INFO L290 TraceCheckUtils]: 18: Hoare triple {2084#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2084#false} is VALID [2022-04-15 01:00:42,951 INFO L290 TraceCheckUtils]: 19: Hoare triple {2084#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-15 01:00:42,951 INFO L290 TraceCheckUtils]: 20: Hoare triple {2084#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-15 01:00:42,952 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-15 01:00:42,952 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:00:43,101 INFO L290 TraceCheckUtils]: 20: Hoare triple {2084#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-15 01:00:43,101 INFO L290 TraceCheckUtils]: 19: Hoare triple {2084#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-15 01:00:43,101 INFO L290 TraceCheckUtils]: 18: Hoare triple {2084#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2084#false} is VALID [2022-04-15 01:00:43,101 INFO L272 TraceCheckUtils]: 17: Hoare triple {2084#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2084#false} is VALID [2022-04-15 01:00:43,102 INFO L290 TraceCheckUtils]: 16: Hoare triple {2173#(< 0 (mod main_~y~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-15 01:00:43,103 INFO L290 TraceCheckUtils]: 15: Hoare triple {2177#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2173#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:00:43,103 INFO L290 TraceCheckUtils]: 14: Hoare triple {2181#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2177#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:00:43,104 INFO L290 TraceCheckUtils]: 13: Hoare triple {2181#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {2181#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 01:00:43,105 INFO L290 TraceCheckUtils]: 12: Hoare triple {2188#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2181#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 01:00:43,106 INFO L290 TraceCheckUtils]: 11: Hoare triple {2192#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2188#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-15 01:00:43,107 INFO L290 TraceCheckUtils]: 10: Hoare triple {2196#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2192#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-15 01:00:43,107 INFO L290 TraceCheckUtils]: 9: Hoare triple {2083#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {2196#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} is VALID [2022-04-15 01:00:43,107 INFO L290 TraceCheckUtils]: 8: Hoare triple {2083#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-15 01:00:43,107 INFO L290 TraceCheckUtils]: 7: Hoare triple {2083#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2083#true} is VALID [2022-04-15 01:00:43,108 INFO L290 TraceCheckUtils]: 6: Hoare triple {2083#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2083#true} is VALID [2022-04-15 01:00:43,108 INFO L290 TraceCheckUtils]: 5: Hoare triple {2083#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2083#true} is VALID [2022-04-15 01:00:43,108 INFO L272 TraceCheckUtils]: 4: Hoare triple {2083#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-15 01:00:43,108 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2083#true} {2083#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-15 01:00:43,108 INFO L290 TraceCheckUtils]: 2: Hoare triple {2083#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-15 01:00:43,108 INFO L290 TraceCheckUtils]: 1: Hoare triple {2083#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2083#true} is VALID [2022-04-15 01:00:43,108 INFO L272 TraceCheckUtils]: 0: Hoare triple {2083#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-15 01:00:43,108 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-15 01:00:43,108 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1805447454] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:00:43,108 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:00:43,108 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 18 [2022-04-15 01:00:43,109 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1492866345] [2022-04-15 01:00:43,109 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:00:43,109 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.7777777777777777) internal successors, (32), 17 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-15 01:00:43,109 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:00:43,109 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.7777777777777777) internal successors, (32), 17 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:43,133 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:43,133 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-15 01:00:43,133 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:00:43,133 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-15 01:00:43,134 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-04-15 01:00:43,134 INFO L87 Difference]: Start difference. First operand 32 states and 37 transitions. Second operand has 18 states, 18 states have (on average 1.7777777777777777) internal successors, (32), 17 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:43,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:43,893 INFO L93 Difference]: Finished difference Result 66 states and 79 transitions. [2022-04-15 01:00:43,893 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-15 01:00:43,893 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.7777777777777777) internal successors, (32), 17 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-15 01:00:43,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:00:43,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.7777777777777777) internal successors, (32), 17 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:43,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 58 transitions. [2022-04-15 01:00:43,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.7777777777777777) internal successors, (32), 17 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:43,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 58 transitions. [2022-04-15 01:00:43,896 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 58 transitions. [2022-04-15 01:00:43,957 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 58 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:43,957 INFO L225 Difference]: With dead ends: 66 [2022-04-15 01:00:43,958 INFO L226 Difference]: Without dead ends: 53 [2022-04-15 01:00:43,958 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 37 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 195 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=213, Invalid=843, Unknown=0, NotChecked=0, Total=1056 [2022-04-15 01:00:43,959 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 66 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 153 mSolverCounterSat, 47 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 66 SdHoareTripleChecker+Valid, 52 SdHoareTripleChecker+Invalid, 200 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 47 IncrementalHoareTripleChecker+Valid, 153 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 01:00:43,959 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [66 Valid, 52 Invalid, 200 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [47 Valid, 153 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-15 01:00:43,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2022-04-15 01:00:43,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 23. [2022-04-15 01:00:43,993 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:00:43,993 INFO L82 GeneralOperation]: Start isEquivalent. First operand 53 states. Second operand has 23 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:43,994 INFO L74 IsIncluded]: Start isIncluded. First operand 53 states. Second operand has 23 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:43,994 INFO L87 Difference]: Start difference. First operand 53 states. Second operand has 23 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:43,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:43,995 INFO L93 Difference]: Finished difference Result 53 states and 64 transitions. [2022-04-15 01:00:43,995 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 64 transitions. [2022-04-15 01:00:43,995 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:43,995 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:43,995 INFO L74 IsIncluded]: Start isIncluded. First operand has 23 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 53 states. [2022-04-15 01:00:43,995 INFO L87 Difference]: Start difference. First operand has 23 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 53 states. [2022-04-15 01:00:43,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:43,996 INFO L93 Difference]: Finished difference Result 53 states and 64 transitions. [2022-04-15 01:00:43,996 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 64 transitions. [2022-04-15 01:00:43,997 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:43,997 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:43,997 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:00:43,997 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:00:43,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:43,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 25 transitions. [2022-04-15 01:00:43,997 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 25 transitions. Word has length 21 [2022-04-15 01:00:43,998 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:00:43,998 INFO L478 AbstractCegarLoop]: Abstraction has 23 states and 25 transitions. [2022-04-15 01:00:43,998 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.7777777777777777) internal successors, (32), 17 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:43,998 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 25 transitions. [2022-04-15 01:00:43,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-15 01:00:43,998 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:00:43,998 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:00:44,016 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-15 01:00:44,211 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:44,211 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:00:44,212 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:00:44,212 INFO L85 PathProgramCache]: Analyzing trace with hash 465015230, now seen corresponding path program 6 times [2022-04-15 01:00:44,212 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:00:44,212 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [115404814] [2022-04-15 01:00:44,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:44,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:00:44,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:44,302 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:00:44,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:44,308 INFO L290 TraceCheckUtils]: 0: Hoare triple {2516#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2504#true} is VALID [2022-04-15 01:00:44,309 INFO L290 TraceCheckUtils]: 1: Hoare triple {2504#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-15 01:00:44,309 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2504#true} {2504#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-15 01:00:44,309 INFO L272 TraceCheckUtils]: 0: Hoare triple {2504#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:00:44,309 INFO L290 TraceCheckUtils]: 1: Hoare triple {2516#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2504#true} is VALID [2022-04-15 01:00:44,310 INFO L290 TraceCheckUtils]: 2: Hoare triple {2504#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-15 01:00:44,310 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2504#true} {2504#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-15 01:00:44,310 INFO L272 TraceCheckUtils]: 4: Hoare triple {2504#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-15 01:00:44,310 INFO L290 TraceCheckUtils]: 5: Hoare triple {2504#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2509#(= main_~y~0 0)} is VALID [2022-04-15 01:00:44,310 INFO L290 TraceCheckUtils]: 6: Hoare triple {2509#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2510#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:44,311 INFO L290 TraceCheckUtils]: 7: Hoare triple {2510#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2511#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:44,312 INFO L290 TraceCheckUtils]: 8: Hoare triple {2511#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2512#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:00:44,312 INFO L290 TraceCheckUtils]: 9: Hoare triple {2512#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2512#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:00:44,312 INFO L290 TraceCheckUtils]: 10: Hoare triple {2512#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {2513#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:00:44,313 INFO L290 TraceCheckUtils]: 11: Hoare triple {2513#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2514#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:00:44,314 INFO L290 TraceCheckUtils]: 12: Hoare triple {2514#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2515#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-15 01:00:44,314 INFO L290 TraceCheckUtils]: 13: Hoare triple {2515#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-15 01:00:44,314 INFO L290 TraceCheckUtils]: 14: Hoare triple {2505#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2505#false} is VALID [2022-04-15 01:00:44,314 INFO L290 TraceCheckUtils]: 15: Hoare triple {2505#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2505#false} is VALID [2022-04-15 01:00:44,314 INFO L290 TraceCheckUtils]: 16: Hoare triple {2505#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2505#false} is VALID [2022-04-15 01:00:44,314 INFO L290 TraceCheckUtils]: 17: Hoare triple {2505#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-15 01:00:44,315 INFO L272 TraceCheckUtils]: 18: Hoare triple {2505#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2505#false} is VALID [2022-04-15 01:00:44,315 INFO L290 TraceCheckUtils]: 19: Hoare triple {2505#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2505#false} is VALID [2022-04-15 01:00:44,315 INFO L290 TraceCheckUtils]: 20: Hoare triple {2505#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-15 01:00:44,315 INFO L290 TraceCheckUtils]: 21: Hoare triple {2505#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-15 01:00:44,315 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-15 01:00:44,315 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:00:44,315 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [115404814] [2022-04-15 01:00:44,316 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [115404814] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:00:44,316 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [900287848] [2022-04-15 01:00:44,316 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-15 01:00:44,316 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:44,316 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:00:44,317 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:00:44,318 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-15 01:00:44,352 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2022-04-15 01:00:44,352 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:00:44,353 INFO L263 TraceCheckSpWp]: Trace formula consists of 99 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-15 01:00:44,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:44,358 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:00:44,475 INFO L272 TraceCheckUtils]: 0: Hoare triple {2504#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-15 01:00:44,475 INFO L290 TraceCheckUtils]: 1: Hoare triple {2504#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2504#true} is VALID [2022-04-15 01:00:44,475 INFO L290 TraceCheckUtils]: 2: Hoare triple {2504#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-15 01:00:44,475 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2504#true} {2504#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-15 01:00:44,475 INFO L272 TraceCheckUtils]: 4: Hoare triple {2504#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-15 01:00:44,477 INFO L290 TraceCheckUtils]: 5: Hoare triple {2504#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2509#(= main_~y~0 0)} is VALID [2022-04-15 01:00:44,477 INFO L290 TraceCheckUtils]: 6: Hoare triple {2509#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2510#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:44,478 INFO L290 TraceCheckUtils]: 7: Hoare triple {2510#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2511#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:44,478 INFO L290 TraceCheckUtils]: 8: Hoare triple {2511#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2512#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:00:44,479 INFO L290 TraceCheckUtils]: 9: Hoare triple {2512#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2512#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:00:44,479 INFO L290 TraceCheckUtils]: 10: Hoare triple {2512#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {2550#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:00:44,479 INFO L290 TraceCheckUtils]: 11: Hoare triple {2550#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2554#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-15 01:00:44,480 INFO L290 TraceCheckUtils]: 12: Hoare triple {2554#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2558#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:00:44,480 INFO L290 TraceCheckUtils]: 13: Hoare triple {2558#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 3) (<= 3 main_~y~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-15 01:00:44,480 INFO L290 TraceCheckUtils]: 14: Hoare triple {2505#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2505#false} is VALID [2022-04-15 01:00:44,480 INFO L290 TraceCheckUtils]: 15: Hoare triple {2505#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2505#false} is VALID [2022-04-15 01:00:44,481 INFO L290 TraceCheckUtils]: 16: Hoare triple {2505#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2505#false} is VALID [2022-04-15 01:00:44,481 INFO L290 TraceCheckUtils]: 17: Hoare triple {2505#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-15 01:00:44,481 INFO L272 TraceCheckUtils]: 18: Hoare triple {2505#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2505#false} is VALID [2022-04-15 01:00:44,481 INFO L290 TraceCheckUtils]: 19: Hoare triple {2505#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2505#false} is VALID [2022-04-15 01:00:44,481 INFO L290 TraceCheckUtils]: 20: Hoare triple {2505#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-15 01:00:44,481 INFO L290 TraceCheckUtils]: 21: Hoare triple {2505#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-15 01:00:44,481 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-15 01:00:44,481 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:00:44,602 INFO L290 TraceCheckUtils]: 21: Hoare triple {2505#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-15 01:00:44,602 INFO L290 TraceCheckUtils]: 20: Hoare triple {2505#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-15 01:00:44,602 INFO L290 TraceCheckUtils]: 19: Hoare triple {2505#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2505#false} is VALID [2022-04-15 01:00:44,602 INFO L272 TraceCheckUtils]: 18: Hoare triple {2505#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2505#false} is VALID [2022-04-15 01:00:44,602 INFO L290 TraceCheckUtils]: 17: Hoare triple {2505#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-15 01:00:44,602 INFO L290 TraceCheckUtils]: 16: Hoare triple {2601#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2505#false} is VALID [2022-04-15 01:00:44,603 INFO L290 TraceCheckUtils]: 15: Hoare triple {2605#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2601#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-15 01:00:44,604 INFO L290 TraceCheckUtils]: 14: Hoare triple {2609#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2605#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-15 01:00:44,604 INFO L290 TraceCheckUtils]: 13: Hoare triple {2613#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {2609#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-15 01:00:44,605 INFO L290 TraceCheckUtils]: 12: Hoare triple {2617#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2613#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-15 01:00:44,606 INFO L290 TraceCheckUtils]: 11: Hoare triple {2621#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2617#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-15 01:00:44,606 INFO L290 TraceCheckUtils]: 10: Hoare triple {2504#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {2621#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-15 01:00:44,606 INFO L290 TraceCheckUtils]: 9: Hoare triple {2504#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-15 01:00:44,606 INFO L290 TraceCheckUtils]: 8: Hoare triple {2504#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2504#true} is VALID [2022-04-15 01:00:44,606 INFO L290 TraceCheckUtils]: 7: Hoare triple {2504#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2504#true} is VALID [2022-04-15 01:00:44,606 INFO L290 TraceCheckUtils]: 6: Hoare triple {2504#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2504#true} is VALID [2022-04-15 01:00:44,607 INFO L290 TraceCheckUtils]: 5: Hoare triple {2504#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2504#true} is VALID [2022-04-15 01:00:44,607 INFO L272 TraceCheckUtils]: 4: Hoare triple {2504#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-15 01:00:44,607 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2504#true} {2504#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-15 01:00:44,607 INFO L290 TraceCheckUtils]: 2: Hoare triple {2504#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-15 01:00:44,607 INFO L290 TraceCheckUtils]: 1: Hoare triple {2504#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2504#true} is VALID [2022-04-15 01:00:44,607 INFO L272 TraceCheckUtils]: 0: Hoare triple {2504#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-15 01:00:44,607 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-15 01:00:44,607 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [900287848] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:00:44,607 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:00:44,607 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 8] total 19 [2022-04-15 01:00:44,608 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [318971676] [2022-04-15 01:00:44,608 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:00:44,608 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-15 01:00:44,608 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:00:44,608 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:44,627 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:44,628 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-15 01:00:44,628 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:00:44,628 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-15 01:00:44,628 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2022-04-15 01:00:44,629 INFO L87 Difference]: Start difference. First operand 23 states and 25 transitions. Second operand has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:45,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:45,417 INFO L93 Difference]: Finished difference Result 50 states and 60 transitions. [2022-04-15 01:00:45,417 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-04-15 01:00:45,417 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-15 01:00:45,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:00:45,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:45,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 55 transitions. [2022-04-15 01:00:45,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:45,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 55 transitions. [2022-04-15 01:00:45,419 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 20 states and 55 transitions. [2022-04-15 01:00:45,483 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:45,483 INFO L225 Difference]: With dead ends: 50 [2022-04-15 01:00:45,483 INFO L226 Difference]: Without dead ends: 38 [2022-04-15 01:00:45,484 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 40 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 214 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=205, Invalid=1055, Unknown=0, NotChecked=0, Total=1260 [2022-04-15 01:00:45,484 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 24 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 186 mSolverCounterSat, 48 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 53 SdHoareTripleChecker+Invalid, 234 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 48 IncrementalHoareTripleChecker+Valid, 186 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 01:00:45,485 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [24 Valid, 53 Invalid, 234 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [48 Valid, 186 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-15 01:00:45,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2022-04-15 01:00:45,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 37. [2022-04-15 01:00:45,549 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:00:45,549 INFO L82 GeneralOperation]: Start isEquivalent. First operand 38 states. Second operand has 37 states, 32 states have (on average 1.1875) internal successors, (38), 32 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:45,549 INFO L74 IsIncluded]: Start isIncluded. First operand 38 states. Second operand has 37 states, 32 states have (on average 1.1875) internal successors, (38), 32 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:45,549 INFO L87 Difference]: Start difference. First operand 38 states. Second operand has 37 states, 32 states have (on average 1.1875) internal successors, (38), 32 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:45,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:45,550 INFO L93 Difference]: Finished difference Result 38 states and 43 transitions. [2022-04-15 01:00:45,550 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 43 transitions. [2022-04-15 01:00:45,550 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:45,550 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:45,551 INFO L74 IsIncluded]: Start isIncluded. First operand has 37 states, 32 states have (on average 1.1875) internal successors, (38), 32 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-15 01:00:45,551 INFO L87 Difference]: Start difference. First operand has 37 states, 32 states have (on average 1.1875) internal successors, (38), 32 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-15 01:00:45,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:45,551 INFO L93 Difference]: Finished difference Result 38 states and 43 transitions. [2022-04-15 01:00:45,551 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 43 transitions. [2022-04-15 01:00:45,551 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:45,552 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:45,552 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:00:45,552 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:00:45,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 32 states have (on average 1.1875) internal successors, (38), 32 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:45,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 42 transitions. [2022-04-15 01:00:45,552 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 42 transitions. Word has length 22 [2022-04-15 01:00:45,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:00:45,553 INFO L478 AbstractCegarLoop]: Abstraction has 37 states and 42 transitions. [2022-04-15 01:00:45,553 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:45,553 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 42 transitions. [2022-04-15 01:00:45,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-15 01:00:45,553 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:00:45,553 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:00:45,573 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-15 01:00:45,769 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-15 01:00:45,770 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:00:45,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:00:45,770 INFO L85 PathProgramCache]: Analyzing trace with hash 660626, now seen corresponding path program 7 times [2022-04-15 01:00:45,770 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:00:45,770 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1652716259] [2022-04-15 01:00:45,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:45,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:00:45,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:45,877 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:00:45,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:45,886 INFO L290 TraceCheckUtils]: 0: Hoare triple {2916#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2905#true} is VALID [2022-04-15 01:00:45,886 INFO L290 TraceCheckUtils]: 1: Hoare triple {2905#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-15 01:00:45,886 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2905#true} {2905#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-15 01:00:45,887 INFO L272 TraceCheckUtils]: 0: Hoare triple {2905#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2916#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:00:45,887 INFO L290 TraceCheckUtils]: 1: Hoare triple {2916#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2905#true} is VALID [2022-04-15 01:00:45,888 INFO L290 TraceCheckUtils]: 2: Hoare triple {2905#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-15 01:00:45,888 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2905#true} {2905#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-15 01:00:45,888 INFO L272 TraceCheckUtils]: 4: Hoare triple {2905#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-15 01:00:45,888 INFO L290 TraceCheckUtils]: 5: Hoare triple {2905#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2905#true} is VALID [2022-04-15 01:00:45,888 INFO L290 TraceCheckUtils]: 6: Hoare triple {2905#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2905#true} is VALID [2022-04-15 01:00:45,888 INFO L290 TraceCheckUtils]: 7: Hoare triple {2905#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2905#true} is VALID [2022-04-15 01:00:45,888 INFO L290 TraceCheckUtils]: 8: Hoare triple {2905#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2905#true} is VALID [2022-04-15 01:00:45,889 INFO L290 TraceCheckUtils]: 9: Hoare triple {2905#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:45,889 INFO L290 TraceCheckUtils]: 10: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:45,890 INFO L290 TraceCheckUtils]: 11: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:45,890 INFO L290 TraceCheckUtils]: 12: Hoare triple {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:45,891 INFO L290 TraceCheckUtils]: 13: Hoare triple {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:45,891 INFO L290 TraceCheckUtils]: 14: Hoare triple {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:45,892 INFO L290 TraceCheckUtils]: 15: Hoare triple {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:45,893 INFO L290 TraceCheckUtils]: 16: Hoare triple {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:45,894 INFO L290 TraceCheckUtils]: 17: Hoare triple {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:45,894 INFO L290 TraceCheckUtils]: 18: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:45,895 INFO L272 TraceCheckUtils]: 19: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2914#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 01:00:45,895 INFO L290 TraceCheckUtils]: 20: Hoare triple {2914#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2915#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 01:00:45,895 INFO L290 TraceCheckUtils]: 21: Hoare triple {2915#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2906#false} is VALID [2022-04-15 01:00:45,895 INFO L290 TraceCheckUtils]: 22: Hoare triple {2906#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2906#false} is VALID [2022-04-15 01:00:45,896 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-15 01:00:45,896 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:00:45,896 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1652716259] [2022-04-15 01:00:45,896 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1652716259] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:00:45,896 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1066313443] [2022-04-15 01:00:45,896 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-15 01:00:45,896 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:45,896 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:00:45,897 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:00:45,926 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-15 01:00:45,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:45,948 INFO L263 TraceCheckSpWp]: Trace formula consists of 104 conjuncts, 22 conjunts are in the unsatisfiable core [2022-04-15 01:00:45,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:45,955 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:00:46,161 INFO L272 TraceCheckUtils]: 0: Hoare triple {2905#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-15 01:00:46,161 INFO L290 TraceCheckUtils]: 1: Hoare triple {2905#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2905#true} is VALID [2022-04-15 01:00:46,161 INFO L290 TraceCheckUtils]: 2: Hoare triple {2905#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-15 01:00:46,161 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2905#true} {2905#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-15 01:00:46,161 INFO L272 TraceCheckUtils]: 4: Hoare triple {2905#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-15 01:00:46,161 INFO L290 TraceCheckUtils]: 5: Hoare triple {2905#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2905#true} is VALID [2022-04-15 01:00:46,161 INFO L290 TraceCheckUtils]: 6: Hoare triple {2905#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2905#true} is VALID [2022-04-15 01:00:46,161 INFO L290 TraceCheckUtils]: 7: Hoare triple {2905#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2905#true} is VALID [2022-04-15 01:00:46,161 INFO L290 TraceCheckUtils]: 8: Hoare triple {2905#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2905#true} is VALID [2022-04-15 01:00:46,162 INFO L290 TraceCheckUtils]: 9: Hoare triple {2905#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:46,162 INFO L290 TraceCheckUtils]: 10: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:46,163 INFO L290 TraceCheckUtils]: 11: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:46,164 INFO L290 TraceCheckUtils]: 12: Hoare triple {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:46,164 INFO L290 TraceCheckUtils]: 13: Hoare triple {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:46,165 INFO L290 TraceCheckUtils]: 14: Hoare triple {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:46,165 INFO L290 TraceCheckUtils]: 15: Hoare triple {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:46,166 INFO L290 TraceCheckUtils]: 16: Hoare triple {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:46,167 INFO L290 TraceCheckUtils]: 17: Hoare triple {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:46,167 INFO L290 TraceCheckUtils]: 18: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:46,168 INFO L272 TraceCheckUtils]: 19: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2977#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:00:46,168 INFO L290 TraceCheckUtils]: 20: Hoare triple {2977#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2981#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:00:46,168 INFO L290 TraceCheckUtils]: 21: Hoare triple {2981#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2906#false} is VALID [2022-04-15 01:00:46,168 INFO L290 TraceCheckUtils]: 22: Hoare triple {2906#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2906#false} is VALID [2022-04-15 01:00:46,169 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-15 01:00:46,169 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:00:46,272 INFO L290 TraceCheckUtils]: 22: Hoare triple {2906#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2906#false} is VALID [2022-04-15 01:00:46,273 INFO L290 TraceCheckUtils]: 21: Hoare triple {2981#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2906#false} is VALID [2022-04-15 01:00:46,273 INFO L290 TraceCheckUtils]: 20: Hoare triple {2977#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2981#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:00:46,274 INFO L272 TraceCheckUtils]: 19: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2977#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:00:46,274 INFO L290 TraceCheckUtils]: 18: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:46,275 INFO L290 TraceCheckUtils]: 17: Hoare triple {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:46,275 INFO L290 TraceCheckUtils]: 16: Hoare triple {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:46,276 INFO L290 TraceCheckUtils]: 15: Hoare triple {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:46,277 INFO L290 TraceCheckUtils]: 14: Hoare triple {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:46,277 INFO L290 TraceCheckUtils]: 13: Hoare triple {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:46,278 INFO L290 TraceCheckUtils]: 12: Hoare triple {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:46,279 INFO L290 TraceCheckUtils]: 11: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:46,279 INFO L290 TraceCheckUtils]: 10: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:46,279 INFO L290 TraceCheckUtils]: 9: Hoare triple {2905#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:46,280 INFO L290 TraceCheckUtils]: 8: Hoare triple {2905#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2905#true} is VALID [2022-04-15 01:00:46,280 INFO L290 TraceCheckUtils]: 7: Hoare triple {2905#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2905#true} is VALID [2022-04-15 01:00:46,280 INFO L290 TraceCheckUtils]: 6: Hoare triple {2905#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2905#true} is VALID [2022-04-15 01:00:46,280 INFO L290 TraceCheckUtils]: 5: Hoare triple {2905#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2905#true} is VALID [2022-04-15 01:00:46,280 INFO L272 TraceCheckUtils]: 4: Hoare triple {2905#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-15 01:00:46,280 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2905#true} {2905#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-15 01:00:46,280 INFO L290 TraceCheckUtils]: 2: Hoare triple {2905#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-15 01:00:46,280 INFO L290 TraceCheckUtils]: 1: Hoare triple {2905#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2905#true} is VALID [2022-04-15 01:00:46,280 INFO L272 TraceCheckUtils]: 0: Hoare triple {2905#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-15 01:00:46,280 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-15 01:00:46,281 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1066313443] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:00:46,281 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:00:46,281 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 11 [2022-04-15 01:00:46,281 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1230810401] [2022-04-15 01:00:46,281 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:00:46,281 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-15 01:00:46,281 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:00:46,281 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 11 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:46,299 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:46,300 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-04-15 01:00:46,300 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:00:46,300 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-04-15 01:00:46,300 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2022-04-15 01:00:46,300 INFO L87 Difference]: Start difference. First operand 37 states and 42 transitions. Second operand has 11 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:46,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:46,664 INFO L93 Difference]: Finished difference Result 51 states and 57 transitions. [2022-04-15 01:00:46,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-15 01:00:46,664 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-15 01:00:46,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:00:46,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:46,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 31 transitions. [2022-04-15 01:00:46,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:46,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 31 transitions. [2022-04-15 01:00:46,666 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 31 transitions. [2022-04-15 01:00:46,692 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:46,693 INFO L225 Difference]: With dead ends: 51 [2022-04-15 01:00:46,693 INFO L226 Difference]: Without dead ends: 42 [2022-04-15 01:00:46,693 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 46 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2022-04-15 01:00:46,693 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 16 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 128 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 51 SdHoareTripleChecker+Invalid, 138 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 01:00:46,694 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [16 Valid, 51 Invalid, 138 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 128 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 01:00:46,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2022-04-15 01:00:46,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 39. [2022-04-15 01:00:46,762 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:00:46,762 INFO L82 GeneralOperation]: Start isEquivalent. First operand 42 states. Second operand has 39 states, 34 states have (on average 1.1764705882352942) internal successors, (40), 34 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:46,762 INFO L74 IsIncluded]: Start isIncluded. First operand 42 states. Second operand has 39 states, 34 states have (on average 1.1764705882352942) internal successors, (40), 34 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:46,763 INFO L87 Difference]: Start difference. First operand 42 states. Second operand has 39 states, 34 states have (on average 1.1764705882352942) internal successors, (40), 34 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:46,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:46,763 INFO L93 Difference]: Finished difference Result 42 states and 47 transitions. [2022-04-15 01:00:46,764 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 47 transitions. [2022-04-15 01:00:46,764 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:46,764 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:46,764 INFO L74 IsIncluded]: Start isIncluded. First operand has 39 states, 34 states have (on average 1.1764705882352942) internal successors, (40), 34 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 42 states. [2022-04-15 01:00:46,764 INFO L87 Difference]: Start difference. First operand has 39 states, 34 states have (on average 1.1764705882352942) internal successors, (40), 34 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 42 states. [2022-04-15 01:00:46,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:46,765 INFO L93 Difference]: Finished difference Result 42 states and 47 transitions. [2022-04-15 01:00:46,765 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 47 transitions. [2022-04-15 01:00:46,765 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:46,765 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:46,765 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:00:46,765 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:00:46,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 34 states have (on average 1.1764705882352942) internal successors, (40), 34 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:46,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 44 transitions. [2022-04-15 01:00:46,766 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 44 transitions. Word has length 23 [2022-04-15 01:00:46,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:00:46,766 INFO L478 AbstractCegarLoop]: Abstraction has 39 states and 44 transitions. [2022-04-15 01:00:46,766 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:46,766 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 44 transitions. [2022-04-15 01:00:46,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-15 01:00:46,766 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:00:46,766 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:00:46,784 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-15 01:00:46,975 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-15 01:00:46,976 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:00:46,976 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:00:46,976 INFO L85 PathProgramCache]: Analyzing trace with hash -1529937545, now seen corresponding path program 8 times [2022-04-15 01:00:46,976 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:00:46,976 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [955237348] [2022-04-15 01:00:46,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:46,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:00:46,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:47,086 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:00:47,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:47,091 INFO L290 TraceCheckUtils]: 0: Hoare triple {3304#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3290#true} is VALID [2022-04-15 01:00:47,091 INFO L290 TraceCheckUtils]: 1: Hoare triple {3290#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-15 01:00:47,091 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3290#true} {3290#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-15 01:00:47,092 INFO L272 TraceCheckUtils]: 0: Hoare triple {3290#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3304#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:00:47,092 INFO L290 TraceCheckUtils]: 1: Hoare triple {3304#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3290#true} is VALID [2022-04-15 01:00:47,092 INFO L290 TraceCheckUtils]: 2: Hoare triple {3290#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-15 01:00:47,092 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3290#true} {3290#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-15 01:00:47,092 INFO L272 TraceCheckUtils]: 4: Hoare triple {3290#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-15 01:00:47,092 INFO L290 TraceCheckUtils]: 5: Hoare triple {3290#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3295#(= main_~y~0 0)} is VALID [2022-04-15 01:00:47,093 INFO L290 TraceCheckUtils]: 6: Hoare triple {3295#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3296#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:47,094 INFO L290 TraceCheckUtils]: 7: Hoare triple {3296#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3297#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:47,094 INFO L290 TraceCheckUtils]: 8: Hoare triple {3297#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3298#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:00:47,095 INFO L290 TraceCheckUtils]: 9: Hoare triple {3298#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3299#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:00:47,095 INFO L290 TraceCheckUtils]: 10: Hoare triple {3299#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3299#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:00:47,096 INFO L290 TraceCheckUtils]: 11: Hoare triple {3299#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {3300#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:00:47,096 INFO L290 TraceCheckUtils]: 12: Hoare triple {3300#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3301#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:00:47,097 INFO L290 TraceCheckUtils]: 13: Hoare triple {3301#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3302#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:00:47,098 INFO L290 TraceCheckUtils]: 14: Hoare triple {3302#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3303#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-15 01:00:47,098 INFO L290 TraceCheckUtils]: 15: Hoare triple {3303#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-15 01:00:47,098 INFO L290 TraceCheckUtils]: 16: Hoare triple {3291#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3291#false} is VALID [2022-04-15 01:00:47,098 INFO L290 TraceCheckUtils]: 17: Hoare triple {3291#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3291#false} is VALID [2022-04-15 01:00:47,099 INFO L290 TraceCheckUtils]: 18: Hoare triple {3291#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3291#false} is VALID [2022-04-15 01:00:47,099 INFO L290 TraceCheckUtils]: 19: Hoare triple {3291#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3291#false} is VALID [2022-04-15 01:00:47,099 INFO L290 TraceCheckUtils]: 20: Hoare triple {3291#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-15 01:00:47,099 INFO L272 TraceCheckUtils]: 21: Hoare triple {3291#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {3291#false} is VALID [2022-04-15 01:00:47,099 INFO L290 TraceCheckUtils]: 22: Hoare triple {3291#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3291#false} is VALID [2022-04-15 01:00:47,099 INFO L290 TraceCheckUtils]: 23: Hoare triple {3291#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-15 01:00:47,099 INFO L290 TraceCheckUtils]: 24: Hoare triple {3291#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-15 01:00:47,100 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-15 01:00:47,100 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:00:47,100 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [955237348] [2022-04-15 01:00:47,100 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [955237348] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:00:47,100 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [180635365] [2022-04-15 01:00:47,100 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 01:00:47,100 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:47,100 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:00:47,103 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:00:47,120 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-15 01:00:47,155 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 01:00:47,156 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:00:47,156 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 26 conjunts are in the unsatisfiable core [2022-04-15 01:00:47,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:47,167 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:00:47,341 INFO L272 TraceCheckUtils]: 0: Hoare triple {3290#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-15 01:00:47,342 INFO L290 TraceCheckUtils]: 1: Hoare triple {3290#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3290#true} is VALID [2022-04-15 01:00:47,342 INFO L290 TraceCheckUtils]: 2: Hoare triple {3290#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-15 01:00:47,342 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3290#true} {3290#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-15 01:00:47,342 INFO L272 TraceCheckUtils]: 4: Hoare triple {3290#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-15 01:00:47,342 INFO L290 TraceCheckUtils]: 5: Hoare triple {3290#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3295#(= main_~y~0 0)} is VALID [2022-04-15 01:00:47,343 INFO L290 TraceCheckUtils]: 6: Hoare triple {3295#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3296#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:47,343 INFO L290 TraceCheckUtils]: 7: Hoare triple {3296#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3297#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:47,344 INFO L290 TraceCheckUtils]: 8: Hoare triple {3297#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3298#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:00:47,344 INFO L290 TraceCheckUtils]: 9: Hoare triple {3298#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3299#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:00:47,345 INFO L290 TraceCheckUtils]: 10: Hoare triple {3299#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3299#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:00:47,345 INFO L290 TraceCheckUtils]: 11: Hoare triple {3299#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {3341#(and (= main_~z~0 main_~y~0) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:00:47,346 INFO L290 TraceCheckUtils]: 12: Hoare triple {3341#(and (= main_~z~0 main_~y~0) (<= main_~y~0 4) (<= 4 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3345#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-15 01:00:47,346 INFO L290 TraceCheckUtils]: 13: Hoare triple {3345#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3349#(and (<= main_~y~0 4) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 4 main_~y~0))} is VALID [2022-04-15 01:00:47,347 INFO L290 TraceCheckUtils]: 14: Hoare triple {3349#(and (<= main_~y~0 4) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 4 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3353#(and (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:00:47,347 INFO L290 TraceCheckUtils]: 15: Hoare triple {3353#(and (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= main_~y~0 4) (<= 4 main_~y~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-15 01:00:47,347 INFO L290 TraceCheckUtils]: 16: Hoare triple {3291#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3291#false} is VALID [2022-04-15 01:00:47,348 INFO L290 TraceCheckUtils]: 17: Hoare triple {3291#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3291#false} is VALID [2022-04-15 01:00:47,348 INFO L290 TraceCheckUtils]: 18: Hoare triple {3291#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3291#false} is VALID [2022-04-15 01:00:47,348 INFO L290 TraceCheckUtils]: 19: Hoare triple {3291#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3291#false} is VALID [2022-04-15 01:00:47,348 INFO L290 TraceCheckUtils]: 20: Hoare triple {3291#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-15 01:00:47,348 INFO L272 TraceCheckUtils]: 21: Hoare triple {3291#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {3291#false} is VALID [2022-04-15 01:00:47,348 INFO L290 TraceCheckUtils]: 22: Hoare triple {3291#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3291#false} is VALID [2022-04-15 01:00:47,348 INFO L290 TraceCheckUtils]: 23: Hoare triple {3291#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-15 01:00:47,348 INFO L290 TraceCheckUtils]: 24: Hoare triple {3291#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-15 01:00:47,348 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-15 01:00:47,348 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:00:47,557 INFO L290 TraceCheckUtils]: 24: Hoare triple {3291#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-15 01:00:47,557 INFO L290 TraceCheckUtils]: 23: Hoare triple {3291#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-15 01:00:47,557 INFO L290 TraceCheckUtils]: 22: Hoare triple {3291#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3291#false} is VALID [2022-04-15 01:00:47,557 INFO L272 TraceCheckUtils]: 21: Hoare triple {3291#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {3291#false} is VALID [2022-04-15 01:00:47,558 INFO L290 TraceCheckUtils]: 20: Hoare triple {3291#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-15 01:00:47,564 INFO L290 TraceCheckUtils]: 19: Hoare triple {3399#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3291#false} is VALID [2022-04-15 01:00:47,566 INFO L290 TraceCheckUtils]: 18: Hoare triple {3403#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3399#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-15 01:00:47,566 INFO L290 TraceCheckUtils]: 17: Hoare triple {3407#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3403#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-15 01:00:47,567 INFO L290 TraceCheckUtils]: 16: Hoare triple {3411#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3407#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-15 01:00:47,567 INFO L290 TraceCheckUtils]: 15: Hoare triple {3415#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {3411#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-15 01:00:47,568 INFO L290 TraceCheckUtils]: 14: Hoare triple {3419#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3415#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} is VALID [2022-04-15 01:00:47,569 INFO L290 TraceCheckUtils]: 13: Hoare triple {3423#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3419#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-15 01:00:47,570 INFO L290 TraceCheckUtils]: 12: Hoare triple {3427#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3423#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} is VALID [2022-04-15 01:00:47,570 INFO L290 TraceCheckUtils]: 11: Hoare triple {3290#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {3427#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} is VALID [2022-04-15 01:00:47,570 INFO L290 TraceCheckUtils]: 10: Hoare triple {3290#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-15 01:00:47,570 INFO L290 TraceCheckUtils]: 9: Hoare triple {3290#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3290#true} is VALID [2022-04-15 01:00:47,570 INFO L290 TraceCheckUtils]: 8: Hoare triple {3290#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3290#true} is VALID [2022-04-15 01:00:47,570 INFO L290 TraceCheckUtils]: 7: Hoare triple {3290#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3290#true} is VALID [2022-04-15 01:00:47,570 INFO L290 TraceCheckUtils]: 6: Hoare triple {3290#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3290#true} is VALID [2022-04-15 01:00:47,570 INFO L290 TraceCheckUtils]: 5: Hoare triple {3290#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3290#true} is VALID [2022-04-15 01:00:47,571 INFO L272 TraceCheckUtils]: 4: Hoare triple {3290#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-15 01:00:47,571 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3290#true} {3290#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-15 01:00:47,571 INFO L290 TraceCheckUtils]: 2: Hoare triple {3290#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-15 01:00:47,571 INFO L290 TraceCheckUtils]: 1: Hoare triple {3290#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3290#true} is VALID [2022-04-15 01:00:47,571 INFO L272 TraceCheckUtils]: 0: Hoare triple {3290#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-15 01:00:47,571 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-15 01:00:47,571 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [180635365] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:00:47,571 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:00:47,571 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 10] total 24 [2022-04-15 01:00:47,571 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [183373228] [2022-04-15 01:00:47,572 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:00:47,572 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-15 01:00:47,572 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:00:47,572 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:47,600 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:47,601 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-04-15 01:00:47,601 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:00:47,601 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-04-15 01:00:47,601 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=95, Invalid=457, Unknown=0, NotChecked=0, Total=552 [2022-04-15 01:00:47,602 INFO L87 Difference]: Start difference. First operand 39 states and 44 transitions. Second operand has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:48,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:48,987 INFO L93 Difference]: Finished difference Result 69 states and 83 transitions. [2022-04-15 01:00:48,987 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-04-15 01:00:48,987 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-15 01:00:48,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:00:48,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:48,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 70 transitions. [2022-04-15 01:00:48,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:48,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 70 transitions. [2022-04-15 01:00:48,989 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 28 states and 70 transitions. [2022-04-15 01:00:49,054 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 70 edges. 70 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:49,055 INFO L225 Difference]: With dead ends: 69 [2022-04-15 01:00:49,055 INFO L226 Difference]: Without dead ends: 55 [2022-04-15 01:00:49,056 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 44 SyntacticMatches, 1 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 468 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=347, Invalid=2005, Unknown=0, NotChecked=0, Total=2352 [2022-04-15 01:00:49,056 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 38 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 318 mSolverCounterSat, 74 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 38 SdHoareTripleChecker+Valid, 65 SdHoareTripleChecker+Invalid, 392 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 74 IncrementalHoareTripleChecker+Valid, 318 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-15 01:00:49,057 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [38 Valid, 65 Invalid, 392 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [74 Valid, 318 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-15 01:00:49,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2022-04-15 01:00:49,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 50. [2022-04-15 01:00:49,173 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:00:49,174 INFO L82 GeneralOperation]: Start isEquivalent. First operand 55 states. Second operand has 50 states, 45 states have (on average 1.1777777777777778) internal successors, (53), 45 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:49,174 INFO L74 IsIncluded]: Start isIncluded. First operand 55 states. Second operand has 50 states, 45 states have (on average 1.1777777777777778) internal successors, (53), 45 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:49,174 INFO L87 Difference]: Start difference. First operand 55 states. Second operand has 50 states, 45 states have (on average 1.1777777777777778) internal successors, (53), 45 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:49,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:49,175 INFO L93 Difference]: Finished difference Result 55 states and 62 transitions. [2022-04-15 01:00:49,175 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 62 transitions. [2022-04-15 01:00:49,175 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:49,175 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:49,175 INFO L74 IsIncluded]: Start isIncluded. First operand has 50 states, 45 states have (on average 1.1777777777777778) internal successors, (53), 45 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 55 states. [2022-04-15 01:00:49,176 INFO L87 Difference]: Start difference. First operand has 50 states, 45 states have (on average 1.1777777777777778) internal successors, (53), 45 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 55 states. [2022-04-15 01:00:49,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:49,176 INFO L93 Difference]: Finished difference Result 55 states and 62 transitions. [2022-04-15 01:00:49,176 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 62 transitions. [2022-04-15 01:00:49,177 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:49,177 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:49,177 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:00:49,177 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:00:49,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 45 states have (on average 1.1777777777777778) internal successors, (53), 45 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:49,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 57 transitions. [2022-04-15 01:00:49,178 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 57 transitions. Word has length 25 [2022-04-15 01:00:49,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:00:49,178 INFO L478 AbstractCegarLoop]: Abstraction has 50 states and 57 transitions. [2022-04-15 01:00:49,178 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:49,178 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 57 transitions. [2022-04-15 01:00:49,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-15 01:00:49,178 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:00:49,178 INFO L499 BasicCegarLoop]: trace histogram [6, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:00:49,201 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-15 01:00:49,387 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-15 01:00:49,388 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:00:49,388 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:00:49,388 INFO L85 PathProgramCache]: Analyzing trace with hash -575953218, now seen corresponding path program 9 times [2022-04-15 01:00:49,388 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:00:49,388 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1904483330] [2022-04-15 01:00:49,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:49,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:00:49,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:49,510 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:00:49,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:49,515 INFO L290 TraceCheckUtils]: 0: Hoare triple {3832#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3819#true} is VALID [2022-04-15 01:00:49,515 INFO L290 TraceCheckUtils]: 1: Hoare triple {3819#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-15 01:00:49,515 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3819#true} {3819#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-15 01:00:49,515 INFO L272 TraceCheckUtils]: 0: Hoare triple {3819#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3832#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:00:49,516 INFO L290 TraceCheckUtils]: 1: Hoare triple {3832#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3819#true} is VALID [2022-04-15 01:00:49,516 INFO L290 TraceCheckUtils]: 2: Hoare triple {3819#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-15 01:00:49,516 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3819#true} {3819#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-15 01:00:49,516 INFO L272 TraceCheckUtils]: 4: Hoare triple {3819#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-15 01:00:49,516 INFO L290 TraceCheckUtils]: 5: Hoare triple {3819#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3824#(= main_~y~0 0)} is VALID [2022-04-15 01:00:49,517 INFO L290 TraceCheckUtils]: 6: Hoare triple {3824#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3825#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:49,517 INFO L290 TraceCheckUtils]: 7: Hoare triple {3825#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3826#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:49,518 INFO L290 TraceCheckUtils]: 8: Hoare triple {3826#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3827#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:00:49,518 INFO L290 TraceCheckUtils]: 9: Hoare triple {3827#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3827#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:00:49,518 INFO L290 TraceCheckUtils]: 10: Hoare triple {3827#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {3828#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:00:49,519 INFO L290 TraceCheckUtils]: 11: Hoare triple {3828#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3829#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:00:49,529 INFO L290 TraceCheckUtils]: 12: Hoare triple {3829#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3830#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 01:00:49,529 INFO L290 TraceCheckUtils]: 13: Hoare triple {3830#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3831#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 01:00:49,530 INFO L290 TraceCheckUtils]: 14: Hoare triple {3831#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3820#false} is VALID [2022-04-15 01:00:49,530 INFO L290 TraceCheckUtils]: 15: Hoare triple {3820#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3820#false} is VALID [2022-04-15 01:00:49,530 INFO L290 TraceCheckUtils]: 16: Hoare triple {3820#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3820#false} is VALID [2022-04-15 01:00:49,530 INFO L290 TraceCheckUtils]: 17: Hoare triple {3820#false} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-15 01:00:49,530 INFO L290 TraceCheckUtils]: 18: Hoare triple {3820#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3820#false} is VALID [2022-04-15 01:00:49,530 INFO L290 TraceCheckUtils]: 19: Hoare triple {3820#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3820#false} is VALID [2022-04-15 01:00:49,530 INFO L290 TraceCheckUtils]: 20: Hoare triple {3820#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3820#false} is VALID [2022-04-15 01:00:49,531 INFO L290 TraceCheckUtils]: 21: Hoare triple {3820#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-15 01:00:49,531 INFO L272 TraceCheckUtils]: 22: Hoare triple {3820#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {3820#false} is VALID [2022-04-15 01:00:49,531 INFO L290 TraceCheckUtils]: 23: Hoare triple {3820#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3820#false} is VALID [2022-04-15 01:00:49,531 INFO L290 TraceCheckUtils]: 24: Hoare triple {3820#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-15 01:00:49,531 INFO L290 TraceCheckUtils]: 25: Hoare triple {3820#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-15 01:00:49,531 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-15 01:00:49,531 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:00:49,531 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1904483330] [2022-04-15 01:00:49,531 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1904483330] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:00:49,531 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [196453381] [2022-04-15 01:00:49,532 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-15 01:00:49,532 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:49,532 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:00:49,535 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:00:49,536 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-15 01:00:49,584 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2022-04-15 01:00:49,584 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:00:49,585 INFO L263 TraceCheckSpWp]: Trace formula consists of 119 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-15 01:00:49,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:49,598 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:00:49,777 INFO L272 TraceCheckUtils]: 0: Hoare triple {3819#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-15 01:00:49,777 INFO L290 TraceCheckUtils]: 1: Hoare triple {3819#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3819#true} is VALID [2022-04-15 01:00:49,777 INFO L290 TraceCheckUtils]: 2: Hoare triple {3819#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-15 01:00:49,777 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3819#true} {3819#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-15 01:00:49,777 INFO L272 TraceCheckUtils]: 4: Hoare triple {3819#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-15 01:00:49,778 INFO L290 TraceCheckUtils]: 5: Hoare triple {3819#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3824#(= main_~y~0 0)} is VALID [2022-04-15 01:00:49,778 INFO L290 TraceCheckUtils]: 6: Hoare triple {3824#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3825#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:49,779 INFO L290 TraceCheckUtils]: 7: Hoare triple {3825#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3826#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:49,779 INFO L290 TraceCheckUtils]: 8: Hoare triple {3826#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3827#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:00:49,780 INFO L290 TraceCheckUtils]: 9: Hoare triple {3827#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3827#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:00:49,780 INFO L290 TraceCheckUtils]: 10: Hoare triple {3827#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {3866#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:00:49,780 INFO L290 TraceCheckUtils]: 11: Hoare triple {3866#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3870#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-15 01:00:49,781 INFO L290 TraceCheckUtils]: 12: Hoare triple {3870#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3874#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:00:49,782 INFO L290 TraceCheckUtils]: 13: Hoare triple {3874#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 3) (<= 3 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3878#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 3)))} is VALID [2022-04-15 01:00:49,782 INFO L290 TraceCheckUtils]: 14: Hoare triple {3878#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 3)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3820#false} is VALID [2022-04-15 01:00:49,782 INFO L290 TraceCheckUtils]: 15: Hoare triple {3820#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3820#false} is VALID [2022-04-15 01:00:49,782 INFO L290 TraceCheckUtils]: 16: Hoare triple {3820#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3820#false} is VALID [2022-04-15 01:00:49,782 INFO L290 TraceCheckUtils]: 17: Hoare triple {3820#false} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-15 01:00:49,782 INFO L290 TraceCheckUtils]: 18: Hoare triple {3820#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3820#false} is VALID [2022-04-15 01:00:49,782 INFO L290 TraceCheckUtils]: 19: Hoare triple {3820#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3820#false} is VALID [2022-04-15 01:00:49,783 INFO L290 TraceCheckUtils]: 20: Hoare triple {3820#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3820#false} is VALID [2022-04-15 01:00:49,783 INFO L290 TraceCheckUtils]: 21: Hoare triple {3820#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-15 01:00:49,783 INFO L272 TraceCheckUtils]: 22: Hoare triple {3820#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {3820#false} is VALID [2022-04-15 01:00:49,783 INFO L290 TraceCheckUtils]: 23: Hoare triple {3820#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3820#false} is VALID [2022-04-15 01:00:49,783 INFO L290 TraceCheckUtils]: 24: Hoare triple {3820#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-15 01:00:49,783 INFO L290 TraceCheckUtils]: 25: Hoare triple {3820#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-15 01:00:49,783 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-15 01:00:49,783 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:00:50,003 INFO L290 TraceCheckUtils]: 25: Hoare triple {3820#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-15 01:00:50,003 INFO L290 TraceCheckUtils]: 24: Hoare triple {3820#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-15 01:00:50,004 INFO L290 TraceCheckUtils]: 23: Hoare triple {3820#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3820#false} is VALID [2022-04-15 01:00:50,004 INFO L272 TraceCheckUtils]: 22: Hoare triple {3820#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {3820#false} is VALID [2022-04-15 01:00:50,004 INFO L290 TraceCheckUtils]: 21: Hoare triple {3927#(< 0 (mod main_~y~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-15 01:00:50,020 INFO L290 TraceCheckUtils]: 20: Hoare triple {3931#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3927#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:00:50,021 INFO L290 TraceCheckUtils]: 19: Hoare triple {3935#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3931#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:00:50,021 INFO L290 TraceCheckUtils]: 18: Hoare triple {3939#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3935#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 01:00:50,022 INFO L290 TraceCheckUtils]: 17: Hoare triple {3939#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {3939#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 01:00:50,022 INFO L290 TraceCheckUtils]: 16: Hoare triple {3939#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3939#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 01:00:50,022 INFO L290 TraceCheckUtils]: 15: Hoare triple {3939#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3939#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 01:00:50,023 INFO L290 TraceCheckUtils]: 14: Hoare triple {3952#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3939#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 01:00:50,024 INFO L290 TraceCheckUtils]: 13: Hoare triple {3956#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3952#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-15 01:00:50,025 INFO L290 TraceCheckUtils]: 12: Hoare triple {3960#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3956#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-15 01:00:50,025 INFO L290 TraceCheckUtils]: 11: Hoare triple {3964#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3960#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-15 01:00:50,026 INFO L290 TraceCheckUtils]: 10: Hoare triple {3819#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {3964#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-15 01:00:50,026 INFO L290 TraceCheckUtils]: 9: Hoare triple {3819#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-15 01:00:50,026 INFO L290 TraceCheckUtils]: 8: Hoare triple {3819#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3819#true} is VALID [2022-04-15 01:00:50,026 INFO L290 TraceCheckUtils]: 7: Hoare triple {3819#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3819#true} is VALID [2022-04-15 01:00:50,026 INFO L290 TraceCheckUtils]: 6: Hoare triple {3819#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3819#true} is VALID [2022-04-15 01:00:50,026 INFO L290 TraceCheckUtils]: 5: Hoare triple {3819#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3819#true} is VALID [2022-04-15 01:00:50,026 INFO L272 TraceCheckUtils]: 4: Hoare triple {3819#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-15 01:00:50,026 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3819#true} {3819#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-15 01:00:50,027 INFO L290 TraceCheckUtils]: 2: Hoare triple {3819#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-15 01:00:50,027 INFO L290 TraceCheckUtils]: 1: Hoare triple {3819#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3819#true} is VALID [2022-04-15 01:00:50,027 INFO L272 TraceCheckUtils]: 0: Hoare triple {3819#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-15 01:00:50,028 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-15 01:00:50,028 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [196453381] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:00:50,028 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:00:50,028 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 23 [2022-04-15 01:00:50,028 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1441392241] [2022-04-15 01:00:50,028 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:00:50,029 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.6956521739130435) internal successors, (39), 22 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-15 01:00:50,029 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:00:50,029 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 23 states have (on average 1.6956521739130435) internal successors, (39), 22 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:50,059 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:50,059 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-15 01:00:50,060 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:00:50,060 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-15 01:00:50,060 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=407, Unknown=0, NotChecked=0, Total=506 [2022-04-15 01:00:50,060 INFO L87 Difference]: Start difference. First operand 50 states and 57 transitions. Second operand has 23 states, 23 states have (on average 1.6956521739130435) internal successors, (39), 22 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:51,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:51,178 INFO L93 Difference]: Finished difference Result 85 states and 97 transitions. [2022-04-15 01:00:51,178 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-04-15 01:00:51,178 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.6956521739130435) internal successors, (39), 22 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-15 01:00:51,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:00:51,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.6956521739130435) internal successors, (39), 22 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:51,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 68 transitions. [2022-04-15 01:00:51,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.6956521739130435) internal successors, (39), 22 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:51,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 68 transitions. [2022-04-15 01:00:51,180 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 25 states and 68 transitions. [2022-04-15 01:00:51,273 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:51,282 INFO L225 Difference]: With dead ends: 85 [2022-04-15 01:00:51,282 INFO L226 Difference]: Without dead ends: 68 [2022-04-15 01:00:51,283 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 45 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 413 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=366, Invalid=1614, Unknown=0, NotChecked=0, Total=1980 [2022-04-15 01:00:51,283 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 109 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 152 mSolverCounterSat, 88 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 109 SdHoareTripleChecker+Valid, 52 SdHoareTripleChecker+Invalid, 240 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 88 IncrementalHoareTripleChecker+Valid, 152 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 01:00:51,283 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [109 Valid, 52 Invalid, 240 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [88 Valid, 152 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-15 01:00:51,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2022-04-15 01:00:51,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 43. [2022-04-15 01:00:51,373 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:00:51,374 INFO L82 GeneralOperation]: Start isEquivalent. First operand 68 states. Second operand has 43 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 38 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:51,374 INFO L74 IsIncluded]: Start isIncluded. First operand 68 states. Second operand has 43 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 38 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:51,374 INFO L87 Difference]: Start difference. First operand 68 states. Second operand has 43 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 38 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:51,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:51,375 INFO L93 Difference]: Finished difference Result 68 states and 78 transitions. [2022-04-15 01:00:51,375 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 78 transitions. [2022-04-15 01:00:51,375 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:51,375 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:51,375 INFO L74 IsIncluded]: Start isIncluded. First operand has 43 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 38 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 68 states. [2022-04-15 01:00:51,375 INFO L87 Difference]: Start difference. First operand has 43 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 38 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 68 states. [2022-04-15 01:00:51,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:51,376 INFO L93 Difference]: Finished difference Result 68 states and 78 transitions. [2022-04-15 01:00:51,376 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 78 transitions. [2022-04-15 01:00:51,376 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:51,376 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:51,377 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:00:51,377 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:00:51,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 38 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:51,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 48 transitions. [2022-04-15 01:00:51,377 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 48 transitions. Word has length 26 [2022-04-15 01:00:51,377 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:00:51,377 INFO L478 AbstractCegarLoop]: Abstraction has 43 states and 48 transitions. [2022-04-15 01:00:51,378 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 1.6956521739130435) internal successors, (39), 22 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:51,378 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 48 transitions. [2022-04-15 01:00:51,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-15 01:00:51,378 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:00:51,378 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:00:51,395 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-15 01:00:51,589 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-15 01:00:51,590 INFO L403 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:00:51,590 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:00:51,590 INFO L85 PathProgramCache]: Analyzing trace with hash -1167600349, now seen corresponding path program 10 times [2022-04-15 01:00:51,590 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:00:51,592 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [793034863] [2022-04-15 01:00:51,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:51,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:00:51,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:51,732 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:00:51,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:51,736 INFO L290 TraceCheckUtils]: 0: Hoare triple {4402#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4390#true} is VALID [2022-04-15 01:00:51,737 INFO L290 TraceCheckUtils]: 1: Hoare triple {4390#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-15 01:00:51,737 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4390#true} {4390#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-15 01:00:51,737 INFO L272 TraceCheckUtils]: 0: Hoare triple {4390#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4402#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:00:51,737 INFO L290 TraceCheckUtils]: 1: Hoare triple {4402#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4390#true} is VALID [2022-04-15 01:00:51,737 INFO L290 TraceCheckUtils]: 2: Hoare triple {4390#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-15 01:00:51,737 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4390#true} {4390#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-15 01:00:51,737 INFO L272 TraceCheckUtils]: 4: Hoare triple {4390#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-15 01:00:51,738 INFO L290 TraceCheckUtils]: 5: Hoare triple {4390#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4390#true} is VALID [2022-04-15 01:00:51,738 INFO L290 TraceCheckUtils]: 6: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-15 01:00:51,738 INFO L290 TraceCheckUtils]: 7: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-15 01:00:51,738 INFO L290 TraceCheckUtils]: 8: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-15 01:00:51,738 INFO L290 TraceCheckUtils]: 9: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-15 01:00:51,738 INFO L290 TraceCheckUtils]: 10: Hoare triple {4390#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:51,739 INFO L290 TraceCheckUtils]: 11: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:51,739 INFO L290 TraceCheckUtils]: 12: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:51,740 INFO L290 TraceCheckUtils]: 13: Hoare triple {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:51,741 INFO L290 TraceCheckUtils]: 14: Hoare triple {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:51,741 INFO L290 TraceCheckUtils]: 15: Hoare triple {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:51,742 INFO L290 TraceCheckUtils]: 16: Hoare triple {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:51,742 INFO L290 TraceCheckUtils]: 17: Hoare triple {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:51,743 INFO L290 TraceCheckUtils]: 18: Hoare triple {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:51,744 INFO L290 TraceCheckUtils]: 19: Hoare triple {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:51,744 INFO L290 TraceCheckUtils]: 20: Hoare triple {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:51,745 INFO L290 TraceCheckUtils]: 21: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:51,745 INFO L272 TraceCheckUtils]: 22: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {4400#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 01:00:51,746 INFO L290 TraceCheckUtils]: 23: Hoare triple {4400#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4401#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 01:00:51,746 INFO L290 TraceCheckUtils]: 24: Hoare triple {4401#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4391#false} is VALID [2022-04-15 01:00:51,746 INFO L290 TraceCheckUtils]: 25: Hoare triple {4391#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#false} is VALID [2022-04-15 01:00:51,746 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-15 01:00:51,746 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:00:51,746 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [793034863] [2022-04-15 01:00:51,746 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [793034863] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:00:51,746 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1238880725] [2022-04-15 01:00:51,746 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 01:00:51,747 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:51,747 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:00:51,747 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:00:51,748 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-15 01:00:51,783 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 01:00:51,784 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:00:51,784 INFO L263 TraceCheckSpWp]: Trace formula consists of 119 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-15 01:00:51,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:51,793 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:00:52,014 INFO L272 TraceCheckUtils]: 0: Hoare triple {4390#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-15 01:00:52,014 INFO L290 TraceCheckUtils]: 1: Hoare triple {4390#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4390#true} is VALID [2022-04-15 01:00:52,014 INFO L290 TraceCheckUtils]: 2: Hoare triple {4390#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-15 01:00:52,014 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4390#true} {4390#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-15 01:00:52,014 INFO L272 TraceCheckUtils]: 4: Hoare triple {4390#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-15 01:00:52,014 INFO L290 TraceCheckUtils]: 5: Hoare triple {4390#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4390#true} is VALID [2022-04-15 01:00:52,014 INFO L290 TraceCheckUtils]: 6: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-15 01:00:52,014 INFO L290 TraceCheckUtils]: 7: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-15 01:00:52,014 INFO L290 TraceCheckUtils]: 8: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-15 01:00:52,014 INFO L290 TraceCheckUtils]: 9: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-15 01:00:52,018 INFO L290 TraceCheckUtils]: 10: Hoare triple {4390#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:52,018 INFO L290 TraceCheckUtils]: 11: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:52,019 INFO L290 TraceCheckUtils]: 12: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:52,020 INFO L290 TraceCheckUtils]: 13: Hoare triple {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:52,021 INFO L290 TraceCheckUtils]: 14: Hoare triple {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:52,021 INFO L290 TraceCheckUtils]: 15: Hoare triple {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:52,022 INFO L290 TraceCheckUtils]: 16: Hoare triple {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:52,023 INFO L290 TraceCheckUtils]: 17: Hoare triple {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:52,023 INFO L290 TraceCheckUtils]: 18: Hoare triple {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:52,024 INFO L290 TraceCheckUtils]: 19: Hoare triple {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:52,025 INFO L290 TraceCheckUtils]: 20: Hoare triple {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:52,025 INFO L290 TraceCheckUtils]: 21: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:52,026 INFO L272 TraceCheckUtils]: 22: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {4472#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:00:52,026 INFO L290 TraceCheckUtils]: 23: Hoare triple {4472#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4476#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:00:52,027 INFO L290 TraceCheckUtils]: 24: Hoare triple {4476#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4391#false} is VALID [2022-04-15 01:00:52,027 INFO L290 TraceCheckUtils]: 25: Hoare triple {4391#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#false} is VALID [2022-04-15 01:00:52,027 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-15 01:00:52,027 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:00:52,271 INFO L290 TraceCheckUtils]: 25: Hoare triple {4391#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#false} is VALID [2022-04-15 01:00:52,272 INFO L290 TraceCheckUtils]: 24: Hoare triple {4476#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4391#false} is VALID [2022-04-15 01:00:52,272 INFO L290 TraceCheckUtils]: 23: Hoare triple {4472#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4476#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:00:52,273 INFO L272 TraceCheckUtils]: 22: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {4472#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:00:52,273 INFO L290 TraceCheckUtils]: 21: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:52,275 INFO L290 TraceCheckUtils]: 20: Hoare triple {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:52,276 INFO L290 TraceCheckUtils]: 19: Hoare triple {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:52,276 INFO L290 TraceCheckUtils]: 18: Hoare triple {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:52,277 INFO L290 TraceCheckUtils]: 17: Hoare triple {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:52,277 INFO L290 TraceCheckUtils]: 16: Hoare triple {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:52,278 INFO L290 TraceCheckUtils]: 15: Hoare triple {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:52,279 INFO L290 TraceCheckUtils]: 14: Hoare triple {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:52,280 INFO L290 TraceCheckUtils]: 13: Hoare triple {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:52,280 INFO L290 TraceCheckUtils]: 12: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:52,281 INFO L290 TraceCheckUtils]: 11: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:52,281 INFO L290 TraceCheckUtils]: 10: Hoare triple {4390#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:52,281 INFO L290 TraceCheckUtils]: 9: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-15 01:00:52,281 INFO L290 TraceCheckUtils]: 8: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-15 01:00:52,281 INFO L290 TraceCheckUtils]: 7: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-15 01:00:52,281 INFO L290 TraceCheckUtils]: 6: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-15 01:00:52,281 INFO L290 TraceCheckUtils]: 5: Hoare triple {4390#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4390#true} is VALID [2022-04-15 01:00:52,282 INFO L272 TraceCheckUtils]: 4: Hoare triple {4390#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-15 01:00:52,282 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4390#true} {4390#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-15 01:00:52,282 INFO L290 TraceCheckUtils]: 2: Hoare triple {4390#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-15 01:00:52,282 INFO L290 TraceCheckUtils]: 1: Hoare triple {4390#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4390#true} is VALID [2022-04-15 01:00:52,282 INFO L272 TraceCheckUtils]: 0: Hoare triple {4390#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-15 01:00:52,282 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-15 01:00:52,282 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1238880725] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:00:52,282 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:00:52,282 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9] total 12 [2022-04-15 01:00:52,284 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1605926914] [2022-04-15 01:00:52,284 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:00:52,284 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-15 01:00:52,285 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:00:52,286 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:52,308 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:52,308 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-15 01:00:52,308 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:00:52,309 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-15 01:00:52,309 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2022-04-15 01:00:52,309 INFO L87 Difference]: Start difference. First operand 43 states and 48 transitions. Second operand has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:52,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:52,812 INFO L93 Difference]: Finished difference Result 59 states and 65 transitions. [2022-04-15 01:00:52,812 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-15 01:00:52,812 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-15 01:00:52,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:00:52,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:52,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 33 transitions. [2022-04-15 01:00:52,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:52,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 33 transitions. [2022-04-15 01:00:52,814 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 33 transitions. [2022-04-15 01:00:52,840 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:52,842 INFO L225 Difference]: With dead ends: 59 [2022-04-15 01:00:52,842 INFO L226 Difference]: Without dead ends: 49 [2022-04-15 01:00:52,843 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 53 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=286, Unknown=0, NotChecked=0, Total=342 [2022-04-15 01:00:52,844 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 15 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 182 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 61 SdHoareTripleChecker+Invalid, 193 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 182 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 01:00:52,846 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [15 Valid, 61 Invalid, 193 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 182 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-15 01:00:52,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2022-04-15 01:00:52,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 45. [2022-04-15 01:00:52,933 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:00:52,934 INFO L82 GeneralOperation]: Start isEquivalent. First operand 49 states. Second operand has 45 states, 40 states have (on average 1.15) internal successors, (46), 40 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:52,934 INFO L74 IsIncluded]: Start isIncluded. First operand 49 states. Second operand has 45 states, 40 states have (on average 1.15) internal successors, (46), 40 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:52,934 INFO L87 Difference]: Start difference. First operand 49 states. Second operand has 45 states, 40 states have (on average 1.15) internal successors, (46), 40 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:52,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:52,935 INFO L93 Difference]: Finished difference Result 49 states and 54 transitions. [2022-04-15 01:00:52,935 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 54 transitions. [2022-04-15 01:00:52,935 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:52,935 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:52,935 INFO L74 IsIncluded]: Start isIncluded. First operand has 45 states, 40 states have (on average 1.15) internal successors, (46), 40 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-15 01:00:52,936 INFO L87 Difference]: Start difference. First operand has 45 states, 40 states have (on average 1.15) internal successors, (46), 40 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-15 01:00:52,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:52,937 INFO L93 Difference]: Finished difference Result 49 states and 54 transitions. [2022-04-15 01:00:52,937 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 54 transitions. [2022-04-15 01:00:52,937 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:52,937 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:52,937 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:00:52,937 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:00:52,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 40 states have (on average 1.15) internal successors, (46), 40 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:52,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 50 transitions. [2022-04-15 01:00:52,938 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 50 transitions. Word has length 26 [2022-04-15 01:00:52,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:00:52,938 INFO L478 AbstractCegarLoop]: Abstraction has 45 states and 50 transitions. [2022-04-15 01:00:52,939 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:52,939 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 50 transitions. [2022-04-15 01:00:52,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-15 01:00:52,940 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:00:52,940 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:00:52,956 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-15 01:00:53,147 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-04-15 01:00:53,147 INFO L403 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:00:53,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:00:53,148 INFO L85 PathProgramCache]: Analyzing trace with hash 627420638, now seen corresponding path program 11 times [2022-04-15 01:00:53,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:00:53,148 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1407017491] [2022-04-15 01:00:53,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:53,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:00:53,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:53,282 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:00:53,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:53,293 INFO L290 TraceCheckUtils]: 0: Hoare triple {4848#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4832#true} is VALID [2022-04-15 01:00:53,293 INFO L290 TraceCheckUtils]: 1: Hoare triple {4832#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-15 01:00:53,293 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4832#true} {4832#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-15 01:00:53,293 INFO L272 TraceCheckUtils]: 0: Hoare triple {4832#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4848#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:00:53,293 INFO L290 TraceCheckUtils]: 1: Hoare triple {4848#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4832#true} is VALID [2022-04-15 01:00:53,294 INFO L290 TraceCheckUtils]: 2: Hoare triple {4832#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-15 01:00:53,294 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4832#true} {4832#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-15 01:00:53,294 INFO L272 TraceCheckUtils]: 4: Hoare triple {4832#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-15 01:00:53,294 INFO L290 TraceCheckUtils]: 5: Hoare triple {4832#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4837#(= main_~y~0 0)} is VALID [2022-04-15 01:00:53,294 INFO L290 TraceCheckUtils]: 6: Hoare triple {4837#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4838#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:53,295 INFO L290 TraceCheckUtils]: 7: Hoare triple {4838#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4839#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:53,296 INFO L290 TraceCheckUtils]: 8: Hoare triple {4839#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4840#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:00:53,296 INFO L290 TraceCheckUtils]: 9: Hoare triple {4840#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4841#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:00:53,297 INFO L290 TraceCheckUtils]: 10: Hoare triple {4841#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4842#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:00:53,297 INFO L290 TraceCheckUtils]: 11: Hoare triple {4842#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4842#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:00:53,297 INFO L290 TraceCheckUtils]: 12: Hoare triple {4842#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {4843#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:00:53,298 INFO L290 TraceCheckUtils]: 13: Hoare triple {4843#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4844#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:00:53,299 INFO L290 TraceCheckUtils]: 14: Hoare triple {4844#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4845#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:00:53,299 INFO L290 TraceCheckUtils]: 15: Hoare triple {4845#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4846#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:00:53,300 INFO L290 TraceCheckUtils]: 16: Hoare triple {4846#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4847#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-15 01:00:53,300 INFO L290 TraceCheckUtils]: 17: Hoare triple {4847#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-15 01:00:53,300 INFO L290 TraceCheckUtils]: 18: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-15 01:00:53,300 INFO L290 TraceCheckUtils]: 19: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-15 01:00:53,300 INFO L290 TraceCheckUtils]: 20: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-15 01:00:53,300 INFO L290 TraceCheckUtils]: 21: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-15 01:00:53,300 INFO L290 TraceCheckUtils]: 22: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-15 01:00:53,301 INFO L290 TraceCheckUtils]: 23: Hoare triple {4833#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-15 01:00:53,301 INFO L272 TraceCheckUtils]: 24: Hoare triple {4833#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {4833#false} is VALID [2022-04-15 01:00:53,301 INFO L290 TraceCheckUtils]: 25: Hoare triple {4833#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4833#false} is VALID [2022-04-15 01:00:53,301 INFO L290 TraceCheckUtils]: 26: Hoare triple {4833#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-15 01:00:53,301 INFO L290 TraceCheckUtils]: 27: Hoare triple {4833#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-15 01:00:53,301 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-15 01:00:53,301 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:00:53,301 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1407017491] [2022-04-15 01:00:53,301 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1407017491] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:00:53,301 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1523166688] [2022-04-15 01:00:53,302 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-15 01:00:53,302 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:53,302 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:00:53,303 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:00:53,303 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-15 01:00:53,403 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-15 01:00:53,403 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:00:53,404 INFO L263 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 32 conjunts are in the unsatisfiable core [2022-04-15 01:00:53,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:53,422 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:00:53,628 INFO L272 TraceCheckUtils]: 0: Hoare triple {4832#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-15 01:00:53,628 INFO L290 TraceCheckUtils]: 1: Hoare triple {4832#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4832#true} is VALID [2022-04-15 01:00:53,628 INFO L290 TraceCheckUtils]: 2: Hoare triple {4832#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-15 01:00:53,628 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4832#true} {4832#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-15 01:00:53,629 INFO L272 TraceCheckUtils]: 4: Hoare triple {4832#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-15 01:00:53,629 INFO L290 TraceCheckUtils]: 5: Hoare triple {4832#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4837#(= main_~y~0 0)} is VALID [2022-04-15 01:00:53,629 INFO L290 TraceCheckUtils]: 6: Hoare triple {4837#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4838#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:53,630 INFO L290 TraceCheckUtils]: 7: Hoare triple {4838#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4839#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:53,630 INFO L290 TraceCheckUtils]: 8: Hoare triple {4839#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4840#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:00:53,631 INFO L290 TraceCheckUtils]: 9: Hoare triple {4840#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4841#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:00:53,631 INFO L290 TraceCheckUtils]: 10: Hoare triple {4841#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4842#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:00:53,632 INFO L290 TraceCheckUtils]: 11: Hoare triple {4842#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4842#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:00:53,632 INFO L290 TraceCheckUtils]: 12: Hoare triple {4842#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {4888#(and (= main_~z~0 main_~y~0) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:00:53,633 INFO L290 TraceCheckUtils]: 13: Hoare triple {4888#(and (= main_~z~0 main_~y~0) (<= 5 main_~y~0) (<= main_~y~0 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4892#(and (<= 5 main_~y~0) (<= main_~y~0 5) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-15 01:00:53,633 INFO L290 TraceCheckUtils]: 14: Hoare triple {4892#(and (<= 5 main_~y~0) (<= main_~y~0 5) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4896#(and (<= 5 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-15 01:00:53,634 INFO L290 TraceCheckUtils]: 15: Hoare triple {4896#(and (<= 5 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= main_~y~0 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4900#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:00:53,635 INFO L290 TraceCheckUtils]: 16: Hoare triple {4900#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= 5 main_~y~0) (<= main_~y~0 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4904#(and (<= 5 main_~y~0) (= (+ (- 2) main_~y~0) (+ main_~z~0 2)) (<= main_~y~0 5))} is VALID [2022-04-15 01:00:53,635 INFO L290 TraceCheckUtils]: 17: Hoare triple {4904#(and (<= 5 main_~y~0) (= (+ (- 2) main_~y~0) (+ main_~z~0 2)) (<= main_~y~0 5))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-15 01:00:53,635 INFO L290 TraceCheckUtils]: 18: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-15 01:00:53,636 INFO L290 TraceCheckUtils]: 19: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-15 01:00:53,636 INFO L290 TraceCheckUtils]: 20: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-15 01:00:53,636 INFO L290 TraceCheckUtils]: 21: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-15 01:00:53,636 INFO L290 TraceCheckUtils]: 22: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-15 01:00:53,636 INFO L290 TraceCheckUtils]: 23: Hoare triple {4833#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-15 01:00:53,636 INFO L272 TraceCheckUtils]: 24: Hoare triple {4833#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {4833#false} is VALID [2022-04-15 01:00:53,636 INFO L290 TraceCheckUtils]: 25: Hoare triple {4833#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4833#false} is VALID [2022-04-15 01:00:53,636 INFO L290 TraceCheckUtils]: 26: Hoare triple {4833#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-15 01:00:53,636 INFO L290 TraceCheckUtils]: 27: Hoare triple {4833#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-15 01:00:53,637 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-15 01:00:53,637 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:00:53,976 INFO L290 TraceCheckUtils]: 27: Hoare triple {4833#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-15 01:00:53,977 INFO L290 TraceCheckUtils]: 26: Hoare triple {4833#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-15 01:00:53,977 INFO L290 TraceCheckUtils]: 25: Hoare triple {4833#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4833#false} is VALID [2022-04-15 01:00:53,977 INFO L272 TraceCheckUtils]: 24: Hoare triple {4833#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {4833#false} is VALID [2022-04-15 01:00:53,977 INFO L290 TraceCheckUtils]: 23: Hoare triple {4833#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-15 01:00:53,977 INFO L290 TraceCheckUtils]: 22: Hoare triple {4953#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-15 01:00:53,979 INFO L290 TraceCheckUtils]: 21: Hoare triple {4957#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4953#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-15 01:00:53,980 INFO L290 TraceCheckUtils]: 20: Hoare triple {4961#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4957#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-15 01:00:53,981 INFO L290 TraceCheckUtils]: 19: Hoare triple {4965#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4961#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-15 01:00:53,981 INFO L290 TraceCheckUtils]: 18: Hoare triple {4969#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4965#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-15 01:00:53,982 INFO L290 TraceCheckUtils]: 17: Hoare triple {4973#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {4969#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:00:53,983 INFO L290 TraceCheckUtils]: 16: Hoare triple {4977#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4973#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-15 01:00:53,984 INFO L290 TraceCheckUtils]: 15: Hoare triple {4981#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4977#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-15 01:00:53,985 INFO L290 TraceCheckUtils]: 14: Hoare triple {4985#(or (< 0 (mod (+ main_~z~0 4294967293) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4981#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-15 01:00:53,985 INFO L290 TraceCheckUtils]: 13: Hoare triple {4989#(or (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4985#(or (< 0 (mod (+ main_~z~0 4294967293) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-15 01:00:53,986 INFO L290 TraceCheckUtils]: 12: Hoare triple {4832#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {4989#(or (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-15 01:00:53,986 INFO L290 TraceCheckUtils]: 11: Hoare triple {4832#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-15 01:00:53,986 INFO L290 TraceCheckUtils]: 10: Hoare triple {4832#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4832#true} is VALID [2022-04-15 01:00:53,986 INFO L290 TraceCheckUtils]: 9: Hoare triple {4832#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4832#true} is VALID [2022-04-15 01:00:53,986 INFO L290 TraceCheckUtils]: 8: Hoare triple {4832#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4832#true} is VALID [2022-04-15 01:00:53,986 INFO L290 TraceCheckUtils]: 7: Hoare triple {4832#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4832#true} is VALID [2022-04-15 01:00:53,986 INFO L290 TraceCheckUtils]: 6: Hoare triple {4832#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4832#true} is VALID [2022-04-15 01:00:53,986 INFO L290 TraceCheckUtils]: 5: Hoare triple {4832#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4832#true} is VALID [2022-04-15 01:00:53,986 INFO L272 TraceCheckUtils]: 4: Hoare triple {4832#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-15 01:00:53,986 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4832#true} {4832#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-15 01:00:53,987 INFO L290 TraceCheckUtils]: 2: Hoare triple {4832#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-15 01:00:53,987 INFO L290 TraceCheckUtils]: 1: Hoare triple {4832#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4832#true} is VALID [2022-04-15 01:00:53,987 INFO L272 TraceCheckUtils]: 0: Hoare triple {4832#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-15 01:00:53,987 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-15 01:00:53,987 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1523166688] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:00:53,987 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:00:53,987 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 12] total 29 [2022-04-15 01:00:53,987 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [293081913] [2022-04-15 01:00:53,987 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:00:53,988 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-15 01:00:53,988 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:00:53,988 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:54,019 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:54,019 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-04-15 01:00:54,019 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:00:54,020 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-04-15 01:00:54,020 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=127, Invalid=685, Unknown=0, NotChecked=0, Total=812 [2022-04-15 01:00:54,020 INFO L87 Difference]: Start difference. First operand 45 states and 50 transitions. Second operand has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:56,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:56,147 INFO L93 Difference]: Finished difference Result 80 states and 95 transitions. [2022-04-15 01:00:56,147 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-04-15 01:00:56,147 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-15 01:00:56,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:00:56,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:56,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 78 transitions. [2022-04-15 01:00:56,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:56,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 78 transitions. [2022-04-15 01:00:56,149 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 34 states and 78 transitions. [2022-04-15 01:00:56,226 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:56,227 INFO L225 Difference]: With dead ends: 80 [2022-04-15 01:00:56,227 INFO L226 Difference]: Without dead ends: 64 [2022-04-15 01:00:56,228 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 48 SyntacticMatches, 1 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 731 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=473, Invalid=3067, Unknown=0, NotChecked=0, Total=3540 [2022-04-15 01:00:56,229 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 38 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 517 mSolverCounterSat, 83 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 38 SdHoareTripleChecker+Valid, 90 SdHoareTripleChecker+Invalid, 600 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 83 IncrementalHoareTripleChecker+Valid, 517 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-15 01:00:56,229 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [38 Valid, 90 Invalid, 600 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [83 Valid, 517 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-15 01:00:56,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2022-04-15 01:00:56,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 58. [2022-04-15 01:00:56,386 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:00:56,386 INFO L82 GeneralOperation]: Start isEquivalent. First operand 64 states. Second operand has 58 states, 53 states have (on average 1.150943396226415) internal successors, (61), 53 states have internal predecessors, (61), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:56,387 INFO L74 IsIncluded]: Start isIncluded. First operand 64 states. Second operand has 58 states, 53 states have (on average 1.150943396226415) internal successors, (61), 53 states have internal predecessors, (61), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:56,387 INFO L87 Difference]: Start difference. First operand 64 states. Second operand has 58 states, 53 states have (on average 1.150943396226415) internal successors, (61), 53 states have internal predecessors, (61), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:56,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:56,391 INFO L93 Difference]: Finished difference Result 64 states and 71 transitions. [2022-04-15 01:00:56,391 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 71 transitions. [2022-04-15 01:00:56,391 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:56,391 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:56,391 INFO L74 IsIncluded]: Start isIncluded. First operand has 58 states, 53 states have (on average 1.150943396226415) internal successors, (61), 53 states have internal predecessors, (61), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 64 states. [2022-04-15 01:00:56,392 INFO L87 Difference]: Start difference. First operand has 58 states, 53 states have (on average 1.150943396226415) internal successors, (61), 53 states have internal predecessors, (61), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 64 states. [2022-04-15 01:00:56,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:56,395 INFO L93 Difference]: Finished difference Result 64 states and 71 transitions. [2022-04-15 01:00:56,395 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 71 transitions. [2022-04-15 01:00:56,395 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:56,395 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:56,395 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:00:56,395 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:00:56,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 53 states have (on average 1.150943396226415) internal successors, (61), 53 states have internal predecessors, (61), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:56,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 65 transitions. [2022-04-15 01:00:56,396 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 65 transitions. Word has length 28 [2022-04-15 01:00:56,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:00:56,396 INFO L478 AbstractCegarLoop]: Abstraction has 58 states and 65 transitions. [2022-04-15 01:00:56,396 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:56,397 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 65 transitions. [2022-04-15 01:00:56,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-15 01:00:56,397 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:00:56,397 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:00:56,401 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2022-04-15 01:00:56,601 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-15 01:00:56,601 INFO L403 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:00:56,601 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:00:56,601 INFO L85 PathProgramCache]: Analyzing trace with hash 1023844786, now seen corresponding path program 12 times [2022-04-15 01:00:56,601 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:00:56,602 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [158201929] [2022-04-15 01:00:56,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:56,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:00:56,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:56,780 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:00:56,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:56,783 INFO L290 TraceCheckUtils]: 0: Hoare triple {5459#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5446#true} is VALID [2022-04-15 01:00:56,783 INFO L290 TraceCheckUtils]: 1: Hoare triple {5446#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-15 01:00:56,783 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5446#true} {5446#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-15 01:00:56,784 INFO L272 TraceCheckUtils]: 0: Hoare triple {5446#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5459#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:00:56,784 INFO L290 TraceCheckUtils]: 1: Hoare triple {5459#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5446#true} is VALID [2022-04-15 01:00:56,784 INFO L290 TraceCheckUtils]: 2: Hoare triple {5446#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-15 01:00:56,784 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5446#true} {5446#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-15 01:00:56,784 INFO L272 TraceCheckUtils]: 4: Hoare triple {5446#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-15 01:00:56,784 INFO L290 TraceCheckUtils]: 5: Hoare triple {5446#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5446#true} is VALID [2022-04-15 01:00:56,784 INFO L290 TraceCheckUtils]: 6: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-15 01:00:56,784 INFO L290 TraceCheckUtils]: 7: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-15 01:00:56,784 INFO L290 TraceCheckUtils]: 8: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-15 01:00:56,784 INFO L290 TraceCheckUtils]: 9: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-15 01:00:56,784 INFO L290 TraceCheckUtils]: 10: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-15 01:00:56,785 INFO L290 TraceCheckUtils]: 11: Hoare triple {5446#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:56,785 INFO L290 TraceCheckUtils]: 12: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:56,786 INFO L290 TraceCheckUtils]: 13: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:56,787 INFO L290 TraceCheckUtils]: 14: Hoare triple {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:56,787 INFO L290 TraceCheckUtils]: 15: Hoare triple {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:56,788 INFO L290 TraceCheckUtils]: 16: Hoare triple {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:56,789 INFO L290 TraceCheckUtils]: 17: Hoare triple {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:00:56,789 INFO L290 TraceCheckUtils]: 18: Hoare triple {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:00:56,790 INFO L290 TraceCheckUtils]: 19: Hoare triple {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:56,790 INFO L290 TraceCheckUtils]: 20: Hoare triple {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:56,791 INFO L290 TraceCheckUtils]: 21: Hoare triple {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:56,792 INFO L290 TraceCheckUtils]: 22: Hoare triple {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:56,793 INFO L290 TraceCheckUtils]: 23: Hoare triple {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:56,793 INFO L290 TraceCheckUtils]: 24: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:56,794 INFO L272 TraceCheckUtils]: 25: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {5457#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 01:00:56,794 INFO L290 TraceCheckUtils]: 26: Hoare triple {5457#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5458#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 01:00:56,794 INFO L290 TraceCheckUtils]: 27: Hoare triple {5458#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5447#false} is VALID [2022-04-15 01:00:56,794 INFO L290 TraceCheckUtils]: 28: Hoare triple {5447#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5447#false} is VALID [2022-04-15 01:00:56,794 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-15 01:00:56,795 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:00:56,795 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [158201929] [2022-04-15 01:00:56,795 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [158201929] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:00:56,795 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [664874404] [2022-04-15 01:00:56,795 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-15 01:00:56,795 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:56,795 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:00:56,796 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:00:56,797 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-15 01:00:56,836 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2022-04-15 01:00:56,836 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:00:56,837 INFO L263 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-15 01:00:56,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:56,845 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:00:57,051 INFO L272 TraceCheckUtils]: 0: Hoare triple {5446#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-15 01:00:57,051 INFO L290 TraceCheckUtils]: 1: Hoare triple {5446#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5446#true} is VALID [2022-04-15 01:00:57,052 INFO L290 TraceCheckUtils]: 2: Hoare triple {5446#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-15 01:00:57,052 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5446#true} {5446#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-15 01:00:57,052 INFO L272 TraceCheckUtils]: 4: Hoare triple {5446#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-15 01:00:57,052 INFO L290 TraceCheckUtils]: 5: Hoare triple {5446#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5446#true} is VALID [2022-04-15 01:00:57,052 INFO L290 TraceCheckUtils]: 6: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-15 01:00:57,052 INFO L290 TraceCheckUtils]: 7: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-15 01:00:57,052 INFO L290 TraceCheckUtils]: 8: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-15 01:00:57,052 INFO L290 TraceCheckUtils]: 9: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-15 01:00:57,052 INFO L290 TraceCheckUtils]: 10: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-15 01:00:57,054 INFO L290 TraceCheckUtils]: 11: Hoare triple {5446#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:57,054 INFO L290 TraceCheckUtils]: 12: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:57,055 INFO L290 TraceCheckUtils]: 13: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:57,056 INFO L290 TraceCheckUtils]: 14: Hoare triple {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:57,056 INFO L290 TraceCheckUtils]: 15: Hoare triple {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:57,057 INFO L290 TraceCheckUtils]: 16: Hoare triple {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:57,058 INFO L290 TraceCheckUtils]: 17: Hoare triple {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:00:57,058 INFO L290 TraceCheckUtils]: 18: Hoare triple {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:00:57,059 INFO L290 TraceCheckUtils]: 19: Hoare triple {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:57,060 INFO L290 TraceCheckUtils]: 20: Hoare triple {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:57,061 INFO L290 TraceCheckUtils]: 21: Hoare triple {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:57,061 INFO L290 TraceCheckUtils]: 22: Hoare triple {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:57,062 INFO L290 TraceCheckUtils]: 23: Hoare triple {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:57,063 INFO L290 TraceCheckUtils]: 24: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:57,063 INFO L272 TraceCheckUtils]: 25: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {5538#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:00:57,064 INFO L290 TraceCheckUtils]: 26: Hoare triple {5538#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5542#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:00:57,064 INFO L290 TraceCheckUtils]: 27: Hoare triple {5542#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5447#false} is VALID [2022-04-15 01:00:57,064 INFO L290 TraceCheckUtils]: 28: Hoare triple {5447#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5447#false} is VALID [2022-04-15 01:00:57,064 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-15 01:00:57,064 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:00:57,316 INFO L290 TraceCheckUtils]: 28: Hoare triple {5447#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5447#false} is VALID [2022-04-15 01:00:57,316 INFO L290 TraceCheckUtils]: 27: Hoare triple {5542#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5447#false} is VALID [2022-04-15 01:00:57,316 INFO L290 TraceCheckUtils]: 26: Hoare triple {5538#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5542#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:00:57,317 INFO L272 TraceCheckUtils]: 25: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {5538#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:00:57,318 INFO L290 TraceCheckUtils]: 24: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:57,319 INFO L290 TraceCheckUtils]: 23: Hoare triple {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:57,319 INFO L290 TraceCheckUtils]: 22: Hoare triple {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:57,320 INFO L290 TraceCheckUtils]: 21: Hoare triple {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:57,321 INFO L290 TraceCheckUtils]: 20: Hoare triple {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:57,322 INFO L290 TraceCheckUtils]: 19: Hoare triple {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:57,323 INFO L290 TraceCheckUtils]: 18: Hoare triple {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:00:57,324 INFO L290 TraceCheckUtils]: 17: Hoare triple {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:00:57,326 INFO L290 TraceCheckUtils]: 16: Hoare triple {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:57,327 INFO L290 TraceCheckUtils]: 15: Hoare triple {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:57,327 INFO L290 TraceCheckUtils]: 14: Hoare triple {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:00:57,329 INFO L290 TraceCheckUtils]: 13: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:00:57,330 INFO L290 TraceCheckUtils]: 12: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:57,332 INFO L290 TraceCheckUtils]: 11: Hoare triple {5446#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:00:57,332 INFO L290 TraceCheckUtils]: 10: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-15 01:00:57,332 INFO L290 TraceCheckUtils]: 9: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-15 01:00:57,332 INFO L290 TraceCheckUtils]: 8: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-15 01:00:57,332 INFO L290 TraceCheckUtils]: 7: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-15 01:00:57,332 INFO L290 TraceCheckUtils]: 6: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-15 01:00:57,333 INFO L290 TraceCheckUtils]: 5: Hoare triple {5446#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5446#true} is VALID [2022-04-15 01:00:57,333 INFO L272 TraceCheckUtils]: 4: Hoare triple {5446#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-15 01:00:57,333 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5446#true} {5446#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-15 01:00:57,333 INFO L290 TraceCheckUtils]: 2: Hoare triple {5446#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-15 01:00:57,333 INFO L290 TraceCheckUtils]: 1: Hoare triple {5446#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5446#true} is VALID [2022-04-15 01:00:57,333 INFO L272 TraceCheckUtils]: 0: Hoare triple {5446#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-15 01:00:57,333 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-15 01:00:57,333 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [664874404] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:00:57,333 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:00:57,333 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 13 [2022-04-15 01:00:57,334 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1054103759] [2022-04-15 01:00:57,334 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:00:57,334 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 1.8461538461538463) internal successors, (24), 10 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-15 01:00:57,334 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:00:57,334 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 1.8461538461538463) internal successors, (24), 10 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:57,356 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:57,356 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-15 01:00:57,357 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:00:57,357 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-15 01:00:57,357 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2022-04-15 01:00:57,357 INFO L87 Difference]: Start difference. First operand 58 states and 65 transitions. Second operand has 13 states, 13 states have (on average 1.8461538461538463) internal successors, (24), 10 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:57,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:57,982 INFO L93 Difference]: Finished difference Result 77 states and 86 transitions. [2022-04-15 01:00:57,983 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-15 01:00:57,983 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 1.8461538461538463) internal successors, (24), 10 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-15 01:00:57,983 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:00:57,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 1.8461538461538463) internal successors, (24), 10 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:57,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 37 transitions. [2022-04-15 01:00:57,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 1.8461538461538463) internal successors, (24), 10 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:57,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 37 transitions. [2022-04-15 01:00:57,984 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 37 transitions. [2022-04-15 01:00:58,014 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:58,015 INFO L225 Difference]: With dead ends: 77 [2022-04-15 01:00:58,015 INFO L226 Difference]: Without dead ends: 66 [2022-04-15 01:00:58,016 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 60 SyntacticMatches, 3 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=62, Invalid=358, Unknown=0, NotChecked=0, Total=420 [2022-04-15 01:00:58,016 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 17 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 214 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 63 SdHoareTripleChecker+Invalid, 226 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 214 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 01:00:58,016 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [17 Valid, 63 Invalid, 226 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 214 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-15 01:00:58,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2022-04-15 01:00:58,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 64. [2022-04-15 01:00:58,170 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:00:58,170 INFO L82 GeneralOperation]: Start isEquivalent. First operand 66 states. Second operand has 64 states, 59 states have (on average 1.152542372881356) internal successors, (68), 59 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:58,171 INFO L74 IsIncluded]: Start isIncluded. First operand 66 states. Second operand has 64 states, 59 states have (on average 1.152542372881356) internal successors, (68), 59 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:58,171 INFO L87 Difference]: Start difference. First operand 66 states. Second operand has 64 states, 59 states have (on average 1.152542372881356) internal successors, (68), 59 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:58,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:58,172 INFO L93 Difference]: Finished difference Result 66 states and 74 transitions. [2022-04-15 01:00:58,172 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 74 transitions. [2022-04-15 01:00:58,172 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:58,172 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:58,172 INFO L74 IsIncluded]: Start isIncluded. First operand has 64 states, 59 states have (on average 1.152542372881356) internal successors, (68), 59 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 66 states. [2022-04-15 01:00:58,172 INFO L87 Difference]: Start difference. First operand has 64 states, 59 states have (on average 1.152542372881356) internal successors, (68), 59 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 66 states. [2022-04-15 01:00:58,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:00:58,173 INFO L93 Difference]: Finished difference Result 66 states and 74 transitions. [2022-04-15 01:00:58,173 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 74 transitions. [2022-04-15 01:00:58,173 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:00:58,173 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:00:58,173 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:00:58,173 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:00:58,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 59 states have (on average 1.152542372881356) internal successors, (68), 59 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:58,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 72 transitions. [2022-04-15 01:00:58,174 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 72 transitions. Word has length 29 [2022-04-15 01:00:58,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:00:58,174 INFO L478 AbstractCegarLoop]: Abstraction has 64 states and 72 transitions. [2022-04-15 01:00:58,174 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 1.8461538461538463) internal successors, (24), 10 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:58,175 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 72 transitions. [2022-04-15 01:00:58,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-15 01:00:58,175 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:00:58,175 INFO L499 BasicCegarLoop]: trace histogram [6, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:00:58,194 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2022-04-15 01:00:58,383 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:58,383 INFO L403 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:00:58,384 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:00:58,384 INFO L85 PathProgramCache]: Analyzing trace with hash 2135825527, now seen corresponding path program 13 times [2022-04-15 01:00:58,384 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:00:58,384 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [97046871] [2022-04-15 01:00:58,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:00:58,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:00:58,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:58,563 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:00:58,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:58,569 INFO L290 TraceCheckUtils]: 0: Hoare triple {6025#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6007#true} is VALID [2022-04-15 01:00:58,569 INFO L290 TraceCheckUtils]: 1: Hoare triple {6007#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-15 01:00:58,570 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6007#true} {6007#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-15 01:00:58,570 INFO L272 TraceCheckUtils]: 0: Hoare triple {6007#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6025#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:00:58,570 INFO L290 TraceCheckUtils]: 1: Hoare triple {6025#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6007#true} is VALID [2022-04-15 01:00:58,570 INFO L290 TraceCheckUtils]: 2: Hoare triple {6007#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-15 01:00:58,570 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6007#true} {6007#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-15 01:00:58,571 INFO L272 TraceCheckUtils]: 4: Hoare triple {6007#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-15 01:00:58,571 INFO L290 TraceCheckUtils]: 5: Hoare triple {6007#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6012#(= main_~y~0 0)} is VALID [2022-04-15 01:00:58,571 INFO L290 TraceCheckUtils]: 6: Hoare triple {6012#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6013#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:58,572 INFO L290 TraceCheckUtils]: 7: Hoare triple {6013#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6014#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:58,573 INFO L290 TraceCheckUtils]: 8: Hoare triple {6014#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6015#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:00:58,573 INFO L290 TraceCheckUtils]: 9: Hoare triple {6015#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6016#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:00:58,574 INFO L290 TraceCheckUtils]: 10: Hoare triple {6016#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6017#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:00:58,575 INFO L290 TraceCheckUtils]: 11: Hoare triple {6017#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:00:58,575 INFO L290 TraceCheckUtils]: 12: Hoare triple {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:00:58,575 INFO L290 TraceCheckUtils]: 13: Hoare triple {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {6019#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 01:00:58,576 INFO L290 TraceCheckUtils]: 14: Hoare triple {6019#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6020#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:00:58,577 INFO L290 TraceCheckUtils]: 15: Hoare triple {6020#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6021#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:00:58,577 INFO L290 TraceCheckUtils]: 16: Hoare triple {6021#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6022#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:00:58,578 INFO L290 TraceCheckUtils]: 17: Hoare triple {6022#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6023#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:00:58,579 INFO L290 TraceCheckUtils]: 18: Hoare triple {6023#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6024#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-15 01:00:58,579 INFO L290 TraceCheckUtils]: 19: Hoare triple {6024#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-15 01:00:58,579 INFO L290 TraceCheckUtils]: 20: Hoare triple {6008#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6008#false} is VALID [2022-04-15 01:00:58,579 INFO L290 TraceCheckUtils]: 21: Hoare triple {6008#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6008#false} is VALID [2022-04-15 01:00:58,579 INFO L290 TraceCheckUtils]: 22: Hoare triple {6008#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6008#false} is VALID [2022-04-15 01:00:58,580 INFO L290 TraceCheckUtils]: 23: Hoare triple {6008#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6008#false} is VALID [2022-04-15 01:00:58,580 INFO L290 TraceCheckUtils]: 24: Hoare triple {6008#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-15 01:00:58,580 INFO L272 TraceCheckUtils]: 25: Hoare triple {6008#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {6008#false} is VALID [2022-04-15 01:00:58,580 INFO L290 TraceCheckUtils]: 26: Hoare triple {6008#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6008#false} is VALID [2022-04-15 01:00:58,580 INFO L290 TraceCheckUtils]: 27: Hoare triple {6008#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-15 01:00:58,580 INFO L290 TraceCheckUtils]: 28: Hoare triple {6008#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-15 01:00:58,580 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-15 01:00:58,580 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:00:58,581 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [97046871] [2022-04-15 01:00:58,581 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [97046871] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:00:58,581 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [825628607] [2022-04-15 01:00:58,581 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-15 01:00:58,581 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:00:58,581 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:00:58,583 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:00:58,584 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-15 01:00:58,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:58,626 INFO L263 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 34 conjunts are in the unsatisfiable core [2022-04-15 01:00:58,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:00:58,635 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:00:58,968 INFO L272 TraceCheckUtils]: 0: Hoare triple {6007#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-15 01:00:58,969 INFO L290 TraceCheckUtils]: 1: Hoare triple {6007#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6007#true} is VALID [2022-04-15 01:00:58,969 INFO L290 TraceCheckUtils]: 2: Hoare triple {6007#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-15 01:00:58,969 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6007#true} {6007#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-15 01:00:58,969 INFO L272 TraceCheckUtils]: 4: Hoare triple {6007#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-15 01:00:58,969 INFO L290 TraceCheckUtils]: 5: Hoare triple {6007#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6012#(= main_~y~0 0)} is VALID [2022-04-15 01:00:58,969 INFO L290 TraceCheckUtils]: 6: Hoare triple {6012#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6013#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:00:58,970 INFO L290 TraceCheckUtils]: 7: Hoare triple {6013#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6014#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:58,970 INFO L290 TraceCheckUtils]: 8: Hoare triple {6014#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6015#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:00:58,971 INFO L290 TraceCheckUtils]: 9: Hoare triple {6015#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6016#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:00:58,971 INFO L290 TraceCheckUtils]: 10: Hoare triple {6016#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6017#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:00:58,972 INFO L290 TraceCheckUtils]: 11: Hoare triple {6017#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:00:58,972 INFO L290 TraceCheckUtils]: 12: Hoare triple {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:00:58,973 INFO L290 TraceCheckUtils]: 13: Hoare triple {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {6068#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} is VALID [2022-04-15 01:00:58,973 INFO L290 TraceCheckUtils]: 14: Hoare triple {6068#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6072#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-15 01:00:58,974 INFO L290 TraceCheckUtils]: 15: Hoare triple {6072#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6076#(and (<= main_~y~0 6) (= main_~y~0 (+ main_~z~0 2)) (<= 6 main_~y~0))} is VALID [2022-04-15 01:00:58,974 INFO L290 TraceCheckUtils]: 16: Hoare triple {6076#(and (<= main_~y~0 6) (= main_~y~0 (+ main_~z~0 2)) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6080#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 3)))} is VALID [2022-04-15 01:00:58,975 INFO L290 TraceCheckUtils]: 17: Hoare triple {6080#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 3)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6084#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} is VALID [2022-04-15 01:00:58,975 INFO L290 TraceCheckUtils]: 18: Hoare triple {6084#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:00:58,976 INFO L290 TraceCheckUtils]: 19: Hoare triple {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:00:58,976 INFO L290 TraceCheckUtils]: 20: Hoare triple {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6017#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:00:58,977 INFO L290 TraceCheckUtils]: 21: Hoare triple {6017#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6016#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:00:58,977 INFO L290 TraceCheckUtils]: 22: Hoare triple {6016#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6015#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:00:58,978 INFO L290 TraceCheckUtils]: 23: Hoare triple {6015#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6014#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:00:58,978 INFO L290 TraceCheckUtils]: 24: Hoare triple {6014#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-15 01:00:58,978 INFO L272 TraceCheckUtils]: 25: Hoare triple {6008#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {6008#false} is VALID [2022-04-15 01:00:58,978 INFO L290 TraceCheckUtils]: 26: Hoare triple {6008#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6008#false} is VALID [2022-04-15 01:00:58,978 INFO L290 TraceCheckUtils]: 27: Hoare triple {6008#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-15 01:00:58,978 INFO L290 TraceCheckUtils]: 28: Hoare triple {6008#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-15 01:00:58,978 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 0 proven. 46 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:00:58,979 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:00:59,302 INFO L290 TraceCheckUtils]: 28: Hoare triple {6008#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-15 01:00:59,302 INFO L290 TraceCheckUtils]: 27: Hoare triple {6008#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-15 01:00:59,302 INFO L290 TraceCheckUtils]: 26: Hoare triple {6008#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6008#false} is VALID [2022-04-15 01:00:59,302 INFO L272 TraceCheckUtils]: 25: Hoare triple {6008#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {6008#false} is VALID [2022-04-15 01:00:59,303 INFO L290 TraceCheckUtils]: 24: Hoare triple {6130#(< 0 (mod main_~y~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-15 01:00:59,304 INFO L290 TraceCheckUtils]: 23: Hoare triple {6134#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6130#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:00:59,304 INFO L290 TraceCheckUtils]: 22: Hoare triple {6138#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6134#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:00:59,305 INFO L290 TraceCheckUtils]: 21: Hoare triple {6142#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6138#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 01:00:59,306 INFO L290 TraceCheckUtils]: 20: Hoare triple {6146#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6142#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 01:00:59,306 INFO L290 TraceCheckUtils]: 19: Hoare triple {6146#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {6146#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-15 01:00:59,306 INFO L290 TraceCheckUtils]: 18: Hoare triple {6153#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6146#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-15 01:00:59,307 INFO L290 TraceCheckUtils]: 17: Hoare triple {6157#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6153#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:00:59,308 INFO L290 TraceCheckUtils]: 16: Hoare triple {6161#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6157#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:00:59,309 INFO L290 TraceCheckUtils]: 15: Hoare triple {6165#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6161#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:00:59,310 INFO L290 TraceCheckUtils]: 14: Hoare triple {6169#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6165#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:00:59,311 INFO L290 TraceCheckUtils]: 13: Hoare triple {6007#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {6169#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:00:59,311 INFO L290 TraceCheckUtils]: 12: Hoare triple {6007#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-15 01:00:59,311 INFO L290 TraceCheckUtils]: 11: Hoare triple {6007#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6007#true} is VALID [2022-04-15 01:00:59,311 INFO L290 TraceCheckUtils]: 10: Hoare triple {6007#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6007#true} is VALID [2022-04-15 01:00:59,311 INFO L290 TraceCheckUtils]: 9: Hoare triple {6007#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6007#true} is VALID [2022-04-15 01:00:59,311 INFO L290 TraceCheckUtils]: 8: Hoare triple {6007#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6007#true} is VALID [2022-04-15 01:00:59,311 INFO L290 TraceCheckUtils]: 7: Hoare triple {6007#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6007#true} is VALID [2022-04-15 01:00:59,311 INFO L290 TraceCheckUtils]: 6: Hoare triple {6007#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6007#true} is VALID [2022-04-15 01:00:59,311 INFO L290 TraceCheckUtils]: 5: Hoare triple {6007#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6007#true} is VALID [2022-04-15 01:00:59,311 INFO L272 TraceCheckUtils]: 4: Hoare triple {6007#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-15 01:00:59,311 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6007#true} {6007#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-15 01:00:59,312 INFO L290 TraceCheckUtils]: 2: Hoare triple {6007#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-15 01:00:59,312 INFO L290 TraceCheckUtils]: 1: Hoare triple {6007#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6007#true} is VALID [2022-04-15 01:00:59,312 INFO L272 TraceCheckUtils]: 0: Hoare triple {6007#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-15 01:00:59,312 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-15 01:00:59,312 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [825628607] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:00:59,312 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:00:59,312 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 14, 12] total 31 [2022-04-15 01:00:59,312 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [881512476] [2022-04-15 01:00:59,312 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:00:59,313 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 30 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-15 01:00:59,313 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:00:59,313 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 31 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 30 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:00:59,350 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:00:59,350 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-04-15 01:00:59,350 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:00:59,350 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-04-15 01:00:59,351 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=197, Invalid=733, Unknown=0, NotChecked=0, Total=930 [2022-04-15 01:00:59,351 INFO L87 Difference]: Start difference. First operand 64 states and 72 transitions. Second operand has 31 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 30 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:01,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:01,794 INFO L93 Difference]: Finished difference Result 163 states and 192 transitions. [2022-04-15 01:01:01,794 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2022-04-15 01:01:01,795 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 30 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-15 01:01:01,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:01:01,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 30 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:01,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 114 transitions. [2022-04-15 01:01:01,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 30 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:01,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 114 transitions. [2022-04-15 01:01:01,797 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 46 states and 114 transitions. [2022-04-15 01:01:01,941 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 114 edges. 114 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:01:01,943 INFO L225 Difference]: With dead ends: 163 [2022-04-15 01:01:01,943 INFO L226 Difference]: Without dead ends: 136 [2022-04-15 01:01:01,944 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 129 GetRequests, 56 SyntacticMatches, 1 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1501 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=1121, Invalid=4281, Unknown=0, NotChecked=0, Total=5402 [2022-04-15 01:01:01,944 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 157 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 490 mSolverCounterSat, 152 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 157 SdHoareTripleChecker+Valid, 82 SdHoareTripleChecker+Invalid, 642 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 152 IncrementalHoareTripleChecker+Valid, 490 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-15 01:01:01,945 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [157 Valid, 82 Invalid, 642 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [152 Valid, 490 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-15 01:01:01,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2022-04-15 01:01:02,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 61. [2022-04-15 01:01:02,100 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:01:02,101 INFO L82 GeneralOperation]: Start isEquivalent. First operand 136 states. Second operand has 61 states, 56 states have (on average 1.1428571428571428) internal successors, (64), 56 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:02,101 INFO L74 IsIncluded]: Start isIncluded. First operand 136 states. Second operand has 61 states, 56 states have (on average 1.1428571428571428) internal successors, (64), 56 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:02,101 INFO L87 Difference]: Start difference. First operand 136 states. Second operand has 61 states, 56 states have (on average 1.1428571428571428) internal successors, (64), 56 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:02,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:02,103 INFO L93 Difference]: Finished difference Result 136 states and 156 transitions. [2022-04-15 01:01:02,104 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 156 transitions. [2022-04-15 01:01:02,104 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:01:02,104 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:01:02,104 INFO L74 IsIncluded]: Start isIncluded. First operand has 61 states, 56 states have (on average 1.1428571428571428) internal successors, (64), 56 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 136 states. [2022-04-15 01:01:02,104 INFO L87 Difference]: Start difference. First operand has 61 states, 56 states have (on average 1.1428571428571428) internal successors, (64), 56 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 136 states. [2022-04-15 01:01:02,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:02,107 INFO L93 Difference]: Finished difference Result 136 states and 156 transitions. [2022-04-15 01:01:02,107 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 156 transitions. [2022-04-15 01:01:02,107 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:01:02,107 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:01:02,107 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:01:02,107 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:01:02,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 56 states have (on average 1.1428571428571428) internal successors, (64), 56 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:02,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 68 transitions. [2022-04-15 01:01:02,109 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 68 transitions. Word has length 29 [2022-04-15 01:01:02,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:01:02,109 INFO L478 AbstractCegarLoop]: Abstraction has 61 states and 68 transitions. [2022-04-15 01:01:02,109 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 30 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:02,109 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 68 transitions. [2022-04-15 01:01:02,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-15 01:01:02,109 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:01:02,109 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:01:02,126 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-15 01:01:02,315 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:01:02,315 INFO L403 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:01:02,321 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:01:02,321 INFO L85 PathProgramCache]: Analyzing trace with hash -1608168445, now seen corresponding path program 14 times [2022-04-15 01:01:02,321 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:01:02,321 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1670293977] [2022-04-15 01:01:02,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:01:02,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:01:02,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:02,470 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:01:02,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:02,476 INFO L290 TraceCheckUtils]: 0: Hoare triple {6950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6936#true} is VALID [2022-04-15 01:01:02,476 INFO L290 TraceCheckUtils]: 1: Hoare triple {6936#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-15 01:01:02,476 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6936#true} {6936#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-15 01:01:02,476 INFO L272 TraceCheckUtils]: 0: Hoare triple {6936#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:01:02,477 INFO L290 TraceCheckUtils]: 1: Hoare triple {6950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6936#true} is VALID [2022-04-15 01:01:02,477 INFO L290 TraceCheckUtils]: 2: Hoare triple {6936#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-15 01:01:02,477 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6936#true} {6936#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-15 01:01:02,477 INFO L272 TraceCheckUtils]: 4: Hoare triple {6936#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-15 01:01:02,477 INFO L290 TraceCheckUtils]: 5: Hoare triple {6936#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6936#true} is VALID [2022-04-15 01:01:02,477 INFO L290 TraceCheckUtils]: 6: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-15 01:01:02,477 INFO L290 TraceCheckUtils]: 7: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-15 01:01:02,477 INFO L290 TraceCheckUtils]: 8: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-15 01:01:02,477 INFO L290 TraceCheckUtils]: 9: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-15 01:01:02,477 INFO L290 TraceCheckUtils]: 10: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-15 01:01:02,477 INFO L290 TraceCheckUtils]: 11: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-15 01:01:02,478 INFO L290 TraceCheckUtils]: 12: Hoare triple {6936#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:02,478 INFO L290 TraceCheckUtils]: 13: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:02,479 INFO L290 TraceCheckUtils]: 14: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:01:02,480 INFO L290 TraceCheckUtils]: 15: Hoare triple {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:02,480 INFO L290 TraceCheckUtils]: 16: Hoare triple {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:02,481 INFO L290 TraceCheckUtils]: 17: Hoare triple {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:02,482 INFO L290 TraceCheckUtils]: 18: Hoare triple {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:01:02,482 INFO L290 TraceCheckUtils]: 19: Hoare triple {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:02,483 INFO L290 TraceCheckUtils]: 20: Hoare triple {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:02,483 INFO L290 TraceCheckUtils]: 21: Hoare triple {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:01:02,484 INFO L290 TraceCheckUtils]: 22: Hoare triple {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:02,485 INFO L290 TraceCheckUtils]: 23: Hoare triple {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:02,485 INFO L290 TraceCheckUtils]: 24: Hoare triple {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:02,486 INFO L290 TraceCheckUtils]: 25: Hoare triple {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:01:02,487 INFO L290 TraceCheckUtils]: 26: Hoare triple {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:02,487 INFO L290 TraceCheckUtils]: 27: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:02,488 INFO L272 TraceCheckUtils]: 28: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {6948#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 01:01:02,488 INFO L290 TraceCheckUtils]: 29: Hoare triple {6948#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6949#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 01:01:02,488 INFO L290 TraceCheckUtils]: 30: Hoare triple {6949#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6937#false} is VALID [2022-04-15 01:01:02,489 INFO L290 TraceCheckUtils]: 31: Hoare triple {6937#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6937#false} is VALID [2022-04-15 01:01:02,489 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-15 01:01:02,489 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:01:02,489 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1670293977] [2022-04-15 01:01:02,489 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1670293977] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:01:02,489 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1923521406] [2022-04-15 01:01:02,489 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 01:01:02,489 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:01:02,489 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:01:02,490 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:01:02,519 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-15 01:01:02,545 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 01:01:02,545 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:01:02,546 INFO L263 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 28 conjunts are in the unsatisfiable core [2022-04-15 01:01:02,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:02,555 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:01:02,773 INFO L272 TraceCheckUtils]: 0: Hoare triple {6936#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-15 01:01:02,773 INFO L290 TraceCheckUtils]: 1: Hoare triple {6936#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6936#true} is VALID [2022-04-15 01:01:02,773 INFO L290 TraceCheckUtils]: 2: Hoare triple {6936#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-15 01:01:02,773 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6936#true} {6936#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-15 01:01:02,773 INFO L272 TraceCheckUtils]: 4: Hoare triple {6936#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-15 01:01:02,774 INFO L290 TraceCheckUtils]: 5: Hoare triple {6936#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6936#true} is VALID [2022-04-15 01:01:02,774 INFO L290 TraceCheckUtils]: 6: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-15 01:01:02,774 INFO L290 TraceCheckUtils]: 7: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-15 01:01:02,774 INFO L290 TraceCheckUtils]: 8: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-15 01:01:02,774 INFO L290 TraceCheckUtils]: 9: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-15 01:01:02,774 INFO L290 TraceCheckUtils]: 10: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-15 01:01:02,774 INFO L290 TraceCheckUtils]: 11: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-15 01:01:02,774 INFO L290 TraceCheckUtils]: 12: Hoare triple {6936#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:02,775 INFO L290 TraceCheckUtils]: 13: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:02,775 INFO L290 TraceCheckUtils]: 14: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:01:02,776 INFO L290 TraceCheckUtils]: 15: Hoare triple {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:02,777 INFO L290 TraceCheckUtils]: 16: Hoare triple {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:02,778 INFO L290 TraceCheckUtils]: 17: Hoare triple {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:02,778 INFO L290 TraceCheckUtils]: 18: Hoare triple {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:01:02,779 INFO L290 TraceCheckUtils]: 19: Hoare triple {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:02,779 INFO L290 TraceCheckUtils]: 20: Hoare triple {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:02,780 INFO L290 TraceCheckUtils]: 21: Hoare triple {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:01:02,781 INFO L290 TraceCheckUtils]: 22: Hoare triple {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:02,782 INFO L290 TraceCheckUtils]: 23: Hoare triple {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:02,782 INFO L290 TraceCheckUtils]: 24: Hoare triple {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:02,783 INFO L290 TraceCheckUtils]: 25: Hoare triple {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:01:02,784 INFO L290 TraceCheckUtils]: 26: Hoare triple {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:02,784 INFO L290 TraceCheckUtils]: 27: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:02,785 INFO L272 TraceCheckUtils]: 28: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {7038#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:01:02,785 INFO L290 TraceCheckUtils]: 29: Hoare triple {7038#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7042#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:01:02,785 INFO L290 TraceCheckUtils]: 30: Hoare triple {7042#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6937#false} is VALID [2022-04-15 01:01:02,785 INFO L290 TraceCheckUtils]: 31: Hoare triple {6937#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6937#false} is VALID [2022-04-15 01:01:02,786 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-15 01:01:02,786 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:01:03,112 INFO L290 TraceCheckUtils]: 31: Hoare triple {6937#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6937#false} is VALID [2022-04-15 01:01:03,113 INFO L290 TraceCheckUtils]: 30: Hoare triple {7042#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6937#false} is VALID [2022-04-15 01:01:03,113 INFO L290 TraceCheckUtils]: 29: Hoare triple {7038#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7042#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:01:03,114 INFO L272 TraceCheckUtils]: 28: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {7038#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:01:03,114 INFO L290 TraceCheckUtils]: 27: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:03,115 INFO L290 TraceCheckUtils]: 26: Hoare triple {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:03,116 INFO L290 TraceCheckUtils]: 25: Hoare triple {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:01:03,117 INFO L290 TraceCheckUtils]: 24: Hoare triple {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:03,118 INFO L290 TraceCheckUtils]: 23: Hoare triple {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:03,118 INFO L290 TraceCheckUtils]: 22: Hoare triple {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:03,119 INFO L290 TraceCheckUtils]: 21: Hoare triple {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:01:03,120 INFO L290 TraceCheckUtils]: 20: Hoare triple {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:03,120 INFO L290 TraceCheckUtils]: 19: Hoare triple {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:03,121 INFO L290 TraceCheckUtils]: 18: Hoare triple {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:01:03,122 INFO L290 TraceCheckUtils]: 17: Hoare triple {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:03,123 INFO L290 TraceCheckUtils]: 16: Hoare triple {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:03,124 INFO L290 TraceCheckUtils]: 15: Hoare triple {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:03,124 INFO L290 TraceCheckUtils]: 14: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:01:03,125 INFO L290 TraceCheckUtils]: 13: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:03,125 INFO L290 TraceCheckUtils]: 12: Hoare triple {6936#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:03,125 INFO L290 TraceCheckUtils]: 11: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-15 01:01:03,125 INFO L290 TraceCheckUtils]: 10: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-15 01:01:03,125 INFO L290 TraceCheckUtils]: 9: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-15 01:01:03,126 INFO L290 TraceCheckUtils]: 8: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-15 01:01:03,126 INFO L290 TraceCheckUtils]: 7: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-15 01:01:03,126 INFO L290 TraceCheckUtils]: 6: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-15 01:01:03,126 INFO L290 TraceCheckUtils]: 5: Hoare triple {6936#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6936#true} is VALID [2022-04-15 01:01:03,126 INFO L272 TraceCheckUtils]: 4: Hoare triple {6936#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-15 01:01:03,126 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6936#true} {6936#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-15 01:01:03,126 INFO L290 TraceCheckUtils]: 2: Hoare triple {6936#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-15 01:01:03,126 INFO L290 TraceCheckUtils]: 1: Hoare triple {6936#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6936#true} is VALID [2022-04-15 01:01:03,126 INFO L272 TraceCheckUtils]: 0: Hoare triple {6936#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-15 01:01:03,127 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-15 01:01:03,127 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1923521406] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:01:03,127 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:01:03,127 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11] total 14 [2022-04-15 01:01:03,127 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [328674721] [2022-04-15 01:01:03,127 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:01:03,129 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-15 01:01:03,129 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:01:03,129 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:03,161 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:01:03,161 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-15 01:01:03,161 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:01:03,162 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-15 01:01:03,162 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=155, Unknown=0, NotChecked=0, Total=182 [2022-04-15 01:01:03,163 INFO L87 Difference]: Start difference. First operand 61 states and 68 transitions. Second operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:03,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:03,981 INFO L93 Difference]: Finished difference Result 88 states and 98 transitions. [2022-04-15 01:01:03,981 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-15 01:01:03,981 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-15 01:01:03,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:01:03,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:03,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 40 transitions. [2022-04-15 01:01:03,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:03,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 40 transitions. [2022-04-15 01:01:03,983 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 40 transitions. [2022-04-15 01:01:04,020 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:01:04,021 INFO L225 Difference]: With dead ends: 88 [2022-04-15 01:01:04,021 INFO L226 Difference]: Without dead ends: 76 [2022-04-15 01:01:04,022 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 67 SyntacticMatches, 3 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=68, Invalid=438, Unknown=0, NotChecked=0, Total=506 [2022-04-15 01:01:04,022 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 19 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 242 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 254 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 242 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 01:01:04,022 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [19 Valid, 64 Invalid, 254 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 242 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-15 01:01:04,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2022-04-15 01:01:04,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 69. [2022-04-15 01:01:04,229 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:01:04,230 INFO L82 GeneralOperation]: Start isEquivalent. First operand 76 states. Second operand has 69 states, 64 states have (on average 1.15625) internal successors, (74), 64 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:04,230 INFO L74 IsIncluded]: Start isIncluded. First operand 76 states. Second operand has 69 states, 64 states have (on average 1.15625) internal successors, (74), 64 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:04,230 INFO L87 Difference]: Start difference. First operand 76 states. Second operand has 69 states, 64 states have (on average 1.15625) internal successors, (74), 64 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:04,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:04,231 INFO L93 Difference]: Finished difference Result 76 states and 85 transitions. [2022-04-15 01:01:04,231 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 85 transitions. [2022-04-15 01:01:04,232 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:01:04,232 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:01:04,232 INFO L74 IsIncluded]: Start isIncluded. First operand has 69 states, 64 states have (on average 1.15625) internal successors, (74), 64 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 76 states. [2022-04-15 01:01:04,232 INFO L87 Difference]: Start difference. First operand has 69 states, 64 states have (on average 1.15625) internal successors, (74), 64 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 76 states. [2022-04-15 01:01:04,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:04,233 INFO L93 Difference]: Finished difference Result 76 states and 85 transitions. [2022-04-15 01:01:04,233 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 85 transitions. [2022-04-15 01:01:04,234 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:01:04,234 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:01:04,234 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:01:04,234 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:01:04,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 64 states have (on average 1.15625) internal successors, (74), 64 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:04,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 78 transitions. [2022-04-15 01:01:04,237 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 78 transitions. Word has length 32 [2022-04-15 01:01:04,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:01:04,237 INFO L478 AbstractCegarLoop]: Abstraction has 69 states and 78 transitions. [2022-04-15 01:01:04,237 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:04,237 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 78 transitions. [2022-04-15 01:01:04,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-15 01:01:04,238 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:01:04,238 INFO L499 BasicCegarLoop]: trace histogram [7, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:01:04,261 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-15 01:01:04,461 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:01:04,462 INFO L403 AbstractCegarLoop]: === Iteration 21 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:01:04,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:01:04,462 INFO L85 PathProgramCache]: Analyzing trace with hash -1631799165, now seen corresponding path program 15 times [2022-04-15 01:01:04,462 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:01:04,462 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [14388815] [2022-04-15 01:01:04,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:01:04,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:01:04,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:04,685 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:01:04,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:04,689 INFO L290 TraceCheckUtils]: 0: Hoare triple {7575#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7556#true} is VALID [2022-04-15 01:01:04,689 INFO L290 TraceCheckUtils]: 1: Hoare triple {7556#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-15 01:01:04,689 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7556#true} {7556#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-15 01:01:04,689 INFO L272 TraceCheckUtils]: 0: Hoare triple {7556#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7575#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:01:04,689 INFO L290 TraceCheckUtils]: 1: Hoare triple {7575#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7556#true} is VALID [2022-04-15 01:01:04,690 INFO L290 TraceCheckUtils]: 2: Hoare triple {7556#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-15 01:01:04,690 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7556#true} {7556#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-15 01:01:04,690 INFO L272 TraceCheckUtils]: 4: Hoare triple {7556#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-15 01:01:04,690 INFO L290 TraceCheckUtils]: 5: Hoare triple {7556#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7561#(= main_~y~0 0)} is VALID [2022-04-15 01:01:04,691 INFO L290 TraceCheckUtils]: 6: Hoare triple {7561#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7562#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:01:04,691 INFO L290 TraceCheckUtils]: 7: Hoare triple {7562#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7563#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:01:04,692 INFO L290 TraceCheckUtils]: 8: Hoare triple {7563#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7564#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:01:04,692 INFO L290 TraceCheckUtils]: 9: Hoare triple {7564#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7565#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:01:04,693 INFO L290 TraceCheckUtils]: 10: Hoare triple {7565#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7566#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:01:04,694 INFO L290 TraceCheckUtils]: 11: Hoare triple {7566#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7567#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:01:04,694 INFO L290 TraceCheckUtils]: 12: Hoare triple {7567#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7568#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:01:04,695 INFO L290 TraceCheckUtils]: 13: Hoare triple {7568#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7568#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:01:04,695 INFO L290 TraceCheckUtils]: 14: Hoare triple {7568#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {7569#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-15 01:01:04,696 INFO L290 TraceCheckUtils]: 15: Hoare triple {7569#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7570#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 01:01:04,696 INFO L290 TraceCheckUtils]: 16: Hoare triple {7570#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7571#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:01:04,697 INFO L290 TraceCheckUtils]: 17: Hoare triple {7571#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7572#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:01:04,697 INFO L290 TraceCheckUtils]: 18: Hoare triple {7572#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7573#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:01:04,698 INFO L290 TraceCheckUtils]: 19: Hoare triple {7573#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7574#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-15 01:01:04,699 INFO L290 TraceCheckUtils]: 20: Hoare triple {7574#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-15 01:01:04,699 INFO L290 TraceCheckUtils]: 21: Hoare triple {7557#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7557#false} is VALID [2022-04-15 01:01:04,699 INFO L290 TraceCheckUtils]: 22: Hoare triple {7557#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7557#false} is VALID [2022-04-15 01:01:04,699 INFO L290 TraceCheckUtils]: 23: Hoare triple {7557#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7557#false} is VALID [2022-04-15 01:01:04,699 INFO L290 TraceCheckUtils]: 24: Hoare triple {7557#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7557#false} is VALID [2022-04-15 01:01:04,699 INFO L290 TraceCheckUtils]: 25: Hoare triple {7557#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7557#false} is VALID [2022-04-15 01:01:04,699 INFO L290 TraceCheckUtils]: 26: Hoare triple {7557#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7557#false} is VALID [2022-04-15 01:01:04,699 INFO L290 TraceCheckUtils]: 27: Hoare triple {7557#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-15 01:01:04,699 INFO L272 TraceCheckUtils]: 28: Hoare triple {7557#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {7557#false} is VALID [2022-04-15 01:01:04,700 INFO L290 TraceCheckUtils]: 29: Hoare triple {7557#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7557#false} is VALID [2022-04-15 01:01:04,700 INFO L290 TraceCheckUtils]: 30: Hoare triple {7557#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-15 01:01:04,700 INFO L290 TraceCheckUtils]: 31: Hoare triple {7557#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-15 01:01:04,700 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 0 proven. 43 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-15 01:01:04,700 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:01:04,700 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [14388815] [2022-04-15 01:01:04,700 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [14388815] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:01:04,700 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [605231832] [2022-04-15 01:01:04,700 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-15 01:01:04,701 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:01:04,701 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:01:04,702 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:01:04,703 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-15 01:01:04,768 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2022-04-15 01:01:04,768 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:01:04,769 INFO L263 TraceCheckSpWp]: Trace formula consists of 144 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-15 01:01:04,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:04,779 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:01:05,115 INFO L272 TraceCheckUtils]: 0: Hoare triple {7556#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-15 01:01:05,116 INFO L290 TraceCheckUtils]: 1: Hoare triple {7556#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7556#true} is VALID [2022-04-15 01:01:05,116 INFO L290 TraceCheckUtils]: 2: Hoare triple {7556#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-15 01:01:05,116 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7556#true} {7556#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-15 01:01:05,116 INFO L272 TraceCheckUtils]: 4: Hoare triple {7556#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-15 01:01:05,116 INFO L290 TraceCheckUtils]: 5: Hoare triple {7556#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7556#true} is VALID [2022-04-15 01:01:05,116 INFO L290 TraceCheckUtils]: 6: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-15 01:01:05,116 INFO L290 TraceCheckUtils]: 7: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-15 01:01:05,116 INFO L290 TraceCheckUtils]: 8: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-15 01:01:05,116 INFO L290 TraceCheckUtils]: 9: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-15 01:01:05,117 INFO L290 TraceCheckUtils]: 10: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-15 01:01:05,117 INFO L290 TraceCheckUtils]: 11: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-15 01:01:05,117 INFO L290 TraceCheckUtils]: 12: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-15 01:01:05,117 INFO L290 TraceCheckUtils]: 13: Hoare triple {7556#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-15 01:01:05,117 INFO L290 TraceCheckUtils]: 14: Hoare triple {7556#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {7621#(= main_~z~0 main_~y~0)} is VALID [2022-04-15 01:01:05,118 INFO L290 TraceCheckUtils]: 15: Hoare triple {7621#(= main_~z~0 main_~y~0)} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7625#(= main_~y~0 (+ main_~z~0 1))} is VALID [2022-04-15 01:01:05,118 INFO L290 TraceCheckUtils]: 16: Hoare triple {7625#(= main_~y~0 (+ main_~z~0 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7629#(= main_~y~0 (+ main_~z~0 2))} is VALID [2022-04-15 01:01:05,119 INFO L290 TraceCheckUtils]: 17: Hoare triple {7629#(= main_~y~0 (+ main_~z~0 2))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7633#(= main_~y~0 (+ main_~z~0 3))} is VALID [2022-04-15 01:01:05,120 INFO L290 TraceCheckUtils]: 18: Hoare triple {7633#(= main_~y~0 (+ main_~z~0 3))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7637#(= (+ main_~y~0 (- 3)) (+ main_~z~0 1))} is VALID [2022-04-15 01:01:05,120 INFO L290 TraceCheckUtils]: 19: Hoare triple {7637#(= (+ main_~y~0 (- 3)) (+ main_~z~0 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7641#(= (+ main_~y~0 (- 4)) (+ main_~z~0 1))} is VALID [2022-04-15 01:01:05,121 INFO L290 TraceCheckUtils]: 20: Hoare triple {7641#(= (+ main_~y~0 (- 4)) (+ main_~z~0 1))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {7645#(not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:01:05,122 INFO L290 TraceCheckUtils]: 21: Hoare triple {7645#(not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7649#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:01:05,123 INFO L290 TraceCheckUtils]: 22: Hoare triple {7649#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7653#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-15 01:01:05,124 INFO L290 TraceCheckUtils]: 23: Hoare triple {7653#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7657#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-15 01:01:05,124 INFO L290 TraceCheckUtils]: 24: Hoare triple {7657#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7661#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-15 01:01:05,125 INFO L290 TraceCheckUtils]: 25: Hoare triple {7661#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7665#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-15 01:01:05,125 INFO L290 TraceCheckUtils]: 26: Hoare triple {7665#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7557#false} is VALID [2022-04-15 01:01:05,126 INFO L290 TraceCheckUtils]: 27: Hoare triple {7557#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-15 01:01:05,126 INFO L272 TraceCheckUtils]: 28: Hoare triple {7557#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {7557#false} is VALID [2022-04-15 01:01:05,126 INFO L290 TraceCheckUtils]: 29: Hoare triple {7557#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7557#false} is VALID [2022-04-15 01:01:05,126 INFO L290 TraceCheckUtils]: 30: Hoare triple {7557#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-15 01:01:05,126 INFO L290 TraceCheckUtils]: 31: Hoare triple {7557#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-15 01:01:05,126 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 6 proven. 30 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-15 01:01:05,126 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:01:05,448 INFO L290 TraceCheckUtils]: 31: Hoare triple {7557#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-15 01:01:05,448 INFO L290 TraceCheckUtils]: 30: Hoare triple {7557#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-15 01:01:05,448 INFO L290 TraceCheckUtils]: 29: Hoare triple {7557#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7557#false} is VALID [2022-04-15 01:01:05,448 INFO L272 TraceCheckUtils]: 28: Hoare triple {7557#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {7557#false} is VALID [2022-04-15 01:01:05,448 INFO L290 TraceCheckUtils]: 27: Hoare triple {7557#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-15 01:01:05,448 INFO L290 TraceCheckUtils]: 26: Hoare triple {7665#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7557#false} is VALID [2022-04-15 01:01:05,450 INFO L290 TraceCheckUtils]: 25: Hoare triple {7661#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7665#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-15 01:01:05,451 INFO L290 TraceCheckUtils]: 24: Hoare triple {7657#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7661#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-15 01:01:05,452 INFO L290 TraceCheckUtils]: 23: Hoare triple {7653#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7657#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-15 01:01:05,452 INFO L290 TraceCheckUtils]: 22: Hoare triple {7649#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7653#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-15 01:01:05,453 INFO L290 TraceCheckUtils]: 21: Hoare triple {7645#(not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7649#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:01:05,454 INFO L290 TraceCheckUtils]: 20: Hoare triple {7717#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {7645#(not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:01:05,455 INFO L290 TraceCheckUtils]: 19: Hoare triple {7721#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7717#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-15 01:01:05,456 INFO L290 TraceCheckUtils]: 18: Hoare triple {7725#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7721#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-15 01:01:05,457 INFO L290 TraceCheckUtils]: 17: Hoare triple {7729#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7725#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} is VALID [2022-04-15 01:01:05,458 INFO L290 TraceCheckUtils]: 16: Hoare triple {7733#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7729#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} is VALID [2022-04-15 01:01:05,459 INFO L290 TraceCheckUtils]: 15: Hoare triple {7737#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967291 main_~z~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7733#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)))} is VALID [2022-04-15 01:01:05,459 INFO L290 TraceCheckUtils]: 14: Hoare triple {7556#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {7737#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967291 main_~z~0) 4294967296)))} is VALID [2022-04-15 01:01:05,459 INFO L290 TraceCheckUtils]: 13: Hoare triple {7556#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-15 01:01:05,459 INFO L290 TraceCheckUtils]: 12: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-15 01:01:05,459 INFO L290 TraceCheckUtils]: 11: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-15 01:01:05,460 INFO L290 TraceCheckUtils]: 10: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-15 01:01:05,460 INFO L290 TraceCheckUtils]: 9: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-15 01:01:05,460 INFO L290 TraceCheckUtils]: 8: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-15 01:01:05,460 INFO L290 TraceCheckUtils]: 7: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-15 01:01:05,460 INFO L290 TraceCheckUtils]: 6: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-15 01:01:05,460 INFO L290 TraceCheckUtils]: 5: Hoare triple {7556#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7556#true} is VALID [2022-04-15 01:01:05,460 INFO L272 TraceCheckUtils]: 4: Hoare triple {7556#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-15 01:01:05,460 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7556#true} {7556#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-15 01:01:05,460 INFO L290 TraceCheckUtils]: 2: Hoare triple {7556#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-15 01:01:05,460 INFO L290 TraceCheckUtils]: 1: Hoare triple {7556#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7556#true} is VALID [2022-04-15 01:01:05,461 INFO L272 TraceCheckUtils]: 0: Hoare triple {7556#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-15 01:01:05,461 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 6 proven. 30 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-15 01:01:05,461 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [605231832] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:01:05,461 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:01:05,461 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 14, 14] total 35 [2022-04-15 01:01:05,461 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1300651671] [2022-04-15 01:01:05,461 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:01:05,462 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 35 states have (on average 1.3428571428571427) internal successors, (47), 34 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-15 01:01:05,462 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:01:05,462 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 35 states, 35 states have (on average 1.3428571428571427) internal successors, (47), 34 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:05,511 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:01:05,511 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-04-15 01:01:05,511 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:01:05,512 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-04-15 01:01:05,512 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=125, Invalid=1065, Unknown=0, NotChecked=0, Total=1190 [2022-04-15 01:01:05,512 INFO L87 Difference]: Start difference. First operand 69 states and 78 transitions. Second operand has 35 states, 35 states have (on average 1.3428571428571427) internal successors, (47), 34 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:11,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:11,291 INFO L93 Difference]: Finished difference Result 128 states and 155 transitions. [2022-04-15 01:01:11,291 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2022-04-15 01:01:11,291 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 35 states have (on average 1.3428571428571427) internal successors, (47), 34 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-15 01:01:11,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:01:11,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 35 states have (on average 1.3428571428571427) internal successors, (47), 34 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:11,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 111 transitions. [2022-04-15 01:01:11,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 35 states have (on average 1.3428571428571427) internal successors, (47), 34 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:11,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 111 transitions. [2022-04-15 01:01:11,293 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 56 states and 111 transitions. [2022-04-15 01:01:11,496 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 111 edges. 111 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:01:11,497 INFO L225 Difference]: With dead ends: 128 [2022-04-15 01:01:11,497 INFO L226 Difference]: Without dead ends: 85 [2022-04-15 01:01:11,498 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1418 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=733, Invalid=6923, Unknown=0, NotChecked=0, Total=7656 [2022-04-15 01:01:11,499 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 43 mSDsluCounter, 107 mSDsCounter, 0 mSdLazyCounter, 1085 mSolverCounterSat, 187 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 43 SdHoareTripleChecker+Valid, 123 SdHoareTripleChecker+Invalid, 1272 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 187 IncrementalHoareTripleChecker+Valid, 1085 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-04-15 01:01:11,499 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [43 Valid, 123 Invalid, 1272 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [187 Valid, 1085 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2022-04-15 01:01:11,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2022-04-15 01:01:11,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 77. [2022-04-15 01:01:11,717 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:01:11,717 INFO L82 GeneralOperation]: Start isEquivalent. First operand 85 states. Second operand has 77 states, 72 states have (on average 1.1388888888888888) internal successors, (82), 72 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:11,717 INFO L74 IsIncluded]: Start isIncluded. First operand 85 states. Second operand has 77 states, 72 states have (on average 1.1388888888888888) internal successors, (82), 72 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:11,717 INFO L87 Difference]: Start difference. First operand 85 states. Second operand has 77 states, 72 states have (on average 1.1388888888888888) internal successors, (82), 72 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:11,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:11,728 INFO L93 Difference]: Finished difference Result 85 states and 94 transitions. [2022-04-15 01:01:11,728 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 94 transitions. [2022-04-15 01:01:11,728 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:01:11,728 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:01:11,728 INFO L74 IsIncluded]: Start isIncluded. First operand has 77 states, 72 states have (on average 1.1388888888888888) internal successors, (82), 72 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 85 states. [2022-04-15 01:01:11,728 INFO L87 Difference]: Start difference. First operand has 77 states, 72 states have (on average 1.1388888888888888) internal successors, (82), 72 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 85 states. [2022-04-15 01:01:11,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:11,729 INFO L93 Difference]: Finished difference Result 85 states and 94 transitions. [2022-04-15 01:01:11,729 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 94 transitions. [2022-04-15 01:01:11,730 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:01:11,730 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:01:11,730 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:01:11,730 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:01:11,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 72 states have (on average 1.1388888888888888) internal successors, (82), 72 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:11,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 86 transitions. [2022-04-15 01:01:11,731 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 86 transitions. Word has length 32 [2022-04-15 01:01:11,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:01:11,731 INFO L478 AbstractCegarLoop]: Abstraction has 77 states and 86 transitions. [2022-04-15 01:01:11,731 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 35 states have (on average 1.3428571428571427) internal successors, (47), 34 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:11,731 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 86 transitions. [2022-04-15 01:01:11,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-15 01:01:11,732 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:01:11,732 INFO L499 BasicCegarLoop]: trace histogram [8, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:01:11,748 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2022-04-15 01:01:11,935 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:01:11,935 INFO L403 AbstractCegarLoop]: === Iteration 22 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:01:11,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:01:11,936 INFO L85 PathProgramCache]: Analyzing trace with hash -1125856974, now seen corresponding path program 16 times [2022-04-15 01:01:11,936 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:01:11,936 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1594586333] [2022-04-15 01:01:11,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:01:11,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:01:11,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:12,227 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:01:12,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:12,231 INFO L290 TraceCheckUtils]: 0: Hoare triple {8407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8386#true} is VALID [2022-04-15 01:01:12,231 INFO L290 TraceCheckUtils]: 1: Hoare triple {8386#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-15 01:01:12,231 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8386#true} {8386#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-15 01:01:12,231 INFO L272 TraceCheckUtils]: 0: Hoare triple {8386#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:01:12,231 INFO L290 TraceCheckUtils]: 1: Hoare triple {8407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8386#true} is VALID [2022-04-15 01:01:12,231 INFO L290 TraceCheckUtils]: 2: Hoare triple {8386#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-15 01:01:12,232 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8386#true} {8386#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-15 01:01:12,232 INFO L272 TraceCheckUtils]: 4: Hoare triple {8386#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-15 01:01:12,232 INFO L290 TraceCheckUtils]: 5: Hoare triple {8386#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8391#(= main_~y~0 0)} is VALID [2022-04-15 01:01:12,232 INFO L290 TraceCheckUtils]: 6: Hoare triple {8391#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8392#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:01:12,233 INFO L290 TraceCheckUtils]: 7: Hoare triple {8392#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8393#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:01:12,233 INFO L290 TraceCheckUtils]: 8: Hoare triple {8393#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8394#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:01:12,234 INFO L290 TraceCheckUtils]: 9: Hoare triple {8394#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8395#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:01:12,234 INFO L290 TraceCheckUtils]: 10: Hoare triple {8395#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8396#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:01:12,235 INFO L290 TraceCheckUtils]: 11: Hoare triple {8396#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8397#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:01:12,236 INFO L290 TraceCheckUtils]: 12: Hoare triple {8397#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8398#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:01:12,236 INFO L290 TraceCheckUtils]: 13: Hoare triple {8398#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:01:12,237 INFO L290 TraceCheckUtils]: 14: Hoare triple {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:01:12,237 INFO L290 TraceCheckUtils]: 15: Hoare triple {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {8400#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-15 01:01:12,238 INFO L290 TraceCheckUtils]: 16: Hoare triple {8400#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8401#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-15 01:01:12,238 INFO L290 TraceCheckUtils]: 17: Hoare triple {8401#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8402#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 01:01:12,239 INFO L290 TraceCheckUtils]: 18: Hoare triple {8402#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8403#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:01:12,239 INFO L290 TraceCheckUtils]: 19: Hoare triple {8403#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8404#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:01:12,240 INFO L290 TraceCheckUtils]: 20: Hoare triple {8404#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8405#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:01:12,240 INFO L290 TraceCheckUtils]: 21: Hoare triple {8405#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8406#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-15 01:01:12,241 INFO L290 TraceCheckUtils]: 22: Hoare triple {8406#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-15 01:01:12,241 INFO L290 TraceCheckUtils]: 23: Hoare triple {8387#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8387#false} is VALID [2022-04-15 01:01:12,241 INFO L290 TraceCheckUtils]: 24: Hoare triple {8387#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8387#false} is VALID [2022-04-15 01:01:12,241 INFO L290 TraceCheckUtils]: 25: Hoare triple {8387#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8387#false} is VALID [2022-04-15 01:01:12,241 INFO L290 TraceCheckUtils]: 26: Hoare triple {8387#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8387#false} is VALID [2022-04-15 01:01:12,241 INFO L290 TraceCheckUtils]: 27: Hoare triple {8387#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8387#false} is VALID [2022-04-15 01:01:12,241 INFO L290 TraceCheckUtils]: 28: Hoare triple {8387#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-15 01:01:12,241 INFO L272 TraceCheckUtils]: 29: Hoare triple {8387#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {8387#false} is VALID [2022-04-15 01:01:12,241 INFO L290 TraceCheckUtils]: 30: Hoare triple {8387#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8387#false} is VALID [2022-04-15 01:01:12,241 INFO L290 TraceCheckUtils]: 31: Hoare triple {8387#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-15 01:01:12,241 INFO L290 TraceCheckUtils]: 32: Hoare triple {8387#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-15 01:01:12,242 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-15 01:01:12,242 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:01:12,242 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1594586333] [2022-04-15 01:01:12,242 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1594586333] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:01:12,242 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2132006953] [2022-04-15 01:01:12,242 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 01:01:12,242 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:01:12,242 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:01:12,243 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:01:12,265 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-15 01:01:12,293 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 01:01:12,293 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:01:12,294 INFO L263 TraceCheckSpWp]: Trace formula consists of 154 conjuncts, 42 conjunts are in the unsatisfiable core [2022-04-15 01:01:12,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:12,304 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:01:12,678 INFO L272 TraceCheckUtils]: 0: Hoare triple {8386#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-15 01:01:12,678 INFO L290 TraceCheckUtils]: 1: Hoare triple {8386#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8386#true} is VALID [2022-04-15 01:01:12,678 INFO L290 TraceCheckUtils]: 2: Hoare triple {8386#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-15 01:01:12,678 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8386#true} {8386#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-15 01:01:12,678 INFO L272 TraceCheckUtils]: 4: Hoare triple {8386#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-15 01:01:12,679 INFO L290 TraceCheckUtils]: 5: Hoare triple {8386#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8391#(= main_~y~0 0)} is VALID [2022-04-15 01:01:12,679 INFO L290 TraceCheckUtils]: 6: Hoare triple {8391#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8392#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:01:12,680 INFO L290 TraceCheckUtils]: 7: Hoare triple {8392#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8393#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:01:12,680 INFO L290 TraceCheckUtils]: 8: Hoare triple {8393#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8394#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:01:12,681 INFO L290 TraceCheckUtils]: 9: Hoare triple {8394#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8395#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:01:12,682 INFO L290 TraceCheckUtils]: 10: Hoare triple {8395#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8396#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:01:12,682 INFO L290 TraceCheckUtils]: 11: Hoare triple {8396#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8397#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:01:12,683 INFO L290 TraceCheckUtils]: 12: Hoare triple {8397#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8398#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:01:12,683 INFO L290 TraceCheckUtils]: 13: Hoare triple {8398#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:01:12,684 INFO L290 TraceCheckUtils]: 14: Hoare triple {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:01:12,684 INFO L290 TraceCheckUtils]: 15: Hoare triple {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {8456#(and (= main_~z~0 main_~y~0) (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:01:12,684 INFO L290 TraceCheckUtils]: 16: Hoare triple {8456#(and (= main_~z~0 main_~y~0) (<= main_~y~0 8) (<= 8 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8460#(and (<= main_~y~0 8) (<= 8 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-15 01:01:12,685 INFO L290 TraceCheckUtils]: 17: Hoare triple {8460#(and (<= main_~y~0 8) (<= 8 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8464#(and (<= main_~y~0 8) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 8 main_~y~0))} is VALID [2022-04-15 01:01:12,686 INFO L290 TraceCheckUtils]: 18: Hoare triple {8464#(and (<= main_~y~0 8) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 8 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8468#(and (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:01:12,686 INFO L290 TraceCheckUtils]: 19: Hoare triple {8468#(and (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= main_~y~0 8) (<= 8 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8472#(and (= (+ main_~z~0 3) (+ (- 1) main_~y~0)) (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:01:12,687 INFO L290 TraceCheckUtils]: 20: Hoare triple {8472#(and (= (+ main_~z~0 3) (+ (- 1) main_~y~0)) (<= main_~y~0 8) (<= 8 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8476#(and (<= main_~y~0 8) (= (+ (- 1) main_~y~0) (+ main_~z~0 4)) (<= 8 main_~y~0))} is VALID [2022-04-15 01:01:12,687 INFO L290 TraceCheckUtils]: 21: Hoare triple {8476#(and (<= main_~y~0 8) (= (+ (- 1) main_~y~0) (+ main_~z~0 4)) (<= 8 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:01:12,688 INFO L290 TraceCheckUtils]: 22: Hoare triple {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:01:12,688 INFO L290 TraceCheckUtils]: 23: Hoare triple {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8398#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:01:12,689 INFO L290 TraceCheckUtils]: 24: Hoare triple {8398#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8397#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:01:12,689 INFO L290 TraceCheckUtils]: 25: Hoare triple {8397#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8396#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:01:12,690 INFO L290 TraceCheckUtils]: 26: Hoare triple {8396#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8395#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:01:12,690 INFO L290 TraceCheckUtils]: 27: Hoare triple {8395#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8394#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:01:12,691 INFO L290 TraceCheckUtils]: 28: Hoare triple {8394#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-15 01:01:12,691 INFO L272 TraceCheckUtils]: 29: Hoare triple {8387#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {8387#false} is VALID [2022-04-15 01:01:12,691 INFO L290 TraceCheckUtils]: 30: Hoare triple {8387#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8387#false} is VALID [2022-04-15 01:01:12,691 INFO L290 TraceCheckUtils]: 31: Hoare triple {8387#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-15 01:01:12,691 INFO L290 TraceCheckUtils]: 32: Hoare triple {8387#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-15 01:01:12,691 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:01:12,691 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:01:13,077 INFO L290 TraceCheckUtils]: 32: Hoare triple {8387#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-15 01:01:13,077 INFO L290 TraceCheckUtils]: 31: Hoare triple {8387#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-15 01:01:13,077 INFO L290 TraceCheckUtils]: 30: Hoare triple {8387#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8387#false} is VALID [2022-04-15 01:01:13,078 INFO L272 TraceCheckUtils]: 29: Hoare triple {8387#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {8387#false} is VALID [2022-04-15 01:01:13,078 INFO L290 TraceCheckUtils]: 28: Hoare triple {8525#(< 0 (mod main_~y~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-15 01:01:13,079 INFO L290 TraceCheckUtils]: 27: Hoare triple {8529#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8525#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:01:13,079 INFO L290 TraceCheckUtils]: 26: Hoare triple {8533#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8529#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:01:13,080 INFO L290 TraceCheckUtils]: 25: Hoare triple {8537#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8533#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 01:01:13,081 INFO L290 TraceCheckUtils]: 24: Hoare triple {8541#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8537#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 01:01:13,081 INFO L290 TraceCheckUtils]: 23: Hoare triple {8545#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8541#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-15 01:01:13,082 INFO L290 TraceCheckUtils]: 22: Hoare triple {8545#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {8545#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-15 01:01:13,082 INFO L290 TraceCheckUtils]: 21: Hoare triple {8552#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8545#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-15 01:01:13,083 INFO L290 TraceCheckUtils]: 20: Hoare triple {8556#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8552#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-15 01:01:13,084 INFO L290 TraceCheckUtils]: 19: Hoare triple {8560#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8556#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:01:13,085 INFO L290 TraceCheckUtils]: 18: Hoare triple {8564#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8560#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} is VALID [2022-04-15 01:01:13,085 INFO L290 TraceCheckUtils]: 17: Hoare triple {8568#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8564#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:01:13,086 INFO L290 TraceCheckUtils]: 16: Hoare triple {8572#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8568#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))))} is VALID [2022-04-15 01:01:13,086 INFO L290 TraceCheckUtils]: 15: Hoare triple {8386#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {8572#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} is VALID [2022-04-15 01:01:13,086 INFO L290 TraceCheckUtils]: 14: Hoare triple {8386#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-15 01:01:13,086 INFO L290 TraceCheckUtils]: 13: Hoare triple {8386#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8386#true} is VALID [2022-04-15 01:01:13,087 INFO L290 TraceCheckUtils]: 12: Hoare triple {8386#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8386#true} is VALID [2022-04-15 01:01:13,087 INFO L290 TraceCheckUtils]: 11: Hoare triple {8386#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8386#true} is VALID [2022-04-15 01:01:13,087 INFO L290 TraceCheckUtils]: 10: Hoare triple {8386#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8386#true} is VALID [2022-04-15 01:01:13,087 INFO L290 TraceCheckUtils]: 9: Hoare triple {8386#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8386#true} is VALID [2022-04-15 01:01:13,087 INFO L290 TraceCheckUtils]: 8: Hoare triple {8386#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8386#true} is VALID [2022-04-15 01:01:13,087 INFO L290 TraceCheckUtils]: 7: Hoare triple {8386#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8386#true} is VALID [2022-04-15 01:01:13,087 INFO L290 TraceCheckUtils]: 6: Hoare triple {8386#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8386#true} is VALID [2022-04-15 01:01:13,087 INFO L290 TraceCheckUtils]: 5: Hoare triple {8386#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8386#true} is VALID [2022-04-15 01:01:13,087 INFO L272 TraceCheckUtils]: 4: Hoare triple {8386#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-15 01:01:13,087 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8386#true} {8386#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-15 01:01:13,087 INFO L290 TraceCheckUtils]: 2: Hoare triple {8386#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-15 01:01:13,088 INFO L290 TraceCheckUtils]: 1: Hoare triple {8386#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8386#true} is VALID [2022-04-15 01:01:13,088 INFO L272 TraceCheckUtils]: 0: Hoare triple {8386#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-15 01:01:13,088 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 6 proven. 30 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2022-04-15 01:01:13,088 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2132006953] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:01:13,088 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:01:13,088 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17, 14] total 37 [2022-04-15 01:01:13,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1264617054] [2022-04-15 01:01:13,088 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:01:13,089 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 1.5405405405405406) internal successors, (57), 36 states have internal predecessors, (57), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-15 01:01:13,089 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:01:13,089 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 37 states, 37 states have (on average 1.5405405405405406) internal successors, (57), 36 states have internal predecessors, (57), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:13,134 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:01:13,134 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-04-15 01:01:13,134 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:01:13,135 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-04-15 01:01:13,135 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=272, Invalid=1060, Unknown=0, NotChecked=0, Total=1332 [2022-04-15 01:01:13,136 INFO L87 Difference]: Start difference. First operand 77 states and 86 transitions. Second operand has 37 states, 37 states have (on average 1.5405405405405406) internal successors, (57), 36 states have internal predecessors, (57), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:16,958 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:16,958 INFO L93 Difference]: Finished difference Result 200 states and 234 transitions. [2022-04-15 01:01:16,958 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2022-04-15 01:01:16,958 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 1.5405405405405406) internal successors, (57), 36 states have internal predecessors, (57), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-15 01:01:16,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:01:16,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.5405405405405406) internal successors, (57), 36 states have internal predecessors, (57), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:16,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 133 transitions. [2022-04-15 01:01:16,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.5405405405405406) internal successors, (57), 36 states have internal predecessors, (57), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:16,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 133 transitions. [2022-04-15 01:01:16,961 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 57 states and 133 transitions. [2022-04-15 01:01:17,127 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 133 edges. 133 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:01:17,139 INFO L225 Difference]: With dead ends: 200 [2022-04-15 01:01:17,139 INFO L226 Difference]: Without dead ends: 187 [2022-04-15 01:01:17,140 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 64 SyntacticMatches, 1 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2401 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=1751, Invalid=6439, Unknown=0, NotChecked=0, Total=8190 [2022-04-15 01:01:17,142 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 290 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 657 mSolverCounterSat, 325 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 290 SdHoareTripleChecker+Valid, 93 SdHoareTripleChecker+Invalid, 982 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 325 IncrementalHoareTripleChecker+Valid, 657 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-15 01:01:17,142 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [290 Valid, 93 Invalid, 982 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [325 Valid, 657 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-15 01:01:17,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2022-04-15 01:01:17,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 84. [2022-04-15 01:01:17,435 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:01:17,435 INFO L82 GeneralOperation]: Start isEquivalent. First operand 187 states. Second operand has 84 states, 79 states have (on average 1.139240506329114) internal successors, (90), 79 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:17,436 INFO L74 IsIncluded]: Start isIncluded. First operand 187 states. Second operand has 84 states, 79 states have (on average 1.139240506329114) internal successors, (90), 79 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:17,436 INFO L87 Difference]: Start difference. First operand 187 states. Second operand has 84 states, 79 states have (on average 1.139240506329114) internal successors, (90), 79 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:17,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:17,438 INFO L93 Difference]: Finished difference Result 187 states and 213 transitions. [2022-04-15 01:01:17,438 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 213 transitions. [2022-04-15 01:01:17,438 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:01:17,438 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:01:17,438 INFO L74 IsIncluded]: Start isIncluded. First operand has 84 states, 79 states have (on average 1.139240506329114) internal successors, (90), 79 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 187 states. [2022-04-15 01:01:17,438 INFO L87 Difference]: Start difference. First operand has 84 states, 79 states have (on average 1.139240506329114) internal successors, (90), 79 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 187 states. [2022-04-15 01:01:17,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:17,441 INFO L93 Difference]: Finished difference Result 187 states and 213 transitions. [2022-04-15 01:01:17,441 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 213 transitions. [2022-04-15 01:01:17,441 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:01:17,441 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:01:17,441 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:01:17,441 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:01:17,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 84 states, 79 states have (on average 1.139240506329114) internal successors, (90), 79 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:17,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 94 transitions. [2022-04-15 01:01:17,442 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 94 transitions. Word has length 33 [2022-04-15 01:01:17,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:01:17,442 INFO L478 AbstractCegarLoop]: Abstraction has 84 states and 94 transitions. [2022-04-15 01:01:17,442 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 1.5405405405405406) internal successors, (57), 36 states have internal predecessors, (57), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:17,442 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 94 transitions. [2022-04-15 01:01:17,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-15 01:01:17,443 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:01:17,443 INFO L499 BasicCegarLoop]: trace histogram [7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:01:17,461 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-04-15 01:01:17,655 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:01:17,655 INFO L403 AbstractCegarLoop]: === Iteration 23 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:01:17,656 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:01:17,656 INFO L85 PathProgramCache]: Analyzing trace with hash -1822415150, now seen corresponding path program 17 times [2022-04-15 01:01:17,656 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:01:17,656 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [776944420] [2022-04-15 01:01:17,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:01:17,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:01:17,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:17,835 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:01:17,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:17,838 INFO L290 TraceCheckUtils]: 0: Hoare triple {9590#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9575#true} is VALID [2022-04-15 01:01:17,838 INFO L290 TraceCheckUtils]: 1: Hoare triple {9575#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-15 01:01:17,838 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9575#true} {9575#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-15 01:01:17,839 INFO L272 TraceCheckUtils]: 0: Hoare triple {9575#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9590#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:01:17,839 INFO L290 TraceCheckUtils]: 1: Hoare triple {9590#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9575#true} is VALID [2022-04-15 01:01:17,839 INFO L290 TraceCheckUtils]: 2: Hoare triple {9575#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-15 01:01:17,839 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9575#true} {9575#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-15 01:01:17,839 INFO L272 TraceCheckUtils]: 4: Hoare triple {9575#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-15 01:01:17,839 INFO L290 TraceCheckUtils]: 5: Hoare triple {9575#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9575#true} is VALID [2022-04-15 01:01:17,839 INFO L290 TraceCheckUtils]: 6: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:17,839 INFO L290 TraceCheckUtils]: 7: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:17,839 INFO L290 TraceCheckUtils]: 8: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:17,839 INFO L290 TraceCheckUtils]: 9: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:17,840 INFO L290 TraceCheckUtils]: 10: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:17,840 INFO L290 TraceCheckUtils]: 11: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:17,840 INFO L290 TraceCheckUtils]: 12: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:17,840 INFO L290 TraceCheckUtils]: 13: Hoare triple {9575#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:17,841 INFO L290 TraceCheckUtils]: 14: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:17,841 INFO L290 TraceCheckUtils]: 15: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:01:17,842 INFO L290 TraceCheckUtils]: 16: Hoare triple {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:17,843 INFO L290 TraceCheckUtils]: 17: Hoare triple {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:17,843 INFO L290 TraceCheckUtils]: 18: Hoare triple {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:17,844 INFO L290 TraceCheckUtils]: 19: Hoare triple {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:01:17,845 INFO L290 TraceCheckUtils]: 20: Hoare triple {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:17,845 INFO L290 TraceCheckUtils]: 21: Hoare triple {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:17,846 INFO L290 TraceCheckUtils]: 22: Hoare triple {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:17,847 INFO L290 TraceCheckUtils]: 23: Hoare triple {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:17,847 INFO L290 TraceCheckUtils]: 24: Hoare triple {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:01:17,848 INFO L290 TraceCheckUtils]: 25: Hoare triple {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:17,849 INFO L290 TraceCheckUtils]: 26: Hoare triple {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:17,849 INFO L290 TraceCheckUtils]: 27: Hoare triple {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:17,850 INFO L290 TraceCheckUtils]: 28: Hoare triple {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:01:17,851 INFO L290 TraceCheckUtils]: 29: Hoare triple {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:17,851 INFO L290 TraceCheckUtils]: 30: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:17,852 INFO L272 TraceCheckUtils]: 31: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {9588#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 01:01:17,852 INFO L290 TraceCheckUtils]: 32: Hoare triple {9588#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9589#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 01:01:17,852 INFO L290 TraceCheckUtils]: 33: Hoare triple {9589#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9576#false} is VALID [2022-04-15 01:01:17,852 INFO L290 TraceCheckUtils]: 34: Hoare triple {9576#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9576#false} is VALID [2022-04-15 01:01:17,853 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-15 01:01:17,853 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:01:17,853 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [776944420] [2022-04-15 01:01:17,853 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [776944420] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:01:17,853 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [465352221] [2022-04-15 01:01:17,853 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-15 01:01:17,853 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:01:17,853 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:01:17,854 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:01:17,879 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-04-15 01:01:18,371 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2022-04-15 01:01:18,371 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:01:18,374 INFO L263 TraceCheckSpWp]: Trace formula consists of 164 conjuncts, 32 conjunts are in the unsatisfiable core [2022-04-15 01:01:18,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:18,384 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:01:18,618 INFO L272 TraceCheckUtils]: 0: Hoare triple {9575#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-15 01:01:18,618 INFO L290 TraceCheckUtils]: 1: Hoare triple {9575#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9575#true} is VALID [2022-04-15 01:01:18,618 INFO L290 TraceCheckUtils]: 2: Hoare triple {9575#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-15 01:01:18,618 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9575#true} {9575#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-15 01:01:18,619 INFO L272 TraceCheckUtils]: 4: Hoare triple {9575#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-15 01:01:18,619 INFO L290 TraceCheckUtils]: 5: Hoare triple {9575#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9575#true} is VALID [2022-04-15 01:01:18,619 INFO L290 TraceCheckUtils]: 6: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:18,619 INFO L290 TraceCheckUtils]: 7: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:18,619 INFO L290 TraceCheckUtils]: 8: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:18,619 INFO L290 TraceCheckUtils]: 9: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:18,619 INFO L290 TraceCheckUtils]: 10: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:18,619 INFO L290 TraceCheckUtils]: 11: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:18,619 INFO L290 TraceCheckUtils]: 12: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:18,620 INFO L290 TraceCheckUtils]: 13: Hoare triple {9575#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:18,620 INFO L290 TraceCheckUtils]: 14: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:18,621 INFO L290 TraceCheckUtils]: 15: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:01:18,621 INFO L290 TraceCheckUtils]: 16: Hoare triple {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,622 INFO L290 TraceCheckUtils]: 17: Hoare triple {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,623 INFO L290 TraceCheckUtils]: 18: Hoare triple {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,625 INFO L290 TraceCheckUtils]: 19: Hoare triple {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:01:18,626 INFO L290 TraceCheckUtils]: 20: Hoare triple {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,627 INFO L290 TraceCheckUtils]: 21: Hoare triple {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,627 INFO L290 TraceCheckUtils]: 22: Hoare triple {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,628 INFO L290 TraceCheckUtils]: 23: Hoare triple {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,629 INFO L290 TraceCheckUtils]: 24: Hoare triple {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:01:18,629 INFO L290 TraceCheckUtils]: 25: Hoare triple {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,630 INFO L290 TraceCheckUtils]: 26: Hoare triple {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,631 INFO L290 TraceCheckUtils]: 27: Hoare triple {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,631 INFO L290 TraceCheckUtils]: 28: Hoare triple {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:01:18,632 INFO L290 TraceCheckUtils]: 29: Hoare triple {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:18,633 INFO L290 TraceCheckUtils]: 30: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:18,633 INFO L272 TraceCheckUtils]: 31: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {9687#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:01:18,634 INFO L290 TraceCheckUtils]: 32: Hoare triple {9687#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9691#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:01:18,634 INFO L290 TraceCheckUtils]: 33: Hoare triple {9691#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9576#false} is VALID [2022-04-15 01:01:18,634 INFO L290 TraceCheckUtils]: 34: Hoare triple {9576#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9576#false} is VALID [2022-04-15 01:01:18,634 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-15 01:01:18,634 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:01:18,913 INFO L290 TraceCheckUtils]: 34: Hoare triple {9576#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9576#false} is VALID [2022-04-15 01:01:18,914 INFO L290 TraceCheckUtils]: 33: Hoare triple {9691#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9576#false} is VALID [2022-04-15 01:01:18,914 INFO L290 TraceCheckUtils]: 32: Hoare triple {9687#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9691#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:01:18,915 INFO L272 TraceCheckUtils]: 31: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {9687#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:01:18,915 INFO L290 TraceCheckUtils]: 30: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:18,916 INFO L290 TraceCheckUtils]: 29: Hoare triple {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:18,917 INFO L290 TraceCheckUtils]: 28: Hoare triple {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:01:18,918 INFO L290 TraceCheckUtils]: 27: Hoare triple {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,919 INFO L290 TraceCheckUtils]: 26: Hoare triple {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,919 INFO L290 TraceCheckUtils]: 25: Hoare triple {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,920 INFO L290 TraceCheckUtils]: 24: Hoare triple {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:01:18,921 INFO L290 TraceCheckUtils]: 23: Hoare triple {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,921 INFO L290 TraceCheckUtils]: 22: Hoare triple {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,922 INFO L290 TraceCheckUtils]: 21: Hoare triple {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,923 INFO L290 TraceCheckUtils]: 20: Hoare triple {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,923 INFO L290 TraceCheckUtils]: 19: Hoare triple {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:01:18,924 INFO L290 TraceCheckUtils]: 18: Hoare triple {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,925 INFO L290 TraceCheckUtils]: 17: Hoare triple {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,926 INFO L290 TraceCheckUtils]: 16: Hoare triple {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:01:18,926 INFO L290 TraceCheckUtils]: 15: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:01:18,927 INFO L290 TraceCheckUtils]: 14: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:18,927 INFO L290 TraceCheckUtils]: 13: Hoare triple {9575#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:01:18,927 INFO L290 TraceCheckUtils]: 12: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:18,927 INFO L290 TraceCheckUtils]: 11: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:18,927 INFO L290 TraceCheckUtils]: 10: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:18,927 INFO L290 TraceCheckUtils]: 9: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:18,927 INFO L290 TraceCheckUtils]: 8: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:18,928 INFO L290 TraceCheckUtils]: 7: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:18,928 INFO L290 TraceCheckUtils]: 6: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-15 01:01:18,928 INFO L290 TraceCheckUtils]: 5: Hoare triple {9575#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9575#true} is VALID [2022-04-15 01:01:18,928 INFO L272 TraceCheckUtils]: 4: Hoare triple {9575#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-15 01:01:18,928 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9575#true} {9575#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-15 01:01:18,928 INFO L290 TraceCheckUtils]: 2: Hoare triple {9575#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-15 01:01:18,928 INFO L290 TraceCheckUtils]: 1: Hoare triple {9575#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9575#true} is VALID [2022-04-15 01:01:18,928 INFO L272 TraceCheckUtils]: 0: Hoare triple {9575#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-15 01:01:18,928 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-15 01:01:18,928 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [465352221] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:01:18,929 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:01:18,929 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 15 [2022-04-15 01:01:18,929 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1706145238] [2022-04-15 01:01:18,929 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:01:18,932 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 1.8666666666666667) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-15 01:01:18,932 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:01:18,933 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 1.8666666666666667) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:18,960 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:01:18,960 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-15 01:01:18,960 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:01:18,960 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-15 01:01:18,960 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2022-04-15 01:01:18,960 INFO L87 Difference]: Start difference. First operand 84 states and 94 transitions. Second operand has 15 states, 15 states have (on average 1.8666666666666667) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:19,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:19,914 INFO L93 Difference]: Finished difference Result 122 states and 135 transitions. [2022-04-15 01:01:19,914 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-15 01:01:19,915 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 1.8666666666666667) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-15 01:01:19,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:01:19,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.8666666666666667) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:19,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 42 transitions. [2022-04-15 01:01:19,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.8666666666666667) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:19,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 42 transitions. [2022-04-15 01:01:19,916 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 42 transitions. [2022-04-15 01:01:20,064 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:01:20,065 INFO L225 Difference]: With dead ends: 122 [2022-04-15 01:01:20,065 INFO L226 Difference]: Without dead ends: 109 [2022-04-15 01:01:20,066 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 74 SyntacticMatches, 3 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=74, Invalid=526, Unknown=0, NotChecked=0, Total=600 [2022-04-15 01:01:20,066 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 19 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 318 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 74 SdHoareTripleChecker+Invalid, 332 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 318 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-15 01:01:20,066 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [19 Valid, 74 Invalid, 332 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 318 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-15 01:01:20,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2022-04-15 01:01:20,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 92. [2022-04-15 01:01:20,549 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:01:20,551 INFO L82 GeneralOperation]: Start isEquivalent. First operand 109 states. Second operand has 92 states, 87 states have (on average 1.1379310344827587) internal successors, (99), 87 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:20,551 INFO L74 IsIncluded]: Start isIncluded. First operand 109 states. Second operand has 92 states, 87 states have (on average 1.1379310344827587) internal successors, (99), 87 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:20,559 INFO L87 Difference]: Start difference. First operand 109 states. Second operand has 92 states, 87 states have (on average 1.1379310344827587) internal successors, (99), 87 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:20,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:20,561 INFO L93 Difference]: Finished difference Result 109 states and 121 transitions. [2022-04-15 01:01:20,561 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 121 transitions. [2022-04-15 01:01:20,561 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:01:20,561 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:01:20,562 INFO L74 IsIncluded]: Start isIncluded. First operand has 92 states, 87 states have (on average 1.1379310344827587) internal successors, (99), 87 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 109 states. [2022-04-15 01:01:20,562 INFO L87 Difference]: Start difference. First operand has 92 states, 87 states have (on average 1.1379310344827587) internal successors, (99), 87 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 109 states. [2022-04-15 01:01:20,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:20,563 INFO L93 Difference]: Finished difference Result 109 states and 121 transitions. [2022-04-15 01:01:20,563 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 121 transitions. [2022-04-15 01:01:20,563 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:01:20,563 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:01:20,563 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:01:20,564 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:01:20,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 87 states have (on average 1.1379310344827587) internal successors, (99), 87 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:20,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 103 transitions. [2022-04-15 01:01:20,565 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 103 transitions. Word has length 35 [2022-04-15 01:01:20,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:01:20,565 INFO L478 AbstractCegarLoop]: Abstraction has 92 states and 103 transitions. [2022-04-15 01:01:20,565 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 1.8666666666666667) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:20,565 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 103 transitions. [2022-04-15 01:01:20,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-04-15 01:01:20,565 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:01:20,565 INFO L499 BasicCegarLoop]: trace histogram [9, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:01:20,570 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Ended with exit code 0 [2022-04-15 01:01:20,770 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:01:20,770 INFO L403 AbstractCegarLoop]: === Iteration 24 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:01:20,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:01:20,771 INFO L85 PathProgramCache]: Analyzing trace with hash -807949186, now seen corresponding path program 18 times [2022-04-15 01:01:20,771 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:01:20,771 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1998119765] [2022-04-15 01:01:20,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:01:20,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:01:20,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:21,039 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:01:21,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:21,043 INFO L290 TraceCheckUtils]: 0: Hoare triple {10398#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10376#true} is VALID [2022-04-15 01:01:21,043 INFO L290 TraceCheckUtils]: 1: Hoare triple {10376#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-15 01:01:21,043 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10376#true} {10376#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-15 01:01:21,043 INFO L272 TraceCheckUtils]: 0: Hoare triple {10376#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10398#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:01:21,043 INFO L290 TraceCheckUtils]: 1: Hoare triple {10398#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10376#true} is VALID [2022-04-15 01:01:21,043 INFO L290 TraceCheckUtils]: 2: Hoare triple {10376#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-15 01:01:21,044 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10376#true} {10376#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-15 01:01:21,044 INFO L272 TraceCheckUtils]: 4: Hoare triple {10376#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-15 01:01:21,044 INFO L290 TraceCheckUtils]: 5: Hoare triple {10376#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10381#(= main_~y~0 0)} is VALID [2022-04-15 01:01:21,044 INFO L290 TraceCheckUtils]: 6: Hoare triple {10381#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10382#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:01:21,045 INFO L290 TraceCheckUtils]: 7: Hoare triple {10382#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10383#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:01:21,045 INFO L290 TraceCheckUtils]: 8: Hoare triple {10383#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10384#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:01:21,046 INFO L290 TraceCheckUtils]: 9: Hoare triple {10384#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10385#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:01:21,046 INFO L290 TraceCheckUtils]: 10: Hoare triple {10385#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10386#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:01:21,047 INFO L290 TraceCheckUtils]: 11: Hoare triple {10386#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10387#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:01:21,048 INFO L290 TraceCheckUtils]: 12: Hoare triple {10387#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10388#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:01:21,048 INFO L290 TraceCheckUtils]: 13: Hoare triple {10388#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10389#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:01:21,049 INFO L290 TraceCheckUtils]: 14: Hoare triple {10389#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10390#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:01:21,049 INFO L290 TraceCheckUtils]: 15: Hoare triple {10390#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10390#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:01:21,049 INFO L290 TraceCheckUtils]: 16: Hoare triple {10390#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {10391#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-15 01:01:21,050 INFO L290 TraceCheckUtils]: 17: Hoare triple {10391#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10392#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-15 01:01:21,050 INFO L290 TraceCheckUtils]: 18: Hoare triple {10392#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10393#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-15 01:01:21,051 INFO L290 TraceCheckUtils]: 19: Hoare triple {10393#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10394#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 01:01:21,051 INFO L290 TraceCheckUtils]: 20: Hoare triple {10394#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10395#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:01:21,052 INFO L290 TraceCheckUtils]: 21: Hoare triple {10395#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10396#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:01:21,053 INFO L290 TraceCheckUtils]: 22: Hoare triple {10396#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10397#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 01:01:21,053 INFO L290 TraceCheckUtils]: 23: Hoare triple {10397#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-15 01:01:21,053 INFO L290 TraceCheckUtils]: 24: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-15 01:01:21,053 INFO L290 TraceCheckUtils]: 25: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-15 01:01:21,053 INFO L290 TraceCheckUtils]: 26: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-15 01:01:21,053 INFO L290 TraceCheckUtils]: 27: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-15 01:01:21,053 INFO L290 TraceCheckUtils]: 28: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-15 01:01:21,054 INFO L290 TraceCheckUtils]: 29: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-15 01:01:21,054 INFO L290 TraceCheckUtils]: 30: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-15 01:01:21,054 INFO L290 TraceCheckUtils]: 31: Hoare triple {10377#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-15 01:01:21,054 INFO L272 TraceCheckUtils]: 32: Hoare triple {10377#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {10377#false} is VALID [2022-04-15 01:01:21,054 INFO L290 TraceCheckUtils]: 33: Hoare triple {10377#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10377#false} is VALID [2022-04-15 01:01:21,054 INFO L290 TraceCheckUtils]: 34: Hoare triple {10377#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-15 01:01:21,054 INFO L290 TraceCheckUtils]: 35: Hoare triple {10377#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-15 01:01:21,054 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-15 01:01:21,054 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:01:21,054 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1998119765] [2022-04-15 01:01:21,054 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1998119765] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:01:21,055 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [277654082] [2022-04-15 01:01:21,055 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-15 01:01:21,055 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:01:21,056 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:01:21,056 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:01:21,057 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-04-15 01:01:21,153 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2022-04-15 01:01:21,153 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:01:21,154 INFO L263 TraceCheckSpWp]: Trace formula consists of 169 conjuncts, 48 conjunts are in the unsatisfiable core [2022-04-15 01:01:21,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:21,163 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:01:21,453 INFO L272 TraceCheckUtils]: 0: Hoare triple {10376#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-15 01:01:21,454 INFO L290 TraceCheckUtils]: 1: Hoare triple {10376#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10376#true} is VALID [2022-04-15 01:01:21,454 INFO L290 TraceCheckUtils]: 2: Hoare triple {10376#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-15 01:01:21,454 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10376#true} {10376#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-15 01:01:21,454 INFO L272 TraceCheckUtils]: 4: Hoare triple {10376#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-15 01:01:21,454 INFO L290 TraceCheckUtils]: 5: Hoare triple {10376#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10381#(= main_~y~0 0)} is VALID [2022-04-15 01:01:21,455 INFO L290 TraceCheckUtils]: 6: Hoare triple {10381#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10382#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:01:21,455 INFO L290 TraceCheckUtils]: 7: Hoare triple {10382#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10383#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:01:21,456 INFO L290 TraceCheckUtils]: 8: Hoare triple {10383#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10384#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:01:21,456 INFO L290 TraceCheckUtils]: 9: Hoare triple {10384#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10385#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:01:21,457 INFO L290 TraceCheckUtils]: 10: Hoare triple {10385#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10386#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:01:21,457 INFO L290 TraceCheckUtils]: 11: Hoare triple {10386#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10387#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:01:21,458 INFO L290 TraceCheckUtils]: 12: Hoare triple {10387#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10388#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:01:21,458 INFO L290 TraceCheckUtils]: 13: Hoare triple {10388#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10389#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:01:21,459 INFO L290 TraceCheckUtils]: 14: Hoare triple {10389#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10390#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:01:21,459 INFO L290 TraceCheckUtils]: 15: Hoare triple {10390#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10390#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:01:21,459 INFO L290 TraceCheckUtils]: 16: Hoare triple {10390#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {10450#(and (= main_~z~0 main_~y~0) (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:01:21,460 INFO L290 TraceCheckUtils]: 17: Hoare triple {10450#(and (= main_~z~0 main_~y~0) (<= 9 main_~y~0) (<= main_~y~0 9))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10454#(and (<= 9 main_~y~0) (<= main_~y~0 9) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-15 01:01:21,460 INFO L290 TraceCheckUtils]: 18: Hoare triple {10454#(and (<= 9 main_~y~0) (<= main_~y~0 9) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10458#(and (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:01:21,461 INFO L290 TraceCheckUtils]: 19: Hoare triple {10458#(and (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 9 main_~y~0) (<= main_~y~0 9))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10462#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:01:21,461 INFO L290 TraceCheckUtils]: 20: Hoare triple {10462#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= 9 main_~y~0) (<= main_~y~0 9))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10466#(and (<= 9 main_~y~0) (<= main_~y~0 9) (= (+ (- 2) main_~y~0) (+ main_~z~0 2)))} is VALID [2022-04-15 01:01:21,462 INFO L290 TraceCheckUtils]: 21: Hoare triple {10466#(and (<= 9 main_~y~0) (<= main_~y~0 9) (= (+ (- 2) main_~y~0) (+ main_~z~0 2)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10470#(and (= (+ main_~y~0 (- 4)) (+ main_~z~0 1)) (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:01:21,463 INFO L290 TraceCheckUtils]: 22: Hoare triple {10470#(and (= (+ main_~y~0 (- 4)) (+ main_~z~0 1)) (<= 9 main_~y~0) (<= main_~y~0 9))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10474#(and (= (+ main_~y~0 (- 4)) (+ main_~z~0 2)) (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:01:21,463 INFO L290 TraceCheckUtils]: 23: Hoare triple {10474#(and (= (+ main_~y~0 (- 4)) (+ main_~z~0 2)) (<= 9 main_~y~0) (<= main_~y~0 9))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-15 01:01:21,463 INFO L290 TraceCheckUtils]: 24: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-15 01:01:21,463 INFO L290 TraceCheckUtils]: 25: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-15 01:01:21,463 INFO L290 TraceCheckUtils]: 26: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-15 01:01:21,463 INFO L290 TraceCheckUtils]: 27: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-15 01:01:21,463 INFO L290 TraceCheckUtils]: 28: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-15 01:01:21,463 INFO L290 TraceCheckUtils]: 29: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-15 01:01:21,464 INFO L290 TraceCheckUtils]: 30: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-15 01:01:21,464 INFO L290 TraceCheckUtils]: 31: Hoare triple {10377#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-15 01:01:21,464 INFO L272 TraceCheckUtils]: 32: Hoare triple {10377#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {10377#false} is VALID [2022-04-15 01:01:21,464 INFO L290 TraceCheckUtils]: 33: Hoare triple {10377#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10377#false} is VALID [2022-04-15 01:01:21,464 INFO L290 TraceCheckUtils]: 34: Hoare triple {10377#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-15 01:01:21,464 INFO L290 TraceCheckUtils]: 35: Hoare triple {10377#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-15 01:01:21,464 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-15 01:01:21,464 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:01:21,938 INFO L290 TraceCheckUtils]: 35: Hoare triple {10377#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-15 01:01:21,938 INFO L290 TraceCheckUtils]: 34: Hoare triple {10377#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-15 01:01:21,939 INFO L290 TraceCheckUtils]: 33: Hoare triple {10377#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10377#false} is VALID [2022-04-15 01:01:21,939 INFO L272 TraceCheckUtils]: 32: Hoare triple {10377#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {10377#false} is VALID [2022-04-15 01:01:21,939 INFO L290 TraceCheckUtils]: 31: Hoare triple {10377#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-15 01:01:21,939 INFO L290 TraceCheckUtils]: 30: Hoare triple {10529#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-15 01:01:21,940 INFO L290 TraceCheckUtils]: 29: Hoare triple {10533#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10529#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-15 01:01:21,940 INFO L290 TraceCheckUtils]: 28: Hoare triple {10537#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10533#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-15 01:01:21,941 INFO L290 TraceCheckUtils]: 27: Hoare triple {10541#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10537#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-15 01:01:21,942 INFO L290 TraceCheckUtils]: 26: Hoare triple {10545#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10541#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-15 01:01:21,943 INFO L290 TraceCheckUtils]: 25: Hoare triple {10549#(not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10545#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:01:21,944 INFO L290 TraceCheckUtils]: 24: Hoare triple {10553#(not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10549#(not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:01:21,944 INFO L290 TraceCheckUtils]: 23: Hoare triple {10557#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {10553#(not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:01:21,945 INFO L290 TraceCheckUtils]: 22: Hoare triple {10561#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10557#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} is VALID [2022-04-15 01:01:21,946 INFO L290 TraceCheckUtils]: 21: Hoare triple {10565#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10561#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} is VALID [2022-04-15 01:01:21,946 INFO L290 TraceCheckUtils]: 20: Hoare triple {10569#(or (< 0 (mod (+ main_~z~0 4294967293) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10565#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} is VALID [2022-04-15 01:01:21,947 INFO L290 TraceCheckUtils]: 19: Hoare triple {10573#(or (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10569#(or (< 0 (mod (+ main_~z~0 4294967293) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} is VALID [2022-04-15 01:01:21,948 INFO L290 TraceCheckUtils]: 18: Hoare triple {10577#(or (< 0 (mod (+ 4294967291 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10573#(or (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} is VALID [2022-04-15 01:01:21,949 INFO L290 TraceCheckUtils]: 17: Hoare triple {10581#(or (< 0 (mod (+ 4294967290 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10577#(or (< 0 (mod (+ 4294967291 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} is VALID [2022-04-15 01:01:21,949 INFO L290 TraceCheckUtils]: 16: Hoare triple {10376#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {10581#(or (< 0 (mod (+ 4294967290 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} is VALID [2022-04-15 01:01:21,949 INFO L290 TraceCheckUtils]: 15: Hoare triple {10376#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-15 01:01:21,949 INFO L290 TraceCheckUtils]: 14: Hoare triple {10376#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10376#true} is VALID [2022-04-15 01:01:21,949 INFO L290 TraceCheckUtils]: 13: Hoare triple {10376#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10376#true} is VALID [2022-04-15 01:01:21,949 INFO L290 TraceCheckUtils]: 12: Hoare triple {10376#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10376#true} is VALID [2022-04-15 01:01:21,949 INFO L290 TraceCheckUtils]: 11: Hoare triple {10376#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10376#true} is VALID [2022-04-15 01:01:21,949 INFO L290 TraceCheckUtils]: 10: Hoare triple {10376#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10376#true} is VALID [2022-04-15 01:01:21,950 INFO L290 TraceCheckUtils]: 9: Hoare triple {10376#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10376#true} is VALID [2022-04-15 01:01:21,950 INFO L290 TraceCheckUtils]: 8: Hoare triple {10376#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10376#true} is VALID [2022-04-15 01:01:21,950 INFO L290 TraceCheckUtils]: 7: Hoare triple {10376#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10376#true} is VALID [2022-04-15 01:01:21,950 INFO L290 TraceCheckUtils]: 6: Hoare triple {10376#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10376#true} is VALID [2022-04-15 01:01:21,950 INFO L290 TraceCheckUtils]: 5: Hoare triple {10376#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10376#true} is VALID [2022-04-15 01:01:21,950 INFO L272 TraceCheckUtils]: 4: Hoare triple {10376#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-15 01:01:21,950 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10376#true} {10376#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-15 01:01:21,950 INFO L290 TraceCheckUtils]: 2: Hoare triple {10376#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-15 01:01:21,950 INFO L290 TraceCheckUtils]: 1: Hoare triple {10376#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10376#true} is VALID [2022-04-15 01:01:21,950 INFO L272 TraceCheckUtils]: 0: Hoare triple {10376#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-15 01:01:21,950 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 7 proven. 42 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-04-15 01:01:21,951 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [277654082] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:01:21,951 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:01:21,951 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 16] total 41 [2022-04-15 01:01:21,951 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [930698837] [2022-04-15 01:01:21,951 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:01:21,952 INFO L78 Accepts]: Start accepts. Automaton has has 41 states, 41 states have (on average 1.2926829268292683) internal successors, (53), 40 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-15 01:01:21,953 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:01:21,953 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 41 states, 41 states have (on average 1.2926829268292683) internal successors, (53), 40 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:22,009 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 58 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:01:22,009 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 41 states [2022-04-15 01:01:22,009 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:01:22,010 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2022-04-15 01:01:22,010 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=213, Invalid=1427, Unknown=0, NotChecked=0, Total=1640 [2022-04-15 01:01:22,010 INFO L87 Difference]: Start difference. First operand 92 states and 103 transitions. Second operand has 41 states, 41 states have (on average 1.2926829268292683) internal successors, (53), 40 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:30,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:30,512 INFO L93 Difference]: Finished difference Result 160 states and 191 transitions. [2022-04-15 01:01:30,512 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2022-04-15 01:01:30,512 INFO L78 Accepts]: Start accepts. Automaton has has 41 states, 41 states have (on average 1.2926829268292683) internal successors, (53), 40 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-15 01:01:30,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:01:30,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 1.2926829268292683) internal successors, (53), 40 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:30,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 134 transitions. [2022-04-15 01:01:30,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 1.2926829268292683) internal successors, (53), 40 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:30,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 134 transitions. [2022-04-15 01:01:30,515 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 72 states and 134 transitions. [2022-04-15 01:01:30,864 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 134 edges. 134 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:01:30,866 INFO L225 Difference]: With dead ends: 160 [2022-04-15 01:01:30,866 INFO L226 Difference]: Without dead ends: 124 [2022-04-15 01:01:30,868 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 62 SyntacticMatches, 1 SemanticMatches, 108 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2978 ImplicationChecksByTransitivity, 5.6s TimeCoverageRelationStatistics Valid=1227, Invalid=10763, Unknown=0, NotChecked=0, Total=11990 [2022-04-15 01:01:30,869 INFO L913 BasicCegarLoop]: 18 mSDtfsCounter, 51 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 1198 mSolverCounterSat, 187 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 51 SdHoareTripleChecker+Valid, 110 SdHoareTripleChecker+Invalid, 1385 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 187 IncrementalHoareTripleChecker+Valid, 1198 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2022-04-15 01:01:30,869 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [51 Valid, 110 Invalid, 1385 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [187 Valid, 1198 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2022-04-15 01:01:30,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2022-04-15 01:01:31,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 114. [2022-04-15 01:01:31,277 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:01:31,277 INFO L82 GeneralOperation]: Start isEquivalent. First operand 124 states. Second operand has 114 states, 109 states have (on average 1.1376146788990826) internal successors, (124), 109 states have internal predecessors, (124), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:31,278 INFO L74 IsIncluded]: Start isIncluded. First operand 124 states. Second operand has 114 states, 109 states have (on average 1.1376146788990826) internal successors, (124), 109 states have internal predecessors, (124), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:31,278 INFO L87 Difference]: Start difference. First operand 124 states. Second operand has 114 states, 109 states have (on average 1.1376146788990826) internal successors, (124), 109 states have internal predecessors, (124), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:31,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:31,280 INFO L93 Difference]: Finished difference Result 124 states and 138 transitions. [2022-04-15 01:01:31,280 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 138 transitions. [2022-04-15 01:01:31,280 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:01:31,280 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:01:31,281 INFO L74 IsIncluded]: Start isIncluded. First operand has 114 states, 109 states have (on average 1.1376146788990826) internal successors, (124), 109 states have internal predecessors, (124), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 124 states. [2022-04-15 01:01:31,281 INFO L87 Difference]: Start difference. First operand has 114 states, 109 states have (on average 1.1376146788990826) internal successors, (124), 109 states have internal predecessors, (124), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 124 states. [2022-04-15 01:01:31,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:01:31,282 INFO L93 Difference]: Finished difference Result 124 states and 138 transitions. [2022-04-15 01:01:31,282 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 138 transitions. [2022-04-15 01:01:31,282 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:01:31,282 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:01:31,282 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:01:31,282 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:01:31,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 114 states, 109 states have (on average 1.1376146788990826) internal successors, (124), 109 states have internal predecessors, (124), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:31,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 128 transitions. [2022-04-15 01:01:31,284 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 128 transitions. Word has length 36 [2022-04-15 01:01:31,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:01:31,284 INFO L478 AbstractCegarLoop]: Abstraction has 114 states and 128 transitions. [2022-04-15 01:01:31,284 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 41 states, 41 states have (on average 1.2926829268292683) internal successors, (53), 40 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:31,284 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 128 transitions. [2022-04-15 01:01:31,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2022-04-15 01:01:31,284 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:01:31,285 INFO L499 BasicCegarLoop]: trace histogram [10, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:01:31,302 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Ended with exit code 0 [2022-04-15 01:01:31,491 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2022-04-15 01:01:31,491 INFO L403 AbstractCegarLoop]: === Iteration 25 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:01:31,492 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:01:31,492 INFO L85 PathProgramCache]: Analyzing trace with hash -625866281, now seen corresponding path program 19 times [2022-04-15 01:01:31,492 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:01:31,492 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1222282713] [2022-04-15 01:01:31,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:01:31,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:01:31,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:31,820 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:01:31,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:31,828 INFO L290 TraceCheckUtils]: 0: Hoare triple {11492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11468#true} is VALID [2022-04-15 01:01:31,828 INFO L290 TraceCheckUtils]: 1: Hoare triple {11468#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-15 01:01:31,828 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11468#true} {11468#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-15 01:01:31,829 INFO L272 TraceCheckUtils]: 0: Hoare triple {11468#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:01:31,829 INFO L290 TraceCheckUtils]: 1: Hoare triple {11492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11468#true} is VALID [2022-04-15 01:01:31,829 INFO L290 TraceCheckUtils]: 2: Hoare triple {11468#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-15 01:01:31,829 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11468#true} {11468#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-15 01:01:31,829 INFO L272 TraceCheckUtils]: 4: Hoare triple {11468#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-15 01:01:31,830 INFO L290 TraceCheckUtils]: 5: Hoare triple {11468#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11473#(= main_~y~0 0)} is VALID [2022-04-15 01:01:31,830 INFO L290 TraceCheckUtils]: 6: Hoare triple {11473#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:01:31,831 INFO L290 TraceCheckUtils]: 7: Hoare triple {11474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11475#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:01:31,831 INFO L290 TraceCheckUtils]: 8: Hoare triple {11475#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:01:31,832 INFO L290 TraceCheckUtils]: 9: Hoare triple {11476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11477#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:01:31,832 INFO L290 TraceCheckUtils]: 10: Hoare triple {11477#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11478#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:01:31,833 INFO L290 TraceCheckUtils]: 11: Hoare triple {11478#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11479#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:01:31,833 INFO L290 TraceCheckUtils]: 12: Hoare triple {11479#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11480#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:01:31,834 INFO L290 TraceCheckUtils]: 13: Hoare triple {11480#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11481#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:01:31,834 INFO L290 TraceCheckUtils]: 14: Hoare triple {11481#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11482#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:01:31,835 INFO L290 TraceCheckUtils]: 15: Hoare triple {11482#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11483#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 01:01:31,835 INFO L290 TraceCheckUtils]: 16: Hoare triple {11483#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11483#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 01:01:31,835 INFO L290 TraceCheckUtils]: 17: Hoare triple {11483#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {11484#(and (<= main_~z~0 10) (<= 10 main_~z~0))} is VALID [2022-04-15 01:01:31,836 INFO L290 TraceCheckUtils]: 18: Hoare triple {11484#(and (<= main_~z~0 10) (<= 10 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11485#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-15 01:01:31,837 INFO L290 TraceCheckUtils]: 19: Hoare triple {11485#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11486#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-15 01:01:31,837 INFO L290 TraceCheckUtils]: 20: Hoare triple {11486#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11487#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-15 01:01:31,838 INFO L290 TraceCheckUtils]: 21: Hoare triple {11487#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11488#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 01:01:31,838 INFO L290 TraceCheckUtils]: 22: Hoare triple {11488#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11489#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:01:31,839 INFO L290 TraceCheckUtils]: 23: Hoare triple {11489#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11490#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:01:31,839 INFO L290 TraceCheckUtils]: 24: Hoare triple {11490#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11491#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 01:01:31,840 INFO L290 TraceCheckUtils]: 25: Hoare triple {11491#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-15 01:01:31,840 INFO L290 TraceCheckUtils]: 26: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-15 01:01:31,840 INFO L290 TraceCheckUtils]: 27: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-15 01:01:31,840 INFO L290 TraceCheckUtils]: 28: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-15 01:01:31,840 INFO L290 TraceCheckUtils]: 29: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-15 01:01:31,840 INFO L290 TraceCheckUtils]: 30: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-15 01:01:31,840 INFO L290 TraceCheckUtils]: 31: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-15 01:01:31,840 INFO L290 TraceCheckUtils]: 32: Hoare triple {11469#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-15 01:01:31,840 INFO L272 TraceCheckUtils]: 33: Hoare triple {11469#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {11469#false} is VALID [2022-04-15 01:01:31,840 INFO L290 TraceCheckUtils]: 34: Hoare triple {11469#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11469#false} is VALID [2022-04-15 01:01:31,841 INFO L290 TraceCheckUtils]: 35: Hoare triple {11469#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-15 01:01:31,841 INFO L290 TraceCheckUtils]: 36: Hoare triple {11469#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-15 01:01:31,841 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 0 proven. 83 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-15 01:01:31,841 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:01:31,841 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1222282713] [2022-04-15 01:01:31,841 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1222282713] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:01:31,841 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1209449078] [2022-04-15 01:01:31,841 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-15 01:01:31,841 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:01:31,841 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:01:31,842 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:01:31,868 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-04-15 01:01:31,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:31,897 INFO L263 TraceCheckSpWp]: Trace formula consists of 174 conjuncts, 39 conjunts are in the unsatisfiable core [2022-04-15 01:01:31,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:01:31,906 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:01:32,203 INFO L272 TraceCheckUtils]: 0: Hoare triple {11468#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-15 01:01:32,203 INFO L290 TraceCheckUtils]: 1: Hoare triple {11468#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11468#true} is VALID [2022-04-15 01:01:32,203 INFO L290 TraceCheckUtils]: 2: Hoare triple {11468#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-15 01:01:32,204 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11468#true} {11468#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-15 01:01:32,204 INFO L272 TraceCheckUtils]: 4: Hoare triple {11468#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-15 01:01:32,204 INFO L290 TraceCheckUtils]: 5: Hoare triple {11468#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11473#(= main_~y~0 0)} is VALID [2022-04-15 01:01:32,204 INFO L290 TraceCheckUtils]: 6: Hoare triple {11473#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:01:32,205 INFO L290 TraceCheckUtils]: 7: Hoare triple {11474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11475#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:01:32,206 INFO L290 TraceCheckUtils]: 8: Hoare triple {11475#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:01:32,206 INFO L290 TraceCheckUtils]: 9: Hoare triple {11476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11477#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:01:32,207 INFO L290 TraceCheckUtils]: 10: Hoare triple {11477#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11478#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:01:32,207 INFO L290 TraceCheckUtils]: 11: Hoare triple {11478#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11479#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:01:32,208 INFO L290 TraceCheckUtils]: 12: Hoare triple {11479#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11480#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:01:32,209 INFO L290 TraceCheckUtils]: 13: Hoare triple {11480#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11481#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:01:32,209 INFO L290 TraceCheckUtils]: 14: Hoare triple {11481#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11482#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:01:32,210 INFO L290 TraceCheckUtils]: 15: Hoare triple {11482#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11483#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 01:01:32,210 INFO L290 TraceCheckUtils]: 16: Hoare triple {11483#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11483#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 01:01:32,211 INFO L290 TraceCheckUtils]: 17: Hoare triple {11483#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {11484#(and (<= main_~z~0 10) (<= 10 main_~z~0))} is VALID [2022-04-15 01:01:32,211 INFO L290 TraceCheckUtils]: 18: Hoare triple {11484#(and (<= main_~z~0 10) (<= 10 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11485#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-15 01:01:32,212 INFO L290 TraceCheckUtils]: 19: Hoare triple {11485#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11486#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-15 01:01:32,212 INFO L290 TraceCheckUtils]: 20: Hoare triple {11486#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11487#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-15 01:01:32,213 INFO L290 TraceCheckUtils]: 21: Hoare triple {11487#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11488#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 01:01:32,213 INFO L290 TraceCheckUtils]: 22: Hoare triple {11488#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11489#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:01:32,214 INFO L290 TraceCheckUtils]: 23: Hoare triple {11489#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11490#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:01:32,215 INFO L290 TraceCheckUtils]: 24: Hoare triple {11490#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11568#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:01:32,215 INFO L290 TraceCheckUtils]: 25: Hoare triple {11568#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-15 01:01:32,215 INFO L290 TraceCheckUtils]: 26: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-15 01:01:32,215 INFO L290 TraceCheckUtils]: 27: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-15 01:01:32,215 INFO L290 TraceCheckUtils]: 28: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-15 01:01:32,216 INFO L290 TraceCheckUtils]: 29: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-15 01:01:32,216 INFO L290 TraceCheckUtils]: 30: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-15 01:01:32,216 INFO L290 TraceCheckUtils]: 31: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-15 01:01:32,216 INFO L290 TraceCheckUtils]: 32: Hoare triple {11469#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-15 01:01:32,216 INFO L272 TraceCheckUtils]: 33: Hoare triple {11469#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {11469#false} is VALID [2022-04-15 01:01:32,216 INFO L290 TraceCheckUtils]: 34: Hoare triple {11469#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11469#false} is VALID [2022-04-15 01:01:32,216 INFO L290 TraceCheckUtils]: 35: Hoare triple {11469#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-15 01:01:32,216 INFO L290 TraceCheckUtils]: 36: Hoare triple {11469#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-15 01:01:32,216 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 0 proven. 83 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-15 01:01:32,216 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:01:32,766 INFO L290 TraceCheckUtils]: 36: Hoare triple {11469#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-15 01:01:32,766 INFO L290 TraceCheckUtils]: 35: Hoare triple {11469#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-15 01:01:32,766 INFO L290 TraceCheckUtils]: 34: Hoare triple {11469#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11469#false} is VALID [2022-04-15 01:01:32,766 INFO L272 TraceCheckUtils]: 33: Hoare triple {11469#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {11469#false} is VALID [2022-04-15 01:01:32,766 INFO L290 TraceCheckUtils]: 32: Hoare triple {11469#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-15 01:01:32,766 INFO L290 TraceCheckUtils]: 31: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-15 01:01:32,766 INFO L290 TraceCheckUtils]: 30: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-15 01:01:32,766 INFO L290 TraceCheckUtils]: 29: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-15 01:01:32,767 INFO L290 TraceCheckUtils]: 28: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-15 01:01:32,767 INFO L290 TraceCheckUtils]: 27: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-15 01:01:32,767 INFO L290 TraceCheckUtils]: 26: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-15 01:01:32,767 INFO L290 TraceCheckUtils]: 25: Hoare triple {11638#(< 0 (mod main_~z~0 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-15 01:01:32,768 INFO L290 TraceCheckUtils]: 24: Hoare triple {11642#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11638#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 01:01:32,768 INFO L290 TraceCheckUtils]: 23: Hoare triple {11646#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11642#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-15 01:01:32,769 INFO L290 TraceCheckUtils]: 22: Hoare triple {11650#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11646#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-15 01:01:32,770 INFO L290 TraceCheckUtils]: 21: Hoare triple {11654#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11650#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-15 01:01:32,771 INFO L290 TraceCheckUtils]: 20: Hoare triple {11658#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11654#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} is VALID [2022-04-15 01:01:32,771 INFO L290 TraceCheckUtils]: 19: Hoare triple {11662#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11658#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} is VALID [2022-04-15 01:01:32,772 INFO L290 TraceCheckUtils]: 18: Hoare triple {11666#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11662#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} is VALID [2022-04-15 01:01:32,772 INFO L290 TraceCheckUtils]: 17: Hoare triple {11670#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {11666#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} is VALID [2022-04-15 01:01:32,773 INFO L290 TraceCheckUtils]: 16: Hoare triple {11670#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11670#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-15 01:01:32,773 INFO L290 TraceCheckUtils]: 15: Hoare triple {11677#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11670#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-15 01:01:32,774 INFO L290 TraceCheckUtils]: 14: Hoare triple {11681#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11677#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-15 01:01:32,775 INFO L290 TraceCheckUtils]: 13: Hoare triple {11685#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11681#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-15 01:01:32,775 INFO L290 TraceCheckUtils]: 12: Hoare triple {11689#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11685#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-15 01:01:32,776 INFO L290 TraceCheckUtils]: 11: Hoare triple {11693#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11689#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 01:01:32,776 INFO L290 TraceCheckUtils]: 10: Hoare triple {11697#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11693#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 01:01:32,777 INFO L290 TraceCheckUtils]: 9: Hoare triple {11701#(< 0 (mod main_~y~0 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11697#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:01:32,778 INFO L290 TraceCheckUtils]: 8: Hoare triple {11705#(< 0 (mod (+ main_~y~0 1) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11701#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:01:32,778 INFO L290 TraceCheckUtils]: 7: Hoare triple {11709#(< 0 (mod (+ main_~y~0 2) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11705#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-15 01:01:32,779 INFO L290 TraceCheckUtils]: 6: Hoare triple {11713#(< 0 (mod (+ main_~y~0 3) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11709#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-15 01:01:32,779 INFO L290 TraceCheckUtils]: 5: Hoare triple {11468#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11713#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-15 01:01:32,779 INFO L272 TraceCheckUtils]: 4: Hoare triple {11468#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-15 01:01:32,779 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11468#true} {11468#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-15 01:01:32,780 INFO L290 TraceCheckUtils]: 2: Hoare triple {11468#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-15 01:01:32,780 INFO L290 TraceCheckUtils]: 1: Hoare triple {11468#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11468#true} is VALID [2022-04-15 01:01:32,780 INFO L272 TraceCheckUtils]: 0: Hoare triple {11468#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-15 01:01:32,780 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 0 proven. 83 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-15 01:01:32,780 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1209449078] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:01:32,780 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:01:32,780 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 21] total 42 [2022-04-15 01:01:32,780 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1353734492] [2022-04-15 01:01:32,780 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:01:32,781 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 37 [2022-04-15 01:01:32,781 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:01:32,781 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:01:32,830 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:01:32,831 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-04-15 01:01:32,831 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:01:32,831 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-04-15 01:01:32,832 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=264, Invalid=1458, Unknown=0, NotChecked=0, Total=1722 [2022-04-15 01:01:32,832 INFO L87 Difference]: Start difference. First operand 114 states and 128 transitions. Second operand has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:02:09,882 WARN L232 SmtUtils]: Spent 18.41s on a formula simplification that was a NOOP. DAG size: 76 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:02:36,557 WARN L232 SmtUtils]: Spent 13.13s on a formula simplification that was a NOOP. DAG size: 73 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:02:53,015 WARN L232 SmtUtils]: Spent 9.95s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:03:05,887 WARN L232 SmtUtils]: Spent 5.83s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:03:22,787 WARN L232 SmtUtils]: Spent 8.47s on a formula simplification that was a NOOP. DAG size: 69 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:03:39,685 WARN L232 SmtUtils]: Spent 11.30s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:04:02,073 WARN L232 SmtUtils]: Spent 7.61s on a formula simplification that was a NOOP. DAG size: 66 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:04:11,926 WARN L232 SmtUtils]: Spent 5.61s on a formula simplification that was a NOOP. DAG size: 65 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:04:21,622 WARN L232 SmtUtils]: Spent 5.12s on a formula simplification that was a NOOP. DAG size: 64 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:04:31,411 WARN L232 SmtUtils]: Spent 5.26s on a formula simplification that was a NOOP. DAG size: 64 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:06:44,427 WARN L232 SmtUtils]: Spent 8.91s on a formula simplification that was a NOOP. DAG size: 74 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:07:03,564 WARN L232 SmtUtils]: Spent 6.39s on a formula simplification that was a NOOP. DAG size: 71 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:07:21,620 WARN L232 SmtUtils]: Spent 11.55s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:07:38,925 WARN L232 SmtUtils]: Spent 8.14s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:07:49,780 WARN L232 SmtUtils]: Spent 8.37s on a formula simplification that was a NOOP. DAG size: 66 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:08:13,232 WARN L232 SmtUtils]: Spent 7.47s on a formula simplification that was a NOOP. DAG size: 67 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:09:48,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:09:48,889 INFO L93 Difference]: Finished difference Result 341 states and 412 transitions. [2022-04-15 01:09:48,889 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 240 states. [2022-04-15 01:09:48,889 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 37 [2022-04-15 01:09:48,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:09:48,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:48,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 240 states to 240 states and 358 transitions. [2022-04-15 01:09:48,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:48,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 240 states to 240 states and 358 transitions. [2022-04-15 01:09:48,899 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 240 states and 358 transitions. [2022-04-15 01:09:55,336 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 358 edges. 358 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:09:55,341 INFO L225 Difference]: With dead ends: 341 [2022-04-15 01:09:55,341 INFO L226 Difference]: Without dead ends: 312 [2022-04-15 01:09:55,348 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 333 GetRequests, 55 SyntacticMatches, 1 SemanticMatches, 277 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29541 ImplicationChecksByTransitivity, 477.7s TimeCoverageRelationStatistics Valid=11398, Invalid=66163, Unknown=1, NotChecked=0, Total=77562 [2022-04-15 01:09:55,348 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 485 mSDsluCounter, 117 mSDsCounter, 0 mSdLazyCounter, 1231 mSolverCounterSat, 1895 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 8.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 485 SdHoareTripleChecker+Valid, 134 SdHoareTripleChecker+Invalid, 3126 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1895 IncrementalHoareTripleChecker+Valid, 1231 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 8.5s IncrementalHoareTripleChecker+Time [2022-04-15 01:09:55,348 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [485 Valid, 134 Invalid, 3126 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1895 Valid, 1231 Invalid, 0 Unknown, 0 Unchecked, 8.5s Time] [2022-04-15 01:09:55,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states. [2022-04-15 01:09:56,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 171. [2022-04-15 01:09:56,178 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:09:56,178 INFO L82 GeneralOperation]: Start isEquivalent. First operand 312 states. Second operand has 171 states, 166 states have (on average 1.1867469879518073) internal successors, (197), 166 states have internal predecessors, (197), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:56,178 INFO L74 IsIncluded]: Start isIncluded. First operand 312 states. Second operand has 171 states, 166 states have (on average 1.1867469879518073) internal successors, (197), 166 states have internal predecessors, (197), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:56,178 INFO L87 Difference]: Start difference. First operand 312 states. Second operand has 171 states, 166 states have (on average 1.1867469879518073) internal successors, (197), 166 states have internal predecessors, (197), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:56,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:09:56,184 INFO L93 Difference]: Finished difference Result 312 states and 352 transitions. [2022-04-15 01:09:56,184 INFO L276 IsEmpty]: Start isEmpty. Operand 312 states and 352 transitions. [2022-04-15 01:09:56,185 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:09:56,185 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:09:56,185 INFO L74 IsIncluded]: Start isIncluded. First operand has 171 states, 166 states have (on average 1.1867469879518073) internal successors, (197), 166 states have internal predecessors, (197), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 312 states. [2022-04-15 01:09:56,185 INFO L87 Difference]: Start difference. First operand has 171 states, 166 states have (on average 1.1867469879518073) internal successors, (197), 166 states have internal predecessors, (197), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 312 states. [2022-04-15 01:09:56,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:09:56,190 INFO L93 Difference]: Finished difference Result 312 states and 352 transitions. [2022-04-15 01:09:56,190 INFO L276 IsEmpty]: Start isEmpty. Operand 312 states and 352 transitions. [2022-04-15 01:09:56,190 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:09:56,191 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:09:56,191 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:09:56,191 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:09:56,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 171 states, 166 states have (on average 1.1867469879518073) internal successors, (197), 166 states have internal predecessors, (197), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:56,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 201 transitions. [2022-04-15 01:09:56,194 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 201 transitions. Word has length 37 [2022-04-15 01:09:56,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:09:56,194 INFO L478 AbstractCegarLoop]: Abstraction has 171 states and 201 transitions. [2022-04-15 01:09:56,194 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:56,194 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 201 transitions. [2022-04-15 01:09:56,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-04-15 01:09:56,195 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:09:56,195 INFO L499 BasicCegarLoop]: trace histogram [12, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:09:56,235 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2022-04-15 01:09:56,419 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2022-04-15 01:09:56,420 INFO L403 AbstractCegarLoop]: === Iteration 26 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:09:56,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:09:56,420 INFO L85 PathProgramCache]: Analyzing trace with hash -1368491133, now seen corresponding path program 20 times [2022-04-15 01:09:56,420 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:09:56,420 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2076531756] [2022-04-15 01:09:56,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:09:56,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:09:56,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:09:56,630 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:09:56,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:09:56,644 INFO L290 TraceCheckUtils]: 0: Hoare triple {13709#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13690#true} is VALID [2022-04-15 01:09:56,644 INFO L290 TraceCheckUtils]: 1: Hoare triple {13690#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13690#true} is VALID [2022-04-15 01:09:56,644 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13690#true} {13690#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13690#true} is VALID [2022-04-15 01:09:56,645 INFO L272 TraceCheckUtils]: 0: Hoare triple {13690#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13709#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:09:56,645 INFO L290 TraceCheckUtils]: 1: Hoare triple {13709#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13690#true} is VALID [2022-04-15 01:09:56,645 INFO L290 TraceCheckUtils]: 2: Hoare triple {13690#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13690#true} is VALID [2022-04-15 01:09:56,645 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13690#true} {13690#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13690#true} is VALID [2022-04-15 01:09:56,645 INFO L272 TraceCheckUtils]: 4: Hoare triple {13690#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13690#true} is VALID [2022-04-15 01:09:56,645 INFO L290 TraceCheckUtils]: 5: Hoare triple {13690#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13695#(= main_~y~0 0)} is VALID [2022-04-15 01:09:56,646 INFO L290 TraceCheckUtils]: 6: Hoare triple {13695#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13696#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:09:56,646 INFO L290 TraceCheckUtils]: 7: Hoare triple {13696#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13697#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:09:56,647 INFO L290 TraceCheckUtils]: 8: Hoare triple {13697#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13698#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:09:56,647 INFO L290 TraceCheckUtils]: 9: Hoare triple {13698#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13699#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:09:56,648 INFO L290 TraceCheckUtils]: 10: Hoare triple {13699#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13700#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:09:56,648 INFO L290 TraceCheckUtils]: 11: Hoare triple {13700#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13701#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:09:56,649 INFO L290 TraceCheckUtils]: 12: Hoare triple {13701#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13701#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:09:56,649 INFO L290 TraceCheckUtils]: 13: Hoare triple {13701#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {13702#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 01:09:56,650 INFO L290 TraceCheckUtils]: 14: Hoare triple {13702#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13703#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:09:56,650 INFO L290 TraceCheckUtils]: 15: Hoare triple {13703#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13704#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:09:56,651 INFO L290 TraceCheckUtils]: 16: Hoare triple {13704#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13705#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:09:56,651 INFO L290 TraceCheckUtils]: 17: Hoare triple {13705#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13706#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:09:56,652 INFO L290 TraceCheckUtils]: 18: Hoare triple {13706#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13707#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 01:09:56,652 INFO L290 TraceCheckUtils]: 19: Hoare triple {13707#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13708#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 01:09:56,653 INFO L290 TraceCheckUtils]: 20: Hoare triple {13708#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13691#false} is VALID [2022-04-15 01:09:56,653 INFO L290 TraceCheckUtils]: 21: Hoare triple {13691#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13691#false} is VALID [2022-04-15 01:09:56,653 INFO L290 TraceCheckUtils]: 22: Hoare triple {13691#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13691#false} is VALID [2022-04-15 01:09:56,653 INFO L290 TraceCheckUtils]: 23: Hoare triple {13691#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13691#false} is VALID [2022-04-15 01:09:56,653 INFO L290 TraceCheckUtils]: 24: Hoare triple {13691#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13691#false} is VALID [2022-04-15 01:09:56,653 INFO L290 TraceCheckUtils]: 25: Hoare triple {13691#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13691#false} is VALID [2022-04-15 01:09:56,653 INFO L290 TraceCheckUtils]: 26: Hoare triple {13691#false} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {13691#false} is VALID [2022-04-15 01:09:56,653 INFO L290 TraceCheckUtils]: 27: Hoare triple {13691#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13691#false} is VALID [2022-04-15 01:09:56,653 INFO L290 TraceCheckUtils]: 28: Hoare triple {13691#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13691#false} is VALID [2022-04-15 01:09:56,654 INFO L290 TraceCheckUtils]: 29: Hoare triple {13691#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13691#false} is VALID [2022-04-15 01:09:56,654 INFO L290 TraceCheckUtils]: 30: Hoare triple {13691#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13691#false} is VALID [2022-04-15 01:09:56,654 INFO L290 TraceCheckUtils]: 31: Hoare triple {13691#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13691#false} is VALID [2022-04-15 01:09:56,654 INFO L290 TraceCheckUtils]: 32: Hoare triple {13691#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13691#false} is VALID [2022-04-15 01:09:56,654 INFO L290 TraceCheckUtils]: 33: Hoare triple {13691#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13691#false} is VALID [2022-04-15 01:09:56,654 INFO L272 TraceCheckUtils]: 34: Hoare triple {13691#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {13691#false} is VALID [2022-04-15 01:09:56,654 INFO L290 TraceCheckUtils]: 35: Hoare triple {13691#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13691#false} is VALID [2022-04-15 01:09:56,654 INFO L290 TraceCheckUtils]: 36: Hoare triple {13691#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13691#false} is VALID [2022-04-15 01:09:56,654 INFO L290 TraceCheckUtils]: 37: Hoare triple {13691#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13691#false} is VALID [2022-04-15 01:09:56,654 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 42 proven. 42 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2022-04-15 01:09:56,654 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:09:56,655 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2076531756] [2022-04-15 01:09:56,655 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2076531756] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:09:56,655 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1725870960] [2022-04-15 01:09:56,655 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 01:09:56,655 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:09:56,655 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:09:56,667 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:09:56,668 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-04-15 01:09:56,708 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 01:09:56,708 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:09:56,709 INFO L263 TraceCheckSpWp]: Trace formula consists of 179 conjuncts, 42 conjunts are in the unsatisfiable core [2022-04-15 01:09:56,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:09:56,718 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:09:57,006 INFO L272 TraceCheckUtils]: 0: Hoare triple {13690#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13690#true} is VALID [2022-04-15 01:09:57,006 INFO L290 TraceCheckUtils]: 1: Hoare triple {13690#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13690#true} is VALID [2022-04-15 01:09:57,006 INFO L290 TraceCheckUtils]: 2: Hoare triple {13690#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13690#true} is VALID [2022-04-15 01:09:57,006 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13690#true} {13690#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13690#true} is VALID [2022-04-15 01:09:57,006 INFO L272 TraceCheckUtils]: 4: Hoare triple {13690#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13690#true} is VALID [2022-04-15 01:09:57,006 INFO L290 TraceCheckUtils]: 5: Hoare triple {13690#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13695#(= main_~y~0 0)} is VALID [2022-04-15 01:09:57,007 INFO L290 TraceCheckUtils]: 6: Hoare triple {13695#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13696#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:09:57,007 INFO L290 TraceCheckUtils]: 7: Hoare triple {13696#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13697#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:09:57,008 INFO L290 TraceCheckUtils]: 8: Hoare triple {13697#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13698#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:09:57,008 INFO L290 TraceCheckUtils]: 9: Hoare triple {13698#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13699#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:09:57,009 INFO L290 TraceCheckUtils]: 10: Hoare triple {13699#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13700#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:09:57,010 INFO L290 TraceCheckUtils]: 11: Hoare triple {13700#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13701#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:09:57,010 INFO L290 TraceCheckUtils]: 12: Hoare triple {13701#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13701#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:09:57,010 INFO L290 TraceCheckUtils]: 13: Hoare triple {13701#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {13752#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} is VALID [2022-04-15 01:09:57,011 INFO L290 TraceCheckUtils]: 14: Hoare triple {13752#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13756#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-15 01:09:57,011 INFO L290 TraceCheckUtils]: 15: Hoare triple {13756#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13760#(and (<= main_~y~0 6) (= main_~y~0 (+ main_~z~0 2)) (<= 6 main_~y~0))} is VALID [2022-04-15 01:09:57,012 INFO L290 TraceCheckUtils]: 16: Hoare triple {13760#(and (<= main_~y~0 6) (= main_~y~0 (+ main_~z~0 2)) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13764#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:09:57,012 INFO L290 TraceCheckUtils]: 17: Hoare triple {13764#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13768#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} is VALID [2022-04-15 01:09:57,013 INFO L290 TraceCheckUtils]: 18: Hoare triple {13768#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13772#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 4)) (+ main_~z~0 1)) (<= 6 main_~y~0))} is VALID [2022-04-15 01:09:57,014 INFO L290 TraceCheckUtils]: 19: Hoare triple {13772#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 4)) (+ main_~z~0 1)) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13776#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 4)) (+ main_~z~0 2)) (<= 6 main_~y~0))} is VALID [2022-04-15 01:09:57,014 INFO L290 TraceCheckUtils]: 20: Hoare triple {13776#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 4)) (+ main_~z~0 2)) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13691#false} is VALID [2022-04-15 01:09:57,014 INFO L290 TraceCheckUtils]: 21: Hoare triple {13691#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13691#false} is VALID [2022-04-15 01:09:57,014 INFO L290 TraceCheckUtils]: 22: Hoare triple {13691#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13691#false} is VALID [2022-04-15 01:09:57,014 INFO L290 TraceCheckUtils]: 23: Hoare triple {13691#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13691#false} is VALID [2022-04-15 01:09:57,015 INFO L290 TraceCheckUtils]: 24: Hoare triple {13691#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13691#false} is VALID [2022-04-15 01:09:57,015 INFO L290 TraceCheckUtils]: 25: Hoare triple {13691#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13691#false} is VALID [2022-04-15 01:09:57,015 INFO L290 TraceCheckUtils]: 26: Hoare triple {13691#false} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {13691#false} is VALID [2022-04-15 01:09:57,015 INFO L290 TraceCheckUtils]: 27: Hoare triple {13691#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13691#false} is VALID [2022-04-15 01:09:57,015 INFO L290 TraceCheckUtils]: 28: Hoare triple {13691#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13691#false} is VALID [2022-04-15 01:09:57,015 INFO L290 TraceCheckUtils]: 29: Hoare triple {13691#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13691#false} is VALID [2022-04-15 01:09:57,015 INFO L290 TraceCheckUtils]: 30: Hoare triple {13691#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13691#false} is VALID [2022-04-15 01:09:57,015 INFO L290 TraceCheckUtils]: 31: Hoare triple {13691#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13691#false} is VALID [2022-04-15 01:09:57,015 INFO L290 TraceCheckUtils]: 32: Hoare triple {13691#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13691#false} is VALID [2022-04-15 01:09:57,015 INFO L290 TraceCheckUtils]: 33: Hoare triple {13691#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13691#false} is VALID [2022-04-15 01:09:57,015 INFO L272 TraceCheckUtils]: 34: Hoare triple {13691#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {13691#false} is VALID [2022-04-15 01:09:57,015 INFO L290 TraceCheckUtils]: 35: Hoare triple {13691#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13691#false} is VALID [2022-04-15 01:09:57,015 INFO L290 TraceCheckUtils]: 36: Hoare triple {13691#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13691#false} is VALID [2022-04-15 01:09:57,016 INFO L290 TraceCheckUtils]: 37: Hoare triple {13691#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13691#false} is VALID [2022-04-15 01:09:57,016 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 42 proven. 42 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2022-04-15 01:09:57,016 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:09:57,504 INFO L290 TraceCheckUtils]: 37: Hoare triple {13691#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13691#false} is VALID [2022-04-15 01:09:57,505 INFO L290 TraceCheckUtils]: 36: Hoare triple {13691#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13691#false} is VALID [2022-04-15 01:09:57,505 INFO L290 TraceCheckUtils]: 35: Hoare triple {13691#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13691#false} is VALID [2022-04-15 01:09:57,505 INFO L272 TraceCheckUtils]: 34: Hoare triple {13691#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {13691#false} is VALID [2022-04-15 01:09:57,505 INFO L290 TraceCheckUtils]: 33: Hoare triple {13843#(< 0 (mod main_~y~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13691#false} is VALID [2022-04-15 01:09:57,507 INFO L290 TraceCheckUtils]: 32: Hoare triple {13847#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13843#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:09:57,508 INFO L290 TraceCheckUtils]: 31: Hoare triple {13851#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13847#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:09:57,508 INFO L290 TraceCheckUtils]: 30: Hoare triple {13855#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13851#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 01:09:57,509 INFO L290 TraceCheckUtils]: 29: Hoare triple {13859#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13855#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 01:09:57,510 INFO L290 TraceCheckUtils]: 28: Hoare triple {13863#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13859#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-15 01:09:57,511 INFO L290 TraceCheckUtils]: 27: Hoare triple {13867#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13863#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-15 01:09:57,511 INFO L290 TraceCheckUtils]: 26: Hoare triple {13867#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {13867#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-15 01:09:57,512 INFO L290 TraceCheckUtils]: 25: Hoare triple {13867#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13867#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-15 01:09:57,512 INFO L290 TraceCheckUtils]: 24: Hoare triple {13867#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13867#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-15 01:09:57,512 INFO L290 TraceCheckUtils]: 23: Hoare triple {13867#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13867#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-15 01:09:57,512 INFO L290 TraceCheckUtils]: 22: Hoare triple {13867#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13867#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-15 01:09:57,513 INFO L290 TraceCheckUtils]: 21: Hoare triple {13867#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13867#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-15 01:09:57,513 INFO L290 TraceCheckUtils]: 20: Hoare triple {13889#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13867#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-15 01:09:57,514 INFO L290 TraceCheckUtils]: 19: Hoare triple {13893#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13889#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:09:57,515 INFO L290 TraceCheckUtils]: 18: Hoare triple {13897#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13893#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:09:57,516 INFO L290 TraceCheckUtils]: 17: Hoare triple {13901#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13897#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:09:57,517 INFO L290 TraceCheckUtils]: 16: Hoare triple {13905#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13901#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:09:57,518 INFO L290 TraceCheckUtils]: 15: Hoare triple {13909#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13905#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:09:57,519 INFO L290 TraceCheckUtils]: 14: Hoare triple {13913#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~z~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13909#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} is VALID [2022-04-15 01:09:57,519 INFO L290 TraceCheckUtils]: 13: Hoare triple {13690#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {13913#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~z~0) 4294967296))))} is VALID [2022-04-15 01:09:57,519 INFO L290 TraceCheckUtils]: 12: Hoare triple {13690#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13690#true} is VALID [2022-04-15 01:09:57,520 INFO L290 TraceCheckUtils]: 11: Hoare triple {13690#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13690#true} is VALID [2022-04-15 01:09:57,520 INFO L290 TraceCheckUtils]: 10: Hoare triple {13690#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13690#true} is VALID [2022-04-15 01:09:57,520 INFO L290 TraceCheckUtils]: 9: Hoare triple {13690#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13690#true} is VALID [2022-04-15 01:09:57,520 INFO L290 TraceCheckUtils]: 8: Hoare triple {13690#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13690#true} is VALID [2022-04-15 01:09:57,520 INFO L290 TraceCheckUtils]: 7: Hoare triple {13690#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13690#true} is VALID [2022-04-15 01:09:57,520 INFO L290 TraceCheckUtils]: 6: Hoare triple {13690#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13690#true} is VALID [2022-04-15 01:09:57,520 INFO L290 TraceCheckUtils]: 5: Hoare triple {13690#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13690#true} is VALID [2022-04-15 01:09:57,520 INFO L272 TraceCheckUtils]: 4: Hoare triple {13690#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13690#true} is VALID [2022-04-15 01:09:57,520 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13690#true} {13690#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13690#true} is VALID [2022-04-15 01:09:57,520 INFO L290 TraceCheckUtils]: 2: Hoare triple {13690#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13690#true} is VALID [2022-04-15 01:09:57,520 INFO L290 TraceCheckUtils]: 1: Hoare triple {13690#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13690#true} is VALID [2022-04-15 01:09:57,520 INFO L272 TraceCheckUtils]: 0: Hoare triple {13690#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13690#true} is VALID [2022-04-15 01:09:57,521 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 42 proven. 42 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2022-04-15 01:09:57,521 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1725870960] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:09:57,521 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:09:57,521 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16] total 38 [2022-04-15 01:09:57,521 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1268559695] [2022-04-15 01:09:57,521 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:09:57,521 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.4210526315789473) internal successors, (54), 37 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 38 [2022-04-15 01:09:57,522 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:09:57,522 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 38 states, 38 states have (on average 1.4210526315789473) internal successors, (54), 37 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:09:57,569 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:09:57,569 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-04-15 01:09:57,569 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:09:57,570 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-04-15 01:09:57,570 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=234, Invalid=1172, Unknown=0, NotChecked=0, Total=1406 [2022-04-15 01:09:57,570 INFO L87 Difference]: Start difference. First operand 171 states and 201 transitions. Second operand has 38 states, 38 states have (on average 1.4210526315789473) internal successors, (54), 37 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:04,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:10:04,887 INFO L93 Difference]: Finished difference Result 250 states and 282 transitions. [2022-04-15 01:10:04,887 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2022-04-15 01:10:04,888 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.4210526315789473) internal successors, (54), 37 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 38 [2022-04-15 01:10:04,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:10:04,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.4210526315789473) internal successors, (54), 37 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:04,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 110 transitions. [2022-04-15 01:10:04,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.4210526315789473) internal successors, (54), 37 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:04,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 110 transitions. [2022-04-15 01:10:04,892 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 52 states and 110 transitions. [2022-04-15 01:10:05,260 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 110 edges. 110 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:10:05,263 INFO L225 Difference]: With dead ends: 250 [2022-04-15 01:10:05,263 INFO L226 Difference]: Without dead ends: 224 [2022-04-15 01:10:05,264 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 63 SyntacticMatches, 1 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1912 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=1228, Invalid=6254, Unknown=0, NotChecked=0, Total=7482 [2022-04-15 01:10:05,264 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 240 mSDsluCounter, 102 mSDsCounter, 0 mSdLazyCounter, 491 mSolverCounterSat, 206 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 240 SdHoareTripleChecker+Valid, 118 SdHoareTripleChecker+Invalid, 697 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 206 IncrementalHoareTripleChecker+Valid, 491 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2022-04-15 01:10:05,264 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [240 Valid, 118 Invalid, 697 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [206 Valid, 491 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2022-04-15 01:10:05,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2022-04-15 01:10:05,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 140. [2022-04-15 01:10:05,992 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:10:05,993 INFO L82 GeneralOperation]: Start isEquivalent. First operand 224 states. Second operand has 140 states, 135 states have (on average 1.2) internal successors, (162), 135 states have internal predecessors, (162), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:05,993 INFO L74 IsIncluded]: Start isIncluded. First operand 224 states. Second operand has 140 states, 135 states have (on average 1.2) internal successors, (162), 135 states have internal predecessors, (162), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:05,993 INFO L87 Difference]: Start difference. First operand 224 states. Second operand has 140 states, 135 states have (on average 1.2) internal successors, (162), 135 states have internal predecessors, (162), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:05,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:10:05,996 INFO L93 Difference]: Finished difference Result 224 states and 253 transitions. [2022-04-15 01:10:05,996 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 253 transitions. [2022-04-15 01:10:05,996 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:10:05,996 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:10:05,996 INFO L74 IsIncluded]: Start isIncluded. First operand has 140 states, 135 states have (on average 1.2) internal successors, (162), 135 states have internal predecessors, (162), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 224 states. [2022-04-15 01:10:05,996 INFO L87 Difference]: Start difference. First operand has 140 states, 135 states have (on average 1.2) internal successors, (162), 135 states have internal predecessors, (162), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 224 states. [2022-04-15 01:10:05,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:10:05,999 INFO L93 Difference]: Finished difference Result 224 states and 253 transitions. [2022-04-15 01:10:05,999 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 253 transitions. [2022-04-15 01:10:05,999 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:10:05,999 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:10:05,999 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:10:05,999 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:10:05,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 140 states, 135 states have (on average 1.2) internal successors, (162), 135 states have internal predecessors, (162), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:06,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 166 transitions. [2022-04-15 01:10:06,001 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 166 transitions. Word has length 38 [2022-04-15 01:10:06,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:10:06,001 INFO L478 AbstractCegarLoop]: Abstraction has 140 states and 166 transitions. [2022-04-15 01:10:06,001 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 38 states have (on average 1.4210526315789473) internal successors, (54), 37 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:06,001 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 166 transitions. [2022-04-15 01:10:06,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-04-15 01:10:06,002 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:10:06,002 INFO L499 BasicCegarLoop]: trace histogram [8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:10:06,026 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-04-15 01:10:06,224 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2022-04-15 01:10:06,224 INFO L403 AbstractCegarLoop]: === Iteration 27 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:10:06,225 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:10:06,225 INFO L85 PathProgramCache]: Analyzing trace with hash 1777126115, now seen corresponding path program 21 times [2022-04-15 01:10:06,225 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:10:06,225 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [863326215] [2022-04-15 01:10:06,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:10:06,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:10:06,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:10:06,433 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:10:06,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:10:06,437 INFO L290 TraceCheckUtils]: 0: Hoare triple {15184#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15168#true} is VALID [2022-04-15 01:10:06,437 INFO L290 TraceCheckUtils]: 1: Hoare triple {15168#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15168#true} is VALID [2022-04-15 01:10:06,437 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15168#true} {15168#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15168#true} is VALID [2022-04-15 01:10:06,437 INFO L272 TraceCheckUtils]: 0: Hoare triple {15168#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15184#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:10:06,437 INFO L290 TraceCheckUtils]: 1: Hoare triple {15184#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15168#true} is VALID [2022-04-15 01:10:06,437 INFO L290 TraceCheckUtils]: 2: Hoare triple {15168#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15168#true} is VALID [2022-04-15 01:10:06,437 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15168#true} {15168#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15168#true} is VALID [2022-04-15 01:10:06,438 INFO L272 TraceCheckUtils]: 4: Hoare triple {15168#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15168#true} is VALID [2022-04-15 01:10:06,438 INFO L290 TraceCheckUtils]: 5: Hoare triple {15168#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15168#true} is VALID [2022-04-15 01:10:06,438 INFO L290 TraceCheckUtils]: 6: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:06,438 INFO L290 TraceCheckUtils]: 7: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:06,438 INFO L290 TraceCheckUtils]: 8: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:06,438 INFO L290 TraceCheckUtils]: 9: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:06,438 INFO L290 TraceCheckUtils]: 10: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:06,438 INFO L290 TraceCheckUtils]: 11: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:06,438 INFO L290 TraceCheckUtils]: 12: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:06,438 INFO L290 TraceCheckUtils]: 13: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:06,442 INFO L290 TraceCheckUtils]: 14: Hoare triple {15168#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:06,442 INFO L290 TraceCheckUtils]: 15: Hoare triple {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:06,443 INFO L290 TraceCheckUtils]: 16: Hoare triple {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15174#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:10:06,444 INFO L290 TraceCheckUtils]: 17: Hoare triple {15174#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15175#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,445 INFO L290 TraceCheckUtils]: 18: Hoare triple {15175#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15176#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,446 INFO L290 TraceCheckUtils]: 19: Hoare triple {15176#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15177#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,446 INFO L290 TraceCheckUtils]: 20: Hoare triple {15177#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15178#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:10:06,447 INFO L290 TraceCheckUtils]: 21: Hoare triple {15178#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15179#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,448 INFO L290 TraceCheckUtils]: 22: Hoare triple {15179#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15180#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,449 INFO L290 TraceCheckUtils]: 23: Hoare triple {15180#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15181#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,449 INFO L290 TraceCheckUtils]: 24: Hoare triple {15181#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {15181#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,450 INFO L290 TraceCheckUtils]: 25: Hoare triple {15181#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15180#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,451 INFO L290 TraceCheckUtils]: 26: Hoare triple {15180#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15179#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,452 INFO L290 TraceCheckUtils]: 27: Hoare triple {15179#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15178#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:10:06,452 INFO L290 TraceCheckUtils]: 28: Hoare triple {15178#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15177#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,453 INFO L290 TraceCheckUtils]: 29: Hoare triple {15177#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15176#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,454 INFO L290 TraceCheckUtils]: 30: Hoare triple {15176#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15175#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,454 INFO L290 TraceCheckUtils]: 31: Hoare triple {15175#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15174#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:10:06,455 INFO L290 TraceCheckUtils]: 32: Hoare triple {15174#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:06,456 INFO L290 TraceCheckUtils]: 33: Hoare triple {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:06,456 INFO L272 TraceCheckUtils]: 34: Hoare triple {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {15182#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 01:10:06,457 INFO L290 TraceCheckUtils]: 35: Hoare triple {15182#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15183#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 01:10:06,457 INFO L290 TraceCheckUtils]: 36: Hoare triple {15183#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#false} is VALID [2022-04-15 01:10:06,457 INFO L290 TraceCheckUtils]: 37: Hoare triple {15169#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#false} is VALID [2022-04-15 01:10:06,457 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2022-04-15 01:10:06,457 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:10:06,457 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [863326215] [2022-04-15 01:10:06,458 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [863326215] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:10:06,458 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [808432243] [2022-04-15 01:10:06,458 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-15 01:10:06,458 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:10:06,458 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:10:06,459 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:10:06,460 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-04-15 01:10:06,591 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-04-15 01:10:06,591 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:10:06,593 INFO L263 TraceCheckSpWp]: Trace formula consists of 179 conjuncts, 52 conjunts are in the unsatisfiable core [2022-04-15 01:10:06,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:10:06,606 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:10:06,851 INFO L272 TraceCheckUtils]: 0: Hoare triple {15168#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15168#true} is VALID [2022-04-15 01:10:06,851 INFO L290 TraceCheckUtils]: 1: Hoare triple {15168#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15168#true} is VALID [2022-04-15 01:10:06,851 INFO L290 TraceCheckUtils]: 2: Hoare triple {15168#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15168#true} is VALID [2022-04-15 01:10:06,851 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15168#true} {15168#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15168#true} is VALID [2022-04-15 01:10:06,851 INFO L272 TraceCheckUtils]: 4: Hoare triple {15168#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15168#true} is VALID [2022-04-15 01:10:06,851 INFO L290 TraceCheckUtils]: 5: Hoare triple {15168#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15168#true} is VALID [2022-04-15 01:10:06,852 INFO L290 TraceCheckUtils]: 6: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:06,852 INFO L290 TraceCheckUtils]: 7: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:06,852 INFO L290 TraceCheckUtils]: 8: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:06,852 INFO L290 TraceCheckUtils]: 9: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:06,852 INFO L290 TraceCheckUtils]: 10: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:06,852 INFO L290 TraceCheckUtils]: 11: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:06,852 INFO L290 TraceCheckUtils]: 12: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:06,852 INFO L290 TraceCheckUtils]: 13: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:06,852 INFO L290 TraceCheckUtils]: 14: Hoare triple {15168#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:06,853 INFO L290 TraceCheckUtils]: 15: Hoare triple {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:06,853 INFO L290 TraceCheckUtils]: 16: Hoare triple {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15174#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:10:06,854 INFO L290 TraceCheckUtils]: 17: Hoare triple {15174#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15175#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,855 INFO L290 TraceCheckUtils]: 18: Hoare triple {15175#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15176#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,856 INFO L290 TraceCheckUtils]: 19: Hoare triple {15176#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15177#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,856 INFO L290 TraceCheckUtils]: 20: Hoare triple {15177#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15178#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:10:06,857 INFO L290 TraceCheckUtils]: 21: Hoare triple {15178#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15179#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,858 INFO L290 TraceCheckUtils]: 22: Hoare triple {15179#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15180#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,858 INFO L290 TraceCheckUtils]: 23: Hoare triple {15180#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15181#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,859 INFO L290 TraceCheckUtils]: 24: Hoare triple {15181#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {15181#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,860 INFO L290 TraceCheckUtils]: 25: Hoare triple {15181#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15180#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,860 INFO L290 TraceCheckUtils]: 26: Hoare triple {15180#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15179#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,861 INFO L290 TraceCheckUtils]: 27: Hoare triple {15179#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15178#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:10:06,862 INFO L290 TraceCheckUtils]: 28: Hoare triple {15178#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15177#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,862 INFO L290 TraceCheckUtils]: 29: Hoare triple {15177#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15176#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,863 INFO L290 TraceCheckUtils]: 30: Hoare triple {15176#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15175#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:06,864 INFO L290 TraceCheckUtils]: 31: Hoare triple {15175#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15174#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:10:06,864 INFO L290 TraceCheckUtils]: 32: Hoare triple {15174#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:06,865 INFO L290 TraceCheckUtils]: 33: Hoare triple {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:06,865 INFO L272 TraceCheckUtils]: 34: Hoare triple {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {15290#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:10:06,866 INFO L290 TraceCheckUtils]: 35: Hoare triple {15290#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15294#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:10:06,866 INFO L290 TraceCheckUtils]: 36: Hoare triple {15294#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#false} is VALID [2022-04-15 01:10:06,866 INFO L290 TraceCheckUtils]: 37: Hoare triple {15169#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#false} is VALID [2022-04-15 01:10:06,866 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2022-04-15 01:10:06,866 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:10:07,042 INFO L290 TraceCheckUtils]: 37: Hoare triple {15169#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#false} is VALID [2022-04-15 01:10:07,043 INFO L290 TraceCheckUtils]: 36: Hoare triple {15294#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#false} is VALID [2022-04-15 01:10:07,043 INFO L290 TraceCheckUtils]: 35: Hoare triple {15290#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15294#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:10:07,044 INFO L272 TraceCheckUtils]: 34: Hoare triple {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {15290#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:10:07,045 INFO L290 TraceCheckUtils]: 33: Hoare triple {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:07,046 INFO L290 TraceCheckUtils]: 32: Hoare triple {15174#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:07,046 INFO L290 TraceCheckUtils]: 31: Hoare triple {15175#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15174#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:10:07,047 INFO L290 TraceCheckUtils]: 30: Hoare triple {15176#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15175#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:07,048 INFO L290 TraceCheckUtils]: 29: Hoare triple {15177#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15176#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:07,049 INFO L290 TraceCheckUtils]: 28: Hoare triple {15178#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15177#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:07,049 INFO L290 TraceCheckUtils]: 27: Hoare triple {15179#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15178#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:10:07,050 INFO L290 TraceCheckUtils]: 26: Hoare triple {15180#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15179#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:07,051 INFO L290 TraceCheckUtils]: 25: Hoare triple {15181#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15180#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:07,051 INFO L290 TraceCheckUtils]: 24: Hoare triple {15181#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {15181#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:07,052 INFO L290 TraceCheckUtils]: 23: Hoare triple {15180#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15181#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:07,053 INFO L290 TraceCheckUtils]: 22: Hoare triple {15179#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15180#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:07,054 INFO L290 TraceCheckUtils]: 21: Hoare triple {15178#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15179#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:07,055 INFO L290 TraceCheckUtils]: 20: Hoare triple {15177#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15178#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:10:07,055 INFO L290 TraceCheckUtils]: 19: Hoare triple {15176#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15177#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:07,056 INFO L290 TraceCheckUtils]: 18: Hoare triple {15175#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15176#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:07,057 INFO L290 TraceCheckUtils]: 17: Hoare triple {15174#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15175#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:07,057 INFO L290 TraceCheckUtils]: 16: Hoare triple {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15174#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:10:07,058 INFO L290 TraceCheckUtils]: 15: Hoare triple {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:07,058 INFO L290 TraceCheckUtils]: 14: Hoare triple {15168#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {15173#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:07,058 INFO L290 TraceCheckUtils]: 13: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:07,058 INFO L290 TraceCheckUtils]: 12: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:07,058 INFO L290 TraceCheckUtils]: 11: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:07,059 INFO L290 TraceCheckUtils]: 10: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:07,059 INFO L290 TraceCheckUtils]: 9: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:07,059 INFO L290 TraceCheckUtils]: 8: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:07,059 INFO L290 TraceCheckUtils]: 7: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:07,059 INFO L290 TraceCheckUtils]: 6: Hoare triple {15168#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15168#true} is VALID [2022-04-15 01:10:07,059 INFO L290 TraceCheckUtils]: 5: Hoare triple {15168#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15168#true} is VALID [2022-04-15 01:10:07,059 INFO L272 TraceCheckUtils]: 4: Hoare triple {15168#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15168#true} is VALID [2022-04-15 01:10:07,059 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15168#true} {15168#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15168#true} is VALID [2022-04-15 01:10:07,059 INFO L290 TraceCheckUtils]: 2: Hoare triple {15168#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15168#true} is VALID [2022-04-15 01:10:07,059 INFO L290 TraceCheckUtils]: 1: Hoare triple {15168#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15168#true} is VALID [2022-04-15 01:10:07,059 INFO L272 TraceCheckUtils]: 0: Hoare triple {15168#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15168#true} is VALID [2022-04-15 01:10:07,060 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2022-04-15 01:10:07,060 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [808432243] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:10:07,060 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:10:07,060 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 16 [2022-04-15 01:10:07,060 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1505433840] [2022-04-15 01:10:07,060 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:10:07,060 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 38 [2022-04-15 01:10:07,061 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:10:07,061 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:07,090 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:10:07,090 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-15 01:10:07,090 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:10:07,090 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-15 01:10:07,090 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=209, Unknown=0, NotChecked=0, Total=240 [2022-04-15 01:10:07,090 INFO L87 Difference]: Start difference. First operand 140 states and 166 transitions. Second operand has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:08,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:10:08,688 INFO L93 Difference]: Finished difference Result 182 states and 211 transitions. [2022-04-15 01:10:08,688 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-15 01:10:08,688 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 38 [2022-04-15 01:10:08,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:10:08,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:08,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 44 transitions. [2022-04-15 01:10:08,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:08,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 44 transitions. [2022-04-15 01:10:08,689 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 44 transitions. [2022-04-15 01:10:08,747 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:10:08,749 INFO L225 Difference]: With dead ends: 182 [2022-04-15 01:10:08,749 INFO L226 Difference]: Without dead ends: 168 [2022-04-15 01:10:08,751 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 109 GetRequests, 81 SyntacticMatches, 3 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=80, Invalid=622, Unknown=0, NotChecked=0, Total=702 [2022-04-15 01:10:08,751 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 17 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 403 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 418 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 403 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-15 01:10:08,751 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [17 Valid, 84 Invalid, 418 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 403 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-15 01:10:08,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2022-04-15 01:10:09,579 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 151. [2022-04-15 01:10:09,579 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:10:09,579 INFO L82 GeneralOperation]: Start isEquivalent. First operand 168 states. Second operand has 151 states, 146 states have (on average 1.1986301369863013) internal successors, (175), 146 states have internal predecessors, (175), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:09,580 INFO L74 IsIncluded]: Start isIncluded. First operand 168 states. Second operand has 151 states, 146 states have (on average 1.1986301369863013) internal successors, (175), 146 states have internal predecessors, (175), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:09,580 INFO L87 Difference]: Start difference. First operand 168 states. Second operand has 151 states, 146 states have (on average 1.1986301369863013) internal successors, (175), 146 states have internal predecessors, (175), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:09,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:10:09,581 INFO L93 Difference]: Finished difference Result 168 states and 196 transitions. [2022-04-15 01:10:09,582 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 196 transitions. [2022-04-15 01:10:09,582 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:10:09,582 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:10:09,582 INFO L74 IsIncluded]: Start isIncluded. First operand has 151 states, 146 states have (on average 1.1986301369863013) internal successors, (175), 146 states have internal predecessors, (175), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 168 states. [2022-04-15 01:10:09,582 INFO L87 Difference]: Start difference. First operand has 151 states, 146 states have (on average 1.1986301369863013) internal successors, (175), 146 states have internal predecessors, (175), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 168 states. [2022-04-15 01:10:09,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:10:09,584 INFO L93 Difference]: Finished difference Result 168 states and 196 transitions. [2022-04-15 01:10:09,584 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 196 transitions. [2022-04-15 01:10:09,584 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:10:09,584 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:10:09,584 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:10:09,584 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:10:09,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 151 states, 146 states have (on average 1.1986301369863013) internal successors, (175), 146 states have internal predecessors, (175), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:09,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 179 transitions. [2022-04-15 01:10:09,586 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 179 transitions. Word has length 38 [2022-04-15 01:10:09,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:10:09,586 INFO L478 AbstractCegarLoop]: Abstraction has 151 states and 179 transitions. [2022-04-15 01:10:09,586 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:09,586 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 179 transitions. [2022-04-15 01:10:09,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-04-15 01:10:09,586 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:10:09,586 INFO L499 BasicCegarLoop]: trace histogram [13, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:10:09,606 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2022-04-15 01:10:09,803 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26,24 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:10:09,803 INFO L403 AbstractCegarLoop]: === Iteration 28 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:10:09,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:10:09,803 INFO L85 PathProgramCache]: Analyzing trace with hash -1905383598, now seen corresponding path program 22 times [2022-04-15 01:10:09,804 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:10:09,804 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [386434927] [2022-04-15 01:10:09,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:10:09,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:10:09,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:10:10,069 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:10:10,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:10:10,073 INFO L290 TraceCheckUtils]: 0: Hoare triple {16351#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16330#true} is VALID [2022-04-15 01:10:10,073 INFO L290 TraceCheckUtils]: 1: Hoare triple {16330#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16330#true} is VALID [2022-04-15 01:10:10,073 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16330#true} {16330#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16330#true} is VALID [2022-04-15 01:10:10,074 INFO L272 TraceCheckUtils]: 0: Hoare triple {16330#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16351#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:10:10,074 INFO L290 TraceCheckUtils]: 1: Hoare triple {16351#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16330#true} is VALID [2022-04-15 01:10:10,074 INFO L290 TraceCheckUtils]: 2: Hoare triple {16330#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16330#true} is VALID [2022-04-15 01:10:10,074 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16330#true} {16330#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16330#true} is VALID [2022-04-15 01:10:10,074 INFO L272 TraceCheckUtils]: 4: Hoare triple {16330#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16330#true} is VALID [2022-04-15 01:10:10,074 INFO L290 TraceCheckUtils]: 5: Hoare triple {16330#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16335#(= main_~y~0 0)} is VALID [2022-04-15 01:10:10,075 INFO L290 TraceCheckUtils]: 6: Hoare triple {16335#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16336#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:10:10,075 INFO L290 TraceCheckUtils]: 7: Hoare triple {16336#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16337#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:10:10,076 INFO L290 TraceCheckUtils]: 8: Hoare triple {16337#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16338#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:10:10,076 INFO L290 TraceCheckUtils]: 9: Hoare triple {16338#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16339#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:10:10,077 INFO L290 TraceCheckUtils]: 10: Hoare triple {16339#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16340#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:10:10,077 INFO L290 TraceCheckUtils]: 11: Hoare triple {16340#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16341#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:10:10,078 INFO L290 TraceCheckUtils]: 12: Hoare triple {16341#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16342#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:10:10,078 INFO L290 TraceCheckUtils]: 13: Hoare triple {16342#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16342#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:10:10,079 INFO L290 TraceCheckUtils]: 14: Hoare triple {16342#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {16343#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-15 01:10:10,079 INFO L290 TraceCheckUtils]: 15: Hoare triple {16343#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16344#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 01:10:10,080 INFO L290 TraceCheckUtils]: 16: Hoare triple {16344#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16345#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:10:10,080 INFO L290 TraceCheckUtils]: 17: Hoare triple {16345#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16346#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:10:10,081 INFO L290 TraceCheckUtils]: 18: Hoare triple {16346#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16347#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:10:10,082 INFO L290 TraceCheckUtils]: 19: Hoare triple {16347#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16348#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:10:10,082 INFO L290 TraceCheckUtils]: 20: Hoare triple {16348#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16349#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 01:10:10,083 INFO L290 TraceCheckUtils]: 21: Hoare triple {16349#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16350#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 01:10:10,083 INFO L290 TraceCheckUtils]: 22: Hoare triple {16350#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16331#false} is VALID [2022-04-15 01:10:10,083 INFO L290 TraceCheckUtils]: 23: Hoare triple {16331#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16331#false} is VALID [2022-04-15 01:10:10,083 INFO L290 TraceCheckUtils]: 24: Hoare triple {16331#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16331#false} is VALID [2022-04-15 01:10:10,083 INFO L290 TraceCheckUtils]: 25: Hoare triple {16331#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16331#false} is VALID [2022-04-15 01:10:10,084 INFO L290 TraceCheckUtils]: 26: Hoare triple {16331#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16331#false} is VALID [2022-04-15 01:10:10,084 INFO L290 TraceCheckUtils]: 27: Hoare triple {16331#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16331#false} is VALID [2022-04-15 01:10:10,084 INFO L290 TraceCheckUtils]: 28: Hoare triple {16331#false} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {16331#false} is VALID [2022-04-15 01:10:10,084 INFO L290 TraceCheckUtils]: 29: Hoare triple {16331#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16331#false} is VALID [2022-04-15 01:10:10,084 INFO L290 TraceCheckUtils]: 30: Hoare triple {16331#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16331#false} is VALID [2022-04-15 01:10:10,084 INFO L290 TraceCheckUtils]: 31: Hoare triple {16331#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16331#false} is VALID [2022-04-15 01:10:10,084 INFO L290 TraceCheckUtils]: 32: Hoare triple {16331#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16331#false} is VALID [2022-04-15 01:10:10,084 INFO L290 TraceCheckUtils]: 33: Hoare triple {16331#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16331#false} is VALID [2022-04-15 01:10:10,084 INFO L290 TraceCheckUtils]: 34: Hoare triple {16331#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16331#false} is VALID [2022-04-15 01:10:10,084 INFO L290 TraceCheckUtils]: 35: Hoare triple {16331#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16331#false} is VALID [2022-04-15 01:10:10,084 INFO L290 TraceCheckUtils]: 36: Hoare triple {16331#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16331#false} is VALID [2022-04-15 01:10:10,084 INFO L272 TraceCheckUtils]: 37: Hoare triple {16331#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {16331#false} is VALID [2022-04-15 01:10:10,084 INFO L290 TraceCheckUtils]: 38: Hoare triple {16331#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16331#false} is VALID [2022-04-15 01:10:10,084 INFO L290 TraceCheckUtils]: 39: Hoare triple {16331#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16331#false} is VALID [2022-04-15 01:10:10,085 INFO L290 TraceCheckUtils]: 40: Hoare triple {16331#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16331#false} is VALID [2022-04-15 01:10:10,085 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 48 proven. 56 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2022-04-15 01:10:10,085 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:10:10,085 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [386434927] [2022-04-15 01:10:10,085 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [386434927] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:10:10,085 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [483902089] [2022-04-15 01:10:10,085 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 01:10:10,085 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:10:10,085 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:10:10,086 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:10:10,087 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-04-15 01:10:10,135 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 01:10:10,135 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:10:10,136 INFO L263 TraceCheckSpWp]: Trace formula consists of 194 conjuncts, 48 conjunts are in the unsatisfiable core [2022-04-15 01:10:10,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:10:10,147 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:10:10,490 INFO L272 TraceCheckUtils]: 0: Hoare triple {16330#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16330#true} is VALID [2022-04-15 01:10:10,490 INFO L290 TraceCheckUtils]: 1: Hoare triple {16330#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16330#true} is VALID [2022-04-15 01:10:10,490 INFO L290 TraceCheckUtils]: 2: Hoare triple {16330#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16330#true} is VALID [2022-04-15 01:10:10,490 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16330#true} {16330#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16330#true} is VALID [2022-04-15 01:10:10,490 INFO L272 TraceCheckUtils]: 4: Hoare triple {16330#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16330#true} is VALID [2022-04-15 01:10:10,490 INFO L290 TraceCheckUtils]: 5: Hoare triple {16330#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16335#(= main_~y~0 0)} is VALID [2022-04-15 01:10:10,491 INFO L290 TraceCheckUtils]: 6: Hoare triple {16335#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16336#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:10:10,491 INFO L290 TraceCheckUtils]: 7: Hoare triple {16336#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16337#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:10:10,492 INFO L290 TraceCheckUtils]: 8: Hoare triple {16337#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16338#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:10:10,492 INFO L290 TraceCheckUtils]: 9: Hoare triple {16338#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16339#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:10:10,493 INFO L290 TraceCheckUtils]: 10: Hoare triple {16339#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16340#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:10:10,493 INFO L290 TraceCheckUtils]: 11: Hoare triple {16340#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16341#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:10:10,494 INFO L290 TraceCheckUtils]: 12: Hoare triple {16341#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16342#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:10:10,494 INFO L290 TraceCheckUtils]: 13: Hoare triple {16342#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16342#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:10:10,495 INFO L290 TraceCheckUtils]: 14: Hoare triple {16342#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {16397#(and (= main_~z~0 main_~y~0) (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:10:10,495 INFO L290 TraceCheckUtils]: 15: Hoare triple {16397#(and (= main_~z~0 main_~y~0) (<= 7 main_~y~0) (<= main_~y~0 7))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16401#(and (<= 7 main_~y~0) (<= main_~y~0 7) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-15 01:10:10,499 INFO L290 TraceCheckUtils]: 16: Hoare triple {16401#(and (<= 7 main_~y~0) (<= main_~y~0 7) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16405#(and (<= 7 main_~y~0) (<= main_~y~0 7) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)))} is VALID [2022-04-15 01:10:10,499 INFO L290 TraceCheckUtils]: 17: Hoare triple {16405#(and (<= 7 main_~y~0) (<= main_~y~0 7) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16409#(and (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:10:10,500 INFO L290 TraceCheckUtils]: 18: Hoare triple {16409#(and (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= 7 main_~y~0) (<= main_~y~0 7))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16413#(and (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:10:10,501 INFO L290 TraceCheckUtils]: 19: Hoare triple {16413#(and (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 7 main_~y~0) (<= main_~y~0 7))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16417#(and (<= 7 main_~y~0) (<= main_~y~0 7) (= (+ main_~y~0 (- 3)) (+ main_~z~0 2)))} is VALID [2022-04-15 01:10:10,501 INFO L290 TraceCheckUtils]: 20: Hoare triple {16417#(and (<= 7 main_~y~0) (<= main_~y~0 7) (= (+ main_~y~0 (- 3)) (+ main_~z~0 2)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16421#(and (= (+ main_~y~0 (- 5)) (+ main_~z~0 1)) (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:10:10,502 INFO L290 TraceCheckUtils]: 21: Hoare triple {16421#(and (= (+ main_~y~0 (- 5)) (+ main_~z~0 1)) (<= 7 main_~y~0) (<= main_~y~0 7))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16425#(and (= (+ main_~z~0 2) (+ main_~y~0 (- 5))) (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:10:10,503 INFO L290 TraceCheckUtils]: 22: Hoare triple {16425#(and (= (+ main_~z~0 2) (+ main_~y~0 (- 5))) (<= 7 main_~y~0) (<= main_~y~0 7))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16331#false} is VALID [2022-04-15 01:10:10,503 INFO L290 TraceCheckUtils]: 23: Hoare triple {16331#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16331#false} is VALID [2022-04-15 01:10:10,503 INFO L290 TraceCheckUtils]: 24: Hoare triple {16331#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16331#false} is VALID [2022-04-15 01:10:10,503 INFO L290 TraceCheckUtils]: 25: Hoare triple {16331#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16331#false} is VALID [2022-04-15 01:10:10,503 INFO L290 TraceCheckUtils]: 26: Hoare triple {16331#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16331#false} is VALID [2022-04-15 01:10:10,503 INFO L290 TraceCheckUtils]: 27: Hoare triple {16331#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16331#false} is VALID [2022-04-15 01:10:10,503 INFO L290 TraceCheckUtils]: 28: Hoare triple {16331#false} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {16331#false} is VALID [2022-04-15 01:10:10,503 INFO L290 TraceCheckUtils]: 29: Hoare triple {16331#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16331#false} is VALID [2022-04-15 01:10:10,503 INFO L290 TraceCheckUtils]: 30: Hoare triple {16331#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16331#false} is VALID [2022-04-15 01:10:10,503 INFO L290 TraceCheckUtils]: 31: Hoare triple {16331#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16331#false} is VALID [2022-04-15 01:10:10,503 INFO L290 TraceCheckUtils]: 32: Hoare triple {16331#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16331#false} is VALID [2022-04-15 01:10:10,503 INFO L290 TraceCheckUtils]: 33: Hoare triple {16331#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16331#false} is VALID [2022-04-15 01:10:10,503 INFO L290 TraceCheckUtils]: 34: Hoare triple {16331#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16331#false} is VALID [2022-04-15 01:10:10,504 INFO L290 TraceCheckUtils]: 35: Hoare triple {16331#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16331#false} is VALID [2022-04-15 01:10:10,504 INFO L290 TraceCheckUtils]: 36: Hoare triple {16331#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16331#false} is VALID [2022-04-15 01:10:10,504 INFO L272 TraceCheckUtils]: 37: Hoare triple {16331#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {16331#false} is VALID [2022-04-15 01:10:10,504 INFO L290 TraceCheckUtils]: 38: Hoare triple {16331#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16331#false} is VALID [2022-04-15 01:10:10,504 INFO L290 TraceCheckUtils]: 39: Hoare triple {16331#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16331#false} is VALID [2022-04-15 01:10:10,504 INFO L290 TraceCheckUtils]: 40: Hoare triple {16331#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16331#false} is VALID [2022-04-15 01:10:10,504 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 48 proven. 56 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2022-04-15 01:10:10,504 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:10:11,052 INFO L290 TraceCheckUtils]: 40: Hoare triple {16331#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16331#false} is VALID [2022-04-15 01:10:11,052 INFO L290 TraceCheckUtils]: 39: Hoare triple {16331#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16331#false} is VALID [2022-04-15 01:10:11,052 INFO L290 TraceCheckUtils]: 38: Hoare triple {16331#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16331#false} is VALID [2022-04-15 01:10:11,052 INFO L272 TraceCheckUtils]: 37: Hoare triple {16331#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {16331#false} is VALID [2022-04-15 01:10:11,053 INFO L290 TraceCheckUtils]: 36: Hoare triple {16495#(< 0 (mod main_~y~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16331#false} is VALID [2022-04-15 01:10:11,053 INFO L290 TraceCheckUtils]: 35: Hoare triple {16499#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16495#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:10:11,055 INFO L290 TraceCheckUtils]: 34: Hoare triple {16503#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16499#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:10:11,055 INFO L290 TraceCheckUtils]: 33: Hoare triple {16507#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16503#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 01:10:11,056 INFO L290 TraceCheckUtils]: 32: Hoare triple {16511#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16507#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 01:10:11,057 INFO L290 TraceCheckUtils]: 31: Hoare triple {16515#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16511#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-15 01:10:11,058 INFO L290 TraceCheckUtils]: 30: Hoare triple {16519#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16515#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-15 01:10:11,059 INFO L290 TraceCheckUtils]: 29: Hoare triple {16523#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16519#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-15 01:10:11,059 INFO L290 TraceCheckUtils]: 28: Hoare triple {16523#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {16523#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-15 01:10:11,059 INFO L290 TraceCheckUtils]: 27: Hoare triple {16523#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16523#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-15 01:10:11,060 INFO L290 TraceCheckUtils]: 26: Hoare triple {16523#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16523#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-15 01:10:11,060 INFO L290 TraceCheckUtils]: 25: Hoare triple {16523#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16523#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-15 01:10:11,060 INFO L290 TraceCheckUtils]: 24: Hoare triple {16523#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16523#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-15 01:10:11,061 INFO L290 TraceCheckUtils]: 23: Hoare triple {16523#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16523#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-15 01:10:11,061 INFO L290 TraceCheckUtils]: 22: Hoare triple {16545#(or (< 0 (mod (+ main_~y~0 4294967289) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16523#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-15 01:10:11,062 INFO L290 TraceCheckUtils]: 21: Hoare triple {16549#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967289) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16545#(or (< 0 (mod (+ main_~y~0 4294967289) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-15 01:10:11,063 INFO L290 TraceCheckUtils]: 20: Hoare triple {16553#(or (< 0 (mod (+ main_~y~0 4294967289) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16549#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967289) 4294967296)))} is VALID [2022-04-15 01:10:11,064 INFO L290 TraceCheckUtils]: 19: Hoare triple {16557#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ main_~y~0 4294967289) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16553#(or (< 0 (mod (+ main_~y~0 4294967289) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} is VALID [2022-04-15 01:10:11,064 INFO L290 TraceCheckUtils]: 18: Hoare triple {16561#(or (< 0 (mod (+ main_~y~0 4294967289) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16557#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ main_~y~0 4294967289) 4294967296)))} is VALID [2022-04-15 01:10:11,065 INFO L290 TraceCheckUtils]: 17: Hoare triple {16565#(or (< 0 (mod (+ main_~y~0 4294967289) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16561#(or (< 0 (mod (+ main_~y~0 4294967289) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))))} is VALID [2022-04-15 01:10:11,066 INFO L290 TraceCheckUtils]: 16: Hoare triple {16569#(or (< 0 (mod (+ main_~y~0 4294967289) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~z~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16565#(or (< 0 (mod (+ main_~y~0 4294967289) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} is VALID [2022-04-15 01:10:11,067 INFO L290 TraceCheckUtils]: 15: Hoare triple {16573#(or (< 0 (mod (+ main_~y~0 4294967289) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967289) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16569#(or (< 0 (mod (+ main_~y~0 4294967289) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~z~0) 4294967296))))} is VALID [2022-04-15 01:10:11,067 INFO L290 TraceCheckUtils]: 14: Hoare triple {16330#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {16573#(or (< 0 (mod (+ main_~y~0 4294967289) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967289) 4294967296))))} is VALID [2022-04-15 01:10:11,067 INFO L290 TraceCheckUtils]: 13: Hoare triple {16330#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16330#true} is VALID [2022-04-15 01:10:11,068 INFO L290 TraceCheckUtils]: 12: Hoare triple {16330#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16330#true} is VALID [2022-04-15 01:10:11,068 INFO L290 TraceCheckUtils]: 11: Hoare triple {16330#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16330#true} is VALID [2022-04-15 01:10:11,068 INFO L290 TraceCheckUtils]: 10: Hoare triple {16330#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16330#true} is VALID [2022-04-15 01:10:11,068 INFO L290 TraceCheckUtils]: 9: Hoare triple {16330#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16330#true} is VALID [2022-04-15 01:10:11,068 INFO L290 TraceCheckUtils]: 8: Hoare triple {16330#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16330#true} is VALID [2022-04-15 01:10:11,068 INFO L290 TraceCheckUtils]: 7: Hoare triple {16330#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16330#true} is VALID [2022-04-15 01:10:11,068 INFO L290 TraceCheckUtils]: 6: Hoare triple {16330#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16330#true} is VALID [2022-04-15 01:10:11,068 INFO L290 TraceCheckUtils]: 5: Hoare triple {16330#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16330#true} is VALID [2022-04-15 01:10:11,068 INFO L272 TraceCheckUtils]: 4: Hoare triple {16330#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16330#true} is VALID [2022-04-15 01:10:11,068 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16330#true} {16330#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16330#true} is VALID [2022-04-15 01:10:11,068 INFO L290 TraceCheckUtils]: 2: Hoare triple {16330#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16330#true} is VALID [2022-04-15 01:10:11,068 INFO L290 TraceCheckUtils]: 1: Hoare triple {16330#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16330#true} is VALID [2022-04-15 01:10:11,068 INFO L272 TraceCheckUtils]: 0: Hoare triple {16330#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16330#true} is VALID [2022-04-15 01:10:11,069 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 48 proven. 56 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2022-04-15 01:10:11,069 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [483902089] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:10:11,069 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:10:11,069 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 18, 18] total 43 [2022-04-15 01:10:11,069 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [765613117] [2022-04-15 01:10:11,069 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:10:11,070 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 43 states have (on average 1.372093023255814) internal successors, (59), 42 states have internal predecessors, (59), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 41 [2022-04-15 01:10:11,070 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:10:11,070 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 43 states, 43 states have (on average 1.372093023255814) internal successors, (59), 42 states have internal predecessors, (59), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:11,122 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 64 edges. 64 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:10:11,122 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 43 states [2022-04-15 01:10:11,123 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:10:11,123 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2022-04-15 01:10:11,123 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=291, Invalid=1515, Unknown=0, NotChecked=0, Total=1806 [2022-04-15 01:10:11,123 INFO L87 Difference]: Start difference. First operand 151 states and 179 transitions. Second operand has 43 states, 43 states have (on average 1.372093023255814) internal successors, (59), 42 states have internal predecessors, (59), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:24,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:10:24,903 INFO L93 Difference]: Finished difference Result 300 states and 336 transitions. [2022-04-15 01:10:24,903 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2022-04-15 01:10:24,903 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 43 states have (on average 1.372093023255814) internal successors, (59), 42 states have internal predecessors, (59), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 41 [2022-04-15 01:10:24,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:10:24,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 43 states have (on average 1.372093023255814) internal successors, (59), 42 states have internal predecessors, (59), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:24,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 128 transitions. [2022-04-15 01:10:24,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 43 states have (on average 1.372093023255814) internal successors, (59), 42 states have internal predecessors, (59), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:24,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 128 transitions. [2022-04-15 01:10:24,906 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 63 states and 128 transitions. [2022-04-15 01:10:25,525 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 128 edges. 128 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:10:25,532 INFO L225 Difference]: With dead ends: 300 [2022-04-15 01:10:25,532 INFO L226 Difference]: Without dead ends: 272 [2022-04-15 01:10:25,533 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 67 SyntacticMatches, 1 SemanticMatches, 101 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2803 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=1693, Invalid=8813, Unknown=0, NotChecked=0, Total=10506 [2022-04-15 01:10:25,534 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 336 mSDsluCounter, 117 mSDsCounter, 0 mSdLazyCounter, 644 mSolverCounterSat, 335 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 336 SdHoareTripleChecker+Valid, 133 SdHoareTripleChecker+Invalid, 979 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 335 IncrementalHoareTripleChecker+Valid, 644 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.5s IncrementalHoareTripleChecker+Time [2022-04-15 01:10:25,534 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [336 Valid, 133 Invalid, 979 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [335 Valid, 644 Invalid, 0 Unknown, 0 Unchecked, 4.5s Time] [2022-04-15 01:10:25,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 272 states. [2022-04-15 01:10:26,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 272 to 126. [2022-04-15 01:10:26,162 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:10:26,163 INFO L82 GeneralOperation]: Start isEquivalent. First operand 272 states. Second operand has 126 states, 121 states have (on average 1.1983471074380165) internal successors, (145), 121 states have internal predecessors, (145), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:26,163 INFO L74 IsIncluded]: Start isIncluded. First operand 272 states. Second operand has 126 states, 121 states have (on average 1.1983471074380165) internal successors, (145), 121 states have internal predecessors, (145), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:26,163 INFO L87 Difference]: Start difference. First operand 272 states. Second operand has 126 states, 121 states have (on average 1.1983471074380165) internal successors, (145), 121 states have internal predecessors, (145), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:26,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:10:26,166 INFO L93 Difference]: Finished difference Result 272 states and 305 transitions. [2022-04-15 01:10:26,166 INFO L276 IsEmpty]: Start isEmpty. Operand 272 states and 305 transitions. [2022-04-15 01:10:26,166 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:10:26,167 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:10:26,167 INFO L74 IsIncluded]: Start isIncluded. First operand has 126 states, 121 states have (on average 1.1983471074380165) internal successors, (145), 121 states have internal predecessors, (145), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 272 states. [2022-04-15 01:10:26,167 INFO L87 Difference]: Start difference. First operand has 126 states, 121 states have (on average 1.1983471074380165) internal successors, (145), 121 states have internal predecessors, (145), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 272 states. [2022-04-15 01:10:26,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:10:26,170 INFO L93 Difference]: Finished difference Result 272 states and 305 transitions. [2022-04-15 01:10:26,170 INFO L276 IsEmpty]: Start isEmpty. Operand 272 states and 305 transitions. [2022-04-15 01:10:26,170 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:10:26,170 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:10:26,170 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:10:26,170 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:10:26,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 126 states, 121 states have (on average 1.1983471074380165) internal successors, (145), 121 states have internal predecessors, (145), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:26,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 149 transitions. [2022-04-15 01:10:26,172 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 149 transitions. Word has length 41 [2022-04-15 01:10:26,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:10:26,172 INFO L478 AbstractCegarLoop]: Abstraction has 126 states and 149 transitions. [2022-04-15 01:10:26,172 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 43 states, 43 states have (on average 1.372093023255814) internal successors, (59), 42 states have internal predecessors, (59), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:26,172 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 149 transitions. [2022-04-15 01:10:26,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-04-15 01:10:26,172 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:10:26,172 INFO L499 BasicCegarLoop]: trace histogram [9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:10:26,188 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2022-04-15 01:10:26,383 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2022-04-15 01:10:26,384 INFO L403 AbstractCegarLoop]: === Iteration 29 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:10:26,384 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:10:26,384 INFO L85 PathProgramCache]: Analyzing trace with hash -1243044878, now seen corresponding path program 23 times [2022-04-15 01:10:26,384 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:10:26,384 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1842599327] [2022-04-15 01:10:26,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:10:26,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:10:26,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:10:26,603 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:10:26,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:10:26,605 INFO L290 TraceCheckUtils]: 0: Hoare triple {17992#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17975#true} is VALID [2022-04-15 01:10:26,605 INFO L290 TraceCheckUtils]: 1: Hoare triple {17975#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17975#true} is VALID [2022-04-15 01:10:26,606 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {17975#true} {17975#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17975#true} is VALID [2022-04-15 01:10:26,606 INFO L272 TraceCheckUtils]: 0: Hoare triple {17975#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17992#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:10:26,606 INFO L290 TraceCheckUtils]: 1: Hoare triple {17992#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17975#true} is VALID [2022-04-15 01:10:26,606 INFO L290 TraceCheckUtils]: 2: Hoare triple {17975#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17975#true} is VALID [2022-04-15 01:10:26,606 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17975#true} {17975#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17975#true} is VALID [2022-04-15 01:10:26,606 INFO L272 TraceCheckUtils]: 4: Hoare triple {17975#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17975#true} is VALID [2022-04-15 01:10:26,606 INFO L290 TraceCheckUtils]: 5: Hoare triple {17975#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {17975#true} is VALID [2022-04-15 01:10:26,606 INFO L290 TraceCheckUtils]: 6: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:26,607 INFO L290 TraceCheckUtils]: 7: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:26,607 INFO L290 TraceCheckUtils]: 8: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:26,607 INFO L290 TraceCheckUtils]: 9: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:26,607 INFO L290 TraceCheckUtils]: 10: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:26,607 INFO L290 TraceCheckUtils]: 11: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:26,607 INFO L290 TraceCheckUtils]: 12: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:26,607 INFO L290 TraceCheckUtils]: 13: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:26,607 INFO L290 TraceCheckUtils]: 14: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:26,623 INFO L290 TraceCheckUtils]: 15: Hoare triple {17975#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:26,623 INFO L290 TraceCheckUtils]: 16: Hoare triple {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:26,624 INFO L290 TraceCheckUtils]: 17: Hoare triple {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17981#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:10:26,625 INFO L290 TraceCheckUtils]: 18: Hoare triple {17981#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17982#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:26,626 INFO L290 TraceCheckUtils]: 19: Hoare triple {17982#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17983#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:26,627 INFO L290 TraceCheckUtils]: 20: Hoare triple {17983#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17984#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:26,627 INFO L290 TraceCheckUtils]: 21: Hoare triple {17984#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17985#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:10:26,628 INFO L290 TraceCheckUtils]: 22: Hoare triple {17985#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17986#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:26,629 INFO L290 TraceCheckUtils]: 23: Hoare triple {17986#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17987#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:26,630 INFO L290 TraceCheckUtils]: 24: Hoare triple {17987#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17988#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:26,630 INFO L290 TraceCheckUtils]: 25: Hoare triple {17988#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17989#(<= main_~x~0 (+ (* 4294967296 (div (+ (- 9) main_~x~0) 4294967296)) 9))} is VALID [2022-04-15 01:10:26,631 INFO L290 TraceCheckUtils]: 26: Hoare triple {17989#(<= main_~x~0 (+ (* 4294967296 (div (+ (- 9) main_~x~0) 4294967296)) 9))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {17989#(<= main_~x~0 (+ (* 4294967296 (div (+ (- 9) main_~x~0) 4294967296)) 9))} is VALID [2022-04-15 01:10:26,631 INFO L290 TraceCheckUtils]: 27: Hoare triple {17989#(<= main_~x~0 (+ (* 4294967296 (div (+ (- 9) main_~x~0) 4294967296)) 9))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17988#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:26,632 INFO L290 TraceCheckUtils]: 28: Hoare triple {17988#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17987#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:26,633 INFO L290 TraceCheckUtils]: 29: Hoare triple {17987#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17986#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:26,633 INFO L290 TraceCheckUtils]: 30: Hoare triple {17986#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17985#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:10:26,634 INFO L290 TraceCheckUtils]: 31: Hoare triple {17985#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17984#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:26,635 INFO L290 TraceCheckUtils]: 32: Hoare triple {17984#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17983#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:26,636 INFO L290 TraceCheckUtils]: 33: Hoare triple {17983#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17982#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:26,636 INFO L290 TraceCheckUtils]: 34: Hoare triple {17982#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17981#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:10:26,637 INFO L290 TraceCheckUtils]: 35: Hoare triple {17981#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:26,637 INFO L290 TraceCheckUtils]: 36: Hoare triple {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:26,638 INFO L272 TraceCheckUtils]: 37: Hoare triple {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {17990#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 01:10:26,638 INFO L290 TraceCheckUtils]: 38: Hoare triple {17990#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17991#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 01:10:26,639 INFO L290 TraceCheckUtils]: 39: Hoare triple {17991#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17976#false} is VALID [2022-04-15 01:10:26,639 INFO L290 TraceCheckUtils]: 40: Hoare triple {17976#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17976#false} is VALID [2022-04-15 01:10:26,640 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-04-15 01:10:26,640 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:10:26,640 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1842599327] [2022-04-15 01:10:26,640 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1842599327] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:10:26,640 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1154742583] [2022-04-15 01:10:26,640 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-15 01:10:26,640 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:10:26,640 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:10:26,641 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:10:26,642 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-04-15 01:10:29,079 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2022-04-15 01:10:29,079 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:10:29,084 INFO L263 TraceCheckSpWp]: Trace formula consists of 194 conjuncts, 43 conjunts are in the unsatisfiable core [2022-04-15 01:10:29,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:10:29,095 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:10:29,366 INFO L272 TraceCheckUtils]: 0: Hoare triple {17975#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17975#true} is VALID [2022-04-15 01:10:29,366 INFO L290 TraceCheckUtils]: 1: Hoare triple {17975#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17975#true} is VALID [2022-04-15 01:10:29,366 INFO L290 TraceCheckUtils]: 2: Hoare triple {17975#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17975#true} is VALID [2022-04-15 01:10:29,367 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17975#true} {17975#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17975#true} is VALID [2022-04-15 01:10:29,367 INFO L272 TraceCheckUtils]: 4: Hoare triple {17975#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17975#true} is VALID [2022-04-15 01:10:29,367 INFO L290 TraceCheckUtils]: 5: Hoare triple {17975#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {17975#true} is VALID [2022-04-15 01:10:29,367 INFO L290 TraceCheckUtils]: 6: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:29,367 INFO L290 TraceCheckUtils]: 7: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:29,367 INFO L290 TraceCheckUtils]: 8: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:29,367 INFO L290 TraceCheckUtils]: 9: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:29,367 INFO L290 TraceCheckUtils]: 10: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:29,367 INFO L290 TraceCheckUtils]: 11: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:29,367 INFO L290 TraceCheckUtils]: 12: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:29,367 INFO L290 TraceCheckUtils]: 13: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:29,370 INFO L290 TraceCheckUtils]: 14: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18038#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:10:29,370 INFO L290 TraceCheckUtils]: 15: Hoare triple {18038#(< 0 (mod (+ main_~x~0 1) 4294967296))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:29,371 INFO L290 TraceCheckUtils]: 16: Hoare triple {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:29,371 INFO L290 TraceCheckUtils]: 17: Hoare triple {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17981#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:10:29,372 INFO L290 TraceCheckUtils]: 18: Hoare triple {17981#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17982#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,373 INFO L290 TraceCheckUtils]: 19: Hoare triple {17982#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17983#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,374 INFO L290 TraceCheckUtils]: 20: Hoare triple {17983#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17984#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,374 INFO L290 TraceCheckUtils]: 21: Hoare triple {17984#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17985#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:10:29,375 INFO L290 TraceCheckUtils]: 22: Hoare triple {17985#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17986#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,376 INFO L290 TraceCheckUtils]: 23: Hoare triple {17986#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17987#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,376 INFO L290 TraceCheckUtils]: 24: Hoare triple {17987#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17988#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,377 INFO L290 TraceCheckUtils]: 25: Hoare triple {17988#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17989#(<= main_~x~0 (+ (* 4294967296 (div (+ (- 9) main_~x~0) 4294967296)) 9))} is VALID [2022-04-15 01:10:29,377 INFO L290 TraceCheckUtils]: 26: Hoare triple {17989#(<= main_~x~0 (+ (* 4294967296 (div (+ (- 9) main_~x~0) 4294967296)) 9))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {17989#(<= main_~x~0 (+ (* 4294967296 (div (+ (- 9) main_~x~0) 4294967296)) 9))} is VALID [2022-04-15 01:10:29,378 INFO L290 TraceCheckUtils]: 27: Hoare triple {17989#(<= main_~x~0 (+ (* 4294967296 (div (+ (- 9) main_~x~0) 4294967296)) 9))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17988#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,379 INFO L290 TraceCheckUtils]: 28: Hoare triple {17988#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17987#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,379 INFO L290 TraceCheckUtils]: 29: Hoare triple {17987#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17986#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,380 INFO L290 TraceCheckUtils]: 30: Hoare triple {17986#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17985#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:10:29,381 INFO L290 TraceCheckUtils]: 31: Hoare triple {17985#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17984#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,381 INFO L290 TraceCheckUtils]: 32: Hoare triple {17984#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17983#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,382 INFO L290 TraceCheckUtils]: 33: Hoare triple {17983#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17982#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,383 INFO L290 TraceCheckUtils]: 34: Hoare triple {17982#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17981#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:10:29,383 INFO L290 TraceCheckUtils]: 35: Hoare triple {17981#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:29,384 INFO L290 TraceCheckUtils]: 36: Hoare triple {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:29,384 INFO L272 TraceCheckUtils]: 37: Hoare triple {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {18108#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:10:29,385 INFO L290 TraceCheckUtils]: 38: Hoare triple {18108#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18112#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:10:29,385 INFO L290 TraceCheckUtils]: 39: Hoare triple {18112#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17976#false} is VALID [2022-04-15 01:10:29,385 INFO L290 TraceCheckUtils]: 40: Hoare triple {17976#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17976#false} is VALID [2022-04-15 01:10:29,385 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 9 proven. 90 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2022-04-15 01:10:29,385 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:10:29,561 INFO L290 TraceCheckUtils]: 40: Hoare triple {17976#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17976#false} is VALID [2022-04-15 01:10:29,561 INFO L290 TraceCheckUtils]: 39: Hoare triple {18112#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17976#false} is VALID [2022-04-15 01:10:29,561 INFO L290 TraceCheckUtils]: 38: Hoare triple {18108#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18112#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:10:29,562 INFO L272 TraceCheckUtils]: 37: Hoare triple {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {18108#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:10:29,562 INFO L290 TraceCheckUtils]: 36: Hoare triple {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:29,563 INFO L290 TraceCheckUtils]: 35: Hoare triple {17981#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:29,564 INFO L290 TraceCheckUtils]: 34: Hoare triple {17982#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17981#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:10:29,565 INFO L290 TraceCheckUtils]: 33: Hoare triple {17983#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17982#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,565 INFO L290 TraceCheckUtils]: 32: Hoare triple {17984#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17983#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,569 INFO L290 TraceCheckUtils]: 31: Hoare triple {17985#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17984#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,570 INFO L290 TraceCheckUtils]: 30: Hoare triple {17986#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17985#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:10:29,570 INFO L290 TraceCheckUtils]: 29: Hoare triple {17987#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17986#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,571 INFO L290 TraceCheckUtils]: 28: Hoare triple {17988#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17987#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,572 INFO L290 TraceCheckUtils]: 27: Hoare triple {17989#(<= main_~x~0 (+ (* 4294967296 (div (+ (- 9) main_~x~0) 4294967296)) 9))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {17988#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,572 INFO L290 TraceCheckUtils]: 26: Hoare triple {17989#(<= main_~x~0 (+ (* 4294967296 (div (+ (- 9) main_~x~0) 4294967296)) 9))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {17989#(<= main_~x~0 (+ (* 4294967296 (div (+ (- 9) main_~x~0) 4294967296)) 9))} is VALID [2022-04-15 01:10:29,573 INFO L290 TraceCheckUtils]: 25: Hoare triple {17988#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17989#(<= main_~x~0 (+ (* 4294967296 (div (+ (- 9) main_~x~0) 4294967296)) 9))} is VALID [2022-04-15 01:10:29,574 INFO L290 TraceCheckUtils]: 24: Hoare triple {17987#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17988#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,574 INFO L290 TraceCheckUtils]: 23: Hoare triple {17986#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17987#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,575 INFO L290 TraceCheckUtils]: 22: Hoare triple {17985#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17986#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,576 INFO L290 TraceCheckUtils]: 21: Hoare triple {17984#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17985#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-15 01:10:29,576 INFO L290 TraceCheckUtils]: 20: Hoare triple {17983#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17984#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,577 INFO L290 TraceCheckUtils]: 19: Hoare triple {17982#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17983#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,578 INFO L290 TraceCheckUtils]: 18: Hoare triple {17981#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17982#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:10:29,578 INFO L290 TraceCheckUtils]: 17: Hoare triple {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17981#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:10:29,579 INFO L290 TraceCheckUtils]: 16: Hoare triple {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:29,579 INFO L290 TraceCheckUtils]: 15: Hoare triple {17975#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {17980#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:10:29,579 INFO L290 TraceCheckUtils]: 14: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:29,579 INFO L290 TraceCheckUtils]: 13: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:29,579 INFO L290 TraceCheckUtils]: 12: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:29,579 INFO L290 TraceCheckUtils]: 11: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:29,580 INFO L290 TraceCheckUtils]: 10: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:29,580 INFO L290 TraceCheckUtils]: 9: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:29,580 INFO L290 TraceCheckUtils]: 8: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:29,580 INFO L290 TraceCheckUtils]: 7: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:29,580 INFO L290 TraceCheckUtils]: 6: Hoare triple {17975#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17975#true} is VALID [2022-04-15 01:10:29,580 INFO L290 TraceCheckUtils]: 5: Hoare triple {17975#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {17975#true} is VALID [2022-04-15 01:10:29,580 INFO L272 TraceCheckUtils]: 4: Hoare triple {17975#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17975#true} is VALID [2022-04-15 01:10:29,580 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17975#true} {17975#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17975#true} is VALID [2022-04-15 01:10:29,580 INFO L290 TraceCheckUtils]: 2: Hoare triple {17975#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17975#true} is VALID [2022-04-15 01:10:29,580 INFO L290 TraceCheckUtils]: 1: Hoare triple {17975#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17975#true} is VALID [2022-04-15 01:10:29,580 INFO L272 TraceCheckUtils]: 0: Hoare triple {17975#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17975#true} is VALID [2022-04-15 01:10:29,580 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-04-15 01:10:29,581 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1154742583] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:10:29,581 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:10:29,581 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 14] total 18 [2022-04-15 01:10:29,581 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [810156428] [2022-04-15 01:10:29,581 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:10:29,581 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 41 [2022-04-15 01:10:29,581 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:10:29,582 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:29,613 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:10:29,613 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-15 01:10:29,613 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:10:29,613 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-15 01:10:29,613 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=261, Unknown=0, NotChecked=0, Total=306 [2022-04-15 01:10:29,614 INFO L87 Difference]: Start difference. First operand 126 states and 149 transitions. Second operand has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:31,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:10:31,260 INFO L93 Difference]: Finished difference Result 164 states and 190 transitions. [2022-04-15 01:10:31,260 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-15 01:10:31,261 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 41 [2022-04-15 01:10:31,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:10:31,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:31,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 51 transitions. [2022-04-15 01:10:31,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:31,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 51 transitions. [2022-04-15 01:10:31,262 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 51 transitions. [2022-04-15 01:10:31,307 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:10:31,308 INFO L225 Difference]: With dead ends: 164 [2022-04-15 01:10:31,308 INFO L226 Difference]: Without dead ends: 149 [2022-04-15 01:10:31,309 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 88 SyntacticMatches, 3 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 97 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=122, Invalid=808, Unknown=0, NotChecked=0, Total=930 [2022-04-15 01:10:31,309 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 27 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 438 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 69 SdHoareTripleChecker+Invalid, 475 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 438 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-15 01:10:31,309 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [27 Valid, 69 Invalid, 475 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 438 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-15 01:10:31,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2022-04-15 01:10:31,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 136. [2022-04-15 01:10:31,988 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:10:31,988 INFO L82 GeneralOperation]: Start isEquivalent. First operand 149 states. Second operand has 136 states, 131 states have (on average 1.1908396946564885) internal successors, (156), 131 states have internal predecessors, (156), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:31,988 INFO L74 IsIncluded]: Start isIncluded. First operand 149 states. Second operand has 136 states, 131 states have (on average 1.1908396946564885) internal successors, (156), 131 states have internal predecessors, (156), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:31,988 INFO L87 Difference]: Start difference. First operand 149 states. Second operand has 136 states, 131 states have (on average 1.1908396946564885) internal successors, (156), 131 states have internal predecessors, (156), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:31,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:10:31,990 INFO L93 Difference]: Finished difference Result 149 states and 174 transitions. [2022-04-15 01:10:31,990 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 174 transitions. [2022-04-15 01:10:31,990 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:10:31,990 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:10:31,990 INFO L74 IsIncluded]: Start isIncluded. First operand has 136 states, 131 states have (on average 1.1908396946564885) internal successors, (156), 131 states have internal predecessors, (156), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 149 states. [2022-04-15 01:10:31,990 INFO L87 Difference]: Start difference. First operand has 136 states, 131 states have (on average 1.1908396946564885) internal successors, (156), 131 states have internal predecessors, (156), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 149 states. [2022-04-15 01:10:31,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:10:31,992 INFO L93 Difference]: Finished difference Result 149 states and 174 transitions. [2022-04-15 01:10:31,992 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 174 transitions. [2022-04-15 01:10:31,992 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:10:31,992 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:10:31,992 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:10:31,992 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:10:31,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 136 states, 131 states have (on average 1.1908396946564885) internal successors, (156), 131 states have internal predecessors, (156), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:31,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 160 transitions. [2022-04-15 01:10:31,993 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 160 transitions. Word has length 41 [2022-04-15 01:10:31,993 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:10:31,994 INFO L478 AbstractCegarLoop]: Abstraction has 136 states and 160 transitions. [2022-04-15 01:10:31,994 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:31,994 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 160 transitions. [2022-04-15 01:10:31,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2022-04-15 01:10:31,994 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:10:31,994 INFO L499 BasicCegarLoop]: trace histogram [11, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:10:32,002 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Ended with exit code 0 [2022-04-15 01:10:32,200 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 26 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2022-04-15 01:10:32,201 INFO L403 AbstractCegarLoop]: === Iteration 30 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:10:32,202 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:10:32,202 INFO L85 PathProgramCache]: Analyzing trace with hash 828987550, now seen corresponding path program 24 times [2022-04-15 01:10:32,202 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:10:32,202 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1229240193] [2022-04-15 01:10:32,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:10:32,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:10:32,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:10:32,547 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:10:32,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:10:32,550 INFO L290 TraceCheckUtils]: 0: Hoare triple {19088#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19062#true} is VALID [2022-04-15 01:10:32,550 INFO L290 TraceCheckUtils]: 1: Hoare triple {19062#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19062#true} is VALID [2022-04-15 01:10:32,550 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19062#true} {19062#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19062#true} is VALID [2022-04-15 01:10:32,551 INFO L272 TraceCheckUtils]: 0: Hoare triple {19062#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19088#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:10:32,551 INFO L290 TraceCheckUtils]: 1: Hoare triple {19088#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19062#true} is VALID [2022-04-15 01:10:32,551 INFO L290 TraceCheckUtils]: 2: Hoare triple {19062#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19062#true} is VALID [2022-04-15 01:10:32,551 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19062#true} {19062#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19062#true} is VALID [2022-04-15 01:10:32,551 INFO L272 TraceCheckUtils]: 4: Hoare triple {19062#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19062#true} is VALID [2022-04-15 01:10:32,551 INFO L290 TraceCheckUtils]: 5: Hoare triple {19062#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {19067#(= main_~y~0 0)} is VALID [2022-04-15 01:10:32,552 INFO L290 TraceCheckUtils]: 6: Hoare triple {19067#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19068#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:10:32,552 INFO L290 TraceCheckUtils]: 7: Hoare triple {19068#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19069#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:10:32,553 INFO L290 TraceCheckUtils]: 8: Hoare triple {19069#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19070#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:10:32,553 INFO L290 TraceCheckUtils]: 9: Hoare triple {19070#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19071#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:10:32,554 INFO L290 TraceCheckUtils]: 10: Hoare triple {19071#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19072#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:10:32,555 INFO L290 TraceCheckUtils]: 11: Hoare triple {19072#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19073#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:10:32,555 INFO L290 TraceCheckUtils]: 12: Hoare triple {19073#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19074#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:10:32,556 INFO L290 TraceCheckUtils]: 13: Hoare triple {19074#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19075#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:10:32,556 INFO L290 TraceCheckUtils]: 14: Hoare triple {19075#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19076#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:10:32,557 INFO L290 TraceCheckUtils]: 15: Hoare triple {19076#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19077#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 01:10:32,557 INFO L290 TraceCheckUtils]: 16: Hoare triple {19077#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19078#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 01:10:32,557 INFO L290 TraceCheckUtils]: 17: Hoare triple {19078#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19078#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 01:10:32,558 INFO L290 TraceCheckUtils]: 18: Hoare triple {19078#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {19079#(and (<= main_~z~0 11) (<= 11 main_~z~0))} is VALID [2022-04-15 01:10:32,558 INFO L290 TraceCheckUtils]: 19: Hoare triple {19079#(and (<= main_~z~0 11) (<= 11 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19080#(and (<= main_~z~0 10) (<= 10 main_~z~0))} is VALID [2022-04-15 01:10:32,559 INFO L290 TraceCheckUtils]: 20: Hoare triple {19080#(and (<= main_~z~0 10) (<= 10 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19081#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-15 01:10:32,561 INFO L290 TraceCheckUtils]: 21: Hoare triple {19081#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19082#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-15 01:10:32,562 INFO L290 TraceCheckUtils]: 22: Hoare triple {19082#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19083#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-15 01:10:32,563 INFO L290 TraceCheckUtils]: 23: Hoare triple {19083#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19084#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 01:10:32,563 INFO L290 TraceCheckUtils]: 24: Hoare triple {19084#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19085#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:10:32,564 INFO L290 TraceCheckUtils]: 25: Hoare triple {19085#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19086#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:10:32,565 INFO L290 TraceCheckUtils]: 26: Hoare triple {19086#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19087#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 01:10:32,566 INFO L290 TraceCheckUtils]: 27: Hoare triple {19087#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {19063#false} is VALID [2022-04-15 01:10:32,566 INFO L290 TraceCheckUtils]: 28: Hoare triple {19063#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19063#false} is VALID [2022-04-15 01:10:32,566 INFO L290 TraceCheckUtils]: 29: Hoare triple {19063#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19063#false} is VALID [2022-04-15 01:10:32,566 INFO L290 TraceCheckUtils]: 30: Hoare triple {19063#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19063#false} is VALID [2022-04-15 01:10:32,566 INFO L290 TraceCheckUtils]: 31: Hoare triple {19063#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19063#false} is VALID [2022-04-15 01:10:32,566 INFO L290 TraceCheckUtils]: 32: Hoare triple {19063#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19063#false} is VALID [2022-04-15 01:10:32,566 INFO L290 TraceCheckUtils]: 33: Hoare triple {19063#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19063#false} is VALID [2022-04-15 01:10:32,566 INFO L290 TraceCheckUtils]: 34: Hoare triple {19063#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19063#false} is VALID [2022-04-15 01:10:32,566 INFO L290 TraceCheckUtils]: 35: Hoare triple {19063#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19063#false} is VALID [2022-04-15 01:10:32,566 INFO L290 TraceCheckUtils]: 36: Hoare triple {19063#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19063#false} is VALID [2022-04-15 01:10:32,566 INFO L290 TraceCheckUtils]: 37: Hoare triple {19063#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19063#false} is VALID [2022-04-15 01:10:32,566 INFO L272 TraceCheckUtils]: 38: Hoare triple {19063#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {19063#false} is VALID [2022-04-15 01:10:32,566 INFO L290 TraceCheckUtils]: 39: Hoare triple {19063#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19063#false} is VALID [2022-04-15 01:10:32,567 INFO L290 TraceCheckUtils]: 40: Hoare triple {19063#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19063#false} is VALID [2022-04-15 01:10:32,567 INFO L290 TraceCheckUtils]: 41: Hoare triple {19063#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19063#false} is VALID [2022-04-15 01:10:32,567 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 0 proven. 102 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-04-15 01:10:32,567 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:10:32,567 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1229240193] [2022-04-15 01:10:32,567 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1229240193] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:10:32,568 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1765560335] [2022-04-15 01:10:32,568 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-15 01:10:32,568 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:10:32,569 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:10:32,569 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:10:32,570 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-04-15 01:10:32,720 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2022-04-15 01:10:32,721 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:10:32,722 INFO L263 TraceCheckSpWp]: Trace formula consists of 199 conjuncts, 60 conjunts are in the unsatisfiable core [2022-04-15 01:10:32,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:10:32,733 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:10:33,146 INFO L272 TraceCheckUtils]: 0: Hoare triple {19062#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19062#true} is VALID [2022-04-15 01:10:33,146 INFO L290 TraceCheckUtils]: 1: Hoare triple {19062#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19062#true} is VALID [2022-04-15 01:10:33,146 INFO L290 TraceCheckUtils]: 2: Hoare triple {19062#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19062#true} is VALID [2022-04-15 01:10:33,146 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19062#true} {19062#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19062#true} is VALID [2022-04-15 01:10:33,146 INFO L272 TraceCheckUtils]: 4: Hoare triple {19062#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19062#true} is VALID [2022-04-15 01:10:33,146 INFO L290 TraceCheckUtils]: 5: Hoare triple {19062#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {19067#(= main_~y~0 0)} is VALID [2022-04-15 01:10:33,147 INFO L290 TraceCheckUtils]: 6: Hoare triple {19067#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19068#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:10:33,147 INFO L290 TraceCheckUtils]: 7: Hoare triple {19068#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19069#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:10:33,148 INFO L290 TraceCheckUtils]: 8: Hoare triple {19069#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19070#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:10:33,148 INFO L290 TraceCheckUtils]: 9: Hoare triple {19070#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19071#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:10:33,149 INFO L290 TraceCheckUtils]: 10: Hoare triple {19071#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19072#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:10:33,149 INFO L290 TraceCheckUtils]: 11: Hoare triple {19072#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19073#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:10:33,150 INFO L290 TraceCheckUtils]: 12: Hoare triple {19073#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19074#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:10:33,150 INFO L290 TraceCheckUtils]: 13: Hoare triple {19074#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19075#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:10:33,151 INFO L290 TraceCheckUtils]: 14: Hoare triple {19075#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19076#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:10:33,151 INFO L290 TraceCheckUtils]: 15: Hoare triple {19076#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19077#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 01:10:33,152 INFO L290 TraceCheckUtils]: 16: Hoare triple {19077#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19078#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 01:10:33,152 INFO L290 TraceCheckUtils]: 17: Hoare triple {19078#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19078#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 01:10:33,152 INFO L290 TraceCheckUtils]: 18: Hoare triple {19078#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {19146#(and (<= main_~y~0 11) (= main_~z~0 main_~y~0) (<= 11 main_~y~0))} is VALID [2022-04-15 01:10:33,153 INFO L290 TraceCheckUtils]: 19: Hoare triple {19146#(and (<= main_~y~0 11) (= main_~z~0 main_~y~0) (<= 11 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19150#(and (<= main_~y~0 11) (<= 11 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-15 01:10:33,153 INFO L290 TraceCheckUtils]: 20: Hoare triple {19150#(and (<= main_~y~0 11) (<= 11 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19154#(and (<= main_~y~0 11) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 11 main_~y~0))} is VALID [2022-04-15 01:10:33,154 INFO L290 TraceCheckUtils]: 21: Hoare triple {19154#(and (<= main_~y~0 11) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 11 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19158#(and (<= main_~y~0 11) (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= 11 main_~y~0))} is VALID [2022-04-15 01:10:33,155 INFO L290 TraceCheckUtils]: 22: Hoare triple {19158#(and (<= main_~y~0 11) (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= 11 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19162#(and (<= main_~y~0 11) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 11 main_~y~0))} is VALID [2022-04-15 01:10:33,155 INFO L290 TraceCheckUtils]: 23: Hoare triple {19162#(and (<= main_~y~0 11) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 11 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19166#(and (<= main_~y~0 11) (= (+ main_~y~0 (- 4)) (+ main_~z~0 1)) (<= 11 main_~y~0))} is VALID [2022-04-15 01:10:33,156 INFO L290 TraceCheckUtils]: 24: Hoare triple {19166#(and (<= main_~y~0 11) (= (+ main_~y~0 (- 4)) (+ main_~z~0 1)) (<= 11 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19170#(and (<= main_~y~0 11) (= (+ main_~y~0 (- 4)) (+ main_~z~0 2)) (<= 11 main_~y~0))} is VALID [2022-04-15 01:10:33,156 INFO L290 TraceCheckUtils]: 25: Hoare triple {19170#(and (<= main_~y~0 11) (= (+ main_~y~0 (- 4)) (+ main_~z~0 2)) (<= 11 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19174#(and (<= main_~y~0 11) (= (+ main_~y~0 (- 6)) (+ main_~z~0 1)) (<= 11 main_~y~0))} is VALID [2022-04-15 01:10:33,157 INFO L290 TraceCheckUtils]: 26: Hoare triple {19174#(and (<= main_~y~0 11) (= (+ main_~y~0 (- 6)) (+ main_~z~0 1)) (<= 11 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19178#(and (<= main_~y~0 11) (= (+ main_~z~0 1) (+ main_~y~0 (- 7))) (<= 11 main_~y~0))} is VALID [2022-04-15 01:10:33,157 INFO L290 TraceCheckUtils]: 27: Hoare triple {19178#(and (<= main_~y~0 11) (= (+ main_~z~0 1) (+ main_~y~0 (- 7))) (<= 11 main_~y~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {19063#false} is VALID [2022-04-15 01:10:33,157 INFO L290 TraceCheckUtils]: 28: Hoare triple {19063#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19063#false} is VALID [2022-04-15 01:10:33,157 INFO L290 TraceCheckUtils]: 29: Hoare triple {19063#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19063#false} is VALID [2022-04-15 01:10:33,158 INFO L290 TraceCheckUtils]: 30: Hoare triple {19063#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19063#false} is VALID [2022-04-15 01:10:33,158 INFO L290 TraceCheckUtils]: 31: Hoare triple {19063#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19063#false} is VALID [2022-04-15 01:10:33,158 INFO L290 TraceCheckUtils]: 32: Hoare triple {19063#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19063#false} is VALID [2022-04-15 01:10:33,158 INFO L290 TraceCheckUtils]: 33: Hoare triple {19063#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19063#false} is VALID [2022-04-15 01:10:33,158 INFO L290 TraceCheckUtils]: 34: Hoare triple {19063#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19063#false} is VALID [2022-04-15 01:10:33,158 INFO L290 TraceCheckUtils]: 35: Hoare triple {19063#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19063#false} is VALID [2022-04-15 01:10:33,158 INFO L290 TraceCheckUtils]: 36: Hoare triple {19063#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19063#false} is VALID [2022-04-15 01:10:33,158 INFO L290 TraceCheckUtils]: 37: Hoare triple {19063#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19063#false} is VALID [2022-04-15 01:10:33,158 INFO L272 TraceCheckUtils]: 38: Hoare triple {19063#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {19063#false} is VALID [2022-04-15 01:10:33,158 INFO L290 TraceCheckUtils]: 39: Hoare triple {19063#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19063#false} is VALID [2022-04-15 01:10:33,158 INFO L290 TraceCheckUtils]: 40: Hoare triple {19063#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19063#false} is VALID [2022-04-15 01:10:33,158 INFO L290 TraceCheckUtils]: 41: Hoare triple {19063#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19063#false} is VALID [2022-04-15 01:10:33,159 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 0 proven. 102 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-04-15 01:10:33,159 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:10:33,843 INFO L290 TraceCheckUtils]: 41: Hoare triple {19063#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19063#false} is VALID [2022-04-15 01:10:33,843 INFO L290 TraceCheckUtils]: 40: Hoare triple {19063#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19063#false} is VALID [2022-04-15 01:10:33,844 INFO L290 TraceCheckUtils]: 39: Hoare triple {19063#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19063#false} is VALID [2022-04-15 01:10:33,844 INFO L272 TraceCheckUtils]: 38: Hoare triple {19063#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {19063#false} is VALID [2022-04-15 01:10:33,844 INFO L290 TraceCheckUtils]: 37: Hoare triple {19063#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19063#false} is VALID [2022-04-15 01:10:33,844 INFO L290 TraceCheckUtils]: 36: Hoare triple {19239#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19063#false} is VALID [2022-04-15 01:10:33,845 INFO L290 TraceCheckUtils]: 35: Hoare triple {19243#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19239#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-15 01:10:33,846 INFO L290 TraceCheckUtils]: 34: Hoare triple {19247#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19243#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-15 01:10:33,846 INFO L290 TraceCheckUtils]: 33: Hoare triple {19251#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19247#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-15 01:10:33,847 INFO L290 TraceCheckUtils]: 32: Hoare triple {19255#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19251#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-15 01:10:33,848 INFO L290 TraceCheckUtils]: 31: Hoare triple {19259#(not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19255#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:10:33,849 INFO L290 TraceCheckUtils]: 30: Hoare triple {19263#(not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19259#(not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:10:33,849 INFO L290 TraceCheckUtils]: 29: Hoare triple {19267#(not (< 0 (mod (+ main_~y~0 4294967289) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19263#(not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:10:33,850 INFO L290 TraceCheckUtils]: 28: Hoare triple {19271#(not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {19267#(not (< 0 (mod (+ main_~y~0 4294967289) 4294967296)))} is VALID [2022-04-15 01:10:33,851 INFO L290 TraceCheckUtils]: 27: Hoare triple {19275#(or (not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {19271#(not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:10:33,852 INFO L290 TraceCheckUtils]: 26: Hoare triple {19279#(or (not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19275#(or (not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-15 01:10:33,852 INFO L290 TraceCheckUtils]: 25: Hoare triple {19283#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19279#(or (not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-15 01:10:33,853 INFO L290 TraceCheckUtils]: 24: Hoare triple {19287#(or (not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19283#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296))))} is VALID [2022-04-15 01:10:33,854 INFO L290 TraceCheckUtils]: 23: Hoare triple {19291#(or (not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19287#(or (not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} is VALID [2022-04-15 01:10:33,858 INFO L290 TraceCheckUtils]: 22: Hoare triple {19295#(or (not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967291 main_~z~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19291#(or (not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)))} is VALID [2022-04-15 01:10:33,859 INFO L290 TraceCheckUtils]: 21: Hoare triple {19299#(or (not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967290 main_~z~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19295#(or (not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967291 main_~z~0) 4294967296)))} is VALID [2022-04-15 01:10:33,860 INFO L290 TraceCheckUtils]: 20: Hoare triple {19303#(or (not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967289) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19299#(or (not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967290 main_~z~0) 4294967296)))} is VALID [2022-04-15 01:10:33,861 INFO L290 TraceCheckUtils]: 19: Hoare triple {19307#(or (not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967288 main_~z~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19303#(or (not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967289) 4294967296)))} is VALID [2022-04-15 01:10:33,861 INFO L290 TraceCheckUtils]: 18: Hoare triple {19062#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {19307#(or (not (< 0 (mod (+ 4294967288 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967288 main_~z~0) 4294967296)))} is VALID [2022-04-15 01:10:33,861 INFO L290 TraceCheckUtils]: 17: Hoare triple {19062#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19062#true} is VALID [2022-04-15 01:10:33,861 INFO L290 TraceCheckUtils]: 16: Hoare triple {19062#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19062#true} is VALID [2022-04-15 01:10:33,861 INFO L290 TraceCheckUtils]: 15: Hoare triple {19062#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19062#true} is VALID [2022-04-15 01:10:33,861 INFO L290 TraceCheckUtils]: 14: Hoare triple {19062#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19062#true} is VALID [2022-04-15 01:10:33,861 INFO L290 TraceCheckUtils]: 13: Hoare triple {19062#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19062#true} is VALID [2022-04-15 01:10:33,861 INFO L290 TraceCheckUtils]: 12: Hoare triple {19062#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19062#true} is VALID [2022-04-15 01:10:33,861 INFO L290 TraceCheckUtils]: 11: Hoare triple {19062#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19062#true} is VALID [2022-04-15 01:10:33,862 INFO L290 TraceCheckUtils]: 10: Hoare triple {19062#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19062#true} is VALID [2022-04-15 01:10:33,862 INFO L290 TraceCheckUtils]: 9: Hoare triple {19062#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19062#true} is VALID [2022-04-15 01:10:33,862 INFO L290 TraceCheckUtils]: 8: Hoare triple {19062#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19062#true} is VALID [2022-04-15 01:10:33,862 INFO L290 TraceCheckUtils]: 7: Hoare triple {19062#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19062#true} is VALID [2022-04-15 01:10:33,862 INFO L290 TraceCheckUtils]: 6: Hoare triple {19062#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19062#true} is VALID [2022-04-15 01:10:33,862 INFO L290 TraceCheckUtils]: 5: Hoare triple {19062#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {19062#true} is VALID [2022-04-15 01:10:33,862 INFO L272 TraceCheckUtils]: 4: Hoare triple {19062#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19062#true} is VALID [2022-04-15 01:10:33,862 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19062#true} {19062#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19062#true} is VALID [2022-04-15 01:10:33,862 INFO L290 TraceCheckUtils]: 2: Hoare triple {19062#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19062#true} is VALID [2022-04-15 01:10:33,862 INFO L290 TraceCheckUtils]: 1: Hoare triple {19062#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19062#true} is VALID [2022-04-15 01:10:33,862 INFO L272 TraceCheckUtils]: 0: Hoare triple {19062#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19062#true} is VALID [2022-04-15 01:10:33,863 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 9 proven. 72 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2022-04-15 01:10:33,863 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1765560335] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:10:33,863 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:10:33,863 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 23, 20] total 51 [2022-04-15 01:10:33,863 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [739342268] [2022-04-15 01:10:33,863 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:10:33,863 INFO L78 Accepts]: Start accepts. Automaton has has 51 states, 51 states have (on average 1.2352941176470589) internal successors, (63), 50 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 42 [2022-04-15 01:10:33,864 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:10:33,864 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 51 states, 51 states have (on average 1.2352941176470589) internal successors, (63), 50 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:33,939 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:10:33,939 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 51 states [2022-04-15 01:10:33,939 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:10:33,940 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2022-04-15 01:10:33,940 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=305, Invalid=2245, Unknown=0, NotChecked=0, Total=2550 [2022-04-15 01:10:33,940 INFO L87 Difference]: Start difference. First operand 136 states and 160 transitions. Second operand has 51 states, 51 states have (on average 1.2352941176470589) internal successors, (63), 50 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:56,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:10:56,899 INFO L93 Difference]: Finished difference Result 201 states and 241 transitions. [2022-04-15 01:10:56,899 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 92 states. [2022-04-15 01:10:56,899 INFO L78 Accepts]: Start accepts. Automaton has has 51 states, 51 states have (on average 1.2352941176470589) internal successors, (63), 50 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 42 [2022-04-15 01:10:56,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:10:56,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 51 states have (on average 1.2352941176470589) internal successors, (63), 50 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:56,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 155 transitions. [2022-04-15 01:10:56,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 51 states have (on average 1.2352941176470589) internal successors, (63), 50 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:56,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 155 transitions. [2022-04-15 01:10:56,902 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 92 states and 155 transitions. [2022-04-15 01:10:57,765 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 155 edges. 155 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:10:57,766 INFO L225 Difference]: With dead ends: 201 [2022-04-15 01:10:57,766 INFO L226 Difference]: Without dead ends: 168 [2022-04-15 01:10:57,768 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 209 GetRequests, 70 SyntacticMatches, 1 SemanticMatches, 138 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4970 ImplicationChecksByTransitivity, 15.5s TimeCoverageRelationStatistics Valid=1861, Invalid=17599, Unknown=0, NotChecked=0, Total=19460 [2022-04-15 01:10:57,768 INFO L913 BasicCegarLoop]: 18 mSDtfsCounter, 45 mSDsluCounter, 132 mSDsCounter, 0 mSdLazyCounter, 1999 mSolverCounterSat, 228 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 45 SdHoareTripleChecker+Valid, 150 SdHoareTripleChecker+Invalid, 2227 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 228 IncrementalHoareTripleChecker+Valid, 1999 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.9s IncrementalHoareTripleChecker+Time [2022-04-15 01:10:57,769 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [45 Valid, 150 Invalid, 2227 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [228 Valid, 1999 Invalid, 0 Unknown, 0 Unchecked, 2.9s Time] [2022-04-15 01:10:57,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2022-04-15 01:10:58,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 156. [2022-04-15 01:10:58,642 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:10:58,643 INFO L82 GeneralOperation]: Start isEquivalent. First operand 168 states. Second operand has 156 states, 151 states have (on average 1.1721854304635762) internal successors, (177), 151 states have internal predecessors, (177), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:58,643 INFO L74 IsIncluded]: Start isIncluded. First operand 168 states. Second operand has 156 states, 151 states have (on average 1.1721854304635762) internal successors, (177), 151 states have internal predecessors, (177), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:58,643 INFO L87 Difference]: Start difference. First operand 168 states. Second operand has 156 states, 151 states have (on average 1.1721854304635762) internal successors, (177), 151 states have internal predecessors, (177), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:58,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:10:58,644 INFO L93 Difference]: Finished difference Result 168 states and 193 transitions. [2022-04-15 01:10:58,644 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 193 transitions. [2022-04-15 01:10:58,645 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:10:58,645 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:10:58,645 INFO L74 IsIncluded]: Start isIncluded. First operand has 156 states, 151 states have (on average 1.1721854304635762) internal successors, (177), 151 states have internal predecessors, (177), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 168 states. [2022-04-15 01:10:58,645 INFO L87 Difference]: Start difference. First operand has 156 states, 151 states have (on average 1.1721854304635762) internal successors, (177), 151 states have internal predecessors, (177), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 168 states. [2022-04-15 01:10:58,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:10:58,647 INFO L93 Difference]: Finished difference Result 168 states and 193 transitions. [2022-04-15 01:10:58,647 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 193 transitions. [2022-04-15 01:10:58,647 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:10:58,647 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:10:58,647 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:10:58,647 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:10:58,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 156 states, 151 states have (on average 1.1721854304635762) internal successors, (177), 151 states have internal predecessors, (177), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:58,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 181 transitions. [2022-04-15 01:10:58,649 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 181 transitions. Word has length 42 [2022-04-15 01:10:58,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:10:58,649 INFO L478 AbstractCegarLoop]: Abstraction has 156 states and 181 transitions. [2022-04-15 01:10:58,649 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 51 states, 51 states have (on average 1.2352941176470589) internal successors, (63), 50 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:10:58,649 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 181 transitions. [2022-04-15 01:10:58,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2022-04-15 01:10:58,650 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:10:58,650 INFO L499 BasicCegarLoop]: trace histogram [12, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:10:58,668 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Ended with exit code 0 [2022-04-15 01:10:58,865 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,27 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:10:58,865 INFO L403 AbstractCegarLoop]: === Iteration 31 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:10:58,865 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:10:58,865 INFO L85 PathProgramCache]: Analyzing trace with hash 1331034551, now seen corresponding path program 25 times [2022-04-15 01:10:58,865 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:10:58,865 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [869994839] [2022-04-15 01:10:58,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:10:58,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:10:58,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:10:59,256 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:10:59,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:10:59,274 INFO L290 TraceCheckUtils]: 0: Hoare triple {20511#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {20483#true} is VALID [2022-04-15 01:10:59,274 INFO L290 TraceCheckUtils]: 1: Hoare triple {20483#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20483#true} is VALID [2022-04-15 01:10:59,274 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {20483#true} {20483#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20483#true} is VALID [2022-04-15 01:10:59,274 INFO L272 TraceCheckUtils]: 0: Hoare triple {20483#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20511#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:10:59,274 INFO L290 TraceCheckUtils]: 1: Hoare triple {20511#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {20483#true} is VALID [2022-04-15 01:10:59,274 INFO L290 TraceCheckUtils]: 2: Hoare triple {20483#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20483#true} is VALID [2022-04-15 01:10:59,275 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20483#true} {20483#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20483#true} is VALID [2022-04-15 01:10:59,275 INFO L272 TraceCheckUtils]: 4: Hoare triple {20483#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20483#true} is VALID [2022-04-15 01:10:59,275 INFO L290 TraceCheckUtils]: 5: Hoare triple {20483#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {20488#(= main_~y~0 0)} is VALID [2022-04-15 01:10:59,275 INFO L290 TraceCheckUtils]: 6: Hoare triple {20488#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20489#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:10:59,276 INFO L290 TraceCheckUtils]: 7: Hoare triple {20489#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20490#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:10:59,276 INFO L290 TraceCheckUtils]: 8: Hoare triple {20490#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20491#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:10:59,277 INFO L290 TraceCheckUtils]: 9: Hoare triple {20491#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20492#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:10:59,277 INFO L290 TraceCheckUtils]: 10: Hoare triple {20492#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20493#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:10:59,278 INFO L290 TraceCheckUtils]: 11: Hoare triple {20493#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20494#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:10:59,279 INFO L290 TraceCheckUtils]: 12: Hoare triple {20494#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20495#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:10:59,279 INFO L290 TraceCheckUtils]: 13: Hoare triple {20495#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20496#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:10:59,280 INFO L290 TraceCheckUtils]: 14: Hoare triple {20496#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20497#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:10:59,280 INFO L290 TraceCheckUtils]: 15: Hoare triple {20497#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20498#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 01:10:59,281 INFO L290 TraceCheckUtils]: 16: Hoare triple {20498#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20499#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 01:10:59,281 INFO L290 TraceCheckUtils]: 17: Hoare triple {20499#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20500#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 01:10:59,281 INFO L290 TraceCheckUtils]: 18: Hoare triple {20500#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {20500#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 01:10:59,282 INFO L290 TraceCheckUtils]: 19: Hoare triple {20500#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {20501#(and (<= main_~z~0 12) (<= 12 main_~z~0))} is VALID [2022-04-15 01:10:59,282 INFO L290 TraceCheckUtils]: 20: Hoare triple {20501#(and (<= main_~z~0 12) (<= 12 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20502#(and (<= main_~z~0 11) (<= 11 main_~z~0))} is VALID [2022-04-15 01:10:59,283 INFO L290 TraceCheckUtils]: 21: Hoare triple {20502#(and (<= main_~z~0 11) (<= 11 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20503#(and (<= main_~z~0 10) (<= 10 main_~z~0))} is VALID [2022-04-15 01:10:59,283 INFO L290 TraceCheckUtils]: 22: Hoare triple {20503#(and (<= main_~z~0 10) (<= 10 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20504#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-15 01:10:59,284 INFO L290 TraceCheckUtils]: 23: Hoare triple {20504#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20505#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-15 01:10:59,284 INFO L290 TraceCheckUtils]: 24: Hoare triple {20505#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20506#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-15 01:10:59,285 INFO L290 TraceCheckUtils]: 25: Hoare triple {20506#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20507#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 01:10:59,285 INFO L290 TraceCheckUtils]: 26: Hoare triple {20507#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20508#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:10:59,286 INFO L290 TraceCheckUtils]: 27: Hoare triple {20508#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20509#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:10:59,286 INFO L290 TraceCheckUtils]: 28: Hoare triple {20509#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20510#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 01:10:59,287 INFO L290 TraceCheckUtils]: 29: Hoare triple {20510#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {20484#false} is VALID [2022-04-15 01:10:59,287 INFO L290 TraceCheckUtils]: 30: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:10:59,287 INFO L290 TraceCheckUtils]: 31: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:10:59,287 INFO L290 TraceCheckUtils]: 32: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:10:59,287 INFO L290 TraceCheckUtils]: 33: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:10:59,287 INFO L290 TraceCheckUtils]: 34: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:10:59,287 INFO L290 TraceCheckUtils]: 35: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:10:59,287 INFO L290 TraceCheckUtils]: 36: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:10:59,287 INFO L290 TraceCheckUtils]: 37: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:10:59,287 INFO L290 TraceCheckUtils]: 38: Hoare triple {20484#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {20484#false} is VALID [2022-04-15 01:10:59,288 INFO L272 TraceCheckUtils]: 39: Hoare triple {20484#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {20484#false} is VALID [2022-04-15 01:10:59,288 INFO L290 TraceCheckUtils]: 40: Hoare triple {20484#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20484#false} is VALID [2022-04-15 01:10:59,288 INFO L290 TraceCheckUtils]: 41: Hoare triple {20484#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20484#false} is VALID [2022-04-15 01:10:59,288 INFO L290 TraceCheckUtils]: 42: Hoare triple {20484#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20484#false} is VALID [2022-04-15 01:10:59,288 INFO L134 CoverageAnalysis]: Checked inductivity of 159 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2022-04-15 01:10:59,288 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:10:59,288 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [869994839] [2022-04-15 01:10:59,288 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [869994839] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:10:59,288 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [389310878] [2022-04-15 01:10:59,288 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-15 01:10:59,288 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:10:59,289 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:10:59,290 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:10:59,290 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-04-15 01:10:59,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:10:59,346 INFO L263 TraceCheckSpWp]: Trace formula consists of 204 conjuncts, 47 conjunts are in the unsatisfiable core [2022-04-15 01:10:59,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:10:59,356 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:10:59,664 INFO L272 TraceCheckUtils]: 0: Hoare triple {20483#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20483#true} is VALID [2022-04-15 01:10:59,664 INFO L290 TraceCheckUtils]: 1: Hoare triple {20483#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {20483#true} is VALID [2022-04-15 01:10:59,664 INFO L290 TraceCheckUtils]: 2: Hoare triple {20483#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20483#true} is VALID [2022-04-15 01:10:59,664 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20483#true} {20483#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20483#true} is VALID [2022-04-15 01:10:59,664 INFO L272 TraceCheckUtils]: 4: Hoare triple {20483#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20483#true} is VALID [2022-04-15 01:10:59,664 INFO L290 TraceCheckUtils]: 5: Hoare triple {20483#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {20488#(= main_~y~0 0)} is VALID [2022-04-15 01:10:59,665 INFO L290 TraceCheckUtils]: 6: Hoare triple {20488#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20489#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:10:59,665 INFO L290 TraceCheckUtils]: 7: Hoare triple {20489#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20490#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:10:59,666 INFO L290 TraceCheckUtils]: 8: Hoare triple {20490#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20491#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:10:59,666 INFO L290 TraceCheckUtils]: 9: Hoare triple {20491#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20492#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:10:59,667 INFO L290 TraceCheckUtils]: 10: Hoare triple {20492#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20493#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:10:59,667 INFO L290 TraceCheckUtils]: 11: Hoare triple {20493#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20494#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:10:59,668 INFO L290 TraceCheckUtils]: 12: Hoare triple {20494#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20495#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:10:59,668 INFO L290 TraceCheckUtils]: 13: Hoare triple {20495#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20496#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:10:59,669 INFO L290 TraceCheckUtils]: 14: Hoare triple {20496#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20497#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:10:59,670 INFO L290 TraceCheckUtils]: 15: Hoare triple {20497#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20498#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 01:10:59,670 INFO L290 TraceCheckUtils]: 16: Hoare triple {20498#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20499#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 01:10:59,671 INFO L290 TraceCheckUtils]: 17: Hoare triple {20499#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20500#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 01:10:59,671 INFO L290 TraceCheckUtils]: 18: Hoare triple {20500#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {20500#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 01:10:59,671 INFO L290 TraceCheckUtils]: 19: Hoare triple {20500#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {20501#(and (<= main_~z~0 12) (<= 12 main_~z~0))} is VALID [2022-04-15 01:10:59,672 INFO L290 TraceCheckUtils]: 20: Hoare triple {20501#(and (<= main_~z~0 12) (<= 12 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20502#(and (<= main_~z~0 11) (<= 11 main_~z~0))} is VALID [2022-04-15 01:10:59,672 INFO L290 TraceCheckUtils]: 21: Hoare triple {20502#(and (<= main_~z~0 11) (<= 11 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20503#(and (<= main_~z~0 10) (<= 10 main_~z~0))} is VALID [2022-04-15 01:10:59,673 INFO L290 TraceCheckUtils]: 22: Hoare triple {20503#(and (<= main_~z~0 10) (<= 10 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20504#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-15 01:10:59,673 INFO L290 TraceCheckUtils]: 23: Hoare triple {20504#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20505#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-15 01:10:59,674 INFO L290 TraceCheckUtils]: 24: Hoare triple {20505#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20506#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-15 01:10:59,674 INFO L290 TraceCheckUtils]: 25: Hoare triple {20506#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20507#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 01:10:59,675 INFO L290 TraceCheckUtils]: 26: Hoare triple {20507#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20508#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:10:59,675 INFO L290 TraceCheckUtils]: 27: Hoare triple {20508#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20509#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:10:59,676 INFO L290 TraceCheckUtils]: 28: Hoare triple {20509#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20599#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:10:59,676 INFO L290 TraceCheckUtils]: 29: Hoare triple {20599#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {20484#false} is VALID [2022-04-15 01:10:59,676 INFO L290 TraceCheckUtils]: 30: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:10:59,676 INFO L290 TraceCheckUtils]: 31: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:10:59,676 INFO L290 TraceCheckUtils]: 32: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:10:59,676 INFO L290 TraceCheckUtils]: 33: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:10:59,677 INFO L290 TraceCheckUtils]: 34: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:10:59,677 INFO L290 TraceCheckUtils]: 35: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:10:59,677 INFO L290 TraceCheckUtils]: 36: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:10:59,677 INFO L290 TraceCheckUtils]: 37: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:10:59,677 INFO L290 TraceCheckUtils]: 38: Hoare triple {20484#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {20484#false} is VALID [2022-04-15 01:10:59,677 INFO L272 TraceCheckUtils]: 39: Hoare triple {20484#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {20484#false} is VALID [2022-04-15 01:10:59,677 INFO L290 TraceCheckUtils]: 40: Hoare triple {20484#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20484#false} is VALID [2022-04-15 01:10:59,677 INFO L290 TraceCheckUtils]: 41: Hoare triple {20484#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20484#false} is VALID [2022-04-15 01:10:59,677 INFO L290 TraceCheckUtils]: 42: Hoare triple {20484#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20484#false} is VALID [2022-04-15 01:10:59,677 INFO L134 CoverageAnalysis]: Checked inductivity of 159 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2022-04-15 01:10:59,677 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:11:00,412 INFO L290 TraceCheckUtils]: 42: Hoare triple {20484#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20484#false} is VALID [2022-04-15 01:11:00,413 INFO L290 TraceCheckUtils]: 41: Hoare triple {20484#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20484#false} is VALID [2022-04-15 01:11:00,413 INFO L290 TraceCheckUtils]: 40: Hoare triple {20484#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20484#false} is VALID [2022-04-15 01:11:00,413 INFO L272 TraceCheckUtils]: 39: Hoare triple {20484#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {20484#false} is VALID [2022-04-15 01:11:00,413 INFO L290 TraceCheckUtils]: 38: Hoare triple {20484#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {20484#false} is VALID [2022-04-15 01:11:00,413 INFO L290 TraceCheckUtils]: 37: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:11:00,413 INFO L290 TraceCheckUtils]: 36: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:11:00,413 INFO L290 TraceCheckUtils]: 35: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:11:00,413 INFO L290 TraceCheckUtils]: 34: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:11:00,413 INFO L290 TraceCheckUtils]: 33: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:11:00,413 INFO L290 TraceCheckUtils]: 32: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:11:00,413 INFO L290 TraceCheckUtils]: 31: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:11:00,413 INFO L290 TraceCheckUtils]: 30: Hoare triple {20484#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {20484#false} is VALID [2022-04-15 01:11:00,414 INFO L290 TraceCheckUtils]: 29: Hoare triple {20681#(< 0 (mod main_~z~0 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {20484#false} is VALID [2022-04-15 01:11:00,415 INFO L290 TraceCheckUtils]: 28: Hoare triple {20685#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20681#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 01:11:00,415 INFO L290 TraceCheckUtils]: 27: Hoare triple {20689#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20685#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-15 01:11:00,417 INFO L290 TraceCheckUtils]: 26: Hoare triple {20693#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20689#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-15 01:11:00,417 INFO L290 TraceCheckUtils]: 25: Hoare triple {20697#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20693#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-15 01:11:00,418 INFO L290 TraceCheckUtils]: 24: Hoare triple {20701#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20697#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} is VALID [2022-04-15 01:11:00,418 INFO L290 TraceCheckUtils]: 23: Hoare triple {20705#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20701#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} is VALID [2022-04-15 01:11:00,419 INFO L290 TraceCheckUtils]: 22: Hoare triple {20709#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20705#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} is VALID [2022-04-15 01:11:00,420 INFO L290 TraceCheckUtils]: 21: Hoare triple {20713#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20709#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} is VALID [2022-04-15 01:11:00,420 INFO L290 TraceCheckUtils]: 20: Hoare triple {20717#(< 0 (mod (+ main_~z~0 4294967287) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20713#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} is VALID [2022-04-15 01:11:00,421 INFO L290 TraceCheckUtils]: 19: Hoare triple {20721#(< 0 (mod (+ main_~y~0 4294967287) 4294967296))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {20717#(< 0 (mod (+ main_~z~0 4294967287) 4294967296))} is VALID [2022-04-15 01:11:00,421 INFO L290 TraceCheckUtils]: 18: Hoare triple {20721#(< 0 (mod (+ main_~y~0 4294967287) 4294967296))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {20721#(< 0 (mod (+ main_~y~0 4294967287) 4294967296))} is VALID [2022-04-15 01:11:00,422 INFO L290 TraceCheckUtils]: 17: Hoare triple {20728#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20721#(< 0 (mod (+ main_~y~0 4294967287) 4294967296))} is VALID [2022-04-15 01:11:00,422 INFO L290 TraceCheckUtils]: 16: Hoare triple {20732#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20728#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} is VALID [2022-04-15 01:11:00,423 INFO L290 TraceCheckUtils]: 15: Hoare triple {20736#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20732#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-15 01:11:00,423 INFO L290 TraceCheckUtils]: 14: Hoare triple {20740#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20736#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-15 01:11:00,424 INFO L290 TraceCheckUtils]: 13: Hoare triple {20744#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20740#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-15 01:11:00,425 INFO L290 TraceCheckUtils]: 12: Hoare triple {20748#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20744#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-15 01:11:00,425 INFO L290 TraceCheckUtils]: 11: Hoare triple {20752#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20748#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 01:11:00,426 INFO L290 TraceCheckUtils]: 10: Hoare triple {20756#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20752#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 01:11:00,427 INFO L290 TraceCheckUtils]: 9: Hoare triple {20760#(< 0 (mod main_~y~0 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20756#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:11:00,427 INFO L290 TraceCheckUtils]: 8: Hoare triple {20764#(< 0 (mod (+ main_~y~0 1) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20760#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:11:00,428 INFO L290 TraceCheckUtils]: 7: Hoare triple {20768#(< 0 (mod (+ main_~y~0 2) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20764#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-15 01:11:00,428 INFO L290 TraceCheckUtils]: 6: Hoare triple {20772#(< 0 (mod (+ main_~y~0 3) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20768#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-15 01:11:00,429 INFO L290 TraceCheckUtils]: 5: Hoare triple {20483#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {20772#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-15 01:11:00,429 INFO L272 TraceCheckUtils]: 4: Hoare triple {20483#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20483#true} is VALID [2022-04-15 01:11:00,429 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20483#true} {20483#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20483#true} is VALID [2022-04-15 01:11:00,429 INFO L290 TraceCheckUtils]: 2: Hoare triple {20483#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20483#true} is VALID [2022-04-15 01:11:00,429 INFO L290 TraceCheckUtils]: 1: Hoare triple {20483#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {20483#true} is VALID [2022-04-15 01:11:00,429 INFO L272 TraceCheckUtils]: 0: Hoare triple {20483#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20483#true} is VALID [2022-04-15 01:11:00,429 INFO L134 CoverageAnalysis]: Checked inductivity of 159 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2022-04-15 01:11:00,430 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [389310878] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:11:00,430 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:11:00,430 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 25, 25] total 50 [2022-04-15 01:11:00,430 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [559251220] [2022-04-15 01:11:00,430 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:11:00,430 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 50 states have (on average 1.2) internal successors, (60), 49 states have internal predecessors, (60), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 43 [2022-04-15 01:11:00,430 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:11:00,430 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 50 states, 50 states have (on average 1.2) internal successors, (60), 49 states have internal predecessors, (60), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:11:00,477 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 65 edges. 65 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:11:00,477 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2022-04-15 01:11:00,477 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:11:00,478 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-04-15 01:11:00,478 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=362, Invalid=2088, Unknown=0, NotChecked=0, Total=2450 [2022-04-15 01:11:00,478 INFO L87 Difference]: Start difference. First operand 156 states and 181 transitions. Second operand has 50 states, 50 states have (on average 1.2) internal successors, (60), 49 states have internal predecessors, (60), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:11:15,440 WARN L232 SmtUtils]: Spent 5.02s on a formula simplification that was a NOOP. DAG size: 60 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:12:40,358 WARN L232 SmtUtils]: Spent 50.61s on a formula simplification that was a NOOP. DAG size: 90 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:12:50,594 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.31s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-15 01:13:50,010 WARN L232 SmtUtils]: Spent 35.68s on a formula simplification that was a NOOP. DAG size: 87 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:14:44,728 WARN L232 SmtUtils]: Spent 33.64s on a formula simplification that was a NOOP. DAG size: 86 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)