/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de51.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-e106359-m [2022-04-15 01:03:09,079 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-15 01:03:09,080 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-15 01:03:09,107 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-15 01:03:09,117 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-15 01:03:09,118 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-15 01:03:09,119 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-15 01:03:09,120 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-15 01:03:09,120 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-15 01:03:09,121 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-15 01:03:09,122 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-15 01:03:09,124 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-15 01:03:09,125 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-15 01:03:09,131 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-15 01:03:09,132 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-15 01:03:09,132 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-15 01:03:09,133 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-15 01:03:09,134 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-15 01:03:09,139 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-15 01:03:09,139 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-15 01:03:09,140 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-15 01:03:09,141 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-15 01:03:09,159 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-15 01:03:09,159 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-15 01:03:09,160 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-15 01:03:09,160 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-15 01:03:09,161 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-15 01:03:09,161 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-15 01:03:09,161 INFO L138 SettingsManager]: * Use SBE=true [2022-04-15 01:03:09,161 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-15 01:03:09,161 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-15 01:03:09,161 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-15 01:03:09,161 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-15 01:03:09,162 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-15 01:03:09,162 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-15 01:03:09,162 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-15 01:03:09,162 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-15 01:03:09,162 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-15 01:03:09,162 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-15 01:03:09,162 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-15 01:03:09,162 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-15 01:03:09,162 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-15 01:03:09,163 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-15 01:03:09,163 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-15 01:03:09,163 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-15 01:03:09,163 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-15 01:03:09,163 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-15 01:03:09,163 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-15 01:03:09,163 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-15 01:03:09,164 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-15 01:03:09,164 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-15 01:03:09,164 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-15 01:03:09,392 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-15 01:03:09,410 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-15 01:03:09,411 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-15 01:03:09,412 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-15 01:03:09,412 INFO L275 PluginConnector]: CDTParser initialized [2022-04-15 01:03:09,413 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de51.c [2022-04-15 01:03:09,473 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b89e8c85f/1cf5b494dec74ad3a98d3e2201ee4124/FLAG7ce344f99 [2022-04-15 01:03:09,853 INFO L306 CDTParser]: Found 1 translation units. [2022-04-15 01:03:09,853 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de51.c [2022-04-15 01:03:09,857 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b89e8c85f/1cf5b494dec74ad3a98d3e2201ee4124/FLAG7ce344f99 [2022-04-15 01:03:09,865 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b89e8c85f/1cf5b494dec74ad3a98d3e2201ee4124 [2022-04-15 01:03:09,867 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-15 01:03:09,868 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-15 01:03:09,869 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-15 01:03:09,869 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-15 01:03:09,872 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-15 01:03:09,872 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.04 01:03:09" (1/1) ... [2022-04-15 01:03:09,873 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@91729b1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:03:09, skipping insertion in model container [2022-04-15 01:03:09,873 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.04 01:03:09" (1/1) ... [2022-04-15 01:03:09,889 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-15 01:03:09,905 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-15 01:03:10,011 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de51.c[368,381] [2022-04-15 01:03:10,021 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-15 01:03:10,027 INFO L203 MainTranslator]: Completed pre-run [2022-04-15 01:03:10,034 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de51.c[368,381] [2022-04-15 01:03:10,038 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-15 01:03:10,046 INFO L208 MainTranslator]: Completed translation [2022-04-15 01:03:10,047 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:03:10 WrapperNode [2022-04-15 01:03:10,047 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-15 01:03:10,049 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-15 01:03:10,049 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-15 01:03:10,049 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-15 01:03:10,055 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:03:10" (1/1) ... [2022-04-15 01:03:10,056 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:03:10" (1/1) ... [2022-04-15 01:03:10,060 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:03:10" (1/1) ... [2022-04-15 01:03:10,060 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:03:10" (1/1) ... [2022-04-15 01:03:10,063 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:03:10" (1/1) ... [2022-04-15 01:03:10,069 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:03:10" (1/1) ... [2022-04-15 01:03:10,069 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:03:10" (1/1) ... [2022-04-15 01:03:10,070 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-15 01:03:10,071 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-15 01:03:10,071 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-15 01:03:10,071 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-15 01:03:10,072 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:03:10" (1/1) ... [2022-04-15 01:03:10,085 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-15 01:03:10,092 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:03:10,104 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-15 01:03:10,115 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-15 01:03:10,133 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-15 01:03:10,133 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-15 01:03:10,133 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-15 01:03:10,133 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-15 01:03:10,134 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-15 01:03:10,134 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-15 01:03:10,134 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-15 01:03:10,135 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-15 01:03:10,135 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-15 01:03:10,135 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-15 01:03:10,135 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-15 01:03:10,135 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-15 01:03:10,135 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-15 01:03:10,136 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-15 01:03:10,136 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-15 01:03:10,136 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-15 01:03:10,136 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-15 01:03:10,136 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-15 01:03:10,186 INFO L234 CfgBuilder]: Building ICFG [2022-04-15 01:03:10,187 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-15 01:03:10,372 INFO L275 CfgBuilder]: Performing block encoding [2022-04-15 01:03:10,376 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-15 01:03:10,376 INFO L299 CfgBuilder]: Removed 5 assume(true) statements. [2022-04-15 01:03:10,378 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 01:03:10 BoogieIcfgContainer [2022-04-15 01:03:10,378 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-15 01:03:10,378 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-15 01:03:10,378 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-15 01:03:10,379 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-15 01:03:10,381 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 01:03:10" (1/1) ... [2022-04-15 01:03:10,382 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-15 01:03:10,406 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 15.04 01:03:10 BasicIcfg [2022-04-15 01:03:10,406 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-15 01:03:10,407 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-15 01:03:10,408 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-15 01:03:10,410 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-15 01:03:10,410 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.04 01:03:09" (1/4) ... [2022-04-15 01:03:10,410 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@422a240d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.04 01:03:10, skipping insertion in model container [2022-04-15 01:03:10,410 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 01:03:10" (2/4) ... [2022-04-15 01:03:10,411 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@422a240d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.04 01:03:10, skipping insertion in model container [2022-04-15 01:03:10,411 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 01:03:10" (3/4) ... [2022-04-15 01:03:10,411 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@422a240d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.04 01:03:10, skipping insertion in model container [2022-04-15 01:03:10,411 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 15.04 01:03:10" (4/4) ... [2022-04-15 01:03:10,412 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de51.cqvasr [2022-04-15 01:03:10,416 INFO L202 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-15 01:03:10,416 INFO L161 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-15 01:03:10,450 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-15 01:03:10,454 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-15 01:03:10,454 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-15 01:03:10,477 INFO L276 IsEmpty]: Start isEmpty. Operand has 24 states, 16 states have (on average 1.75) internal successors, (28), 17 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-15 01:03:10,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-15 01:03:10,480 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:03:10,480 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:03:10,481 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:03:10,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:03:10,484 INFO L85 PathProgramCache]: Analyzing trace with hash 702671213, now seen corresponding path program 1 times [2022-04-15 01:03:10,492 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:03:10,492 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1546956131] [2022-04-15 01:03:10,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:10,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:03:10,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:10,642 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:03:10,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:10,666 INFO L290 TraceCheckUtils]: 0: Hoare triple {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {27#true} is VALID [2022-04-15 01:03:10,667 INFO L290 TraceCheckUtils]: 1: Hoare triple {27#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-15 01:03:10,667 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {27#true} {27#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-15 01:03:10,669 INFO L272 TraceCheckUtils]: 0: Hoare triple {27#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:03:10,670 INFO L290 TraceCheckUtils]: 1: Hoare triple {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {27#true} is VALID [2022-04-15 01:03:10,671 INFO L290 TraceCheckUtils]: 2: Hoare triple {27#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-15 01:03:10,671 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {27#true} {27#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-15 01:03:10,671 INFO L272 TraceCheckUtils]: 4: Hoare triple {27#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-15 01:03:10,671 INFO L290 TraceCheckUtils]: 5: Hoare triple {27#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {27#true} is VALID [2022-04-15 01:03:10,672 INFO L290 TraceCheckUtils]: 6: Hoare triple {27#true} [92] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-15 01:03:10,672 INFO L290 TraceCheckUtils]: 7: Hoare triple {28#false} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {28#false} is VALID [2022-04-15 01:03:10,672 INFO L290 TraceCheckUtils]: 8: Hoare triple {28#false} [96] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-15 01:03:10,672 INFO L290 TraceCheckUtils]: 9: Hoare triple {28#false} [99] L29-1-->L35-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-15 01:03:10,677 INFO L290 TraceCheckUtils]: 10: Hoare triple {28#false} [102] L35-1-->L41-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-15 01:03:10,677 INFO L290 TraceCheckUtils]: 11: Hoare triple {28#false} [105] L41-1-->L41-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-15 01:03:10,677 INFO L272 TraceCheckUtils]: 12: Hoare triple {28#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {28#false} is VALID [2022-04-15 01:03:10,678 INFO L290 TraceCheckUtils]: 13: Hoare triple {28#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28#false} is VALID [2022-04-15 01:03:10,679 INFO L290 TraceCheckUtils]: 14: Hoare triple {28#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-15 01:03:10,680 INFO L290 TraceCheckUtils]: 15: Hoare triple {28#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-15 01:03:10,680 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:10,680 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:03:10,681 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1546956131] [2022-04-15 01:03:10,682 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1546956131] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 01:03:10,682 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 01:03:10,682 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-15 01:03:10,683 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [732185646] [2022-04-15 01:03:10,683 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 01:03:10,688 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-15 01:03:10,689 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:03:10,692 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:10,716 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:10,717 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-15 01:03:10,717 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:03:10,736 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-15 01:03:10,737 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-15 01:03:10,739 INFO L87 Difference]: Start difference. First operand has 24 states, 16 states have (on average 1.75) internal successors, (28), 17 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:10,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:10,826 INFO L93 Difference]: Finished difference Result 41 states and 60 transitions. [2022-04-15 01:03:10,826 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-15 01:03:10,826 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-15 01:03:10,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:03:10,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:10,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 60 transitions. [2022-04-15 01:03:10,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:10,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 60 transitions. [2022-04-15 01:03:10,846 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 60 transitions. [2022-04-15 01:03:10,912 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:10,920 INFO L225 Difference]: With dead ends: 41 [2022-04-15 01:03:10,921 INFO L226 Difference]: Without dead ends: 17 [2022-04-15 01:03:10,923 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-15 01:03:10,926 INFO L913 BasicCegarLoop]: 27 mSDtfsCounter, 19 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 30 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 01:03:10,926 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [20 Valid, 30 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 01:03:10,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-04-15 01:03:10,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-04-15 01:03:10,946 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:03:10,947 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:10,947 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:10,947 INFO L87 Difference]: Start difference. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:10,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:10,949 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2022-04-15 01:03:10,949 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-15 01:03:10,949 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:10,949 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:10,950 INFO L74 IsIncluded]: Start isIncluded. First operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-15 01:03:10,950 INFO L87 Difference]: Start difference. First operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-15 01:03:10,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:10,951 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2022-04-15 01:03:10,951 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-15 01:03:10,951 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:10,952 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:10,952 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:03:10,955 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:03:10,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:10,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2022-04-15 01:03:10,957 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 21 transitions. Word has length 16 [2022-04-15 01:03:10,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:03:10,958 INFO L478 AbstractCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-04-15 01:03:10,959 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:10,959 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-15 01:03:10,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-15 01:03:10,959 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:03:10,959 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:03:10,960 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-15 01:03:10,960 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:03:10,960 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:03:10,960 INFO L85 PathProgramCache]: Analyzing trace with hash -1128942900, now seen corresponding path program 1 times [2022-04-15 01:03:10,961 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:03:10,961 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [891278794] [2022-04-15 01:03:10,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:10,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:03:10,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:11,120 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:03:11,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:11,126 INFO L290 TraceCheckUtils]: 0: Hoare triple {154#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {146#true} is VALID [2022-04-15 01:03:11,127 INFO L290 TraceCheckUtils]: 1: Hoare triple {146#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-15 01:03:11,127 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {146#true} {146#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-15 01:03:11,128 INFO L272 TraceCheckUtils]: 0: Hoare triple {146#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {154#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:03:11,128 INFO L290 TraceCheckUtils]: 1: Hoare triple {154#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {146#true} is VALID [2022-04-15 01:03:11,128 INFO L290 TraceCheckUtils]: 2: Hoare triple {146#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-15 01:03:11,128 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {146#true} {146#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-15 01:03:11,128 INFO L272 TraceCheckUtils]: 4: Hoare triple {146#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-15 01:03:11,129 INFO L290 TraceCheckUtils]: 5: Hoare triple {146#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:11,129 INFO L290 TraceCheckUtils]: 6: Hoare triple {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:11,130 INFO L290 TraceCheckUtils]: 7: Hoare triple {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:11,130 INFO L290 TraceCheckUtils]: 8: Hoare triple {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:11,131 INFO L290 TraceCheckUtils]: 9: Hoare triple {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:11,131 INFO L290 TraceCheckUtils]: 10: Hoare triple {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:11,132 INFO L290 TraceCheckUtils]: 11: Hoare triple {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:11,133 INFO L272 TraceCheckUtils]: 12: Hoare triple {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {152#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 01:03:11,133 INFO L290 TraceCheckUtils]: 13: Hoare triple {152#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {153#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 01:03:11,134 INFO L290 TraceCheckUtils]: 14: Hoare triple {153#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {147#false} is VALID [2022-04-15 01:03:11,134 INFO L290 TraceCheckUtils]: 15: Hoare triple {147#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {147#false} is VALID [2022-04-15 01:03:11,134 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:11,134 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:03:11,135 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [891278794] [2022-04-15 01:03:11,135 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [891278794] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 01:03:11,135 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 01:03:11,135 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-15 01:03:11,135 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2052758315] [2022-04-15 01:03:11,135 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 01:03:11,136 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-15 01:03:11,136 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:03:11,137 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,152 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:11,153 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-15 01:03:11,153 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:03:11,153 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-15 01:03:11,153 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-04-15 01:03:11,154 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. Second operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:11,324 INFO L93 Difference]: Finished difference Result 28 states and 36 transitions. [2022-04-15 01:03:11,324 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-15 01:03:11,324 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-15 01:03:11,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:03:11,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 36 transitions. [2022-04-15 01:03:11,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 36 transitions. [2022-04-15 01:03:11,327 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 36 transitions. [2022-04-15 01:03:11,358 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:11,360 INFO L225 Difference]: With dead ends: 28 [2022-04-15 01:03:11,360 INFO L226 Difference]: Without dead ends: 23 [2022-04-15 01:03:11,360 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2022-04-15 01:03:11,361 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 25 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 01:03:11,362 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [25 Valid, 31 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 01:03:11,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-04-15 01:03:11,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2022-04-15 01:03:11,365 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:03:11,365 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,366 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,366 INFO L87 Difference]: Start difference. First operand 23 states. Second operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:11,367 INFO L93 Difference]: Finished difference Result 23 states and 31 transitions. [2022-04-15 01:03:11,368 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 31 transitions. [2022-04-15 01:03:11,368 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:11,368 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:11,368 INFO L74 IsIncluded]: Start isIncluded. First operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-15 01:03:11,368 INFO L87 Difference]: Start difference. First operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-15 01:03:11,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:11,370 INFO L93 Difference]: Finished difference Result 23 states and 31 transitions. [2022-04-15 01:03:11,370 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 31 transitions. [2022-04-15 01:03:11,370 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:11,370 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:11,370 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:03:11,370 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:03:11,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 31 transitions. [2022-04-15 01:03:11,372 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 31 transitions. Word has length 16 [2022-04-15 01:03:11,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:03:11,372 INFO L478 AbstractCegarLoop]: Abstraction has 23 states and 31 transitions. [2022-04-15 01:03:11,372 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,372 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 31 transitions. [2022-04-15 01:03:11,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-15 01:03:11,373 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:03:11,373 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:03:11,373 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-15 01:03:11,373 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:03:11,374 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:03:11,374 INFO L85 PathProgramCache]: Analyzing trace with hash -610770875, now seen corresponding path program 1 times [2022-04-15 01:03:11,374 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:03:11,374 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [191492564] [2022-04-15 01:03:11,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:11,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:03:11,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:11,426 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:03:11,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:11,449 INFO L290 TraceCheckUtils]: 0: Hoare triple {288#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {282#true} is VALID [2022-04-15 01:03:11,449 INFO L290 TraceCheckUtils]: 1: Hoare triple {282#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {282#true} is VALID [2022-04-15 01:03:11,450 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {282#true} {282#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {282#true} is VALID [2022-04-15 01:03:11,450 INFO L272 TraceCheckUtils]: 0: Hoare triple {282#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {288#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:03:11,450 INFO L290 TraceCheckUtils]: 1: Hoare triple {288#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {282#true} is VALID [2022-04-15 01:03:11,451 INFO L290 TraceCheckUtils]: 2: Hoare triple {282#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {282#true} is VALID [2022-04-15 01:03:11,451 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {282#true} {282#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {282#true} is VALID [2022-04-15 01:03:11,451 INFO L272 TraceCheckUtils]: 4: Hoare triple {282#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {282#true} is VALID [2022-04-15 01:03:11,451 INFO L290 TraceCheckUtils]: 5: Hoare triple {282#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {282#true} is VALID [2022-04-15 01:03:11,451 INFO L290 TraceCheckUtils]: 6: Hoare triple {282#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {282#true} is VALID [2022-04-15 01:03:11,451 INFO L290 TraceCheckUtils]: 7: Hoare triple {282#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {282#true} is VALID [2022-04-15 01:03:11,452 INFO L290 TraceCheckUtils]: 8: Hoare triple {282#true} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {287#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} is VALID [2022-04-15 01:03:11,452 INFO L290 TraceCheckUtils]: 9: Hoare triple {287#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {287#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} is VALID [2022-04-15 01:03:11,453 INFO L290 TraceCheckUtils]: 10: Hoare triple {287#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {287#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} is VALID [2022-04-15 01:03:11,453 INFO L290 TraceCheckUtils]: 11: Hoare triple {287#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {283#false} is VALID [2022-04-15 01:03:11,454 INFO L290 TraceCheckUtils]: 12: Hoare triple {283#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {283#false} is VALID [2022-04-15 01:03:11,459 INFO L272 TraceCheckUtils]: 13: Hoare triple {283#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {283#false} is VALID [2022-04-15 01:03:11,459 INFO L290 TraceCheckUtils]: 14: Hoare triple {283#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {283#false} is VALID [2022-04-15 01:03:11,459 INFO L290 TraceCheckUtils]: 15: Hoare triple {283#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {283#false} is VALID [2022-04-15 01:03:11,460 INFO L290 TraceCheckUtils]: 16: Hoare triple {283#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {283#false} is VALID [2022-04-15 01:03:11,460 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:11,460 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:03:11,460 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [191492564] [2022-04-15 01:03:11,460 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [191492564] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 01:03:11,460 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 01:03:11,460 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-15 01:03:11,461 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [665566433] [2022-04-15 01:03:11,461 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 01:03:11,461 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-15 01:03:11,461 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:03:11,461 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,475 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:11,475 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-15 01:03:11,475 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:03:11,476 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-15 01:03:11,476 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-15 01:03:11,476 INFO L87 Difference]: Start difference. First operand 23 states and 31 transitions. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:11,542 INFO L93 Difference]: Finished difference Result 35 states and 48 transitions. [2022-04-15 01:03:11,542 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-15 01:03:11,542 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-15 01:03:11,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:03:11,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 33 transitions. [2022-04-15 01:03:11,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 33 transitions. [2022-04-15 01:03:11,545 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 33 transitions. [2022-04-15 01:03:11,570 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:11,571 INFO L225 Difference]: With dead ends: 35 [2022-04-15 01:03:11,571 INFO L226 Difference]: Without dead ends: 28 [2022-04-15 01:03:11,572 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-15 01:03:11,572 INFO L913 BasicCegarLoop]: 19 mSDtfsCounter, 21 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 26 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 01:03:11,573 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [21 Valid, 26 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 01:03:11,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2022-04-15 01:03:11,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2022-04-15 01:03:11,582 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:03:11,582 INFO L82 GeneralOperation]: Start isEquivalent. First operand 28 states. Second operand has 28 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,583 INFO L74 IsIncluded]: Start isIncluded. First operand 28 states. Second operand has 28 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,583 INFO L87 Difference]: Start difference. First operand 28 states. Second operand has 28 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:11,584 INFO L93 Difference]: Finished difference Result 28 states and 39 transitions. [2022-04-15 01:03:11,584 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 39 transitions. [2022-04-15 01:03:11,584 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:11,584 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:11,585 INFO L74 IsIncluded]: Start isIncluded. First operand has 28 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 28 states. [2022-04-15 01:03:11,585 INFO L87 Difference]: Start difference. First operand has 28 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 28 states. [2022-04-15 01:03:11,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:11,586 INFO L93 Difference]: Finished difference Result 28 states and 39 transitions. [2022-04-15 01:03:11,586 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 39 transitions. [2022-04-15 01:03:11,586 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:11,586 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:11,587 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:03:11,587 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:03:11,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 39 transitions. [2022-04-15 01:03:11,588 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 39 transitions. Word has length 17 [2022-04-15 01:03:11,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:03:11,588 INFO L478 AbstractCegarLoop]: Abstraction has 28 states and 39 transitions. [2022-04-15 01:03:11,588 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,588 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 39 transitions. [2022-04-15 01:03:11,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-15 01:03:11,589 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:03:11,589 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:03:11,589 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-15 01:03:11,589 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:03:11,589 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:03:11,590 INFO L85 PathProgramCache]: Analyzing trace with hash 162216202, now seen corresponding path program 1 times [2022-04-15 01:03:11,590 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:03:11,590 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1910098108] [2022-04-15 01:03:11,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:11,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:03:11,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:11,617 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:03:11,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:11,622 INFO L290 TraceCheckUtils]: 0: Hoare triple {440#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {434#true} is VALID [2022-04-15 01:03:11,622 INFO L290 TraceCheckUtils]: 1: Hoare triple {434#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {434#true} is VALID [2022-04-15 01:03:11,622 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {434#true} {434#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {434#true} is VALID [2022-04-15 01:03:11,623 INFO L272 TraceCheckUtils]: 0: Hoare triple {434#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {440#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:03:11,623 INFO L290 TraceCheckUtils]: 1: Hoare triple {440#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {434#true} is VALID [2022-04-15 01:03:11,623 INFO L290 TraceCheckUtils]: 2: Hoare triple {434#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {434#true} is VALID [2022-04-15 01:03:11,623 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {434#true} {434#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {434#true} is VALID [2022-04-15 01:03:11,623 INFO L272 TraceCheckUtils]: 4: Hoare triple {434#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {434#true} is VALID [2022-04-15 01:03:11,623 INFO L290 TraceCheckUtils]: 5: Hoare triple {434#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {434#true} is VALID [2022-04-15 01:03:11,624 INFO L290 TraceCheckUtils]: 6: Hoare triple {434#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {439#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:03:11,624 INFO L290 TraceCheckUtils]: 7: Hoare triple {439#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {439#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:03:11,625 INFO L290 TraceCheckUtils]: 8: Hoare triple {439#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {439#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:03:11,625 INFO L290 TraceCheckUtils]: 9: Hoare triple {439#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {439#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:03:11,626 INFO L290 TraceCheckUtils]: 10: Hoare triple {439#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {435#false} is VALID [2022-04-15 01:03:11,626 INFO L290 TraceCheckUtils]: 11: Hoare triple {435#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {435#false} is VALID [2022-04-15 01:03:11,626 INFO L290 TraceCheckUtils]: 12: Hoare triple {435#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {435#false} is VALID [2022-04-15 01:03:11,626 INFO L272 TraceCheckUtils]: 13: Hoare triple {435#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {435#false} is VALID [2022-04-15 01:03:11,627 INFO L290 TraceCheckUtils]: 14: Hoare triple {435#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {435#false} is VALID [2022-04-15 01:03:11,627 INFO L290 TraceCheckUtils]: 15: Hoare triple {435#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {435#false} is VALID [2022-04-15 01:03:11,627 INFO L290 TraceCheckUtils]: 16: Hoare triple {435#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {435#false} is VALID [2022-04-15 01:03:11,627 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:11,627 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:03:11,627 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1910098108] [2022-04-15 01:03:11,628 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1910098108] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 01:03:11,628 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 01:03:11,628 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-15 01:03:11,628 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1257846755] [2022-04-15 01:03:11,628 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 01:03:11,628 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-15 01:03:11,628 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:03:11,629 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,640 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:11,640 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-15 01:03:11,640 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:03:11,641 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-15 01:03:11,641 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-15 01:03:11,641 INFO L87 Difference]: Start difference. First operand 28 states and 39 transitions. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:11,708 INFO L93 Difference]: Finished difference Result 44 states and 63 transitions. [2022-04-15 01:03:11,708 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-15 01:03:11,709 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-15 01:03:11,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:03:11,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 38 transitions. [2022-04-15 01:03:11,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 38 transitions. [2022-04-15 01:03:11,711 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 38 transitions. [2022-04-15 01:03:11,750 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:11,752 INFO L225 Difference]: With dead ends: 44 [2022-04-15 01:03:11,753 INFO L226 Difference]: Without dead ends: 34 [2022-04-15 01:03:11,753 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-15 01:03:11,754 INFO L913 BasicCegarLoop]: 18 mSDtfsCounter, 23 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 25 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 01:03:11,757 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [23 Valid, 25 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 01:03:11,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2022-04-15 01:03:11,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 32. [2022-04-15 01:03:11,765 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:03:11,765 INFO L82 GeneralOperation]: Start isEquivalent. First operand 34 states. Second operand has 32 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 27 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,765 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand has 32 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 27 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,765 INFO L87 Difference]: Start difference. First operand 34 states. Second operand has 32 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 27 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:11,766 INFO L93 Difference]: Finished difference Result 34 states and 47 transitions. [2022-04-15 01:03:11,766 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 47 transitions. [2022-04-15 01:03:11,767 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:11,767 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:11,767 INFO L74 IsIncluded]: Start isIncluded. First operand has 32 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 27 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-15 01:03:11,767 INFO L87 Difference]: Start difference. First operand has 32 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 27 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-15 01:03:11,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:11,768 INFO L93 Difference]: Finished difference Result 34 states and 47 transitions. [2022-04-15 01:03:11,768 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 47 transitions. [2022-04-15 01:03:11,768 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:11,769 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:11,769 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:03:11,769 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:03:11,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 27 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 44 transitions. [2022-04-15 01:03:11,770 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 44 transitions. Word has length 17 [2022-04-15 01:03:11,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:03:11,770 INFO L478 AbstractCegarLoop]: Abstraction has 32 states and 44 transitions. [2022-04-15 01:03:11,770 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,770 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 44 transitions. [2022-04-15 01:03:11,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-15 01:03:11,771 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:03:11,771 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:03:11,771 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-04-15 01:03:11,771 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:03:11,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:03:11,771 INFO L85 PathProgramCache]: Analyzing trace with hash -1833749398, now seen corresponding path program 1 times [2022-04-15 01:03:11,771 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:03:11,772 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [841392518] [2022-04-15 01:03:11,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:11,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:03:11,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:11,819 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:03:11,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:11,828 INFO L290 TraceCheckUtils]: 0: Hoare triple {621#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {614#true} is VALID [2022-04-15 01:03:11,828 INFO L290 TraceCheckUtils]: 1: Hoare triple {614#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {614#true} is VALID [2022-04-15 01:03:11,828 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {614#true} {614#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {614#true} is VALID [2022-04-15 01:03:11,829 INFO L272 TraceCheckUtils]: 0: Hoare triple {614#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {621#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:03:11,829 INFO L290 TraceCheckUtils]: 1: Hoare triple {621#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {614#true} is VALID [2022-04-15 01:03:11,830 INFO L290 TraceCheckUtils]: 2: Hoare triple {614#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {614#true} is VALID [2022-04-15 01:03:11,830 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {614#true} {614#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {614#true} is VALID [2022-04-15 01:03:11,830 INFO L272 TraceCheckUtils]: 4: Hoare triple {614#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {614#true} is VALID [2022-04-15 01:03:11,831 INFO L290 TraceCheckUtils]: 5: Hoare triple {614#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {619#(= main_~y~0 0)} is VALID [2022-04-15 01:03:11,832 INFO L290 TraceCheckUtils]: 6: Hoare triple {619#(= main_~y~0 0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {619#(= main_~y~0 0)} is VALID [2022-04-15 01:03:11,833 INFO L290 TraceCheckUtils]: 7: Hoare triple {619#(= main_~y~0 0)} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {620#(= main_~z~0 0)} is VALID [2022-04-15 01:03:11,833 INFO L290 TraceCheckUtils]: 8: Hoare triple {620#(= main_~z~0 0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {615#false} is VALID [2022-04-15 01:03:11,833 INFO L290 TraceCheckUtils]: 9: Hoare triple {615#false} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {615#false} is VALID [2022-04-15 01:03:11,833 INFO L290 TraceCheckUtils]: 10: Hoare triple {615#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {615#false} is VALID [2022-04-15 01:03:11,834 INFO L290 TraceCheckUtils]: 11: Hoare triple {615#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {615#false} is VALID [2022-04-15 01:03:11,834 INFO L290 TraceCheckUtils]: 12: Hoare triple {615#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {615#false} is VALID [2022-04-15 01:03:11,834 INFO L272 TraceCheckUtils]: 13: Hoare triple {615#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {615#false} is VALID [2022-04-15 01:03:11,834 INFO L290 TraceCheckUtils]: 14: Hoare triple {615#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {615#false} is VALID [2022-04-15 01:03:11,834 INFO L290 TraceCheckUtils]: 15: Hoare triple {615#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {615#false} is VALID [2022-04-15 01:03:11,834 INFO L290 TraceCheckUtils]: 16: Hoare triple {615#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {615#false} is VALID [2022-04-15 01:03:11,834 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:11,835 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:03:11,835 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [841392518] [2022-04-15 01:03:11,835 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [841392518] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 01:03:11,835 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 01:03:11,835 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-15 01:03:11,835 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1080451986] [2022-04-15 01:03:11,835 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 01:03:11,836 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-15 01:03:11,836 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:03:11,836 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,846 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:11,846 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-15 01:03:11,846 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:03:11,847 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-15 01:03:11,847 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-15 01:03:11,847 INFO L87 Difference]: Start difference. First operand 32 states and 44 transitions. Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:11,937 INFO L93 Difference]: Finished difference Result 44 states and 61 transitions. [2022-04-15 01:03:11,937 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-15 01:03:11,937 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-15 01:03:11,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:03:11,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 39 transitions. [2022-04-15 01:03:11,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 39 transitions. [2022-04-15 01:03:11,940 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 39 transitions. [2022-04-15 01:03:11,970 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:11,971 INFO L225 Difference]: With dead ends: 44 [2022-04-15 01:03:11,971 INFO L226 Difference]: Without dead ends: 26 [2022-04-15 01:03:11,972 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-04-15 01:03:11,975 INFO L913 BasicCegarLoop]: 18 mSDtfsCounter, 21 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 30 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 01:03:11,976 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [21 Valid, 30 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 01:03:11,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2022-04-15 01:03:11,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2022-04-15 01:03:11,981 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:03:11,981 INFO L82 GeneralOperation]: Start isEquivalent. First operand 26 states. Second operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,981 INFO L74 IsIncluded]: Start isIncluded. First operand 26 states. Second operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,981 INFO L87 Difference]: Start difference. First operand 26 states. Second operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:11,982 INFO L93 Difference]: Finished difference Result 26 states and 35 transitions. [2022-04-15 01:03:11,982 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 35 transitions. [2022-04-15 01:03:11,983 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:11,983 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:11,983 INFO L74 IsIncluded]: Start isIncluded. First operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-15 01:03:11,983 INFO L87 Difference]: Start difference. First operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-15 01:03:11,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:11,984 INFO L93 Difference]: Finished difference Result 26 states and 35 transitions. [2022-04-15 01:03:11,984 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 35 transitions. [2022-04-15 01:03:11,984 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:11,984 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:11,984 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:03:11,984 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:03:11,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 35 transitions. [2022-04-15 01:03:11,985 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 35 transitions. Word has length 17 [2022-04-15 01:03:11,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:03:11,985 INFO L478 AbstractCegarLoop]: Abstraction has 26 states and 35 transitions. [2022-04-15 01:03:11,986 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:11,986 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 35 transitions. [2022-04-15 01:03:11,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-15 01:03:11,986 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:03:11,986 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:03:11,986 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-04-15 01:03:11,986 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:03:11,987 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:03:11,987 INFO L85 PathProgramCache]: Analyzing trace with hash -2110277654, now seen corresponding path program 1 times [2022-04-15 01:03:11,987 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:03:11,987 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [607959275] [2022-04-15 01:03:11,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:11,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:03:11,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:12,053 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:03:12,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:12,058 INFO L290 TraceCheckUtils]: 0: Hoare triple {782#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {774#true} is VALID [2022-04-15 01:03:12,058 INFO L290 TraceCheckUtils]: 1: Hoare triple {774#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-15 01:03:12,058 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {774#true} {774#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-15 01:03:12,059 INFO L272 TraceCheckUtils]: 0: Hoare triple {774#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {782#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:03:12,059 INFO L290 TraceCheckUtils]: 1: Hoare triple {782#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {774#true} is VALID [2022-04-15 01:03:12,059 INFO L290 TraceCheckUtils]: 2: Hoare triple {774#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-15 01:03:12,059 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {774#true} {774#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-15 01:03:12,059 INFO L272 TraceCheckUtils]: 4: Hoare triple {774#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-15 01:03:12,060 INFO L290 TraceCheckUtils]: 5: Hoare triple {774#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {779#(= main_~y~0 0)} is VALID [2022-04-15 01:03:12,060 INFO L290 TraceCheckUtils]: 6: Hoare triple {779#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {780#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:03:12,061 INFO L290 TraceCheckUtils]: 7: Hoare triple {780#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {780#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:03:12,061 INFO L290 TraceCheckUtils]: 8: Hoare triple {780#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {781#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-15 01:03:12,062 INFO L290 TraceCheckUtils]: 9: Hoare triple {781#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-15 01:03:12,062 INFO L290 TraceCheckUtils]: 10: Hoare triple {775#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-15 01:03:12,062 INFO L290 TraceCheckUtils]: 11: Hoare triple {775#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-15 01:03:12,062 INFO L290 TraceCheckUtils]: 12: Hoare triple {775#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-15 01:03:12,062 INFO L272 TraceCheckUtils]: 13: Hoare triple {775#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {775#false} is VALID [2022-04-15 01:03:12,063 INFO L290 TraceCheckUtils]: 14: Hoare triple {775#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {775#false} is VALID [2022-04-15 01:03:12,063 INFO L290 TraceCheckUtils]: 15: Hoare triple {775#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-15 01:03:12,063 INFO L290 TraceCheckUtils]: 16: Hoare triple {775#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-15 01:03:12,063 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:12,063 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:03:12,063 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [607959275] [2022-04-15 01:03:12,063 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [607959275] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:03:12,064 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [288684709] [2022-04-15 01:03:12,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:12,064 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:03:12,064 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:03:12,065 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:03:12,066 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-15 01:03:12,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:12,096 INFO L263 TraceCheckSpWp]: Trace formula consists of 66 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-15 01:03:12,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:12,104 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:03:12,363 INFO L272 TraceCheckUtils]: 0: Hoare triple {774#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-15 01:03:12,363 INFO L290 TraceCheckUtils]: 1: Hoare triple {774#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {774#true} is VALID [2022-04-15 01:03:12,363 INFO L290 TraceCheckUtils]: 2: Hoare triple {774#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-15 01:03:12,363 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {774#true} {774#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-15 01:03:12,363 INFO L272 TraceCheckUtils]: 4: Hoare triple {774#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-15 01:03:12,364 INFO L290 TraceCheckUtils]: 5: Hoare triple {774#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {779#(= main_~y~0 0)} is VALID [2022-04-15 01:03:12,364 INFO L290 TraceCheckUtils]: 6: Hoare triple {779#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {780#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:03:12,365 INFO L290 TraceCheckUtils]: 7: Hoare triple {780#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {780#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:03:12,365 INFO L290 TraceCheckUtils]: 8: Hoare triple {780#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {810#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 01:03:12,365 INFO L290 TraceCheckUtils]: 9: Hoare triple {810#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-15 01:03:12,366 INFO L290 TraceCheckUtils]: 10: Hoare triple {775#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-15 01:03:12,366 INFO L290 TraceCheckUtils]: 11: Hoare triple {775#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-15 01:03:12,366 INFO L290 TraceCheckUtils]: 12: Hoare triple {775#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-15 01:03:12,366 INFO L272 TraceCheckUtils]: 13: Hoare triple {775#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {775#false} is VALID [2022-04-15 01:03:12,366 INFO L290 TraceCheckUtils]: 14: Hoare triple {775#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {775#false} is VALID [2022-04-15 01:03:12,366 INFO L290 TraceCheckUtils]: 15: Hoare triple {775#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-15 01:03:12,366 INFO L290 TraceCheckUtils]: 16: Hoare triple {775#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-15 01:03:12,366 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:12,367 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:03:12,460 INFO L290 TraceCheckUtils]: 16: Hoare triple {775#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-15 01:03:12,460 INFO L290 TraceCheckUtils]: 15: Hoare triple {775#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-15 01:03:12,460 INFO L290 TraceCheckUtils]: 14: Hoare triple {775#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {775#false} is VALID [2022-04-15 01:03:12,460 INFO L272 TraceCheckUtils]: 13: Hoare triple {775#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {775#false} is VALID [2022-04-15 01:03:12,461 INFO L290 TraceCheckUtils]: 12: Hoare triple {775#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-15 01:03:12,461 INFO L290 TraceCheckUtils]: 11: Hoare triple {775#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-15 01:03:12,461 INFO L290 TraceCheckUtils]: 10: Hoare triple {775#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-15 01:03:12,461 INFO L290 TraceCheckUtils]: 9: Hoare triple {856#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-15 01:03:12,462 INFO L290 TraceCheckUtils]: 8: Hoare triple {860#(< 0 (mod main_~y~0 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {856#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 01:03:12,462 INFO L290 TraceCheckUtils]: 7: Hoare triple {860#(< 0 (mod main_~y~0 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {860#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:03:12,463 INFO L290 TraceCheckUtils]: 6: Hoare triple {867#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {860#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:03:12,467 INFO L290 TraceCheckUtils]: 5: Hoare triple {774#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {867#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-15 01:03:12,468 INFO L272 TraceCheckUtils]: 4: Hoare triple {774#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-15 01:03:12,468 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {774#true} {774#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-15 01:03:12,468 INFO L290 TraceCheckUtils]: 2: Hoare triple {774#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-15 01:03:12,468 INFO L290 TraceCheckUtils]: 1: Hoare triple {774#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {774#true} is VALID [2022-04-15 01:03:12,468 INFO L272 TraceCheckUtils]: 0: Hoare triple {774#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-15 01:03:12,469 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:12,469 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [288684709] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:03:12,469 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:03:12,469 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 10 [2022-04-15 01:03:12,469 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1118195230] [2022-04-15 01:03:12,469 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:03:12,470 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.1) internal successors, (21), 9 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-15 01:03:12,470 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:03:12,470 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 2.1) internal successors, (21), 9 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:12,498 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:12,498 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-15 01:03:12,499 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:03:12,499 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-15 01:03:12,499 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-04-15 01:03:12,499 INFO L87 Difference]: Start difference. First operand 26 states and 35 transitions. Second operand has 10 states, 10 states have (on average 2.1) internal successors, (21), 9 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:12,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:12,906 INFO L93 Difference]: Finished difference Result 75 states and 114 transitions. [2022-04-15 01:03:12,906 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-15 01:03:12,906 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.1) internal successors, (21), 9 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-15 01:03:12,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:03:12,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.1) internal successors, (21), 9 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:12,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 88 transitions. [2022-04-15 01:03:12,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.1) internal successors, (21), 9 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:12,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 88 transitions. [2022-04-15 01:03:12,910 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 88 transitions. [2022-04-15 01:03:12,988 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 88 edges. 88 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:12,989 INFO L225 Difference]: With dead ends: 75 [2022-04-15 01:03:12,989 INFO L226 Difference]: Without dead ends: 61 [2022-04-15 01:03:12,989 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 32 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=222, Unknown=0, NotChecked=0, Total=306 [2022-04-15 01:03:12,990 INFO L913 BasicCegarLoop]: 19 mSDtfsCounter, 82 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 113 mSolverCounterSat, 44 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 82 SdHoareTripleChecker+Valid, 41 SdHoareTripleChecker+Invalid, 157 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 44 IncrementalHoareTripleChecker+Valid, 113 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 01:03:12,990 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [82 Valid, 41 Invalid, 157 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [44 Valid, 113 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 01:03:12,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2022-04-15 01:03:13,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 38. [2022-04-15 01:03:13,009 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:03:13,009 INFO L82 GeneralOperation]: Start isEquivalent. First operand 61 states. Second operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:13,010 INFO L74 IsIncluded]: Start isIncluded. First operand 61 states. Second operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:13,010 INFO L87 Difference]: Start difference. First operand 61 states. Second operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:13,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:13,011 INFO L93 Difference]: Finished difference Result 61 states and 88 transitions. [2022-04-15 01:03:13,012 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 88 transitions. [2022-04-15 01:03:13,014 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:13,014 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:13,014 INFO L74 IsIncluded]: Start isIncluded. First operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 61 states. [2022-04-15 01:03:13,014 INFO L87 Difference]: Start difference. First operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 61 states. [2022-04-15 01:03:13,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:13,016 INFO L93 Difference]: Finished difference Result 61 states and 88 transitions. [2022-04-15 01:03:13,016 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 88 transitions. [2022-04-15 01:03:13,019 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:13,020 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:13,020 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:03:13,020 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:03:13,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:13,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 52 transitions. [2022-04-15 01:03:13,021 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 52 transitions. Word has length 17 [2022-04-15 01:03:13,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:03:13,022 INFO L478 AbstractCegarLoop]: Abstraction has 38 states and 52 transitions. [2022-04-15 01:03:13,022 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.1) internal successors, (21), 9 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:13,023 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 52 transitions. [2022-04-15 01:03:13,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-15 01:03:13,023 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:03:13,023 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:03:13,040 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-15 01:03:13,240 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2022-04-15 01:03:13,240 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:03:13,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:03:13,241 INFO L85 PathProgramCache]: Analyzing trace with hash -189046619, now seen corresponding path program 1 times [2022-04-15 01:03:13,241 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:03:13,241 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [601012694] [2022-04-15 01:03:13,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:13,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:03:13,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:13,326 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:03:13,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:13,330 INFO L290 TraceCheckUtils]: 0: Hoare triple {1192#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1182#true} is VALID [2022-04-15 01:03:13,330 INFO L290 TraceCheckUtils]: 1: Hoare triple {1182#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-15 01:03:13,330 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1182#true} {1182#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-15 01:03:13,332 INFO L272 TraceCheckUtils]: 0: Hoare triple {1182#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1192#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:03:13,332 INFO L290 TraceCheckUtils]: 1: Hoare triple {1192#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1182#true} is VALID [2022-04-15 01:03:13,332 INFO L290 TraceCheckUtils]: 2: Hoare triple {1182#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-15 01:03:13,332 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1182#true} {1182#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-15 01:03:13,333 INFO L272 TraceCheckUtils]: 4: Hoare triple {1182#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-15 01:03:13,333 INFO L290 TraceCheckUtils]: 5: Hoare triple {1182#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1187#(= main_~y~0 0)} is VALID [2022-04-15 01:03:13,333 INFO L290 TraceCheckUtils]: 6: Hoare triple {1187#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1188#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:03:13,334 INFO L290 TraceCheckUtils]: 7: Hoare triple {1188#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1188#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:03:13,334 INFO L290 TraceCheckUtils]: 8: Hoare triple {1188#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1189#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 01:03:13,336 INFO L290 TraceCheckUtils]: 9: Hoare triple {1189#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1190#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 01:03:13,336 INFO L290 TraceCheckUtils]: 10: Hoare triple {1190#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1190#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 01:03:13,337 INFO L290 TraceCheckUtils]: 11: Hoare triple {1190#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1191#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-15 01:03:13,337 INFO L290 TraceCheckUtils]: 12: Hoare triple {1191#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1191#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-15 01:03:13,338 INFO L290 TraceCheckUtils]: 13: Hoare triple {1191#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1191#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-15 01:03:13,338 INFO L290 TraceCheckUtils]: 14: Hoare triple {1191#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-15 01:03:13,346 INFO L272 TraceCheckUtils]: 15: Hoare triple {1183#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1183#false} is VALID [2022-04-15 01:03:13,346 INFO L290 TraceCheckUtils]: 16: Hoare triple {1183#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1183#false} is VALID [2022-04-15 01:03:13,346 INFO L290 TraceCheckUtils]: 17: Hoare triple {1183#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-15 01:03:13,347 INFO L290 TraceCheckUtils]: 18: Hoare triple {1183#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-15 01:03:13,347 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:13,347 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:03:13,347 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [601012694] [2022-04-15 01:03:13,347 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [601012694] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:03:13,347 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1989090515] [2022-04-15 01:03:13,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:13,348 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:03:13,348 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:03:13,359 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:03:13,360 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-15 01:03:13,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:13,395 INFO L263 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-15 01:03:13,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:13,400 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:03:13,484 INFO L272 TraceCheckUtils]: 0: Hoare triple {1182#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-15 01:03:13,484 INFO L290 TraceCheckUtils]: 1: Hoare triple {1182#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1182#true} is VALID [2022-04-15 01:03:13,484 INFO L290 TraceCheckUtils]: 2: Hoare triple {1182#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-15 01:03:13,484 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1182#true} {1182#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-15 01:03:13,485 INFO L272 TraceCheckUtils]: 4: Hoare triple {1182#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-15 01:03:13,485 INFO L290 TraceCheckUtils]: 5: Hoare triple {1182#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1182#true} is VALID [2022-04-15 01:03:13,485 INFO L290 TraceCheckUtils]: 6: Hoare triple {1182#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:03:13,487 INFO L290 TraceCheckUtils]: 7: Hoare triple {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:03:13,490 INFO L290 TraceCheckUtils]: 8: Hoare triple {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:03:13,491 INFO L290 TraceCheckUtils]: 9: Hoare triple {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1224#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:13,491 INFO L290 TraceCheckUtils]: 10: Hoare triple {1224#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1224#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:13,494 INFO L290 TraceCheckUtils]: 11: Hoare triple {1224#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1224#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:13,494 INFO L290 TraceCheckUtils]: 12: Hoare triple {1224#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1224#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:13,494 INFO L290 TraceCheckUtils]: 13: Hoare triple {1224#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-15 01:03:13,494 INFO L290 TraceCheckUtils]: 14: Hoare triple {1183#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-15 01:03:13,495 INFO L272 TraceCheckUtils]: 15: Hoare triple {1183#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1183#false} is VALID [2022-04-15 01:03:13,495 INFO L290 TraceCheckUtils]: 16: Hoare triple {1183#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1183#false} is VALID [2022-04-15 01:03:13,495 INFO L290 TraceCheckUtils]: 17: Hoare triple {1183#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-15 01:03:13,495 INFO L290 TraceCheckUtils]: 18: Hoare triple {1183#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-15 01:03:13,495 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 01:03:13,495 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:03:13,569 INFO L290 TraceCheckUtils]: 18: Hoare triple {1183#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-15 01:03:13,570 INFO L290 TraceCheckUtils]: 17: Hoare triple {1183#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-15 01:03:13,570 INFO L290 TraceCheckUtils]: 16: Hoare triple {1183#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1183#false} is VALID [2022-04-15 01:03:13,570 INFO L272 TraceCheckUtils]: 15: Hoare triple {1183#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1183#false} is VALID [2022-04-15 01:03:13,570 INFO L290 TraceCheckUtils]: 14: Hoare triple {1183#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-15 01:03:13,570 INFO L290 TraceCheckUtils]: 13: Hoare triple {1224#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-15 01:03:13,571 INFO L290 TraceCheckUtils]: 12: Hoare triple {1224#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1224#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:13,574 INFO L290 TraceCheckUtils]: 11: Hoare triple {1224#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1224#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:13,574 INFO L290 TraceCheckUtils]: 10: Hoare triple {1224#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1224#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:13,575 INFO L290 TraceCheckUtils]: 9: Hoare triple {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1224#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:13,575 INFO L290 TraceCheckUtils]: 8: Hoare triple {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:03:13,576 INFO L290 TraceCheckUtils]: 7: Hoare triple {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:03:13,578 INFO L290 TraceCheckUtils]: 6: Hoare triple {1182#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:03:13,578 INFO L290 TraceCheckUtils]: 5: Hoare triple {1182#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1182#true} is VALID [2022-04-15 01:03:13,578 INFO L272 TraceCheckUtils]: 4: Hoare triple {1182#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-15 01:03:13,578 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1182#true} {1182#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-15 01:03:13,578 INFO L290 TraceCheckUtils]: 2: Hoare triple {1182#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-15 01:03:13,578 INFO L290 TraceCheckUtils]: 1: Hoare triple {1182#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1182#true} is VALID [2022-04-15 01:03:13,578 INFO L272 TraceCheckUtils]: 0: Hoare triple {1182#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-15 01:03:13,579 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 01:03:13,579 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1989090515] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:03:13,579 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:03:13,579 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 4, 4] total 10 [2022-04-15 01:03:13,579 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [623930715] [2022-04-15 01:03:13,579 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:03:13,580 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-15 01:03:13,580 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:03:13,580 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:13,599 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:13,599 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-15 01:03:13,599 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:03:13,600 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-15 01:03:13,600 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2022-04-15 01:03:13,600 INFO L87 Difference]: Start difference. First operand 38 states and 52 transitions. Second operand has 10 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:14,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:14,111 INFO L93 Difference]: Finished difference Result 71 states and 104 transitions. [2022-04-15 01:03:14,111 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-15 01:03:14,111 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-15 01:03:14,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:03:14,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:14,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 76 transitions. [2022-04-15 01:03:14,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:14,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 76 transitions. [2022-04-15 01:03:14,114 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 76 transitions. [2022-04-15 01:03:14,169 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 76 edges. 76 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:14,170 INFO L225 Difference]: With dead ends: 71 [2022-04-15 01:03:14,170 INFO L226 Difference]: Without dead ends: 60 [2022-04-15 01:03:14,170 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=76, Invalid=266, Unknown=0, NotChecked=0, Total=342 [2022-04-15 01:03:14,171 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 47 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 175 mSolverCounterSat, 46 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 47 SdHoareTripleChecker+Valid, 52 SdHoareTripleChecker+Invalid, 221 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 46 IncrementalHoareTripleChecker+Valid, 175 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 01:03:14,171 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [47 Valid, 52 Invalid, 221 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [46 Valid, 175 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-15 01:03:14,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2022-04-15 01:03:14,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 48. [2022-04-15 01:03:14,196 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:03:14,196 INFO L82 GeneralOperation]: Start isEquivalent. First operand 60 states. Second operand has 48 states, 43 states have (on average 1.441860465116279) internal successors, (62), 43 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:14,196 INFO L74 IsIncluded]: Start isIncluded. First operand 60 states. Second operand has 48 states, 43 states have (on average 1.441860465116279) internal successors, (62), 43 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:14,197 INFO L87 Difference]: Start difference. First operand 60 states. Second operand has 48 states, 43 states have (on average 1.441860465116279) internal successors, (62), 43 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:14,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:14,198 INFO L93 Difference]: Finished difference Result 60 states and 83 transitions. [2022-04-15 01:03:14,198 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 83 transitions. [2022-04-15 01:03:14,198 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:14,198 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:14,199 INFO L74 IsIncluded]: Start isIncluded. First operand has 48 states, 43 states have (on average 1.441860465116279) internal successors, (62), 43 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 60 states. [2022-04-15 01:03:14,199 INFO L87 Difference]: Start difference. First operand has 48 states, 43 states have (on average 1.441860465116279) internal successors, (62), 43 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 60 states. [2022-04-15 01:03:14,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:14,200 INFO L93 Difference]: Finished difference Result 60 states and 83 transitions. [2022-04-15 01:03:14,200 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 83 transitions. [2022-04-15 01:03:14,200 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:14,200 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:14,200 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:03:14,201 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:03:14,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 43 states have (on average 1.441860465116279) internal successors, (62), 43 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:14,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 66 transitions. [2022-04-15 01:03:14,202 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 66 transitions. Word has length 19 [2022-04-15 01:03:14,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:03:14,202 INFO L478 AbstractCegarLoop]: Abstraction has 48 states and 66 transitions. [2022-04-15 01:03:14,202 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:14,202 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 66 transitions. [2022-04-15 01:03:14,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-15 01:03:14,202 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:03:14,203 INFO L499 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:03:14,229 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-15 01:03:14,407 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable6 [2022-04-15 01:03:14,408 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:03:14,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:03:14,408 INFO L85 PathProgramCache]: Analyzing trace with hash 261950028, now seen corresponding path program 2 times [2022-04-15 01:03:14,408 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:03:14,408 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1519974313] [2022-04-15 01:03:14,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:14,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:03:14,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:14,531 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:03:14,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:14,537 INFO L290 TraceCheckUtils]: 0: Hoare triple {1621#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1610#true} is VALID [2022-04-15 01:03:14,537 INFO L290 TraceCheckUtils]: 1: Hoare triple {1610#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-15 01:03:14,537 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1610#true} {1610#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-15 01:03:14,538 INFO L272 TraceCheckUtils]: 0: Hoare triple {1610#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1621#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:03:14,538 INFO L290 TraceCheckUtils]: 1: Hoare triple {1621#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1610#true} is VALID [2022-04-15 01:03:14,538 INFO L290 TraceCheckUtils]: 2: Hoare triple {1610#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-15 01:03:14,538 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1610#true} {1610#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-15 01:03:14,538 INFO L272 TraceCheckUtils]: 4: Hoare triple {1610#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-15 01:03:14,539 INFO L290 TraceCheckUtils]: 5: Hoare triple {1610#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1615#(= main_~y~0 0)} is VALID [2022-04-15 01:03:14,539 INFO L290 TraceCheckUtils]: 6: Hoare triple {1615#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1616#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:03:14,540 INFO L290 TraceCheckUtils]: 7: Hoare triple {1616#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1617#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:03:14,541 INFO L290 TraceCheckUtils]: 8: Hoare triple {1617#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1618#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:03:14,542 INFO L290 TraceCheckUtils]: 9: Hoare triple {1618#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1619#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:03:14,542 INFO L290 TraceCheckUtils]: 10: Hoare triple {1619#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1619#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:03:14,543 INFO L290 TraceCheckUtils]: 11: Hoare triple {1619#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1620#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 01:03:14,543 INFO L290 TraceCheckUtils]: 12: Hoare triple {1620#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-15 01:03:14,543 INFO L290 TraceCheckUtils]: 13: Hoare triple {1611#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-15 01:03:14,543 INFO L290 TraceCheckUtils]: 14: Hoare triple {1611#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-15 01:03:14,543 INFO L290 TraceCheckUtils]: 15: Hoare triple {1611#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-15 01:03:14,544 INFO L272 TraceCheckUtils]: 16: Hoare triple {1611#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1611#false} is VALID [2022-04-15 01:03:14,544 INFO L290 TraceCheckUtils]: 17: Hoare triple {1611#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1611#false} is VALID [2022-04-15 01:03:14,544 INFO L290 TraceCheckUtils]: 18: Hoare triple {1611#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-15 01:03:14,544 INFO L290 TraceCheckUtils]: 19: Hoare triple {1611#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-15 01:03:14,544 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:14,544 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:03:14,544 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1519974313] [2022-04-15 01:03:14,544 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1519974313] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:03:14,544 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [693353711] [2022-04-15 01:03:14,544 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 01:03:14,545 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:03:14,545 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:03:14,545 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:03:14,546 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-15 01:03:14,578 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 01:03:14,578 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:03:14,579 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-15 01:03:14,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:14,585 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:03:14,790 INFO L272 TraceCheckUtils]: 0: Hoare triple {1610#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-15 01:03:14,790 INFO L290 TraceCheckUtils]: 1: Hoare triple {1610#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1610#true} is VALID [2022-04-15 01:03:14,790 INFO L290 TraceCheckUtils]: 2: Hoare triple {1610#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-15 01:03:14,790 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1610#true} {1610#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-15 01:03:14,790 INFO L272 TraceCheckUtils]: 4: Hoare triple {1610#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-15 01:03:14,797 INFO L290 TraceCheckUtils]: 5: Hoare triple {1610#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1615#(= main_~y~0 0)} is VALID [2022-04-15 01:03:14,797 INFO L290 TraceCheckUtils]: 6: Hoare triple {1615#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1616#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:03:14,798 INFO L290 TraceCheckUtils]: 7: Hoare triple {1616#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1617#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:03:14,804 INFO L290 TraceCheckUtils]: 8: Hoare triple {1617#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1618#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:03:14,805 INFO L290 TraceCheckUtils]: 9: Hoare triple {1618#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1619#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:03:14,806 INFO L290 TraceCheckUtils]: 10: Hoare triple {1619#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1619#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:03:14,807 INFO L290 TraceCheckUtils]: 11: Hoare triple {1619#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1658#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:03:14,808 INFO L290 TraceCheckUtils]: 12: Hoare triple {1658#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-15 01:03:14,808 INFO L290 TraceCheckUtils]: 13: Hoare triple {1611#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-15 01:03:14,808 INFO L290 TraceCheckUtils]: 14: Hoare triple {1611#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-15 01:03:14,808 INFO L290 TraceCheckUtils]: 15: Hoare triple {1611#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-15 01:03:14,808 INFO L272 TraceCheckUtils]: 16: Hoare triple {1611#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1611#false} is VALID [2022-04-15 01:03:14,808 INFO L290 TraceCheckUtils]: 17: Hoare triple {1611#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1611#false} is VALID [2022-04-15 01:03:14,808 INFO L290 TraceCheckUtils]: 18: Hoare triple {1611#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-15 01:03:14,808 INFO L290 TraceCheckUtils]: 19: Hoare triple {1611#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-15 01:03:14,809 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:14,809 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:03:14,931 INFO L290 TraceCheckUtils]: 19: Hoare triple {1611#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-15 01:03:14,931 INFO L290 TraceCheckUtils]: 18: Hoare triple {1611#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-15 01:03:14,932 INFO L290 TraceCheckUtils]: 17: Hoare triple {1611#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1611#false} is VALID [2022-04-15 01:03:14,932 INFO L272 TraceCheckUtils]: 16: Hoare triple {1611#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1611#false} is VALID [2022-04-15 01:03:14,932 INFO L290 TraceCheckUtils]: 15: Hoare triple {1611#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-15 01:03:14,932 INFO L290 TraceCheckUtils]: 14: Hoare triple {1611#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-15 01:03:14,932 INFO L290 TraceCheckUtils]: 13: Hoare triple {1611#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-15 01:03:14,934 INFO L290 TraceCheckUtils]: 12: Hoare triple {1704#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-15 01:03:14,934 INFO L290 TraceCheckUtils]: 11: Hoare triple {1708#(< 0 (mod main_~y~0 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1704#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 01:03:14,934 INFO L290 TraceCheckUtils]: 10: Hoare triple {1708#(< 0 (mod main_~y~0 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1708#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:03:14,935 INFO L290 TraceCheckUtils]: 9: Hoare triple {1715#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1708#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:03:14,936 INFO L290 TraceCheckUtils]: 8: Hoare triple {1719#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1715#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-15 01:03:14,936 INFO L290 TraceCheckUtils]: 7: Hoare triple {1723#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1719#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-15 01:03:14,937 INFO L290 TraceCheckUtils]: 6: Hoare triple {1727#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1723#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-15 01:03:14,937 INFO L290 TraceCheckUtils]: 5: Hoare triple {1610#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1727#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-15 01:03:14,937 INFO L272 TraceCheckUtils]: 4: Hoare triple {1610#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-15 01:03:14,937 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1610#true} {1610#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-15 01:03:14,937 INFO L290 TraceCheckUtils]: 2: Hoare triple {1610#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-15 01:03:14,938 INFO L290 TraceCheckUtils]: 1: Hoare triple {1610#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1610#true} is VALID [2022-04-15 01:03:14,938 INFO L272 TraceCheckUtils]: 0: Hoare triple {1610#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-15 01:03:14,938 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:14,938 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [693353711] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:03:14,938 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:03:14,938 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 16 [2022-04-15 01:03:14,938 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2045620828] [2022-04-15 01:03:14,938 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:03:14,939 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.6875) internal successors, (27), 15 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-15 01:03:14,939 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:03:14,939 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 1.6875) internal successors, (27), 15 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:14,965 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:14,965 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-15 01:03:14,965 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:03:14,966 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-15 01:03:14,966 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=184, Unknown=0, NotChecked=0, Total=240 [2022-04-15 01:03:14,966 INFO L87 Difference]: Start difference. First operand 48 states and 66 transitions. Second operand has 16 states, 16 states have (on average 1.6875) internal successors, (27), 15 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:16,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:16,782 INFO L93 Difference]: Finished difference Result 196 states and 310 transitions. [2022-04-15 01:03:16,782 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-15 01:03:16,782 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.6875) internal successors, (27), 15 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-15 01:03:16,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:03:16,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.6875) internal successors, (27), 15 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:16,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 176 transitions. [2022-04-15 01:03:16,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.6875) internal successors, (27), 15 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:16,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 176 transitions. [2022-04-15 01:03:16,787 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 176 transitions. [2022-04-15 01:03:16,977 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 176 edges. 176 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:16,984 INFO L225 Difference]: With dead ends: 196 [2022-04-15 01:03:16,985 INFO L226 Difference]: Without dead ends: 178 [2022-04-15 01:03:16,986 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 35 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 359 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=416, Invalid=1144, Unknown=0, NotChecked=0, Total=1560 [2022-04-15 01:03:16,986 INFO L913 BasicCegarLoop]: 37 mSDtfsCounter, 306 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 411 mSolverCounterSat, 182 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 306 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 593 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 182 IncrementalHoareTripleChecker+Valid, 411 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-15 01:03:16,986 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [306 Valid, 84 Invalid, 593 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [182 Valid, 411 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-15 01:03:16,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2022-04-15 01:03:17,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 75. [2022-04-15 01:03:17,053 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:03:17,053 INFO L82 GeneralOperation]: Start isEquivalent. First operand 178 states. Second operand has 75 states, 70 states have (on average 1.4285714285714286) internal successors, (100), 70 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:17,059 INFO L74 IsIncluded]: Start isIncluded. First operand 178 states. Second operand has 75 states, 70 states have (on average 1.4285714285714286) internal successors, (100), 70 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:17,060 INFO L87 Difference]: Start difference. First operand 178 states. Second operand has 75 states, 70 states have (on average 1.4285714285714286) internal successors, (100), 70 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:17,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:17,065 INFO L93 Difference]: Finished difference Result 178 states and 260 transitions. [2022-04-15 01:03:17,065 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 260 transitions. [2022-04-15 01:03:17,066 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:17,066 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:17,067 INFO L74 IsIncluded]: Start isIncluded. First operand has 75 states, 70 states have (on average 1.4285714285714286) internal successors, (100), 70 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 178 states. [2022-04-15 01:03:17,067 INFO L87 Difference]: Start difference. First operand has 75 states, 70 states have (on average 1.4285714285714286) internal successors, (100), 70 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 178 states. [2022-04-15 01:03:17,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:17,071 INFO L93 Difference]: Finished difference Result 178 states and 260 transitions. [2022-04-15 01:03:17,071 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 260 transitions. [2022-04-15 01:03:17,071 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:17,071 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:17,071 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:03:17,071 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:03:17,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 70 states have (on average 1.4285714285714286) internal successors, (100), 70 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:17,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 104 transitions. [2022-04-15 01:03:17,073 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 104 transitions. Word has length 20 [2022-04-15 01:03:17,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:03:17,073 INFO L478 AbstractCegarLoop]: Abstraction has 75 states and 104 transitions. [2022-04-15 01:03:17,073 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 1.6875) internal successors, (27), 15 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:17,073 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 104 transitions. [2022-04-15 01:03:17,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-15 01:03:17,074 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:03:17,074 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:03:17,103 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-15 01:03:17,287 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:03:17,287 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:03:17,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:03:17,288 INFO L85 PathProgramCache]: Analyzing trace with hash 2057649504, now seen corresponding path program 1 times [2022-04-15 01:03:17,288 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:03:17,288 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1738105276] [2022-04-15 01:03:17,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:17,288 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:03:17,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:17,452 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:03:17,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:17,460 INFO L290 TraceCheckUtils]: 0: Hoare triple {2528#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2516#true} is VALID [2022-04-15 01:03:17,460 INFO L290 TraceCheckUtils]: 1: Hoare triple {2516#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-15 01:03:17,460 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2516#true} {2516#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-15 01:03:17,461 INFO L272 TraceCheckUtils]: 0: Hoare triple {2516#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:03:17,461 INFO L290 TraceCheckUtils]: 1: Hoare triple {2528#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2516#true} is VALID [2022-04-15 01:03:17,461 INFO L290 TraceCheckUtils]: 2: Hoare triple {2516#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-15 01:03:17,461 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2516#true} {2516#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-15 01:03:17,461 INFO L272 TraceCheckUtils]: 4: Hoare triple {2516#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-15 01:03:17,461 INFO L290 TraceCheckUtils]: 5: Hoare triple {2516#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:17,462 INFO L290 TraceCheckUtils]: 6: Hoare triple {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 01:03:17,463 INFO L290 TraceCheckUtils]: 7: Hoare triple {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2523#(and (<= (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) main_~x~0) (<= (+ main_~x~0 1) main_~n~0))} is VALID [2022-04-15 01:03:17,463 INFO L290 TraceCheckUtils]: 8: Hoare triple {2523#(and (<= (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) main_~x~0) (<= (+ main_~x~0 1) main_~n~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2523#(and (<= (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) main_~x~0) (<= (+ main_~x~0 1) main_~n~0))} is VALID [2022-04-15 01:03:17,464 INFO L290 TraceCheckUtils]: 9: Hoare triple {2523#(and (<= (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) main_~x~0) (<= (+ main_~x~0 1) main_~n~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2524#(and (<= main_~x~0 main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) 1) main_~x~0))} is VALID [2022-04-15 01:03:17,464 INFO L290 TraceCheckUtils]: 10: Hoare triple {2524#(and (<= main_~x~0 main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) 1) main_~x~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2524#(and (<= main_~x~0 main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) 1) main_~x~0))} is VALID [2022-04-15 01:03:17,465 INFO L290 TraceCheckUtils]: 11: Hoare triple {2524#(and (<= main_~x~0 main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) 1) main_~x~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2524#(and (<= main_~x~0 main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) 1) main_~x~0))} is VALID [2022-04-15 01:03:17,465 INFO L290 TraceCheckUtils]: 12: Hoare triple {2524#(and (<= main_~x~0 main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) 1) main_~x~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2524#(and (<= main_~x~0 main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) 1) main_~x~0))} is VALID [2022-04-15 01:03:17,466 INFO L290 TraceCheckUtils]: 13: Hoare triple {2524#(and (<= main_~x~0 main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) 1) main_~x~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2523#(and (<= (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) main_~x~0) (<= (+ main_~x~0 1) main_~n~0))} is VALID [2022-04-15 01:03:17,466 INFO L290 TraceCheckUtils]: 14: Hoare triple {2523#(and (<= (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) main_~x~0) (<= (+ main_~x~0 1) main_~n~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2523#(and (<= (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) main_~x~0) (<= (+ main_~x~0 1) main_~n~0))} is VALID [2022-04-15 01:03:17,468 INFO L290 TraceCheckUtils]: 15: Hoare triple {2523#(and (<= (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) main_~x~0) (<= (+ main_~x~0 1) main_~n~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:03:17,468 INFO L290 TraceCheckUtils]: 16: Hoare triple {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:03:17,469 INFO L272 TraceCheckUtils]: 17: Hoare triple {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2526#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 01:03:17,469 INFO L290 TraceCheckUtils]: 18: Hoare triple {2526#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2527#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 01:03:17,470 INFO L290 TraceCheckUtils]: 19: Hoare triple {2527#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2517#false} is VALID [2022-04-15 01:03:17,470 INFO L290 TraceCheckUtils]: 20: Hoare triple {2517#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2517#false} is VALID [2022-04-15 01:03:17,470 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 01:03:17,470 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:03:17,470 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1738105276] [2022-04-15 01:03:17,470 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1738105276] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:03:17,470 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2128399893] [2022-04-15 01:03:17,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:17,471 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:03:17,471 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:03:17,471 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:03:17,472 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-15 01:03:17,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:17,504 INFO L263 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-15 01:03:17,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:17,510 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:03:17,655 INFO L272 TraceCheckUtils]: 0: Hoare triple {2516#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-15 01:03:17,656 INFO L290 TraceCheckUtils]: 1: Hoare triple {2516#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2516#true} is VALID [2022-04-15 01:03:17,656 INFO L290 TraceCheckUtils]: 2: Hoare triple {2516#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-15 01:03:17,656 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2516#true} {2516#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-15 01:03:17,656 INFO L272 TraceCheckUtils]: 4: Hoare triple {2516#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-15 01:03:17,657 INFO L290 TraceCheckUtils]: 5: Hoare triple {2516#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:17,657 INFO L290 TraceCheckUtils]: 6: Hoare triple {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 01:03:17,658 INFO L290 TraceCheckUtils]: 7: Hoare triple {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 01:03:17,658 INFO L290 TraceCheckUtils]: 8: Hoare triple {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 01:03:17,659 INFO L290 TraceCheckUtils]: 9: Hoare triple {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:17,659 INFO L290 TraceCheckUtils]: 10: Hoare triple {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:17,659 INFO L290 TraceCheckUtils]: 11: Hoare triple {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:17,660 INFO L290 TraceCheckUtils]: 12: Hoare triple {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:17,660 INFO L290 TraceCheckUtils]: 13: Hoare triple {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 01:03:17,661 INFO L290 TraceCheckUtils]: 14: Hoare triple {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 01:03:17,661 INFO L290 TraceCheckUtils]: 15: Hoare triple {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:17,662 INFO L290 TraceCheckUtils]: 16: Hoare triple {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:17,663 INFO L272 TraceCheckUtils]: 17: Hoare triple {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2583#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:03:17,663 INFO L290 TraceCheckUtils]: 18: Hoare triple {2583#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2587#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:03:17,663 INFO L290 TraceCheckUtils]: 19: Hoare triple {2587#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2517#false} is VALID [2022-04-15 01:03:17,664 INFO L290 TraceCheckUtils]: 20: Hoare triple {2517#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2517#false} is VALID [2022-04-15 01:03:17,664 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 01:03:17,664 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:03:17,886 INFO L290 TraceCheckUtils]: 20: Hoare triple {2517#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2517#false} is VALID [2022-04-15 01:03:17,887 INFO L290 TraceCheckUtils]: 19: Hoare triple {2587#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2517#false} is VALID [2022-04-15 01:03:17,887 INFO L290 TraceCheckUtils]: 18: Hoare triple {2583#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2587#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:03:17,888 INFO L272 TraceCheckUtils]: 17: Hoare triple {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2583#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:03:17,889 INFO L290 TraceCheckUtils]: 16: Hoare triple {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:03:17,890 INFO L290 TraceCheckUtils]: 15: Hoare triple {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:03:17,890 INFO L290 TraceCheckUtils]: 14: Hoare triple {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-15 01:03:17,891 INFO L290 TraceCheckUtils]: 13: Hoare triple {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-15 01:03:17,891 INFO L290 TraceCheckUtils]: 12: Hoare triple {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:03:17,892 INFO L290 TraceCheckUtils]: 11: Hoare triple {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:03:17,893 INFO L290 TraceCheckUtils]: 10: Hoare triple {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:03:17,894 INFO L290 TraceCheckUtils]: 9: Hoare triple {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:03:17,894 INFO L290 TraceCheckUtils]: 8: Hoare triple {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-15 01:03:17,895 INFO L290 TraceCheckUtils]: 7: Hoare triple {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-15 01:03:17,896 INFO L290 TraceCheckUtils]: 6: Hoare triple {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-15 01:03:17,896 INFO L290 TraceCheckUtils]: 5: Hoare triple {2516#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:03:17,896 INFO L272 TraceCheckUtils]: 4: Hoare triple {2516#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-15 01:03:17,896 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2516#true} {2516#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-15 01:03:17,896 INFO L290 TraceCheckUtils]: 2: Hoare triple {2516#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-15 01:03:17,896 INFO L290 TraceCheckUtils]: 1: Hoare triple {2516#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2516#true} is VALID [2022-04-15 01:03:17,896 INFO L272 TraceCheckUtils]: 0: Hoare triple {2516#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-15 01:03:17,897 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-15 01:03:17,897 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2128399893] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:03:17,897 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:03:17,897 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 6, 6] total 13 [2022-04-15 01:03:17,897 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1282656402] [2022-04-15 01:03:17,897 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:03:17,898 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 3.1538461538461537) internal successors, (41), 10 states have internal predecessors, (41), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-15 01:03:17,898 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:03:17,899 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 3.1538461538461537) internal successors, (41), 10 states have internal predecessors, (41), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:17,936 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:17,936 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-15 01:03:17,937 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:03:17,937 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-15 01:03:17,937 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2022-04-15 01:03:17,937 INFO L87 Difference]: Start difference. First operand 75 states and 104 transitions. Second operand has 13 states, 13 states have (on average 3.1538461538461537) internal successors, (41), 10 states have internal predecessors, (41), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:18,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:18,325 INFO L93 Difference]: Finished difference Result 87 states and 116 transitions. [2022-04-15 01:03:18,325 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-15 01:03:18,325 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 3.1538461538461537) internal successors, (41), 10 states have internal predecessors, (41), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-15 01:03:18,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:03:18,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 3.1538461538461537) internal successors, (41), 10 states have internal predecessors, (41), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:18,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 45 transitions. [2022-04-15 01:03:18,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 3.1538461538461537) internal successors, (41), 10 states have internal predecessors, (41), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:18,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 45 transitions. [2022-04-15 01:03:18,328 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 45 transitions. [2022-04-15 01:03:18,373 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:18,374 INFO L225 Difference]: With dead ends: 87 [2022-04-15 01:03:18,374 INFO L226 Difference]: Without dead ends: 67 [2022-04-15 01:03:18,375 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 35 SyntacticMatches, 7 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=68, Invalid=274, Unknown=0, NotChecked=0, Total=342 [2022-04-15 01:03:18,375 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 26 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 126 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 51 SdHoareTripleChecker+Invalid, 136 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 01:03:18,375 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [26 Valid, 51 Invalid, 136 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 126 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 01:03:18,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2022-04-15 01:03:18,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 67. [2022-04-15 01:03:18,453 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:03:18,454 INFO L82 GeneralOperation]: Start isEquivalent. First operand 67 states. Second operand has 67 states, 62 states have (on average 1.4516129032258065) internal successors, (90), 62 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:18,454 INFO L74 IsIncluded]: Start isIncluded. First operand 67 states. Second operand has 67 states, 62 states have (on average 1.4516129032258065) internal successors, (90), 62 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:18,454 INFO L87 Difference]: Start difference. First operand 67 states. Second operand has 67 states, 62 states have (on average 1.4516129032258065) internal successors, (90), 62 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:18,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:18,455 INFO L93 Difference]: Finished difference Result 67 states and 94 transitions. [2022-04-15 01:03:18,455 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 94 transitions. [2022-04-15 01:03:18,456 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:18,456 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:18,456 INFO L74 IsIncluded]: Start isIncluded. First operand has 67 states, 62 states have (on average 1.4516129032258065) internal successors, (90), 62 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 67 states. [2022-04-15 01:03:18,456 INFO L87 Difference]: Start difference. First operand has 67 states, 62 states have (on average 1.4516129032258065) internal successors, (90), 62 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 67 states. [2022-04-15 01:03:18,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:18,457 INFO L93 Difference]: Finished difference Result 67 states and 94 transitions. [2022-04-15 01:03:18,458 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 94 transitions. [2022-04-15 01:03:18,458 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:18,458 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:18,458 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:03:18,458 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:03:18,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 62 states have (on average 1.4516129032258065) internal successors, (90), 62 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:18,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 94 transitions. [2022-04-15 01:03:18,459 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 94 transitions. Word has length 21 [2022-04-15 01:03:18,460 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:03:18,460 INFO L478 AbstractCegarLoop]: Abstraction has 67 states and 94 transitions. [2022-04-15 01:03:18,460 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 3.1538461538461537) internal successors, (41), 10 states have internal predecessors, (41), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:18,460 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 94 transitions. [2022-04-15 01:03:18,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-15 01:03:18,460 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:03:18,460 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:03:18,478 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-15 01:03:18,670 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:03:18,670 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:03:18,670 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:03:18,671 INFO L85 PathProgramCache]: Analyzing trace with hash -1264431284, now seen corresponding path program 1 times [2022-04-15 01:03:18,671 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:03:18,671 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1749731431] [2022-04-15 01:03:18,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:18,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:03:18,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:18,732 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:03:18,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:18,737 INFO L290 TraceCheckUtils]: 0: Hoare triple {3037#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3027#true} is VALID [2022-04-15 01:03:18,737 INFO L290 TraceCheckUtils]: 1: Hoare triple {3027#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-15 01:03:18,737 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3027#true} {3027#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-15 01:03:18,737 INFO L272 TraceCheckUtils]: 0: Hoare triple {3027#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3037#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:03:18,738 INFO L290 TraceCheckUtils]: 1: Hoare triple {3037#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3027#true} is VALID [2022-04-15 01:03:18,738 INFO L290 TraceCheckUtils]: 2: Hoare triple {3027#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-15 01:03:18,738 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3027#true} {3027#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-15 01:03:18,738 INFO L272 TraceCheckUtils]: 4: Hoare triple {3027#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-15 01:03:18,738 INFO L290 TraceCheckUtils]: 5: Hoare triple {3027#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3032#(= main_~y~0 0)} is VALID [2022-04-15 01:03:18,739 INFO L290 TraceCheckUtils]: 6: Hoare triple {3032#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3033#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:03:18,739 INFO L290 TraceCheckUtils]: 7: Hoare triple {3033#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3034#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:03:18,740 INFO L290 TraceCheckUtils]: 8: Hoare triple {3034#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3034#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:03:18,740 INFO L290 TraceCheckUtils]: 9: Hoare triple {3034#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3035#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:03:18,741 INFO L290 TraceCheckUtils]: 10: Hoare triple {3035#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3036#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-15 01:03:18,741 INFO L290 TraceCheckUtils]: 11: Hoare triple {3036#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-15 01:03:18,741 INFO L290 TraceCheckUtils]: 12: Hoare triple {3028#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3028#false} is VALID [2022-04-15 01:03:18,741 INFO L290 TraceCheckUtils]: 13: Hoare triple {3028#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3028#false} is VALID [2022-04-15 01:03:18,741 INFO L290 TraceCheckUtils]: 14: Hoare triple {3028#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-15 01:03:18,742 INFO L290 TraceCheckUtils]: 15: Hoare triple {3028#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3028#false} is VALID [2022-04-15 01:03:18,742 INFO L290 TraceCheckUtils]: 16: Hoare triple {3028#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-15 01:03:18,742 INFO L290 TraceCheckUtils]: 17: Hoare triple {3028#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-15 01:03:18,742 INFO L272 TraceCheckUtils]: 18: Hoare triple {3028#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3028#false} is VALID [2022-04-15 01:03:18,742 INFO L290 TraceCheckUtils]: 19: Hoare triple {3028#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3028#false} is VALID [2022-04-15 01:03:18,742 INFO L290 TraceCheckUtils]: 20: Hoare triple {3028#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-15 01:03:18,742 INFO L290 TraceCheckUtils]: 21: Hoare triple {3028#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-15 01:03:18,742 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-15 01:03:18,743 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:03:18,743 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1749731431] [2022-04-15 01:03:18,743 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1749731431] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:03:18,743 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [881174976] [2022-04-15 01:03:18,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:18,743 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:03:18,743 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:03:18,744 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:03:18,745 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-15 01:03:18,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:18,779 INFO L263 TraceCheckSpWp]: Trace formula consists of 91 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-15 01:03:18,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:18,789 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:03:18,890 INFO L272 TraceCheckUtils]: 0: Hoare triple {3027#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-15 01:03:18,891 INFO L290 TraceCheckUtils]: 1: Hoare triple {3027#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3027#true} is VALID [2022-04-15 01:03:18,891 INFO L290 TraceCheckUtils]: 2: Hoare triple {3027#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-15 01:03:18,891 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3027#true} {3027#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-15 01:03:18,891 INFO L272 TraceCheckUtils]: 4: Hoare triple {3027#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-15 01:03:18,892 INFO L290 TraceCheckUtils]: 5: Hoare triple {3027#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3032#(= main_~y~0 0)} is VALID [2022-04-15 01:03:18,893 INFO L290 TraceCheckUtils]: 6: Hoare triple {3032#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3033#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:03:18,893 INFO L290 TraceCheckUtils]: 7: Hoare triple {3033#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3034#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:03:18,894 INFO L290 TraceCheckUtils]: 8: Hoare triple {3034#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3034#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:03:18,898 INFO L290 TraceCheckUtils]: 9: Hoare triple {3034#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3068#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:03:18,898 INFO L290 TraceCheckUtils]: 10: Hoare triple {3068#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3072#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-15 01:03:18,899 INFO L290 TraceCheckUtils]: 11: Hoare triple {3072#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-15 01:03:18,899 INFO L290 TraceCheckUtils]: 12: Hoare triple {3028#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3028#false} is VALID [2022-04-15 01:03:18,899 INFO L290 TraceCheckUtils]: 13: Hoare triple {3028#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3028#false} is VALID [2022-04-15 01:03:18,899 INFO L290 TraceCheckUtils]: 14: Hoare triple {3028#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-15 01:03:18,899 INFO L290 TraceCheckUtils]: 15: Hoare triple {3028#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3028#false} is VALID [2022-04-15 01:03:18,899 INFO L290 TraceCheckUtils]: 16: Hoare triple {3028#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-15 01:03:18,899 INFO L290 TraceCheckUtils]: 17: Hoare triple {3028#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-15 01:03:18,899 INFO L272 TraceCheckUtils]: 18: Hoare triple {3028#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3028#false} is VALID [2022-04-15 01:03:18,899 INFO L290 TraceCheckUtils]: 19: Hoare triple {3028#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3028#false} is VALID [2022-04-15 01:03:18,900 INFO L290 TraceCheckUtils]: 20: Hoare triple {3028#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-15 01:03:18,900 INFO L290 TraceCheckUtils]: 21: Hoare triple {3028#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-15 01:03:18,900 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-15 01:03:18,900 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:03:19,008 INFO L290 TraceCheckUtils]: 21: Hoare triple {3028#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-15 01:03:19,008 INFO L290 TraceCheckUtils]: 20: Hoare triple {3028#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-15 01:03:19,008 INFO L290 TraceCheckUtils]: 19: Hoare triple {3028#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3028#false} is VALID [2022-04-15 01:03:19,008 INFO L272 TraceCheckUtils]: 18: Hoare triple {3028#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3028#false} is VALID [2022-04-15 01:03:19,008 INFO L290 TraceCheckUtils]: 17: Hoare triple {3028#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-15 01:03:19,008 INFO L290 TraceCheckUtils]: 16: Hoare triple {3028#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-15 01:03:19,008 INFO L290 TraceCheckUtils]: 15: Hoare triple {3028#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3028#false} is VALID [2022-04-15 01:03:19,008 INFO L290 TraceCheckUtils]: 14: Hoare triple {3028#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-15 01:03:19,009 INFO L290 TraceCheckUtils]: 13: Hoare triple {3130#(not (< 0 (mod main_~y~0 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3028#false} is VALID [2022-04-15 01:03:19,010 INFO L290 TraceCheckUtils]: 12: Hoare triple {3134#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3130#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-15 01:03:19,010 INFO L290 TraceCheckUtils]: 11: Hoare triple {3138#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3134#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-15 01:03:19,011 INFO L290 TraceCheckUtils]: 10: Hoare triple {3142#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3138#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-15 01:03:19,012 INFO L290 TraceCheckUtils]: 9: Hoare triple {3027#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3142#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-15 01:03:19,012 INFO L290 TraceCheckUtils]: 8: Hoare triple {3027#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-15 01:03:19,012 INFO L290 TraceCheckUtils]: 7: Hoare triple {3027#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3027#true} is VALID [2022-04-15 01:03:19,012 INFO L290 TraceCheckUtils]: 6: Hoare triple {3027#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3027#true} is VALID [2022-04-15 01:03:19,012 INFO L290 TraceCheckUtils]: 5: Hoare triple {3027#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3027#true} is VALID [2022-04-15 01:03:19,012 INFO L272 TraceCheckUtils]: 4: Hoare triple {3027#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-15 01:03:19,012 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3027#true} {3027#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-15 01:03:19,012 INFO L290 TraceCheckUtils]: 2: Hoare triple {3027#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-15 01:03:19,012 INFO L290 TraceCheckUtils]: 1: Hoare triple {3027#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3027#true} is VALID [2022-04-15 01:03:19,013 INFO L272 TraceCheckUtils]: 0: Hoare triple {3027#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-15 01:03:19,013 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-15 01:03:19,013 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [881174976] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:03:19,013 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:03:19,013 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 6] total 14 [2022-04-15 01:03:19,013 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1649991938] [2022-04-15 01:03:19,013 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:03:19,014 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0714285714285716) internal successors, (29), 13 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-15 01:03:19,014 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:03:19,014 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 2.0714285714285716) internal successors, (29), 13 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:19,035 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:19,035 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-15 01:03:19,035 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:03:19,036 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-15 01:03:19,036 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2022-04-15 01:03:19,036 INFO L87 Difference]: Start difference. First operand 67 states and 94 transitions. Second operand has 14 states, 14 states have (on average 2.0714285714285716) internal successors, (29), 13 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:19,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:19,756 INFO L93 Difference]: Finished difference Result 107 states and 151 transitions. [2022-04-15 01:03:19,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-15 01:03:19,756 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0714285714285716) internal successors, (29), 13 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-15 01:03:19,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:03:19,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.0714285714285716) internal successors, (29), 13 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:19,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 86 transitions. [2022-04-15 01:03:19,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.0714285714285716) internal successors, (29), 13 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:19,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 86 transitions. [2022-04-15 01:03:19,759 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 86 transitions. [2022-04-15 01:03:19,834 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 86 edges. 86 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:19,835 INFO L225 Difference]: With dead ends: 107 [2022-04-15 01:03:19,835 INFO L226 Difference]: Without dead ends: 87 [2022-04-15 01:03:19,836 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=138, Invalid=564, Unknown=0, NotChecked=0, Total=702 [2022-04-15 01:03:19,836 INFO L913 BasicCegarLoop]: 23 mSDtfsCounter, 73 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 187 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 73 SdHoareTripleChecker+Valid, 50 SdHoareTripleChecker+Invalid, 240 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 187 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 01:03:19,837 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [73 Valid, 50 Invalid, 240 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 187 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-15 01:03:19,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2022-04-15 01:03:19,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 63. [2022-04-15 01:03:19,923 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:03:19,925 INFO L82 GeneralOperation]: Start isEquivalent. First operand 87 states. Second operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:19,926 INFO L74 IsIncluded]: Start isIncluded. First operand 87 states. Second operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:19,926 INFO L87 Difference]: Start difference. First operand 87 states. Second operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:19,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:19,927 INFO L93 Difference]: Finished difference Result 87 states and 123 transitions. [2022-04-15 01:03:19,927 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 123 transitions. [2022-04-15 01:03:19,927 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:19,927 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:19,928 INFO L74 IsIncluded]: Start isIncluded. First operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 87 states. [2022-04-15 01:03:19,928 INFO L87 Difference]: Start difference. First operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 87 states. [2022-04-15 01:03:19,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:19,929 INFO L93 Difference]: Finished difference Result 87 states and 123 transitions. [2022-04-15 01:03:19,929 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 123 transitions. [2022-04-15 01:03:19,929 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:19,929 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:19,929 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:03:19,929 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:03:19,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:19,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 87 transitions. [2022-04-15 01:03:19,930 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 87 transitions. Word has length 22 [2022-04-15 01:03:19,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:03:19,930 INFO L478 AbstractCegarLoop]: Abstraction has 63 states and 87 transitions. [2022-04-15 01:03:19,931 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.0714285714285716) internal successors, (29), 13 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:19,931 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 87 transitions. [2022-04-15 01:03:19,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-15 01:03:19,931 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:03:19,931 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:03:19,949 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-15 01:03:20,135 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-15 01:03:20,136 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:03:20,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:03:20,136 INFO L85 PathProgramCache]: Analyzing trace with hash 212434284, now seen corresponding path program 2 times [2022-04-15 01:03:20,136 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:03:20,136 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1330089964] [2022-04-15 01:03:20,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:20,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:03:20,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:20,233 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:03:20,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:20,238 INFO L290 TraceCheckUtils]: 0: Hoare triple {3635#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3623#true} is VALID [2022-04-15 01:03:20,238 INFO L290 TraceCheckUtils]: 1: Hoare triple {3623#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-15 01:03:20,238 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3623#true} {3623#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-15 01:03:20,238 INFO L272 TraceCheckUtils]: 0: Hoare triple {3623#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3635#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:03:20,239 INFO L290 TraceCheckUtils]: 1: Hoare triple {3635#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3623#true} is VALID [2022-04-15 01:03:20,239 INFO L290 TraceCheckUtils]: 2: Hoare triple {3623#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-15 01:03:20,239 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3623#true} {3623#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-15 01:03:20,239 INFO L272 TraceCheckUtils]: 4: Hoare triple {3623#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-15 01:03:20,239 INFO L290 TraceCheckUtils]: 5: Hoare triple {3623#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3628#(= main_~y~0 0)} is VALID [2022-04-15 01:03:20,240 INFO L290 TraceCheckUtils]: 6: Hoare triple {3628#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:03:20,240 INFO L290 TraceCheckUtils]: 7: Hoare triple {3629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3630#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:03:20,241 INFO L290 TraceCheckUtils]: 8: Hoare triple {3630#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3630#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:03:20,241 INFO L290 TraceCheckUtils]: 9: Hoare triple {3630#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3631#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:03:20,241 INFO L290 TraceCheckUtils]: 10: Hoare triple {3631#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3632#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 01:03:20,242 INFO L290 TraceCheckUtils]: 11: Hoare triple {3632#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3633#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 01:03:20,242 INFO L290 TraceCheckUtils]: 12: Hoare triple {3633#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3633#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 01:03:20,251 INFO L290 TraceCheckUtils]: 13: Hoare triple {3633#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3632#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 01:03:20,252 INFO L290 TraceCheckUtils]: 14: Hoare triple {3632#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3634#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-15 01:03:20,252 INFO L290 TraceCheckUtils]: 15: Hoare triple {3634#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3634#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-15 01:03:20,252 INFO L290 TraceCheckUtils]: 16: Hoare triple {3634#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3634#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-15 01:03:20,253 INFO L290 TraceCheckUtils]: 17: Hoare triple {3634#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-15 01:03:20,253 INFO L272 TraceCheckUtils]: 18: Hoare triple {3624#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3624#false} is VALID [2022-04-15 01:03:20,253 INFO L290 TraceCheckUtils]: 19: Hoare triple {3624#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3624#false} is VALID [2022-04-15 01:03:20,253 INFO L290 TraceCheckUtils]: 20: Hoare triple {3624#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-15 01:03:20,253 INFO L290 TraceCheckUtils]: 21: Hoare triple {3624#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-15 01:03:20,254 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:20,254 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:03:20,254 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1330089964] [2022-04-15 01:03:20,254 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1330089964] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:03:20,254 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [188964007] [2022-04-15 01:03:20,254 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 01:03:20,254 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:03:20,254 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:03:20,259 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:03:20,260 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-15 01:03:20,286 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 01:03:20,286 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:03:20,286 INFO L263 TraceCheckSpWp]: Trace formula consists of 91 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-15 01:03:20,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:20,292 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:03:20,376 INFO L272 TraceCheckUtils]: 0: Hoare triple {3623#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-15 01:03:20,376 INFO L290 TraceCheckUtils]: 1: Hoare triple {3623#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3623#true} is VALID [2022-04-15 01:03:20,376 INFO L290 TraceCheckUtils]: 2: Hoare triple {3623#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-15 01:03:20,376 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3623#true} {3623#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-15 01:03:20,377 INFO L272 TraceCheckUtils]: 4: Hoare triple {3623#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-15 01:03:20,377 INFO L290 TraceCheckUtils]: 5: Hoare triple {3623#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3623#true} is VALID [2022-04-15 01:03:20,377 INFO L290 TraceCheckUtils]: 6: Hoare triple {3623#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3657#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:03:20,378 INFO L290 TraceCheckUtils]: 7: Hoare triple {3657#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:03:20,378 INFO L290 TraceCheckUtils]: 8: Hoare triple {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:03:20,379 INFO L290 TraceCheckUtils]: 9: Hoare triple {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:03:20,379 INFO L290 TraceCheckUtils]: 10: Hoare triple {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3657#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:03:20,380 INFO L290 TraceCheckUtils]: 11: Hoare triple {3657#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:20,380 INFO L290 TraceCheckUtils]: 12: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:20,380 INFO L290 TraceCheckUtils]: 13: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:20,381 INFO L290 TraceCheckUtils]: 14: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:20,381 INFO L290 TraceCheckUtils]: 15: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:20,381 INFO L290 TraceCheckUtils]: 16: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-15 01:03:20,381 INFO L290 TraceCheckUtils]: 17: Hoare triple {3624#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-15 01:03:20,381 INFO L272 TraceCheckUtils]: 18: Hoare triple {3624#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3624#false} is VALID [2022-04-15 01:03:20,382 INFO L290 TraceCheckUtils]: 19: Hoare triple {3624#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3624#false} is VALID [2022-04-15 01:03:20,382 INFO L290 TraceCheckUtils]: 20: Hoare triple {3624#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-15 01:03:20,382 INFO L290 TraceCheckUtils]: 21: Hoare triple {3624#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-15 01:03:20,382 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-15 01:03:20,382 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:03:20,593 INFO L290 TraceCheckUtils]: 21: Hoare triple {3624#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-15 01:03:20,594 INFO L290 TraceCheckUtils]: 20: Hoare triple {3624#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-15 01:03:20,594 INFO L290 TraceCheckUtils]: 19: Hoare triple {3624#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3624#false} is VALID [2022-04-15 01:03:20,594 INFO L272 TraceCheckUtils]: 18: Hoare triple {3624#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3624#false} is VALID [2022-04-15 01:03:20,594 INFO L290 TraceCheckUtils]: 17: Hoare triple {3624#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-15 01:03:20,594 INFO L290 TraceCheckUtils]: 16: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-15 01:03:20,594 INFO L290 TraceCheckUtils]: 15: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:20,595 INFO L290 TraceCheckUtils]: 14: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:20,595 INFO L290 TraceCheckUtils]: 13: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:20,595 INFO L290 TraceCheckUtils]: 12: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:20,596 INFO L290 TraceCheckUtils]: 11: Hoare triple {3657#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:20,596 INFO L290 TraceCheckUtils]: 10: Hoare triple {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3657#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:03:20,597 INFO L290 TraceCheckUtils]: 9: Hoare triple {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:03:20,597 INFO L290 TraceCheckUtils]: 8: Hoare triple {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:03:20,598 INFO L290 TraceCheckUtils]: 7: Hoare triple {3657#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:03:20,598 INFO L290 TraceCheckUtils]: 6: Hoare triple {3623#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3657#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:03:20,598 INFO L290 TraceCheckUtils]: 5: Hoare triple {3623#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3623#true} is VALID [2022-04-15 01:03:20,598 INFO L272 TraceCheckUtils]: 4: Hoare triple {3623#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-15 01:03:20,599 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3623#true} {3623#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-15 01:03:20,599 INFO L290 TraceCheckUtils]: 2: Hoare triple {3623#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-15 01:03:20,599 INFO L290 TraceCheckUtils]: 1: Hoare triple {3623#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3623#true} is VALID [2022-04-15 01:03:20,599 INFO L272 TraceCheckUtils]: 0: Hoare triple {3623#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-15 01:03:20,599 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-15 01:03:20,606 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [188964007] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:03:20,606 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:03:20,606 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 5, 5] total 13 [2022-04-15 01:03:20,608 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [100478335] [2022-04-15 01:03:20,608 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:03:20,609 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.3846153846153846) internal successors, (31), 12 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-15 01:03:20,610 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:03:20,610 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 2.3846153846153846) internal successors, (31), 12 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:20,631 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:20,631 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-15 01:03:20,631 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:03:20,632 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-15 01:03:20,632 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2022-04-15 01:03:20,632 INFO L87 Difference]: Start difference. First operand 63 states and 87 transitions. Second operand has 13 states, 13 states have (on average 2.3846153846153846) internal successors, (31), 12 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:21,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:21,813 INFO L93 Difference]: Finished difference Result 117 states and 170 transitions. [2022-04-15 01:03:21,813 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-04-15 01:03:21,813 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.3846153846153846) internal successors, (31), 12 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-15 01:03:21,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:03:21,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.3846153846153846) internal successors, (31), 12 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:21,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 102 transitions. [2022-04-15 01:03:21,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.3846153846153846) internal successors, (31), 12 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:21,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 102 transitions. [2022-04-15 01:03:21,816 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 22 states and 102 transitions. [2022-04-15 01:03:21,913 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 102 edges. 102 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:21,914 INFO L225 Difference]: With dead ends: 117 [2022-04-15 01:03:21,914 INFO L226 Difference]: Without dead ends: 104 [2022-04-15 01:03:21,914 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 165 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=177, Invalid=815, Unknown=0, NotChecked=0, Total=992 [2022-04-15 01:03:21,915 INFO L913 BasicCegarLoop]: 21 mSDtfsCounter, 71 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 339 mSolverCounterSat, 87 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 71 SdHoareTripleChecker+Valid, 73 SdHoareTripleChecker+Invalid, 426 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 87 IncrementalHoareTripleChecker+Valid, 339 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-15 01:03:21,915 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [71 Valid, 73 Invalid, 426 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [87 Valid, 339 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-15 01:03:21,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2022-04-15 01:03:22,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 79. [2022-04-15 01:03:22,004 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:03:22,004 INFO L82 GeneralOperation]: Start isEquivalent. First operand 104 states. Second operand has 79 states, 74 states have (on average 1.4054054054054055) internal successors, (104), 74 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:22,004 INFO L74 IsIncluded]: Start isIncluded. First operand 104 states. Second operand has 79 states, 74 states have (on average 1.4054054054054055) internal successors, (104), 74 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:22,005 INFO L87 Difference]: Start difference. First operand 104 states. Second operand has 79 states, 74 states have (on average 1.4054054054054055) internal successors, (104), 74 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:22,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:22,006 INFO L93 Difference]: Finished difference Result 104 states and 142 transitions. [2022-04-15 01:03:22,006 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 142 transitions. [2022-04-15 01:03:22,007 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:22,007 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:22,007 INFO L74 IsIncluded]: Start isIncluded. First operand has 79 states, 74 states have (on average 1.4054054054054055) internal successors, (104), 74 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 104 states. [2022-04-15 01:03:22,007 INFO L87 Difference]: Start difference. First operand has 79 states, 74 states have (on average 1.4054054054054055) internal successors, (104), 74 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 104 states. [2022-04-15 01:03:22,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:22,009 INFO L93 Difference]: Finished difference Result 104 states and 142 transitions. [2022-04-15 01:03:22,009 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 142 transitions. [2022-04-15 01:03:22,010 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:22,010 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:22,010 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:03:22,010 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:03:22,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 79 states, 74 states have (on average 1.4054054054054055) internal successors, (104), 74 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:22,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 108 transitions. [2022-04-15 01:03:22,012 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 108 transitions. Word has length 22 [2022-04-15 01:03:22,012 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:03:22,012 INFO L478 AbstractCegarLoop]: Abstraction has 79 states and 108 transitions. [2022-04-15 01:03:22,012 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 2.3846153846153846) internal successors, (31), 12 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:22,012 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 108 transitions. [2022-04-15 01:03:22,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-15 01:03:22,014 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:03:22,014 INFO L499 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:03:22,031 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2022-04-15 01:03:22,231 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:03:22,232 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:03:22,232 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:03:22,232 INFO L85 PathProgramCache]: Analyzing trace with hash 717938129, now seen corresponding path program 2 times [2022-04-15 01:03:22,232 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:03:22,233 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [790698785] [2022-04-15 01:03:22,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:22,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:03:22,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:22,325 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:03:22,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:22,328 INFO L290 TraceCheckUtils]: 0: Hoare triple {4307#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4294#true} is VALID [2022-04-15 01:03:22,329 INFO L290 TraceCheckUtils]: 1: Hoare triple {4294#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-15 01:03:22,329 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4294#true} {4294#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-15 01:03:22,329 INFO L272 TraceCheckUtils]: 0: Hoare triple {4294#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4307#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:03:22,329 INFO L290 TraceCheckUtils]: 1: Hoare triple {4307#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4294#true} is VALID [2022-04-15 01:03:22,329 INFO L290 TraceCheckUtils]: 2: Hoare triple {4294#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-15 01:03:22,329 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4294#true} {4294#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-15 01:03:22,329 INFO L272 TraceCheckUtils]: 4: Hoare triple {4294#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-15 01:03:22,330 INFO L290 TraceCheckUtils]: 5: Hoare triple {4294#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4299#(= main_~y~0 0)} is VALID [2022-04-15 01:03:22,330 INFO L290 TraceCheckUtils]: 6: Hoare triple {4299#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4300#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:03:22,331 INFO L290 TraceCheckUtils]: 7: Hoare triple {4300#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4301#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:03:22,331 INFO L290 TraceCheckUtils]: 8: Hoare triple {4301#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4302#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:03:22,332 INFO L290 TraceCheckUtils]: 9: Hoare triple {4302#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4303#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:03:22,332 INFO L290 TraceCheckUtils]: 10: Hoare triple {4303#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4304#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:03:22,333 INFO L290 TraceCheckUtils]: 11: Hoare triple {4304#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4304#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:03:22,333 INFO L290 TraceCheckUtils]: 12: Hoare triple {4304#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4305#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:03:22,333 INFO L290 TraceCheckUtils]: 13: Hoare triple {4305#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4306#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 01:03:22,334 INFO L290 TraceCheckUtils]: 14: Hoare triple {4306#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-15 01:03:22,334 INFO L290 TraceCheckUtils]: 15: Hoare triple {4295#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4295#false} is VALID [2022-04-15 01:03:22,334 INFO L290 TraceCheckUtils]: 16: Hoare triple {4295#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-15 01:03:22,335 INFO L290 TraceCheckUtils]: 17: Hoare triple {4295#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4295#false} is VALID [2022-04-15 01:03:22,335 INFO L290 TraceCheckUtils]: 18: Hoare triple {4295#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-15 01:03:22,335 INFO L290 TraceCheckUtils]: 19: Hoare triple {4295#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-15 01:03:22,335 INFO L272 TraceCheckUtils]: 20: Hoare triple {4295#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {4295#false} is VALID [2022-04-15 01:03:22,335 INFO L290 TraceCheckUtils]: 21: Hoare triple {4295#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4295#false} is VALID [2022-04-15 01:03:22,335 INFO L290 TraceCheckUtils]: 22: Hoare triple {4295#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-15 01:03:22,335 INFO L290 TraceCheckUtils]: 23: Hoare triple {4295#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-15 01:03:22,335 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-15 01:03:22,335 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:03:22,335 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [790698785] [2022-04-15 01:03:22,335 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [790698785] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:03:22,336 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1263149271] [2022-04-15 01:03:22,336 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 01:03:22,336 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:03:22,336 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:03:22,336 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:03:22,337 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-15 01:03:22,367 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 01:03:22,368 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:03:22,368 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 17 conjunts are in the unsatisfiable core [2022-04-15 01:03:22,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:22,373 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:03:22,567 INFO L272 TraceCheckUtils]: 0: Hoare triple {4294#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-15 01:03:22,567 INFO L290 TraceCheckUtils]: 1: Hoare triple {4294#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4294#true} is VALID [2022-04-15 01:03:22,567 INFO L290 TraceCheckUtils]: 2: Hoare triple {4294#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-15 01:03:22,567 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4294#true} {4294#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-15 01:03:22,567 INFO L272 TraceCheckUtils]: 4: Hoare triple {4294#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-15 01:03:22,568 INFO L290 TraceCheckUtils]: 5: Hoare triple {4294#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4299#(= main_~y~0 0)} is VALID [2022-04-15 01:03:22,568 INFO L290 TraceCheckUtils]: 6: Hoare triple {4299#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4300#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:03:22,568 INFO L290 TraceCheckUtils]: 7: Hoare triple {4300#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4301#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:03:22,569 INFO L290 TraceCheckUtils]: 8: Hoare triple {4301#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4302#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:03:22,569 INFO L290 TraceCheckUtils]: 9: Hoare triple {4302#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4303#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:03:22,570 INFO L290 TraceCheckUtils]: 10: Hoare triple {4303#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4304#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:03:22,570 INFO L290 TraceCheckUtils]: 11: Hoare triple {4304#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4304#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:03:22,571 INFO L290 TraceCheckUtils]: 12: Hoare triple {4304#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4305#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:03:22,571 INFO L290 TraceCheckUtils]: 13: Hoare triple {4305#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4350#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:03:22,571 INFO L290 TraceCheckUtils]: 14: Hoare triple {4350#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-15 01:03:22,572 INFO L290 TraceCheckUtils]: 15: Hoare triple {4295#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4295#false} is VALID [2022-04-15 01:03:22,572 INFO L290 TraceCheckUtils]: 16: Hoare triple {4295#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-15 01:03:22,572 INFO L290 TraceCheckUtils]: 17: Hoare triple {4295#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4295#false} is VALID [2022-04-15 01:03:22,572 INFO L290 TraceCheckUtils]: 18: Hoare triple {4295#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-15 01:03:22,572 INFO L290 TraceCheckUtils]: 19: Hoare triple {4295#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-15 01:03:22,572 INFO L272 TraceCheckUtils]: 20: Hoare triple {4295#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {4295#false} is VALID [2022-04-15 01:03:22,572 INFO L290 TraceCheckUtils]: 21: Hoare triple {4295#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4295#false} is VALID [2022-04-15 01:03:22,572 INFO L290 TraceCheckUtils]: 22: Hoare triple {4295#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-15 01:03:22,572 INFO L290 TraceCheckUtils]: 23: Hoare triple {4295#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-15 01:03:22,572 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-15 01:03:22,572 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:03:22,733 INFO L290 TraceCheckUtils]: 23: Hoare triple {4295#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-15 01:03:22,733 INFO L290 TraceCheckUtils]: 22: Hoare triple {4295#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-15 01:03:22,733 INFO L290 TraceCheckUtils]: 21: Hoare triple {4295#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4295#false} is VALID [2022-04-15 01:03:22,733 INFO L272 TraceCheckUtils]: 20: Hoare triple {4295#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {4295#false} is VALID [2022-04-15 01:03:22,733 INFO L290 TraceCheckUtils]: 19: Hoare triple {4295#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-15 01:03:22,733 INFO L290 TraceCheckUtils]: 18: Hoare triple {4295#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-15 01:03:22,734 INFO L290 TraceCheckUtils]: 17: Hoare triple {4295#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4295#false} is VALID [2022-04-15 01:03:22,734 INFO L290 TraceCheckUtils]: 16: Hoare triple {4295#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-15 01:03:22,734 INFO L290 TraceCheckUtils]: 15: Hoare triple {4295#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4295#false} is VALID [2022-04-15 01:03:22,734 INFO L290 TraceCheckUtils]: 14: Hoare triple {4408#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-15 01:03:22,735 INFO L290 TraceCheckUtils]: 13: Hoare triple {4412#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4408#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 01:03:22,735 INFO L290 TraceCheckUtils]: 12: Hoare triple {4416#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4412#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-15 01:03:22,736 INFO L290 TraceCheckUtils]: 11: Hoare triple {4416#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4416#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:03:22,736 INFO L290 TraceCheckUtils]: 10: Hoare triple {4423#(< 0 (mod main_~y~0 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4416#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:03:22,737 INFO L290 TraceCheckUtils]: 9: Hoare triple {4427#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4423#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:03:22,738 INFO L290 TraceCheckUtils]: 8: Hoare triple {4431#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4427#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-15 01:03:22,739 INFO L290 TraceCheckUtils]: 7: Hoare triple {4435#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4431#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-15 01:03:22,745 INFO L290 TraceCheckUtils]: 6: Hoare triple {4439#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4435#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-15 01:03:22,746 INFO L290 TraceCheckUtils]: 5: Hoare triple {4294#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4439#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-15 01:03:22,746 INFO L272 TraceCheckUtils]: 4: Hoare triple {4294#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-15 01:03:22,746 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4294#true} {4294#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-15 01:03:22,746 INFO L290 TraceCheckUtils]: 2: Hoare triple {4294#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-15 01:03:22,746 INFO L290 TraceCheckUtils]: 1: Hoare triple {4294#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4294#true} is VALID [2022-04-15 01:03:22,746 INFO L272 TraceCheckUtils]: 0: Hoare triple {4294#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-15 01:03:22,746 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-15 01:03:22,747 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1263149271] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:03:22,747 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:03:22,747 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 20 [2022-04-15 01:03:22,747 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1419952068] [2022-04-15 01:03:22,747 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:03:22,747 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.65) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-15 01:03:22,747 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:03:22,748 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 20 states have (on average 1.65) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:22,772 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:22,772 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-15 01:03:22,772 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:03:22,772 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-15 01:03:22,773 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=301, Unknown=0, NotChecked=0, Total=380 [2022-04-15 01:03:22,773 INFO L87 Difference]: Start difference. First operand 79 states and 108 transitions. Second operand has 20 states, 20 states have (on average 1.65) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:27,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:27,206 INFO L93 Difference]: Finished difference Result 273 states and 404 transitions. [2022-04-15 01:03:27,206 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2022-04-15 01:03:27,206 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.65) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-15 01:03:27,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:03:27,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.65) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:27,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 246 transitions. [2022-04-15 01:03:27,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.65) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:27,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 246 transitions. [2022-04-15 01:03:27,214 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 61 states and 246 transitions. [2022-04-15 01:03:27,571 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 246 edges. 246 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:27,574 INFO L225 Difference]: With dead ends: 273 [2022-04-15 01:03:27,574 INFO L226 Difference]: Without dead ends: 249 [2022-04-15 01:03:27,576 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 41 SyntacticMatches, 1 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2020 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=1438, Invalid=4568, Unknown=0, NotChecked=0, Total=6006 [2022-04-15 01:03:27,576 INFO L913 BasicCegarLoop]: 44 mSDtfsCounter, 396 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 578 mSolverCounterSat, 356 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 396 SdHoareTripleChecker+Valid, 86 SdHoareTripleChecker+Invalid, 934 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 356 IncrementalHoareTripleChecker+Valid, 578 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-15 01:03:27,576 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [396 Valid, 86 Invalid, 934 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [356 Valid, 578 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-04-15 01:03:27,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249 states. [2022-04-15 01:03:27,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249 to 98. [2022-04-15 01:03:27,693 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:03:27,693 INFO L82 GeneralOperation]: Start isEquivalent. First operand 249 states. Second operand has 98 states, 93 states have (on average 1.3978494623655915) internal successors, (130), 93 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:27,694 INFO L74 IsIncluded]: Start isIncluded. First operand 249 states. Second operand has 98 states, 93 states have (on average 1.3978494623655915) internal successors, (130), 93 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:27,694 INFO L87 Difference]: Start difference. First operand 249 states. Second operand has 98 states, 93 states have (on average 1.3978494623655915) internal successors, (130), 93 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:27,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:27,698 INFO L93 Difference]: Finished difference Result 249 states and 347 transitions. [2022-04-15 01:03:27,698 INFO L276 IsEmpty]: Start isEmpty. Operand 249 states and 347 transitions. [2022-04-15 01:03:27,698 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:27,698 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:27,698 INFO L74 IsIncluded]: Start isIncluded. First operand has 98 states, 93 states have (on average 1.3978494623655915) internal successors, (130), 93 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 249 states. [2022-04-15 01:03:27,698 INFO L87 Difference]: Start difference. First operand has 98 states, 93 states have (on average 1.3978494623655915) internal successors, (130), 93 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 249 states. [2022-04-15 01:03:27,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:27,702 INFO L93 Difference]: Finished difference Result 249 states and 347 transitions. [2022-04-15 01:03:27,702 INFO L276 IsEmpty]: Start isEmpty. Operand 249 states and 347 transitions. [2022-04-15 01:03:27,703 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:27,703 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:27,703 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:03:27,703 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:03:27,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 93 states have (on average 1.3978494623655915) internal successors, (130), 93 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:27,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 134 transitions. [2022-04-15 01:03:27,704 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 134 transitions. Word has length 24 [2022-04-15 01:03:27,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:03:27,704 INFO L478 AbstractCegarLoop]: Abstraction has 98 states and 134 transitions. [2022-04-15 01:03:27,704 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 1.65) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:27,704 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 134 transitions. [2022-04-15 01:03:27,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-15 01:03:27,705 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:03:27,705 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:03:27,721 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-15 01:03:27,916 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:03:27,916 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:03:27,916 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:03:27,916 INFO L85 PathProgramCache]: Analyzing trace with hash -1576992246, now seen corresponding path program 2 times [2022-04-15 01:03:27,916 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:03:27,916 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [964846121] [2022-04-15 01:03:27,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:27,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:03:27,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:27,980 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:03:27,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:27,988 INFO L290 TraceCheckUtils]: 0: Hoare triple {5579#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5571#true} is VALID [2022-04-15 01:03:27,988 INFO L290 TraceCheckUtils]: 1: Hoare triple {5571#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-15 01:03:27,988 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5571#true} {5571#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-15 01:03:27,989 INFO L272 TraceCheckUtils]: 0: Hoare triple {5571#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5579#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:03:27,989 INFO L290 TraceCheckUtils]: 1: Hoare triple {5579#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5571#true} is VALID [2022-04-15 01:03:27,989 INFO L290 TraceCheckUtils]: 2: Hoare triple {5571#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-15 01:03:27,989 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5571#true} {5571#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-15 01:03:27,989 INFO L272 TraceCheckUtils]: 4: Hoare triple {5571#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-15 01:03:27,989 INFO L290 TraceCheckUtils]: 5: Hoare triple {5571#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5571#true} is VALID [2022-04-15 01:03:27,989 INFO L290 TraceCheckUtils]: 6: Hoare triple {5571#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5571#true} is VALID [2022-04-15 01:03:27,990 INFO L290 TraceCheckUtils]: 7: Hoare triple {5571#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-15 01:03:27,990 INFO L290 TraceCheckUtils]: 8: Hoare triple {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-15 01:03:27,991 INFO L290 TraceCheckUtils]: 9: Hoare triple {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-15 01:03:27,991 INFO L290 TraceCheckUtils]: 10: Hoare triple {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:27,992 INFO L290 TraceCheckUtils]: 11: Hoare triple {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:27,992 INFO L290 TraceCheckUtils]: 12: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:27,992 INFO L290 TraceCheckUtils]: 13: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:27,993 INFO L290 TraceCheckUtils]: 14: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:27,993 INFO L290 TraceCheckUtils]: 15: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:27,994 INFO L290 TraceCheckUtils]: 16: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:27,995 INFO L290 TraceCheckUtils]: 17: Hoare triple {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-15 01:03:27,995 INFO L290 TraceCheckUtils]: 18: Hoare triple {5572#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {5572#false} is VALID [2022-04-15 01:03:27,995 INFO L290 TraceCheckUtils]: 19: Hoare triple {5572#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {5572#false} is VALID [2022-04-15 01:03:27,995 INFO L290 TraceCheckUtils]: 20: Hoare triple {5572#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-15 01:03:27,995 INFO L272 TraceCheckUtils]: 21: Hoare triple {5572#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {5572#false} is VALID [2022-04-15 01:03:27,995 INFO L290 TraceCheckUtils]: 22: Hoare triple {5572#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5572#false} is VALID [2022-04-15 01:03:27,995 INFO L290 TraceCheckUtils]: 23: Hoare triple {5572#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-15 01:03:27,995 INFO L290 TraceCheckUtils]: 24: Hoare triple {5572#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-15 01:03:27,995 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-15 01:03:27,996 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:03:27,996 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [964846121] [2022-04-15 01:03:27,996 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [964846121] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:03:27,996 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1526753477] [2022-04-15 01:03:27,996 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 01:03:27,996 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:03:27,996 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:03:27,997 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:03:27,998 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-15 01:03:28,032 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 01:03:28,032 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:03:28,032 INFO L263 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-15 01:03:28,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:28,044 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:03:28,369 INFO L272 TraceCheckUtils]: 0: Hoare triple {5571#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-15 01:03:28,369 INFO L290 TraceCheckUtils]: 1: Hoare triple {5571#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5571#true} is VALID [2022-04-15 01:03:28,369 INFO L290 TraceCheckUtils]: 2: Hoare triple {5571#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-15 01:03:28,369 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5571#true} {5571#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-15 01:03:28,370 INFO L272 TraceCheckUtils]: 4: Hoare triple {5571#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-15 01:03:28,370 INFO L290 TraceCheckUtils]: 5: Hoare triple {5571#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5571#true} is VALID [2022-04-15 01:03:28,370 INFO L290 TraceCheckUtils]: 6: Hoare triple {5571#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5571#true} is VALID [2022-04-15 01:03:28,371 INFO L290 TraceCheckUtils]: 7: Hoare triple {5571#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-15 01:03:28,371 INFO L290 TraceCheckUtils]: 8: Hoare triple {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-15 01:03:28,371 INFO L290 TraceCheckUtils]: 9: Hoare triple {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-15 01:03:28,372 INFO L290 TraceCheckUtils]: 10: Hoare triple {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:28,373 INFO L290 TraceCheckUtils]: 11: Hoare triple {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:28,373 INFO L290 TraceCheckUtils]: 12: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:28,373 INFO L290 TraceCheckUtils]: 13: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:28,374 INFO L290 TraceCheckUtils]: 14: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:28,374 INFO L290 TraceCheckUtils]: 15: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:28,375 INFO L290 TraceCheckUtils]: 16: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:28,375 INFO L290 TraceCheckUtils]: 17: Hoare triple {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-15 01:03:28,376 INFO L290 TraceCheckUtils]: 18: Hoare triple {5572#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {5572#false} is VALID [2022-04-15 01:03:28,376 INFO L290 TraceCheckUtils]: 19: Hoare triple {5572#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {5572#false} is VALID [2022-04-15 01:03:28,376 INFO L290 TraceCheckUtils]: 20: Hoare triple {5572#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-15 01:03:28,376 INFO L272 TraceCheckUtils]: 21: Hoare triple {5572#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {5572#false} is VALID [2022-04-15 01:03:28,376 INFO L290 TraceCheckUtils]: 22: Hoare triple {5572#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5572#false} is VALID [2022-04-15 01:03:28,376 INFO L290 TraceCheckUtils]: 23: Hoare triple {5572#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-15 01:03:28,376 INFO L290 TraceCheckUtils]: 24: Hoare triple {5572#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-15 01:03:28,376 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-15 01:03:28,376 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:03:28,603 INFO L290 TraceCheckUtils]: 24: Hoare triple {5572#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-15 01:03:28,603 INFO L290 TraceCheckUtils]: 23: Hoare triple {5572#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-15 01:03:28,603 INFO L290 TraceCheckUtils]: 22: Hoare triple {5572#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5572#false} is VALID [2022-04-15 01:03:28,604 INFO L272 TraceCheckUtils]: 21: Hoare triple {5572#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {5572#false} is VALID [2022-04-15 01:03:28,604 INFO L290 TraceCheckUtils]: 20: Hoare triple {5572#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-15 01:03:28,604 INFO L290 TraceCheckUtils]: 19: Hoare triple {5572#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {5572#false} is VALID [2022-04-15 01:03:28,604 INFO L290 TraceCheckUtils]: 18: Hoare triple {5572#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {5572#false} is VALID [2022-04-15 01:03:28,605 INFO L290 TraceCheckUtils]: 17: Hoare triple {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-15 01:03:28,606 INFO L290 TraceCheckUtils]: 16: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:28,606 INFO L290 TraceCheckUtils]: 15: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:28,606 INFO L290 TraceCheckUtils]: 14: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:28,607 INFO L290 TraceCheckUtils]: 13: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:28,607 INFO L290 TraceCheckUtils]: 12: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:28,608 INFO L290 TraceCheckUtils]: 11: Hoare triple {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:28,608 INFO L290 TraceCheckUtils]: 10: Hoare triple {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:03:28,609 INFO L290 TraceCheckUtils]: 9: Hoare triple {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-15 01:03:28,609 INFO L290 TraceCheckUtils]: 8: Hoare triple {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-15 01:03:28,610 INFO L290 TraceCheckUtils]: 7: Hoare triple {5571#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-15 01:03:28,610 INFO L290 TraceCheckUtils]: 6: Hoare triple {5571#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5571#true} is VALID [2022-04-15 01:03:28,610 INFO L290 TraceCheckUtils]: 5: Hoare triple {5571#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5571#true} is VALID [2022-04-15 01:03:28,610 INFO L272 TraceCheckUtils]: 4: Hoare triple {5571#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-15 01:03:28,610 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5571#true} {5571#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-15 01:03:28,610 INFO L290 TraceCheckUtils]: 2: Hoare triple {5571#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-15 01:03:28,610 INFO L290 TraceCheckUtils]: 1: Hoare triple {5571#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5571#true} is VALID [2022-04-15 01:03:28,611 INFO L272 TraceCheckUtils]: 0: Hoare triple {5571#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-15 01:03:28,611 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-15 01:03:28,611 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1526753477] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:03:28,611 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:03:28,611 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 6 [2022-04-15 01:03:28,611 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1218314548] [2022-04-15 01:03:28,611 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:03:28,611 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-15 01:03:28,612 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:03:28,612 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:28,632 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:28,632 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-15 01:03:28,632 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:03:28,633 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-15 01:03:28,633 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-04-15 01:03:28,633 INFO L87 Difference]: Start difference. First operand 98 states and 134 transitions. Second operand has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:29,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:29,041 INFO L93 Difference]: Finished difference Result 122 states and 166 transitions. [2022-04-15 01:03:29,042 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-15 01:03:29,042 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-15 01:03:29,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:03:29,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:29,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 56 transitions. [2022-04-15 01:03:29,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:29,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 56 transitions. [2022-04-15 01:03:29,043 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 56 transitions. [2022-04-15 01:03:29,092 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:29,094 INFO L225 Difference]: With dead ends: 122 [2022-04-15 01:03:29,094 INFO L226 Difference]: Without dead ends: 113 [2022-04-15 01:03:29,094 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 51 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2022-04-15 01:03:29,095 INFO L913 BasicCegarLoop]: 24 mSDtfsCounter, 34 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 24 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 34 SdHoareTripleChecker+Valid, 41 SdHoareTripleChecker+Invalid, 96 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 24 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 01:03:29,095 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [34 Valid, 41 Invalid, 96 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [24 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 01:03:29,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2022-04-15 01:03:29,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 103. [2022-04-15 01:03:29,263 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:03:29,263 INFO L82 GeneralOperation]: Start isEquivalent. First operand 113 states. Second operand has 103 states, 98 states have (on average 1.3775510204081634) internal successors, (135), 98 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:29,264 INFO L74 IsIncluded]: Start isIncluded. First operand 113 states. Second operand has 103 states, 98 states have (on average 1.3775510204081634) internal successors, (135), 98 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:29,265 INFO L87 Difference]: Start difference. First operand 113 states. Second operand has 103 states, 98 states have (on average 1.3775510204081634) internal successors, (135), 98 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:29,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:29,270 INFO L93 Difference]: Finished difference Result 113 states and 154 transitions. [2022-04-15 01:03:29,271 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 154 transitions. [2022-04-15 01:03:29,271 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:29,271 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:29,271 INFO L74 IsIncluded]: Start isIncluded. First operand has 103 states, 98 states have (on average 1.3775510204081634) internal successors, (135), 98 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 113 states. [2022-04-15 01:03:29,271 INFO L87 Difference]: Start difference. First operand has 103 states, 98 states have (on average 1.3775510204081634) internal successors, (135), 98 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 113 states. [2022-04-15 01:03:29,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:29,273 INFO L93 Difference]: Finished difference Result 113 states and 154 transitions. [2022-04-15 01:03:29,273 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 154 transitions. [2022-04-15 01:03:29,273 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:29,273 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:29,273 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:03:29,273 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:03:29,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 103 states, 98 states have (on average 1.3775510204081634) internal successors, (135), 98 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:29,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 139 transitions. [2022-04-15 01:03:29,275 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 139 transitions. Word has length 25 [2022-04-15 01:03:29,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:03:29,275 INFO L478 AbstractCegarLoop]: Abstraction has 103 states and 139 transitions. [2022-04-15 01:03:29,276 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:29,276 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 139 transitions. [2022-04-15 01:03:29,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-15 01:03:29,277 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:03:29,277 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:03:29,294 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2022-04-15 01:03:29,491 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-15 01:03:29,491 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:03:29,492 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:03:29,492 INFO L85 PathProgramCache]: Analyzing trace with hash -1804928507, now seen corresponding path program 3 times [2022-04-15 01:03:29,492 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:03:29,492 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1719510311] [2022-04-15 01:03:29,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:29,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:03:29,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:29,607 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:03:29,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:29,615 INFO L290 TraceCheckUtils]: 0: Hoare triple {6304#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6290#true} is VALID [2022-04-15 01:03:29,615 INFO L290 TraceCheckUtils]: 1: Hoare triple {6290#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-15 01:03:29,615 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6290#true} {6290#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-15 01:03:29,615 INFO L272 TraceCheckUtils]: 0: Hoare triple {6290#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6304#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:03:29,615 INFO L290 TraceCheckUtils]: 1: Hoare triple {6304#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6290#true} is VALID [2022-04-15 01:03:29,615 INFO L290 TraceCheckUtils]: 2: Hoare triple {6290#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-15 01:03:29,615 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6290#true} {6290#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-15 01:03:29,616 INFO L272 TraceCheckUtils]: 4: Hoare triple {6290#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-15 01:03:29,616 INFO L290 TraceCheckUtils]: 5: Hoare triple {6290#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6295#(= main_~y~0 0)} is VALID [2022-04-15 01:03:29,616 INFO L290 TraceCheckUtils]: 6: Hoare triple {6295#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6296#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:03:29,617 INFO L290 TraceCheckUtils]: 7: Hoare triple {6296#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6297#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:03:29,617 INFO L290 TraceCheckUtils]: 8: Hoare triple {6297#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6298#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:03:29,617 INFO L290 TraceCheckUtils]: 9: Hoare triple {6298#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6298#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:03:29,618 INFO L290 TraceCheckUtils]: 10: Hoare triple {6298#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {6299#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:03:29,618 INFO L290 TraceCheckUtils]: 11: Hoare triple {6299#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6300#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:03:29,619 INFO L290 TraceCheckUtils]: 12: Hoare triple {6300#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6301#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 01:03:29,619 INFO L290 TraceCheckUtils]: 13: Hoare triple {6301#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6302#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 01:03:29,620 INFO L290 TraceCheckUtils]: 14: Hoare triple {6302#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {6302#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 01:03:29,620 INFO L290 TraceCheckUtils]: 15: Hoare triple {6302#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6301#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 01:03:29,621 INFO L290 TraceCheckUtils]: 16: Hoare triple {6301#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6300#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:03:29,621 INFO L290 TraceCheckUtils]: 17: Hoare triple {6300#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6303#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 01:03:29,621 INFO L290 TraceCheckUtils]: 18: Hoare triple {6303#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6303#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 01:03:29,622 INFO L290 TraceCheckUtils]: 19: Hoare triple {6303#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6303#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 01:03:29,622 INFO L290 TraceCheckUtils]: 20: Hoare triple {6303#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-15 01:03:29,622 INFO L272 TraceCheckUtils]: 21: Hoare triple {6291#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {6291#false} is VALID [2022-04-15 01:03:29,622 INFO L290 TraceCheckUtils]: 22: Hoare triple {6291#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6291#false} is VALID [2022-04-15 01:03:29,622 INFO L290 TraceCheckUtils]: 23: Hoare triple {6291#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-15 01:03:29,622 INFO L290 TraceCheckUtils]: 24: Hoare triple {6291#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-15 01:03:29,623 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:29,623 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:03:29,623 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1719510311] [2022-04-15 01:03:29,623 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1719510311] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:03:29,623 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1513635105] [2022-04-15 01:03:29,623 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-15 01:03:29,623 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:03:29,623 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:03:29,624 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:03:29,624 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-15 01:03:29,655 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-15 01:03:29,655 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:03:29,655 INFO L263 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 16 conjunts are in the unsatisfiable core [2022-04-15 01:03:29,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:29,662 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:03:29,775 INFO L272 TraceCheckUtils]: 0: Hoare triple {6290#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-15 01:03:29,775 INFO L290 TraceCheckUtils]: 1: Hoare triple {6290#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6290#true} is VALID [2022-04-15 01:03:29,775 INFO L290 TraceCheckUtils]: 2: Hoare triple {6290#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-15 01:03:29,775 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6290#true} {6290#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-15 01:03:29,775 INFO L272 TraceCheckUtils]: 4: Hoare triple {6290#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-15 01:03:29,775 INFO L290 TraceCheckUtils]: 5: Hoare triple {6290#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6290#true} is VALID [2022-04-15 01:03:29,776 INFO L290 TraceCheckUtils]: 6: Hoare triple {6290#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6326#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:03:29,777 INFO L290 TraceCheckUtils]: 7: Hoare triple {6326#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6330#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:03:29,777 INFO L290 TraceCheckUtils]: 8: Hoare triple {6330#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:03:29,778 INFO L290 TraceCheckUtils]: 9: Hoare triple {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:03:29,778 INFO L290 TraceCheckUtils]: 10: Hoare triple {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:03:29,779 INFO L290 TraceCheckUtils]: 11: Hoare triple {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6330#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:03:29,779 INFO L290 TraceCheckUtils]: 12: Hoare triple {6330#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6326#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:03:29,780 INFO L290 TraceCheckUtils]: 13: Hoare triple {6326#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:29,780 INFO L290 TraceCheckUtils]: 14: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:29,780 INFO L290 TraceCheckUtils]: 15: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:29,781 INFO L290 TraceCheckUtils]: 16: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:29,781 INFO L290 TraceCheckUtils]: 17: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:29,781 INFO L290 TraceCheckUtils]: 18: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:29,781 INFO L290 TraceCheckUtils]: 19: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-15 01:03:29,781 INFO L290 TraceCheckUtils]: 20: Hoare triple {6291#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-15 01:03:29,782 INFO L272 TraceCheckUtils]: 21: Hoare triple {6291#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {6291#false} is VALID [2022-04-15 01:03:29,782 INFO L290 TraceCheckUtils]: 22: Hoare triple {6291#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6291#false} is VALID [2022-04-15 01:03:29,782 INFO L290 TraceCheckUtils]: 23: Hoare triple {6291#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-15 01:03:29,782 INFO L290 TraceCheckUtils]: 24: Hoare triple {6291#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-15 01:03:29,782 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-15 01:03:29,782 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:03:29,856 INFO L290 TraceCheckUtils]: 24: Hoare triple {6291#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-15 01:03:29,856 INFO L290 TraceCheckUtils]: 23: Hoare triple {6291#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-15 01:03:29,856 INFO L290 TraceCheckUtils]: 22: Hoare triple {6291#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6291#false} is VALID [2022-04-15 01:03:29,856 INFO L272 TraceCheckUtils]: 21: Hoare triple {6291#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {6291#false} is VALID [2022-04-15 01:03:29,856 INFO L290 TraceCheckUtils]: 20: Hoare triple {6291#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-15 01:03:29,856 INFO L290 TraceCheckUtils]: 19: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-15 01:03:29,857 INFO L290 TraceCheckUtils]: 18: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:29,857 INFO L290 TraceCheckUtils]: 17: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:29,857 INFO L290 TraceCheckUtils]: 16: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:29,857 INFO L290 TraceCheckUtils]: 15: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:29,858 INFO L290 TraceCheckUtils]: 14: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:29,858 INFO L290 TraceCheckUtils]: 13: Hoare triple {6326#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:03:29,859 INFO L290 TraceCheckUtils]: 12: Hoare triple {6330#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6326#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:03:29,860 INFO L290 TraceCheckUtils]: 11: Hoare triple {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6330#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:03:29,860 INFO L290 TraceCheckUtils]: 10: Hoare triple {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:03:29,860 INFO L290 TraceCheckUtils]: 9: Hoare triple {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:03:29,861 INFO L290 TraceCheckUtils]: 8: Hoare triple {6330#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:03:29,862 INFO L290 TraceCheckUtils]: 7: Hoare triple {6326#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6330#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:03:29,862 INFO L290 TraceCheckUtils]: 6: Hoare triple {6290#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6326#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:03:29,862 INFO L290 TraceCheckUtils]: 5: Hoare triple {6290#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6290#true} is VALID [2022-04-15 01:03:29,862 INFO L272 TraceCheckUtils]: 4: Hoare triple {6290#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-15 01:03:29,863 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6290#true} {6290#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-15 01:03:29,863 INFO L290 TraceCheckUtils]: 2: Hoare triple {6290#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-15 01:03:29,863 INFO L290 TraceCheckUtils]: 1: Hoare triple {6290#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6290#true} is VALID [2022-04-15 01:03:29,863 INFO L272 TraceCheckUtils]: 0: Hoare triple {6290#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-15 01:03:29,863 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-15 01:03:29,863 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1513635105] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:03:29,863 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:03:29,863 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 6, 6] total 16 [2022-04-15 01:03:29,863 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2067733609] [2022-04-15 01:03:29,863 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:03:29,864 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-15 01:03:29,864 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:03:29,864 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:29,897 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:29,897 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-15 01:03:29,897 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:03:29,898 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-15 01:03:29,898 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=210, Unknown=0, NotChecked=0, Total=240 [2022-04-15 01:03:29,898 INFO L87 Difference]: Start difference. First operand 103 states and 139 transitions. Second operand has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:32,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:32,882 INFO L93 Difference]: Finished difference Result 190 states and 270 transitions. [2022-04-15 01:03:32,883 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2022-04-15 01:03:32,883 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-15 01:03:32,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:03:32,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:32,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 161 transitions. [2022-04-15 01:03:32,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:32,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 161 transitions. [2022-04-15 01:03:32,886 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 46 states and 161 transitions. [2022-04-15 01:03:33,074 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 161 edges. 161 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:33,076 INFO L225 Difference]: With dead ends: 190 [2022-04-15 01:03:33,076 INFO L226 Difference]: Without dead ends: 171 [2022-04-15 01:03:33,077 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 50 SyntacticMatches, 0 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 895 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=480, Invalid=2942, Unknown=0, NotChecked=0, Total=3422 [2022-04-15 01:03:33,077 INFO L913 BasicCegarLoop]: 22 mSDtfsCounter, 140 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 645 mSolverCounterSat, 219 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 140 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 864 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 219 IncrementalHoareTripleChecker+Valid, 645 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-15 01:03:33,077 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [140 Valid, 84 Invalid, 864 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [219 Valid, 645 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-04-15 01:03:33,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2022-04-15 01:03:33,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 118. [2022-04-15 01:03:33,263 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:03:33,265 INFO L82 GeneralOperation]: Start isEquivalent. First operand 171 states. Second operand has 118 states, 113 states have (on average 1.3805309734513274) internal successors, (156), 113 states have internal predecessors, (156), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:33,266 INFO L74 IsIncluded]: Start isIncluded. First operand 171 states. Second operand has 118 states, 113 states have (on average 1.3805309734513274) internal successors, (156), 113 states have internal predecessors, (156), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:33,266 INFO L87 Difference]: Start difference. First operand 171 states. Second operand has 118 states, 113 states have (on average 1.3805309734513274) internal successors, (156), 113 states have internal predecessors, (156), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:33,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:33,268 INFO L93 Difference]: Finished difference Result 171 states and 228 transitions. [2022-04-15 01:03:33,268 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 228 transitions. [2022-04-15 01:03:33,268 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:33,268 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:33,269 INFO L74 IsIncluded]: Start isIncluded. First operand has 118 states, 113 states have (on average 1.3805309734513274) internal successors, (156), 113 states have internal predecessors, (156), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 171 states. [2022-04-15 01:03:33,269 INFO L87 Difference]: Start difference. First operand has 118 states, 113 states have (on average 1.3805309734513274) internal successors, (156), 113 states have internal predecessors, (156), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 171 states. [2022-04-15 01:03:33,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:33,273 INFO L93 Difference]: Finished difference Result 171 states and 228 transitions. [2022-04-15 01:03:33,273 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 228 transitions. [2022-04-15 01:03:33,273 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:33,273 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:33,274 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:03:33,274 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:03:33,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 118 states, 113 states have (on average 1.3805309734513274) internal successors, (156), 113 states have internal predecessors, (156), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:33,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 160 transitions. [2022-04-15 01:03:33,277 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 160 transitions. Word has length 25 [2022-04-15 01:03:33,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:03:33,277 INFO L478 AbstractCegarLoop]: Abstraction has 118 states and 160 transitions. [2022-04-15 01:03:33,277 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:33,277 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 160 transitions. [2022-04-15 01:03:33,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-15 01:03:33,278 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:03:33,278 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:03:33,294 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-15 01:03:33,488 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-15 01:03:33,489 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:03:33,489 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:03:33,489 INFO L85 PathProgramCache]: Analyzing trace with hash -1804159924, now seen corresponding path program 3 times [2022-04-15 01:03:33,489 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:03:33,489 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1837297044] [2022-04-15 01:03:33,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:33,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:03:33,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:33,716 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:03:33,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:33,728 INFO L290 TraceCheckUtils]: 0: Hoare triple {7324#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7310#true} is VALID [2022-04-15 01:03:33,728 INFO L290 TraceCheckUtils]: 1: Hoare triple {7310#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-15 01:03:33,728 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7310#true} {7310#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-15 01:03:33,728 INFO L272 TraceCheckUtils]: 0: Hoare triple {7310#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7324#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:03:33,729 INFO L290 TraceCheckUtils]: 1: Hoare triple {7324#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7310#true} is VALID [2022-04-15 01:03:33,729 INFO L290 TraceCheckUtils]: 2: Hoare triple {7310#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-15 01:03:33,729 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7310#true} {7310#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-15 01:03:33,729 INFO L272 TraceCheckUtils]: 4: Hoare triple {7310#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-15 01:03:33,729 INFO L290 TraceCheckUtils]: 5: Hoare triple {7310#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:33,731 INFO L290 TraceCheckUtils]: 6: Hoare triple {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7316#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0) 1) 4294967296) 4294967296) 4294967294)))} is VALID [2022-04-15 01:03:33,732 INFO L290 TraceCheckUtils]: 7: Hoare triple {7316#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0) 1) 4294967296) 4294967296) 4294967294)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 01:03:33,732 INFO L290 TraceCheckUtils]: 8: Hoare triple {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7318#(and (<= (+ main_~x~0 2) main_~n~0) (<= (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-15 01:03:33,733 INFO L290 TraceCheckUtils]: 9: Hoare triple {7318#(and (<= (+ main_~x~0 2) main_~n~0) (<= (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) main_~x~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7318#(and (<= (+ main_~x~0 2) main_~n~0) (<= (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-15 01:03:33,734 INFO L290 TraceCheckUtils]: 10: Hoare triple {7318#(and (<= (+ main_~x~0 2) main_~n~0) (<= (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) main_~x~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7319#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 1) main_~x~0))} is VALID [2022-04-15 01:03:33,735 INFO L290 TraceCheckUtils]: 11: Hoare triple {7319#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 1) main_~x~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} is VALID [2022-04-15 01:03:33,735 INFO L290 TraceCheckUtils]: 12: Hoare triple {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} is VALID [2022-04-15 01:03:33,736 INFO L290 TraceCheckUtils]: 13: Hoare triple {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} is VALID [2022-04-15 01:03:33,736 INFO L290 TraceCheckUtils]: 14: Hoare triple {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} is VALID [2022-04-15 01:03:33,737 INFO L290 TraceCheckUtils]: 15: Hoare triple {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} is VALID [2022-04-15 01:03:33,737 INFO L290 TraceCheckUtils]: 16: Hoare triple {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7319#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 1) main_~x~0))} is VALID [2022-04-15 01:03:33,738 INFO L290 TraceCheckUtils]: 17: Hoare triple {7319#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 1) main_~x~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7318#(and (<= (+ main_~x~0 2) main_~n~0) (<= (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-15 01:03:33,738 INFO L290 TraceCheckUtils]: 18: Hoare triple {7318#(and (<= (+ main_~x~0 2) main_~n~0) (<= (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) main_~x~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7318#(and (<= (+ main_~x~0 2) main_~n~0) (<= (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-15 01:03:33,739 INFO L290 TraceCheckUtils]: 19: Hoare triple {7318#(and (<= (+ main_~x~0 2) main_~n~0) (<= (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) main_~x~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {7319#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 1) main_~x~0))} is VALID [2022-04-15 01:03:33,740 INFO L290 TraceCheckUtils]: 20: Hoare triple {7319#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 1) main_~x~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:03:33,741 INFO L290 TraceCheckUtils]: 21: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:03:33,742 INFO L272 TraceCheckUtils]: 22: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {7322#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 01:03:33,742 INFO L290 TraceCheckUtils]: 23: Hoare triple {7322#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7323#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 01:03:33,742 INFO L290 TraceCheckUtils]: 24: Hoare triple {7323#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7311#false} is VALID [2022-04-15 01:03:33,742 INFO L290 TraceCheckUtils]: 25: Hoare triple {7311#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7311#false} is VALID [2022-04-15 01:03:33,743 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-15 01:03:33,743 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:03:33,743 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1837297044] [2022-04-15 01:03:33,743 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1837297044] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:03:33,743 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [783812649] [2022-04-15 01:03:33,743 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-15 01:03:33,743 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:03:33,743 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:03:33,748 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:03:33,749 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-15 01:03:33,783 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-04-15 01:03:33,784 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:03:33,784 INFO L263 TraceCheckSpWp]: Trace formula consists of 111 conjuncts, 21 conjunts are in the unsatisfiable core [2022-04-15 01:03:33,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:33,797 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:03:33,955 INFO L272 TraceCheckUtils]: 0: Hoare triple {7310#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-15 01:03:33,955 INFO L290 TraceCheckUtils]: 1: Hoare triple {7310#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7310#true} is VALID [2022-04-15 01:03:33,955 INFO L290 TraceCheckUtils]: 2: Hoare triple {7310#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-15 01:03:33,955 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7310#true} {7310#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-15 01:03:33,955 INFO L272 TraceCheckUtils]: 4: Hoare triple {7310#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-15 01:03:33,956 INFO L290 TraceCheckUtils]: 5: Hoare triple {7310#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:33,956 INFO L290 TraceCheckUtils]: 6: Hoare triple {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7346#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-15 01:03:33,957 INFO L290 TraceCheckUtils]: 7: Hoare triple {7346#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 01:03:33,957 INFO L290 TraceCheckUtils]: 8: Hoare triple {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 01:03:33,958 INFO L290 TraceCheckUtils]: 9: Hoare triple {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 01:03:33,958 INFO L290 TraceCheckUtils]: 10: Hoare triple {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7346#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-15 01:03:33,959 INFO L290 TraceCheckUtils]: 11: Hoare triple {7346#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:33,959 INFO L290 TraceCheckUtils]: 12: Hoare triple {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:33,959 INFO L290 TraceCheckUtils]: 13: Hoare triple {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:33,960 INFO L290 TraceCheckUtils]: 14: Hoare triple {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:33,960 INFO L290 TraceCheckUtils]: 15: Hoare triple {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:33,961 INFO L290 TraceCheckUtils]: 16: Hoare triple {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7346#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-15 01:03:33,961 INFO L290 TraceCheckUtils]: 17: Hoare triple {7346#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 01:03:33,962 INFO L290 TraceCheckUtils]: 18: Hoare triple {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 01:03:33,962 INFO L290 TraceCheckUtils]: 19: Hoare triple {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {7346#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-15 01:03:33,963 INFO L290 TraceCheckUtils]: 20: Hoare triple {7346#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:33,963 INFO L290 TraceCheckUtils]: 21: Hoare triple {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:03:33,964 INFO L272 TraceCheckUtils]: 22: Hoare triple {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {7395#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:03:33,964 INFO L290 TraceCheckUtils]: 23: Hoare triple {7395#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7399#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:03:33,964 INFO L290 TraceCheckUtils]: 24: Hoare triple {7399#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7311#false} is VALID [2022-04-15 01:03:33,964 INFO L290 TraceCheckUtils]: 25: Hoare triple {7311#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7311#false} is VALID [2022-04-15 01:03:33,964 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-15 01:03:33,965 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:03:34,242 INFO L290 TraceCheckUtils]: 25: Hoare triple {7311#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7311#false} is VALID [2022-04-15 01:03:34,243 INFO L290 TraceCheckUtils]: 24: Hoare triple {7399#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7311#false} is VALID [2022-04-15 01:03:34,243 INFO L290 TraceCheckUtils]: 23: Hoare triple {7395#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7399#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:03:34,244 INFO L272 TraceCheckUtils]: 22: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {7395#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:03:34,244 INFO L290 TraceCheckUtils]: 21: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:03:34,245 INFO L290 TraceCheckUtils]: 20: Hoare triple {7421#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:03:34,246 INFO L290 TraceCheckUtils]: 19: Hoare triple {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {7421#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-15 01:03:34,246 INFO L290 TraceCheckUtils]: 18: Hoare triple {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-15 01:03:34,247 INFO L290 TraceCheckUtils]: 17: Hoare triple {7421#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-15 01:03:34,248 INFO L290 TraceCheckUtils]: 16: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7421#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-15 01:03:34,249 INFO L290 TraceCheckUtils]: 15: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:03:34,249 INFO L290 TraceCheckUtils]: 14: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:03:34,250 INFO L290 TraceCheckUtils]: 13: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:03:34,250 INFO L290 TraceCheckUtils]: 12: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:03:34,251 INFO L290 TraceCheckUtils]: 11: Hoare triple {7421#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:03:34,252 INFO L290 TraceCheckUtils]: 10: Hoare triple {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7421#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-15 01:03:34,252 INFO L290 TraceCheckUtils]: 9: Hoare triple {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-15 01:03:34,253 INFO L290 TraceCheckUtils]: 8: Hoare triple {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-15 01:03:34,253 INFO L290 TraceCheckUtils]: 7: Hoare triple {7421#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-15 01:03:34,254 INFO L290 TraceCheckUtils]: 6: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7421#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-15 01:03:34,255 INFO L290 TraceCheckUtils]: 5: Hoare triple {7310#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:03:34,255 INFO L272 TraceCheckUtils]: 4: Hoare triple {7310#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-15 01:03:34,255 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7310#true} {7310#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-15 01:03:34,255 INFO L290 TraceCheckUtils]: 2: Hoare triple {7310#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-15 01:03:34,256 INFO L290 TraceCheckUtils]: 1: Hoare triple {7310#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7310#true} is VALID [2022-04-15 01:03:34,256 INFO L272 TraceCheckUtils]: 0: Hoare triple {7310#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-15 01:03:34,256 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-15 01:03:34,256 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [783812649] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:03:34,256 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:03:34,257 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 7, 7] total 17 [2022-04-15 01:03:34,257 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [122009447] [2022-04-15 01:03:34,258 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:03:34,258 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 3.176470588235294) internal successors, (54), 14 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-15 01:03:34,258 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:03:34,258 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 3.176470588235294) internal successors, (54), 14 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:34,310 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:34,310 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-15 01:03:34,310 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:03:34,310 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-15 01:03:34,310 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=227, Unknown=0, NotChecked=0, Total=272 [2022-04-15 01:03:34,311 INFO L87 Difference]: Start difference. First operand 118 states and 160 transitions. Second operand has 17 states, 17 states have (on average 3.176470588235294) internal successors, (54), 14 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:35,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:35,147 INFO L93 Difference]: Finished difference Result 133 states and 175 transitions. [2022-04-15 01:03:35,148 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-15 01:03:35,148 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 3.176470588235294) internal successors, (54), 14 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-15 01:03:35,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:03:35,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 3.176470588235294) internal successors, (54), 14 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:35,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 49 transitions. [2022-04-15 01:03:35,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 3.176470588235294) internal successors, (54), 14 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:35,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 49 transitions. [2022-04-15 01:03:35,150 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 49 transitions. [2022-04-15 01:03:35,219 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:35,220 INFO L225 Difference]: With dead ends: 133 [2022-04-15 01:03:35,220 INFO L226 Difference]: Without dead ends: 108 [2022-04-15 01:03:35,220 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 43 SyntacticMatches, 9 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 143 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=96, Invalid=504, Unknown=0, NotChecked=0, Total=600 [2022-04-15 01:03:35,221 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 25 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 225 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 71 SdHoareTripleChecker+Invalid, 242 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 225 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-15 01:03:35,221 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [25 Valid, 71 Invalid, 242 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 225 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-15 01:03:35,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2022-04-15 01:03:35,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 108. [2022-04-15 01:03:35,367 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:03:35,367 INFO L82 GeneralOperation]: Start isEquivalent. First operand 108 states. Second operand has 108 states, 103 states have (on average 1.3980582524271845) internal successors, (144), 103 states have internal predecessors, (144), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:35,368 INFO L74 IsIncluded]: Start isIncluded. First operand 108 states. Second operand has 108 states, 103 states have (on average 1.3980582524271845) internal successors, (144), 103 states have internal predecessors, (144), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:35,368 INFO L87 Difference]: Start difference. First operand 108 states. Second operand has 108 states, 103 states have (on average 1.3980582524271845) internal successors, (144), 103 states have internal predecessors, (144), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:35,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:35,370 INFO L93 Difference]: Finished difference Result 108 states and 148 transitions. [2022-04-15 01:03:35,370 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 148 transitions. [2022-04-15 01:03:35,370 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:35,370 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:35,370 INFO L74 IsIncluded]: Start isIncluded. First operand has 108 states, 103 states have (on average 1.3980582524271845) internal successors, (144), 103 states have internal predecessors, (144), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 108 states. [2022-04-15 01:03:35,370 INFO L87 Difference]: Start difference. First operand has 108 states, 103 states have (on average 1.3980582524271845) internal successors, (144), 103 states have internal predecessors, (144), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 108 states. [2022-04-15 01:03:35,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:03:35,372 INFO L93 Difference]: Finished difference Result 108 states and 148 transitions. [2022-04-15 01:03:35,372 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 148 transitions. [2022-04-15 01:03:35,372 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:03:35,372 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:03:35,372 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:03:35,372 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:03:35,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 103 states have (on average 1.3980582524271845) internal successors, (144), 103 states have internal predecessors, (144), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:35,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 148 transitions. [2022-04-15 01:03:35,374 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 148 transitions. Word has length 26 [2022-04-15 01:03:35,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:03:35,374 INFO L478 AbstractCegarLoop]: Abstraction has 108 states and 148 transitions. [2022-04-15 01:03:35,375 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 3.176470588235294) internal successors, (54), 14 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:35,375 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 148 transitions. [2022-04-15 01:03:35,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-15 01:03:35,375 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:03:35,375 INFO L499 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:03:35,396 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2022-04-15 01:03:35,591 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-15 01:03:35,591 INFO L403 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:03:35,592 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:03:35,592 INFO L85 PathProgramCache]: Analyzing trace with hash -744866518, now seen corresponding path program 3 times [2022-04-15 01:03:35,592 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:03:35,592 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1272144829] [2022-04-15 01:03:35,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:03:35,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:03:35,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:35,772 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:03:35,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:35,775 INFO L290 TraceCheckUtils]: 0: Hoare triple {8079#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8061#true} is VALID [2022-04-15 01:03:35,775 INFO L290 TraceCheckUtils]: 1: Hoare triple {8061#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-15 01:03:35,775 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8061#true} {8061#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-15 01:03:35,776 INFO L272 TraceCheckUtils]: 0: Hoare triple {8061#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8079#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:03:35,776 INFO L290 TraceCheckUtils]: 1: Hoare triple {8079#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8061#true} is VALID [2022-04-15 01:03:35,776 INFO L290 TraceCheckUtils]: 2: Hoare triple {8061#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-15 01:03:35,776 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8061#true} {8061#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-15 01:03:35,776 INFO L272 TraceCheckUtils]: 4: Hoare triple {8061#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-15 01:03:35,776 INFO L290 TraceCheckUtils]: 5: Hoare triple {8061#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8066#(= main_~y~0 0)} is VALID [2022-04-15 01:03:35,777 INFO L290 TraceCheckUtils]: 6: Hoare triple {8066#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8067#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:03:35,777 INFO L290 TraceCheckUtils]: 7: Hoare triple {8067#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8068#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:03:35,778 INFO L290 TraceCheckUtils]: 8: Hoare triple {8068#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8069#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:03:35,778 INFO L290 TraceCheckUtils]: 9: Hoare triple {8069#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8070#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:03:35,779 INFO L290 TraceCheckUtils]: 10: Hoare triple {8070#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8071#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:03:35,779 INFO L290 TraceCheckUtils]: 11: Hoare triple {8071#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8072#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:03:35,780 INFO L290 TraceCheckUtils]: 12: Hoare triple {8072#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8073#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:03:35,780 INFO L290 TraceCheckUtils]: 13: Hoare triple {8073#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8074#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:03:35,781 INFO L290 TraceCheckUtils]: 14: Hoare triple {8074#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8075#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:03:35,781 INFO L290 TraceCheckUtils]: 15: Hoare triple {8075#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8076#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 01:03:35,782 INFO L290 TraceCheckUtils]: 16: Hoare triple {8076#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8077#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 01:03:35,782 INFO L290 TraceCheckUtils]: 17: Hoare triple {8077#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8077#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 01:03:35,782 INFO L290 TraceCheckUtils]: 18: Hoare triple {8077#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {8078#(and (<= (div main_~z~0 4294967296) 0) (<= 11 main_~z~0))} is VALID [2022-04-15 01:03:35,783 INFO L290 TraceCheckUtils]: 19: Hoare triple {8078#(and (<= (div main_~z~0 4294967296) 0) (<= 11 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-15 01:03:35,783 INFO L290 TraceCheckUtils]: 20: Hoare triple {8062#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-15 01:03:35,783 INFO L290 TraceCheckUtils]: 21: Hoare triple {8062#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-15 01:03:35,783 INFO L290 TraceCheckUtils]: 22: Hoare triple {8062#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-15 01:03:35,783 INFO L272 TraceCheckUtils]: 23: Hoare triple {8062#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {8062#false} is VALID [2022-04-15 01:03:35,783 INFO L290 TraceCheckUtils]: 24: Hoare triple {8062#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8062#false} is VALID [2022-04-15 01:03:35,783 INFO L290 TraceCheckUtils]: 25: Hoare triple {8062#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-15 01:03:35,783 INFO L290 TraceCheckUtils]: 26: Hoare triple {8062#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-15 01:03:35,784 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:35,784 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:03:35,784 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1272144829] [2022-04-15 01:03:35,784 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1272144829] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:03:35,784 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [991669916] [2022-04-15 01:03:35,784 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-15 01:03:35,784 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:03:35,784 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:03:35,785 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:03:35,785 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-15 01:03:35,851 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2022-04-15 01:03:35,852 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:03:35,853 INFO L263 TraceCheckSpWp]: Trace formula consists of 116 conjuncts, 27 conjunts are in the unsatisfiable core [2022-04-15 01:03:35,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:03:35,859 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:03:36,102 INFO L272 TraceCheckUtils]: 0: Hoare triple {8061#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-15 01:03:36,103 INFO L290 TraceCheckUtils]: 1: Hoare triple {8061#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8061#true} is VALID [2022-04-15 01:03:36,103 INFO L290 TraceCheckUtils]: 2: Hoare triple {8061#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-15 01:03:36,103 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8061#true} {8061#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-15 01:03:36,103 INFO L272 TraceCheckUtils]: 4: Hoare triple {8061#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-15 01:03:36,103 INFO L290 TraceCheckUtils]: 5: Hoare triple {8061#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8066#(= main_~y~0 0)} is VALID [2022-04-15 01:03:36,104 INFO L290 TraceCheckUtils]: 6: Hoare triple {8066#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8067#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:03:36,104 INFO L290 TraceCheckUtils]: 7: Hoare triple {8067#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8068#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:03:36,105 INFO L290 TraceCheckUtils]: 8: Hoare triple {8068#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8069#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:03:36,105 INFO L290 TraceCheckUtils]: 9: Hoare triple {8069#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8070#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:03:36,106 INFO L290 TraceCheckUtils]: 10: Hoare triple {8070#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8071#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:03:36,106 INFO L290 TraceCheckUtils]: 11: Hoare triple {8071#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8072#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:03:36,107 INFO L290 TraceCheckUtils]: 12: Hoare triple {8072#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8073#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:03:36,107 INFO L290 TraceCheckUtils]: 13: Hoare triple {8073#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8074#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:03:36,108 INFO L290 TraceCheckUtils]: 14: Hoare triple {8074#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8075#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:03:36,108 INFO L290 TraceCheckUtils]: 15: Hoare triple {8075#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8076#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 01:03:36,109 INFO L290 TraceCheckUtils]: 16: Hoare triple {8076#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8077#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 01:03:36,109 INFO L290 TraceCheckUtils]: 17: Hoare triple {8077#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8077#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 01:03:36,109 INFO L290 TraceCheckUtils]: 18: Hoare triple {8077#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {8137#(and (<= main_~z~0 11) (<= 11 main_~z~0))} is VALID [2022-04-15 01:03:36,110 INFO L290 TraceCheckUtils]: 19: Hoare triple {8137#(and (<= main_~z~0 11) (<= 11 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-15 01:03:36,110 INFO L290 TraceCheckUtils]: 20: Hoare triple {8062#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-15 01:03:36,110 INFO L290 TraceCheckUtils]: 21: Hoare triple {8062#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-15 01:03:36,110 INFO L290 TraceCheckUtils]: 22: Hoare triple {8062#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-15 01:03:36,110 INFO L272 TraceCheckUtils]: 23: Hoare triple {8062#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {8062#false} is VALID [2022-04-15 01:03:36,110 INFO L290 TraceCheckUtils]: 24: Hoare triple {8062#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8062#false} is VALID [2022-04-15 01:03:36,110 INFO L290 TraceCheckUtils]: 25: Hoare triple {8062#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-15 01:03:36,110 INFO L290 TraceCheckUtils]: 26: Hoare triple {8062#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-15 01:03:36,111 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:36,111 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:03:36,418 INFO L290 TraceCheckUtils]: 26: Hoare triple {8062#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-15 01:03:36,418 INFO L290 TraceCheckUtils]: 25: Hoare triple {8062#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-15 01:03:36,418 INFO L290 TraceCheckUtils]: 24: Hoare triple {8062#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8062#false} is VALID [2022-04-15 01:03:36,418 INFO L272 TraceCheckUtils]: 23: Hoare triple {8062#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {8062#false} is VALID [2022-04-15 01:03:36,418 INFO L290 TraceCheckUtils]: 22: Hoare triple {8062#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-15 01:03:36,418 INFO L290 TraceCheckUtils]: 21: Hoare triple {8062#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-15 01:03:36,418 INFO L290 TraceCheckUtils]: 20: Hoare triple {8062#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-15 01:03:36,419 INFO L290 TraceCheckUtils]: 19: Hoare triple {8183#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-15 01:03:36,419 INFO L290 TraceCheckUtils]: 18: Hoare triple {8187#(< 0 (mod main_~y~0 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {8183#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 01:03:36,419 INFO L290 TraceCheckUtils]: 17: Hoare triple {8187#(< 0 (mod main_~y~0 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8187#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:03:36,420 INFO L290 TraceCheckUtils]: 16: Hoare triple {8194#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8187#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:03:36,420 INFO L290 TraceCheckUtils]: 15: Hoare triple {8198#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8194#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-15 01:03:36,421 INFO L290 TraceCheckUtils]: 14: Hoare triple {8202#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8198#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-15 01:03:36,422 INFO L290 TraceCheckUtils]: 13: Hoare triple {8206#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8202#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-15 01:03:36,423 INFO L290 TraceCheckUtils]: 12: Hoare triple {8210#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8206#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-15 01:03:36,424 INFO L290 TraceCheckUtils]: 11: Hoare triple {8214#(< 0 (mod (+ main_~y~0 6) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8210#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-15 01:03:36,424 INFO L290 TraceCheckUtils]: 10: Hoare triple {8218#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8214#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-15 01:03:36,425 INFO L290 TraceCheckUtils]: 9: Hoare triple {8222#(< 0 (mod (+ main_~y~0 8) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8218#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-15 01:03:36,425 INFO L290 TraceCheckUtils]: 8: Hoare triple {8226#(< 0 (mod (+ main_~y~0 9) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8222#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-15 01:03:36,426 INFO L290 TraceCheckUtils]: 7: Hoare triple {8230#(< 0 (mod (+ main_~y~0 10) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8226#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-15 01:03:36,427 INFO L290 TraceCheckUtils]: 6: Hoare triple {8234#(< 0 (mod (+ main_~y~0 11) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8230#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-15 01:03:36,427 INFO L290 TraceCheckUtils]: 5: Hoare triple {8061#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8234#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-15 01:03:36,427 INFO L272 TraceCheckUtils]: 4: Hoare triple {8061#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-15 01:03:36,427 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8061#true} {8061#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-15 01:03:36,427 INFO L290 TraceCheckUtils]: 2: Hoare triple {8061#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-15 01:03:36,427 INFO L290 TraceCheckUtils]: 1: Hoare triple {8061#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8061#true} is VALID [2022-04-15 01:03:36,427 INFO L272 TraceCheckUtils]: 0: Hoare triple {8061#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-15 01:03:36,428 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:03:36,428 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [991669916] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:03:36,428 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:03:36,428 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 15] total 30 [2022-04-15 01:03:36,428 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [655811409] [2022-04-15 01:03:36,428 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:03:36,428 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 1.3666666666666667) internal successors, (41), 29 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-15 01:03:36,428 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:03:36,429 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 30 states, 30 states have (on average 1.3666666666666667) internal successors, (41), 29 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:03:36,454 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:03:36,454 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-04-15 01:03:36,454 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:03:36,454 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-04-15 01:03:36,454 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=203, Invalid=667, Unknown=0, NotChecked=0, Total=870 [2022-04-15 01:03:36,454 INFO L87 Difference]: Start difference. First operand 108 states and 148 transitions. Second operand has 30 states, 30 states have (on average 1.3666666666666667) internal successors, (41), 29 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:09,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:09,550 INFO L93 Difference]: Finished difference Result 601 states and 923 transitions. [2022-04-15 01:04:09,550 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2022-04-15 01:04:09,550 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 1.3666666666666667) internal successors, (41), 29 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-15 01:04:09,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:04:09,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.3666666666666667) internal successors, (41), 29 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:09,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 368 transitions. [2022-04-15 01:04:09,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.3666666666666667) internal successors, (41), 29 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:09,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 368 transitions. [2022-04-15 01:04:09,557 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 60 states and 368 transitions. [2022-04-15 01:04:10,328 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 368 edges. 368 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:04:10,342 INFO L225 Difference]: With dead ends: 601 [2022-04-15 01:04:10,342 INFO L226 Difference]: Without dead ends: 579 [2022-04-15 01:04:10,345 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 42 SyntacticMatches, 1 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2004 ImplicationChecksByTransitivity, 26.8s TimeCoverageRelationStatistics Valid=1927, Invalid=5555, Unknown=0, NotChecked=0, Total=7482 [2022-04-15 01:04:10,345 INFO L913 BasicCegarLoop]: 75 mSDtfsCounter, 1141 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 1664 mSolverCounterSat, 696 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1141 SdHoareTripleChecker+Valid, 142 SdHoareTripleChecker+Invalid, 2360 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 696 IncrementalHoareTripleChecker+Valid, 1664 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.8s IncrementalHoareTripleChecker+Time [2022-04-15 01:04:10,346 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [1141 Valid, 142 Invalid, 2360 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [696 Valid, 1664 Invalid, 0 Unknown, 0 Unchecked, 2.8s Time] [2022-04-15 01:04:10,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 579 states. [2022-04-15 01:04:10,704 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 579 to 167. [2022-04-15 01:04:10,704 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:04:10,704 INFO L82 GeneralOperation]: Start isEquivalent. First operand 579 states. Second operand has 167 states, 162 states have (on average 1.3950617283950617) internal successors, (226), 162 states have internal predecessors, (226), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:10,704 INFO L74 IsIncluded]: Start isIncluded. First operand 579 states. Second operand has 167 states, 162 states have (on average 1.3950617283950617) internal successors, (226), 162 states have internal predecessors, (226), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:10,705 INFO L87 Difference]: Start difference. First operand 579 states. Second operand has 167 states, 162 states have (on average 1.3950617283950617) internal successors, (226), 162 states have internal predecessors, (226), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:10,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:10,717 INFO L93 Difference]: Finished difference Result 579 states and 811 transitions. [2022-04-15 01:04:10,717 INFO L276 IsEmpty]: Start isEmpty. Operand 579 states and 811 transitions. [2022-04-15 01:04:10,717 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:04:10,717 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:04:10,718 INFO L74 IsIncluded]: Start isIncluded. First operand has 167 states, 162 states have (on average 1.3950617283950617) internal successors, (226), 162 states have internal predecessors, (226), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 579 states. [2022-04-15 01:04:10,718 INFO L87 Difference]: Start difference. First operand has 167 states, 162 states have (on average 1.3950617283950617) internal successors, (226), 162 states have internal predecessors, (226), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 579 states. [2022-04-15 01:04:10,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:10,731 INFO L93 Difference]: Finished difference Result 579 states and 811 transitions. [2022-04-15 01:04:10,731 INFO L276 IsEmpty]: Start isEmpty. Operand 579 states and 811 transitions. [2022-04-15 01:04:10,732 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:04:10,732 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:04:10,732 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:04:10,732 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:04:10,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 167 states, 162 states have (on average 1.3950617283950617) internal successors, (226), 162 states have internal predecessors, (226), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:10,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 230 transitions. [2022-04-15 01:04:10,735 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 230 transitions. Word has length 27 [2022-04-15 01:04:10,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:04:10,735 INFO L478 AbstractCegarLoop]: Abstraction has 167 states and 230 transitions. [2022-04-15 01:04:10,735 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 30 states have (on average 1.3666666666666667) internal successors, (41), 29 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:10,735 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 230 transitions. [2022-04-15 01:04:10,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-15 01:04:10,736 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:04:10,736 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:04:10,763 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-15 01:04:10,952 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-04-15 01:04:10,952 INFO L403 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:04:10,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:04:10,953 INFO L85 PathProgramCache]: Analyzing trace with hash -2081370324, now seen corresponding path program 3 times [2022-04-15 01:04:10,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:04:10,953 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1126318109] [2022-04-15 01:04:10,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:04:10,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:04:10,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:11,113 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:04:11,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:11,116 INFO L290 TraceCheckUtils]: 0: Hoare triple {10561#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10547#true} is VALID [2022-04-15 01:04:11,116 INFO L290 TraceCheckUtils]: 1: Hoare triple {10547#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-15 01:04:11,116 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10547#true} {10547#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-15 01:04:11,117 INFO L272 TraceCheckUtils]: 0: Hoare triple {10547#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10561#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:04:11,117 INFO L290 TraceCheckUtils]: 1: Hoare triple {10561#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10547#true} is VALID [2022-04-15 01:04:11,117 INFO L290 TraceCheckUtils]: 2: Hoare triple {10547#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-15 01:04:11,117 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10547#true} {10547#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-15 01:04:11,117 INFO L272 TraceCheckUtils]: 4: Hoare triple {10547#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-15 01:04:11,117 INFO L290 TraceCheckUtils]: 5: Hoare triple {10547#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10552#(= main_~y~0 0)} is VALID [2022-04-15 01:04:11,118 INFO L290 TraceCheckUtils]: 6: Hoare triple {10552#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10553#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:04:11,118 INFO L290 TraceCheckUtils]: 7: Hoare triple {10553#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10554#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:04:11,119 INFO L290 TraceCheckUtils]: 8: Hoare triple {10554#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10555#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:04:11,119 INFO L290 TraceCheckUtils]: 9: Hoare triple {10555#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10556#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:04:11,120 INFO L290 TraceCheckUtils]: 10: Hoare triple {10556#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10556#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:04:11,120 INFO L290 TraceCheckUtils]: 11: Hoare triple {10556#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10557#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:04:11,121 INFO L290 TraceCheckUtils]: 12: Hoare triple {10557#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10558#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:04:11,121 INFO L290 TraceCheckUtils]: 13: Hoare triple {10558#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10559#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:04:11,122 INFO L290 TraceCheckUtils]: 14: Hoare triple {10559#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10560#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-15 01:04:11,122 INFO L290 TraceCheckUtils]: 15: Hoare triple {10560#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-15 01:04:11,122 INFO L290 TraceCheckUtils]: 16: Hoare triple {10548#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10548#false} is VALID [2022-04-15 01:04:11,122 INFO L290 TraceCheckUtils]: 17: Hoare triple {10548#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10548#false} is VALID [2022-04-15 01:04:11,122 INFO L290 TraceCheckUtils]: 18: Hoare triple {10548#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10548#false} is VALID [2022-04-15 01:04:11,122 INFO L290 TraceCheckUtils]: 19: Hoare triple {10548#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10548#false} is VALID [2022-04-15 01:04:11,122 INFO L290 TraceCheckUtils]: 20: Hoare triple {10548#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-15 01:04:11,123 INFO L290 TraceCheckUtils]: 21: Hoare triple {10548#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {10548#false} is VALID [2022-04-15 01:04:11,123 INFO L290 TraceCheckUtils]: 22: Hoare triple {10548#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-15 01:04:11,123 INFO L290 TraceCheckUtils]: 23: Hoare triple {10548#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-15 01:04:11,123 INFO L272 TraceCheckUtils]: 24: Hoare triple {10548#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {10548#false} is VALID [2022-04-15 01:04:11,123 INFO L290 TraceCheckUtils]: 25: Hoare triple {10548#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10548#false} is VALID [2022-04-15 01:04:11,123 INFO L290 TraceCheckUtils]: 26: Hoare triple {10548#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-15 01:04:11,123 INFO L290 TraceCheckUtils]: 27: Hoare triple {10548#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-15 01:04:11,123 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-15 01:04:11,123 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:04:11,123 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1126318109] [2022-04-15 01:04:11,123 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1126318109] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:04:11,123 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [582479365] [2022-04-15 01:04:11,124 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-15 01:04:11,124 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:04:11,124 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:04:11,124 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:04:11,125 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-15 01:04:11,162 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-15 01:04:11,162 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:04:11,163 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-15 01:04:11,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:11,169 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:04:11,288 INFO L272 TraceCheckUtils]: 0: Hoare triple {10547#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-15 01:04:11,288 INFO L290 TraceCheckUtils]: 1: Hoare triple {10547#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10547#true} is VALID [2022-04-15 01:04:11,288 INFO L290 TraceCheckUtils]: 2: Hoare triple {10547#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-15 01:04:11,288 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10547#true} {10547#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-15 01:04:11,288 INFO L272 TraceCheckUtils]: 4: Hoare triple {10547#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-15 01:04:11,289 INFO L290 TraceCheckUtils]: 5: Hoare triple {10547#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10547#true} is VALID [2022-04-15 01:04:11,289 INFO L290 TraceCheckUtils]: 6: Hoare triple {10547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10547#true} is VALID [2022-04-15 01:04:11,289 INFO L290 TraceCheckUtils]: 7: Hoare triple {10547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10547#true} is VALID [2022-04-15 01:04:11,289 INFO L290 TraceCheckUtils]: 8: Hoare triple {10547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10589#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:04:11,290 INFO L290 TraceCheckUtils]: 9: Hoare triple {10589#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:04:11,290 INFO L290 TraceCheckUtils]: 10: Hoare triple {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:04:11,291 INFO L290 TraceCheckUtils]: 11: Hoare triple {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:04:11,291 INFO L290 TraceCheckUtils]: 12: Hoare triple {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10589#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:04:11,292 INFO L290 TraceCheckUtils]: 13: Hoare triple {10589#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10606#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:11,293 INFO L290 TraceCheckUtils]: 14: Hoare triple {10606#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:11,293 INFO L290 TraceCheckUtils]: 15: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:11,293 INFO L290 TraceCheckUtils]: 16: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:11,294 INFO L290 TraceCheckUtils]: 17: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:11,294 INFO L290 TraceCheckUtils]: 18: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:11,294 INFO L290 TraceCheckUtils]: 19: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:11,295 INFO L290 TraceCheckUtils]: 20: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:11,296 INFO L290 TraceCheckUtils]: 21: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {10606#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:11,296 INFO L290 TraceCheckUtils]: 22: Hoare triple {10606#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-15 01:04:11,296 INFO L290 TraceCheckUtils]: 23: Hoare triple {10548#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-15 01:04:11,296 INFO L272 TraceCheckUtils]: 24: Hoare triple {10548#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {10548#false} is VALID [2022-04-15 01:04:11,296 INFO L290 TraceCheckUtils]: 25: Hoare triple {10548#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10548#false} is VALID [2022-04-15 01:04:11,296 INFO L290 TraceCheckUtils]: 26: Hoare triple {10548#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-15 01:04:11,297 INFO L290 TraceCheckUtils]: 27: Hoare triple {10548#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-15 01:04:11,297 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2022-04-15 01:04:11,297 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:04:11,371 INFO L290 TraceCheckUtils]: 27: Hoare triple {10548#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-15 01:04:11,371 INFO L290 TraceCheckUtils]: 26: Hoare triple {10548#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-15 01:04:11,371 INFO L290 TraceCheckUtils]: 25: Hoare triple {10548#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10548#false} is VALID [2022-04-15 01:04:11,371 INFO L272 TraceCheckUtils]: 24: Hoare triple {10548#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {10548#false} is VALID [2022-04-15 01:04:11,371 INFO L290 TraceCheckUtils]: 23: Hoare triple {10548#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-15 01:04:11,371 INFO L290 TraceCheckUtils]: 22: Hoare triple {10606#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-15 01:04:11,372 INFO L290 TraceCheckUtils]: 21: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {10606#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:11,373 INFO L290 TraceCheckUtils]: 20: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:11,373 INFO L290 TraceCheckUtils]: 19: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:11,373 INFO L290 TraceCheckUtils]: 18: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:11,374 INFO L290 TraceCheckUtils]: 17: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:11,380 INFO L290 TraceCheckUtils]: 16: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:11,381 INFO L290 TraceCheckUtils]: 15: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:11,381 INFO L290 TraceCheckUtils]: 14: Hoare triple {10606#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:11,382 INFO L290 TraceCheckUtils]: 13: Hoare triple {10589#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10606#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:11,383 INFO L290 TraceCheckUtils]: 12: Hoare triple {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10589#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:04:11,383 INFO L290 TraceCheckUtils]: 11: Hoare triple {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:04:11,383 INFO L290 TraceCheckUtils]: 10: Hoare triple {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:04:11,384 INFO L290 TraceCheckUtils]: 9: Hoare triple {10589#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:04:11,385 INFO L290 TraceCheckUtils]: 8: Hoare triple {10547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10589#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:04:11,385 INFO L290 TraceCheckUtils]: 7: Hoare triple {10547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10547#true} is VALID [2022-04-15 01:04:11,385 INFO L290 TraceCheckUtils]: 6: Hoare triple {10547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10547#true} is VALID [2022-04-15 01:04:11,385 INFO L290 TraceCheckUtils]: 5: Hoare triple {10547#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10547#true} is VALID [2022-04-15 01:04:11,385 INFO L272 TraceCheckUtils]: 4: Hoare triple {10547#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-15 01:04:11,385 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10547#true} {10547#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-15 01:04:11,385 INFO L290 TraceCheckUtils]: 2: Hoare triple {10547#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-15 01:04:11,385 INFO L290 TraceCheckUtils]: 1: Hoare triple {10547#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10547#true} is VALID [2022-04-15 01:04:11,385 INFO L272 TraceCheckUtils]: 0: Hoare triple {10547#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-15 01:04:11,385 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2022-04-15 01:04:11,385 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [582479365] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:04:11,385 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:04:11,386 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 6, 6] total 16 [2022-04-15 01:04:11,386 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [494996718] [2022-04-15 01:04:11,386 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:04:11,386 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-15 01:04:11,386 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:04:11,386 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:11,412 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:04:11,412 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-15 01:04:11,412 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:04:11,413 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-15 01:04:11,413 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=208, Unknown=0, NotChecked=0, Total=240 [2022-04-15 01:04:11,413 INFO L87 Difference]: Start difference. First operand 167 states and 230 transitions. Second operand has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:15,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:15,338 INFO L93 Difference]: Finished difference Result 279 states and 387 transitions. [2022-04-15 01:04:15,338 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2022-04-15 01:04:15,338 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-15 01:04:15,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:04:15,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:15,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 185 transitions. [2022-04-15 01:04:15,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:15,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 185 transitions. [2022-04-15 01:04:15,342 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 45 states and 185 transitions. [2022-04-15 01:04:15,545 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 185 edges. 185 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:04:15,549 INFO L225 Difference]: With dead ends: 279 [2022-04-15 01:04:15,549 INFO L226 Difference]: Without dead ends: 262 [2022-04-15 01:04:15,550 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 61 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 849 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=415, Invalid=2891, Unknown=0, NotChecked=0, Total=3306 [2022-04-15 01:04:15,550 INFO L913 BasicCegarLoop]: 57 mSDtfsCounter, 155 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 1015 mSolverCounterSat, 180 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 155 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 1195 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 180 IncrementalHoareTripleChecker+Valid, 1015 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-04-15 01:04:15,550 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [155 Valid, 119 Invalid, 1195 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [180 Valid, 1015 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-04-15 01:04:15,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262 states. [2022-04-15 01:04:15,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262 to 155. [2022-04-15 01:04:15,907 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:04:15,907 INFO L82 GeneralOperation]: Start isEquivalent. First operand 262 states. Second operand has 155 states, 150 states have (on average 1.4066666666666667) internal successors, (211), 150 states have internal predecessors, (211), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:15,907 INFO L74 IsIncluded]: Start isIncluded. First operand 262 states. Second operand has 155 states, 150 states have (on average 1.4066666666666667) internal successors, (211), 150 states have internal predecessors, (211), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:15,908 INFO L87 Difference]: Start difference. First operand 262 states. Second operand has 155 states, 150 states have (on average 1.4066666666666667) internal successors, (211), 150 states have internal predecessors, (211), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:15,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:15,911 INFO L93 Difference]: Finished difference Result 262 states and 365 transitions. [2022-04-15 01:04:15,911 INFO L276 IsEmpty]: Start isEmpty. Operand 262 states and 365 transitions. [2022-04-15 01:04:15,911 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:04:15,911 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:04:15,912 INFO L74 IsIncluded]: Start isIncluded. First operand has 155 states, 150 states have (on average 1.4066666666666667) internal successors, (211), 150 states have internal predecessors, (211), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 262 states. [2022-04-15 01:04:15,912 INFO L87 Difference]: Start difference. First operand has 155 states, 150 states have (on average 1.4066666666666667) internal successors, (211), 150 states have internal predecessors, (211), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 262 states. [2022-04-15 01:04:15,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:15,915 INFO L93 Difference]: Finished difference Result 262 states and 365 transitions. [2022-04-15 01:04:15,915 INFO L276 IsEmpty]: Start isEmpty. Operand 262 states and 365 transitions. [2022-04-15 01:04:15,916 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:04:15,916 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:04:15,916 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:04:15,916 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:04:15,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155 states, 150 states have (on average 1.4066666666666667) internal successors, (211), 150 states have internal predecessors, (211), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:15,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 215 transitions. [2022-04-15 01:04:15,918 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 215 transitions. Word has length 28 [2022-04-15 01:04:15,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:04:15,918 INFO L478 AbstractCegarLoop]: Abstraction has 155 states and 215 transitions. [2022-04-15 01:04:15,918 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:15,918 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 215 transitions. [2022-04-15 01:04:15,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-15 01:04:15,919 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:04:15,919 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:04:15,937 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-15 01:04:16,135 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-15 01:04:16,135 INFO L403 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:04:16,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:04:16,136 INFO L85 PathProgramCache]: Analyzing trace with hash -403341300, now seen corresponding path program 4 times [2022-04-15 01:04:16,136 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:04:16,136 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [110582958] [2022-04-15 01:04:16,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:04:16,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:04:16,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:16,296 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:04:16,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:16,302 INFO L290 TraceCheckUtils]: 0: Hoare triple {11998#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11982#true} is VALID [2022-04-15 01:04:16,302 INFO L290 TraceCheckUtils]: 1: Hoare triple {11982#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-15 01:04:16,302 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11982#true} {11982#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-15 01:04:16,303 INFO L272 TraceCheckUtils]: 0: Hoare triple {11982#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11998#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:04:16,303 INFO L290 TraceCheckUtils]: 1: Hoare triple {11998#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11982#true} is VALID [2022-04-15 01:04:16,303 INFO L290 TraceCheckUtils]: 2: Hoare triple {11982#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-15 01:04:16,303 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11982#true} {11982#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-15 01:04:16,303 INFO L272 TraceCheckUtils]: 4: Hoare triple {11982#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-15 01:04:16,303 INFO L290 TraceCheckUtils]: 5: Hoare triple {11982#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11987#(= main_~y~0 0)} is VALID [2022-04-15 01:04:16,304 INFO L290 TraceCheckUtils]: 6: Hoare triple {11987#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11988#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:04:16,304 INFO L290 TraceCheckUtils]: 7: Hoare triple {11988#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11989#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:04:16,305 INFO L290 TraceCheckUtils]: 8: Hoare triple {11989#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11990#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:04:16,305 INFO L290 TraceCheckUtils]: 9: Hoare triple {11990#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11991#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:04:16,305 INFO L290 TraceCheckUtils]: 10: Hoare triple {11991#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11991#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:04:16,306 INFO L290 TraceCheckUtils]: 11: Hoare triple {11991#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {11992#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:04:16,306 INFO L290 TraceCheckUtils]: 12: Hoare triple {11992#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11993#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:04:16,307 INFO L290 TraceCheckUtils]: 13: Hoare triple {11993#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11994#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:04:16,307 INFO L290 TraceCheckUtils]: 14: Hoare triple {11994#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11995#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 01:04:16,308 INFO L290 TraceCheckUtils]: 15: Hoare triple {11995#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11996#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 01:04:16,308 INFO L290 TraceCheckUtils]: 16: Hoare triple {11996#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {11996#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 01:04:16,308 INFO L290 TraceCheckUtils]: 17: Hoare triple {11996#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11995#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 01:04:16,309 INFO L290 TraceCheckUtils]: 18: Hoare triple {11995#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11994#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:04:16,309 INFO L290 TraceCheckUtils]: 19: Hoare triple {11994#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11993#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:04:16,310 INFO L290 TraceCheckUtils]: 20: Hoare triple {11993#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11997#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 01:04:16,310 INFO L290 TraceCheckUtils]: 21: Hoare triple {11997#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11997#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 01:04:16,311 INFO L290 TraceCheckUtils]: 22: Hoare triple {11997#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11997#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 01:04:16,311 INFO L290 TraceCheckUtils]: 23: Hoare triple {11997#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-15 01:04:16,311 INFO L272 TraceCheckUtils]: 24: Hoare triple {11983#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {11983#false} is VALID [2022-04-15 01:04:16,311 INFO L290 TraceCheckUtils]: 25: Hoare triple {11983#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11983#false} is VALID [2022-04-15 01:04:16,311 INFO L290 TraceCheckUtils]: 26: Hoare triple {11983#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-15 01:04:16,311 INFO L290 TraceCheckUtils]: 27: Hoare triple {11983#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-15 01:04:16,311 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:04:16,312 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:04:16,312 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [110582958] [2022-04-15 01:04:16,312 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [110582958] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:04:16,312 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [564687510] [2022-04-15 01:04:16,312 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 01:04:16,312 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:04:16,312 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:04:16,313 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:04:16,313 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-15 01:04:16,345 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 01:04:16,345 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:04:16,346 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-15 01:04:16,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:16,355 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:04:16,492 INFO L272 TraceCheckUtils]: 0: Hoare triple {11982#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-15 01:04:16,493 INFO L290 TraceCheckUtils]: 1: Hoare triple {11982#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11982#true} is VALID [2022-04-15 01:04:16,493 INFO L290 TraceCheckUtils]: 2: Hoare triple {11982#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-15 01:04:16,493 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11982#true} {11982#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-15 01:04:16,493 INFO L272 TraceCheckUtils]: 4: Hoare triple {11982#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-15 01:04:16,493 INFO L290 TraceCheckUtils]: 5: Hoare triple {11982#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11982#true} is VALID [2022-04-15 01:04:16,494 INFO L290 TraceCheckUtils]: 6: Hoare triple {11982#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12020#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:04:16,494 INFO L290 TraceCheckUtils]: 7: Hoare triple {12020#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12024#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:04:16,495 INFO L290 TraceCheckUtils]: 8: Hoare triple {12024#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12028#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:04:16,495 INFO L290 TraceCheckUtils]: 9: Hoare triple {12028#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 01:04:16,496 INFO L290 TraceCheckUtils]: 10: Hoare triple {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 01:04:16,496 INFO L290 TraceCheckUtils]: 11: Hoare triple {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 01:04:16,497 INFO L290 TraceCheckUtils]: 12: Hoare triple {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12028#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:04:16,497 INFO L290 TraceCheckUtils]: 13: Hoare triple {12028#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12024#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:04:16,498 INFO L290 TraceCheckUtils]: 14: Hoare triple {12024#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12020#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:04:16,499 INFO L290 TraceCheckUtils]: 15: Hoare triple {12020#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:16,499 INFO L290 TraceCheckUtils]: 16: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:16,499 INFO L290 TraceCheckUtils]: 17: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:16,499 INFO L290 TraceCheckUtils]: 18: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:16,500 INFO L290 TraceCheckUtils]: 19: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:16,500 INFO L290 TraceCheckUtils]: 20: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:16,500 INFO L290 TraceCheckUtils]: 21: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:16,501 INFO L290 TraceCheckUtils]: 22: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-15 01:04:16,501 INFO L290 TraceCheckUtils]: 23: Hoare triple {11983#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-15 01:04:16,501 INFO L272 TraceCheckUtils]: 24: Hoare triple {11983#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {11983#false} is VALID [2022-04-15 01:04:16,501 INFO L290 TraceCheckUtils]: 25: Hoare triple {11983#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11983#false} is VALID [2022-04-15 01:04:16,501 INFO L290 TraceCheckUtils]: 26: Hoare triple {11983#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-15 01:04:16,501 INFO L290 TraceCheckUtils]: 27: Hoare triple {11983#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-15 01:04:16,501 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 16 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-15 01:04:16,501 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:04:16,605 INFO L290 TraceCheckUtils]: 27: Hoare triple {11983#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-15 01:04:16,605 INFO L290 TraceCheckUtils]: 26: Hoare triple {11983#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-15 01:04:16,605 INFO L290 TraceCheckUtils]: 25: Hoare triple {11983#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11983#false} is VALID [2022-04-15 01:04:16,605 INFO L272 TraceCheckUtils]: 24: Hoare triple {11983#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {11983#false} is VALID [2022-04-15 01:04:16,605 INFO L290 TraceCheckUtils]: 23: Hoare triple {11983#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-15 01:04:16,605 INFO L290 TraceCheckUtils]: 22: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-15 01:04:16,606 INFO L290 TraceCheckUtils]: 21: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:16,606 INFO L290 TraceCheckUtils]: 20: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:16,606 INFO L290 TraceCheckUtils]: 19: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:16,606 INFO L290 TraceCheckUtils]: 18: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:16,607 INFO L290 TraceCheckUtils]: 17: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:16,607 INFO L290 TraceCheckUtils]: 16: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:16,608 INFO L290 TraceCheckUtils]: 15: Hoare triple {12020#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:16,608 INFO L290 TraceCheckUtils]: 14: Hoare triple {12024#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12020#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:04:16,609 INFO L290 TraceCheckUtils]: 13: Hoare triple {12028#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12024#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:04:16,610 INFO L290 TraceCheckUtils]: 12: Hoare triple {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12028#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:04:16,610 INFO L290 TraceCheckUtils]: 11: Hoare triple {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 01:04:16,610 INFO L290 TraceCheckUtils]: 10: Hoare triple {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 01:04:16,611 INFO L290 TraceCheckUtils]: 9: Hoare triple {12028#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 01:04:16,611 INFO L290 TraceCheckUtils]: 8: Hoare triple {12024#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12028#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:04:16,612 INFO L290 TraceCheckUtils]: 7: Hoare triple {12020#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12024#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:04:16,614 INFO L290 TraceCheckUtils]: 6: Hoare triple {11982#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12020#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:04:16,614 INFO L290 TraceCheckUtils]: 5: Hoare triple {11982#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11982#true} is VALID [2022-04-15 01:04:16,615 INFO L272 TraceCheckUtils]: 4: Hoare triple {11982#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-15 01:04:16,615 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11982#true} {11982#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-15 01:04:16,615 INFO L290 TraceCheckUtils]: 2: Hoare triple {11982#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-15 01:04:16,615 INFO L290 TraceCheckUtils]: 1: Hoare triple {11982#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11982#true} is VALID [2022-04-15 01:04:16,615 INFO L272 TraceCheckUtils]: 0: Hoare triple {11982#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-15 01:04:16,615 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 16 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-15 01:04:16,615 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [564687510] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:04:16,615 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:04:16,615 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 7, 7] total 19 [2022-04-15 01:04:16,615 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [845121557] [2022-04-15 01:04:16,615 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:04:16,616 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.1578947368421053) internal successors, (41), 18 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-15 01:04:16,616 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:04:16,616 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 2.1578947368421053) internal successors, (41), 18 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:16,645 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:04:16,646 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-15 01:04:16,646 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:04:16,646 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-15 01:04:16,646 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=306, Unknown=0, NotChecked=0, Total=342 [2022-04-15 01:04:16,646 INFO L87 Difference]: Start difference. First operand 155 states and 215 transitions. Second operand has 19 states, 19 states have (on average 2.1578947368421053) internal successors, (41), 18 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:23,162 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:23,163 INFO L93 Difference]: Finished difference Result 294 states and 418 transitions. [2022-04-15 01:04:23,163 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2022-04-15 01:04:23,163 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.1578947368421053) internal successors, (41), 18 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-15 01:04:23,163 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:04:23,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.1578947368421053) internal successors, (41), 18 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:23,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 206 transitions. [2022-04-15 01:04:23,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.1578947368421053) internal successors, (41), 18 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:23,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 206 transitions. [2022-04-15 01:04:23,166 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 69 states and 206 transitions. [2022-04-15 01:04:23,471 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 206 edges. 206 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:04:23,475 INFO L225 Difference]: With dead ends: 294 [2022-04-15 01:04:23,475 INFO L226 Difference]: Without dead ends: 280 [2022-04-15 01:04:23,477 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2133 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=840, Invalid=6300, Unknown=0, NotChecked=0, Total=7140 [2022-04-15 01:04:23,477 INFO L913 BasicCegarLoop]: 26 mSDtfsCounter, 179 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 1157 mSolverCounterSat, 328 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 179 SdHoareTripleChecker+Valid, 108 SdHoareTripleChecker+Invalid, 1485 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 328 IncrementalHoareTripleChecker+Valid, 1157 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.9s IncrementalHoareTripleChecker+Time [2022-04-15 01:04:23,477 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [179 Valid, 108 Invalid, 1485 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [328 Valid, 1157 Invalid, 0 Unknown, 0 Unchecked, 1.9s Time] [2022-04-15 01:04:23,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states. [2022-04-15 01:04:23,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 185. [2022-04-15 01:04:23,893 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:04:23,893 INFO L82 GeneralOperation]: Start isEquivalent. First operand 280 states. Second operand has 185 states, 180 states have (on average 1.4) internal successors, (252), 180 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:23,893 INFO L74 IsIncluded]: Start isIncluded. First operand 280 states. Second operand has 185 states, 180 states have (on average 1.4) internal successors, (252), 180 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:23,893 INFO L87 Difference]: Start difference. First operand 280 states. Second operand has 185 states, 180 states have (on average 1.4) internal successors, (252), 180 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:23,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:23,897 INFO L93 Difference]: Finished difference Result 280 states and 373 transitions. [2022-04-15 01:04:23,897 INFO L276 IsEmpty]: Start isEmpty. Operand 280 states and 373 transitions. [2022-04-15 01:04:23,897 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:04:23,897 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:04:23,898 INFO L74 IsIncluded]: Start isIncluded. First operand has 185 states, 180 states have (on average 1.4) internal successors, (252), 180 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 280 states. [2022-04-15 01:04:23,898 INFO L87 Difference]: Start difference. First operand has 185 states, 180 states have (on average 1.4) internal successors, (252), 180 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 280 states. [2022-04-15 01:04:23,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:23,901 INFO L93 Difference]: Finished difference Result 280 states and 373 transitions. [2022-04-15 01:04:23,901 INFO L276 IsEmpty]: Start isEmpty. Operand 280 states and 373 transitions. [2022-04-15 01:04:23,902 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:04:23,902 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:04:23,902 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:04:23,902 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:04:23,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 185 states, 180 states have (on average 1.4) internal successors, (252), 180 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:23,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 256 transitions. [2022-04-15 01:04:23,905 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 256 transitions. Word has length 28 [2022-04-15 01:04:23,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:04:23,905 INFO L478 AbstractCegarLoop]: Abstraction has 185 states and 256 transitions. [2022-04-15 01:04:23,905 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 2.1578947368421053) internal successors, (41), 18 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:23,905 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 256 transitions. [2022-04-15 01:04:23,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-15 01:04:23,906 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:04:23,906 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:04:23,924 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-15 01:04:24,124 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-15 01:04:24,124 INFO L403 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:04:24,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:04:24,125 INFO L85 PathProgramCache]: Analyzing trace with hash -1025963572, now seen corresponding path program 4 times [2022-04-15 01:04:24,125 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:04:24,125 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [313951618] [2022-04-15 01:04:24,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:04:24,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:04:24,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:24,221 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:04:24,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:24,225 INFO L290 TraceCheckUtils]: 0: Hoare triple {13556#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13547#true} is VALID [2022-04-15 01:04:24,225 INFO L290 TraceCheckUtils]: 1: Hoare triple {13547#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-15 01:04:24,225 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13547#true} {13547#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-15 01:04:24,226 INFO L272 TraceCheckUtils]: 0: Hoare triple {13547#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13556#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:04:24,226 INFO L290 TraceCheckUtils]: 1: Hoare triple {13556#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13547#true} is VALID [2022-04-15 01:04:24,226 INFO L290 TraceCheckUtils]: 2: Hoare triple {13547#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-15 01:04:24,226 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13547#true} {13547#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-15 01:04:24,226 INFO L272 TraceCheckUtils]: 4: Hoare triple {13547#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-15 01:04:24,226 INFO L290 TraceCheckUtils]: 5: Hoare triple {13547#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13547#true} is VALID [2022-04-15 01:04:24,226 INFO L290 TraceCheckUtils]: 6: Hoare triple {13547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13547#true} is VALID [2022-04-15 01:04:24,226 INFO L290 TraceCheckUtils]: 7: Hoare triple {13547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13547#true} is VALID [2022-04-15 01:04:24,227 INFO L290 TraceCheckUtils]: 8: Hoare triple {13547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-15 01:04:24,227 INFO L290 TraceCheckUtils]: 9: Hoare triple {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-15 01:04:24,228 INFO L290 TraceCheckUtils]: 10: Hoare triple {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-15 01:04:24,228 INFO L290 TraceCheckUtils]: 11: Hoare triple {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,229 INFO L290 TraceCheckUtils]: 12: Hoare triple {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,230 INFO L290 TraceCheckUtils]: 13: Hoare triple {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,230 INFO L290 TraceCheckUtils]: 14: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,231 INFO L290 TraceCheckUtils]: 15: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,231 INFO L290 TraceCheckUtils]: 16: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,231 INFO L290 TraceCheckUtils]: 17: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,232 INFO L290 TraceCheckUtils]: 18: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,232 INFO L290 TraceCheckUtils]: 19: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,233 INFO L290 TraceCheckUtils]: 20: Hoare triple {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,234 INFO L290 TraceCheckUtils]: 21: Hoare triple {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-15 01:04:24,234 INFO L290 TraceCheckUtils]: 22: Hoare triple {13548#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {13548#false} is VALID [2022-04-15 01:04:24,234 INFO L290 TraceCheckUtils]: 23: Hoare triple {13548#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {13548#false} is VALID [2022-04-15 01:04:24,234 INFO L290 TraceCheckUtils]: 24: Hoare triple {13548#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {13548#false} is VALID [2022-04-15 01:04:24,234 INFO L290 TraceCheckUtils]: 25: Hoare triple {13548#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-15 01:04:24,234 INFO L272 TraceCheckUtils]: 26: Hoare triple {13548#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {13548#false} is VALID [2022-04-15 01:04:24,234 INFO L290 TraceCheckUtils]: 27: Hoare triple {13548#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13548#false} is VALID [2022-04-15 01:04:24,234 INFO L290 TraceCheckUtils]: 28: Hoare triple {13548#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-15 01:04:24,235 INFO L290 TraceCheckUtils]: 29: Hoare triple {13548#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-15 01:04:24,235 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-15 01:04:24,235 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:04:24,235 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [313951618] [2022-04-15 01:04:24,235 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [313951618] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:04:24,235 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1183142643] [2022-04-15 01:04:24,235 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 01:04:24,235 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:04:24,235 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:04:24,260 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:04:24,261 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-15 01:04:24,297 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 01:04:24,298 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:04:24,298 INFO L263 TraceCheckSpWp]: Trace formula consists of 131 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-15 01:04:24,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:24,305 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:04:24,425 INFO L272 TraceCheckUtils]: 0: Hoare triple {13547#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-15 01:04:24,425 INFO L290 TraceCheckUtils]: 1: Hoare triple {13547#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13547#true} is VALID [2022-04-15 01:04:24,425 INFO L290 TraceCheckUtils]: 2: Hoare triple {13547#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-15 01:04:24,425 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13547#true} {13547#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-15 01:04:24,425 INFO L272 TraceCheckUtils]: 4: Hoare triple {13547#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-15 01:04:24,425 INFO L290 TraceCheckUtils]: 5: Hoare triple {13547#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13547#true} is VALID [2022-04-15 01:04:24,425 INFO L290 TraceCheckUtils]: 6: Hoare triple {13547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13547#true} is VALID [2022-04-15 01:04:24,425 INFO L290 TraceCheckUtils]: 7: Hoare triple {13547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13547#true} is VALID [2022-04-15 01:04:24,426 INFO L290 TraceCheckUtils]: 8: Hoare triple {13547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-15 01:04:24,426 INFO L290 TraceCheckUtils]: 9: Hoare triple {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-15 01:04:24,427 INFO L290 TraceCheckUtils]: 10: Hoare triple {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-15 01:04:24,427 INFO L290 TraceCheckUtils]: 11: Hoare triple {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,428 INFO L290 TraceCheckUtils]: 12: Hoare triple {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,429 INFO L290 TraceCheckUtils]: 13: Hoare triple {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,429 INFO L290 TraceCheckUtils]: 14: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,430 INFO L290 TraceCheckUtils]: 15: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,430 INFO L290 TraceCheckUtils]: 16: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,430 INFO L290 TraceCheckUtils]: 17: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,431 INFO L290 TraceCheckUtils]: 18: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,431 INFO L290 TraceCheckUtils]: 19: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,432 INFO L290 TraceCheckUtils]: 20: Hoare triple {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,433 INFO L290 TraceCheckUtils]: 21: Hoare triple {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-15 01:04:24,433 INFO L290 TraceCheckUtils]: 22: Hoare triple {13548#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {13548#false} is VALID [2022-04-15 01:04:24,433 INFO L290 TraceCheckUtils]: 23: Hoare triple {13548#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {13548#false} is VALID [2022-04-15 01:04:24,433 INFO L290 TraceCheckUtils]: 24: Hoare triple {13548#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {13548#false} is VALID [2022-04-15 01:04:24,433 INFO L290 TraceCheckUtils]: 25: Hoare triple {13548#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-15 01:04:24,433 INFO L272 TraceCheckUtils]: 26: Hoare triple {13548#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {13548#false} is VALID [2022-04-15 01:04:24,433 INFO L290 TraceCheckUtils]: 27: Hoare triple {13548#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13548#false} is VALID [2022-04-15 01:04:24,433 INFO L290 TraceCheckUtils]: 28: Hoare triple {13548#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-15 01:04:24,433 INFO L290 TraceCheckUtils]: 29: Hoare triple {13548#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-15 01:04:24,433 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-15 01:04:24,433 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:04:24,652 INFO L290 TraceCheckUtils]: 29: Hoare triple {13548#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-15 01:04:24,652 INFO L290 TraceCheckUtils]: 28: Hoare triple {13548#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-15 01:04:24,652 INFO L290 TraceCheckUtils]: 27: Hoare triple {13548#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13548#false} is VALID [2022-04-15 01:04:24,652 INFO L272 TraceCheckUtils]: 26: Hoare triple {13548#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {13548#false} is VALID [2022-04-15 01:04:24,652 INFO L290 TraceCheckUtils]: 25: Hoare triple {13548#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-15 01:04:24,653 INFO L290 TraceCheckUtils]: 24: Hoare triple {13548#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {13548#false} is VALID [2022-04-15 01:04:24,653 INFO L290 TraceCheckUtils]: 23: Hoare triple {13548#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {13548#false} is VALID [2022-04-15 01:04:24,653 INFO L290 TraceCheckUtils]: 22: Hoare triple {13548#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {13548#false} is VALID [2022-04-15 01:04:24,653 INFO L290 TraceCheckUtils]: 21: Hoare triple {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-15 01:04:24,654 INFO L290 TraceCheckUtils]: 20: Hoare triple {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,656 INFO L290 TraceCheckUtils]: 19: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,656 INFO L290 TraceCheckUtils]: 18: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,656 INFO L290 TraceCheckUtils]: 17: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,657 INFO L290 TraceCheckUtils]: 16: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,657 INFO L290 TraceCheckUtils]: 15: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,657 INFO L290 TraceCheckUtils]: 14: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,658 INFO L290 TraceCheckUtils]: 13: Hoare triple {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,659 INFO L290 TraceCheckUtils]: 12: Hoare triple {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,660 INFO L290 TraceCheckUtils]: 11: Hoare triple {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:04:24,660 INFO L290 TraceCheckUtils]: 10: Hoare triple {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-15 01:04:24,660 INFO L290 TraceCheckUtils]: 9: Hoare triple {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-15 01:04:24,661 INFO L290 TraceCheckUtils]: 8: Hoare triple {13547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-15 01:04:24,661 INFO L290 TraceCheckUtils]: 7: Hoare triple {13547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13547#true} is VALID [2022-04-15 01:04:24,661 INFO L290 TraceCheckUtils]: 6: Hoare triple {13547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13547#true} is VALID [2022-04-15 01:04:24,661 INFO L290 TraceCheckUtils]: 5: Hoare triple {13547#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13547#true} is VALID [2022-04-15 01:04:24,661 INFO L272 TraceCheckUtils]: 4: Hoare triple {13547#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-15 01:04:24,661 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13547#true} {13547#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-15 01:04:24,661 INFO L290 TraceCheckUtils]: 2: Hoare triple {13547#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-15 01:04:24,662 INFO L290 TraceCheckUtils]: 1: Hoare triple {13547#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13547#true} is VALID [2022-04-15 01:04:24,662 INFO L272 TraceCheckUtils]: 0: Hoare triple {13547#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-15 01:04:24,662 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-15 01:04:24,662 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1183142643] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:04:24,662 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:04:24,662 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6] total 7 [2022-04-15 01:04:24,662 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1010936242] [2022-04-15 01:04:24,662 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:04:24,662 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-15 01:04:24,663 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:04:24,663 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:24,682 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:04:24,682 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-15 01:04:24,682 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:04:24,682 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-15 01:04:24,682 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-04-15 01:04:24,682 INFO L87 Difference]: Start difference. First operand 185 states and 256 transitions. Second operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:25,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:25,575 INFO L93 Difference]: Finished difference Result 238 states and 321 transitions. [2022-04-15 01:04:25,576 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-15 01:04:25,576 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-15 01:04:25,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:04:25,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:25,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 66 transitions. [2022-04-15 01:04:25,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:25,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 66 transitions. [2022-04-15 01:04:25,577 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 66 transitions. [2022-04-15 01:04:25,642 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 66 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:04:25,644 INFO L225 Difference]: With dead ends: 238 [2022-04-15 01:04:25,644 INFO L226 Difference]: Without dead ends: 228 [2022-04-15 01:04:25,645 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 62 SyntacticMatches, 3 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=52, Invalid=130, Unknown=0, NotChecked=0, Total=182 [2022-04-15 01:04:25,645 INFO L913 BasicCegarLoop]: 29 mSDtfsCounter, 37 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 113 mSolverCounterSat, 31 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 51 SdHoareTripleChecker+Invalid, 144 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 31 IncrementalHoareTripleChecker+Valid, 113 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 01:04:25,645 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [37 Valid, 51 Invalid, 144 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [31 Valid, 113 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 01:04:25,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states. [2022-04-15 01:04:26,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 207. [2022-04-15 01:04:26,084 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:04:26,085 INFO L82 GeneralOperation]: Start isEquivalent. First operand 228 states. Second operand has 207 states, 202 states have (on average 1.3712871287128714) internal successors, (277), 202 states have internal predecessors, (277), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:26,085 INFO L74 IsIncluded]: Start isIncluded. First operand 228 states. Second operand has 207 states, 202 states have (on average 1.3712871287128714) internal successors, (277), 202 states have internal predecessors, (277), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:26,085 INFO L87 Difference]: Start difference. First operand 228 states. Second operand has 207 states, 202 states have (on average 1.3712871287128714) internal successors, (277), 202 states have internal predecessors, (277), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:26,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:26,088 INFO L93 Difference]: Finished difference Result 228 states and 308 transitions. [2022-04-15 01:04:26,088 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 308 transitions. [2022-04-15 01:04:26,088 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:04:26,088 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:04:26,088 INFO L74 IsIncluded]: Start isIncluded. First operand has 207 states, 202 states have (on average 1.3712871287128714) internal successors, (277), 202 states have internal predecessors, (277), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 228 states. [2022-04-15 01:04:26,089 INFO L87 Difference]: Start difference. First operand has 207 states, 202 states have (on average 1.3712871287128714) internal successors, (277), 202 states have internal predecessors, (277), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 228 states. [2022-04-15 01:04:26,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:26,091 INFO L93 Difference]: Finished difference Result 228 states and 308 transitions. [2022-04-15 01:04:26,091 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 308 transitions. [2022-04-15 01:04:26,092 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:04:26,092 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:04:26,092 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:04:26,092 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:04:26,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 207 states, 202 states have (on average 1.3712871287128714) internal successors, (277), 202 states have internal predecessors, (277), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:26,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 281 transitions. [2022-04-15 01:04:26,094 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 281 transitions. Word has length 30 [2022-04-15 01:04:26,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:04:26,095 INFO L478 AbstractCegarLoop]: Abstraction has 207 states and 281 transitions. [2022-04-15 01:04:26,095 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:26,095 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 281 transitions. [2022-04-15 01:04:26,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-15 01:04:26,095 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:04:26,095 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:04:26,120 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2022-04-15 01:04:26,311 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:04:26,311 INFO L403 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:04:26,311 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:04:26,312 INFO L85 PathProgramCache]: Analyzing trace with hash 1024958048, now seen corresponding path program 5 times [2022-04-15 01:04:26,312 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:04:26,312 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [678042262] [2022-04-15 01:04:26,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:04:26,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:04:26,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:26,655 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:04:26,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:26,664 INFO L290 TraceCheckUtils]: 0: Hoare triple {14862#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14846#true} is VALID [2022-04-15 01:04:26,664 INFO L290 TraceCheckUtils]: 1: Hoare triple {14846#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-15 01:04:26,664 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14846#true} {14846#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-15 01:04:26,664 INFO L272 TraceCheckUtils]: 0: Hoare triple {14846#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14862#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:04:26,665 INFO L290 TraceCheckUtils]: 1: Hoare triple {14862#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14846#true} is VALID [2022-04-15 01:04:26,665 INFO L290 TraceCheckUtils]: 2: Hoare triple {14846#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-15 01:04:26,665 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14846#true} {14846#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-15 01:04:26,665 INFO L272 TraceCheckUtils]: 4: Hoare triple {14846#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-15 01:04:26,665 INFO L290 TraceCheckUtils]: 5: Hoare triple {14846#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:04:26,666 INFO L290 TraceCheckUtils]: 6: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14852#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0) 1) 4294967296) 4294967296) 4294967294)))} is VALID [2022-04-15 01:04:26,670 INFO L290 TraceCheckUtils]: 7: Hoare triple {14852#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0) 1) 4294967296) 4294967296) 4294967294)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14853#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 2 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296)) 4294967293)))} is VALID [2022-04-15 01:04:26,670 INFO L290 TraceCheckUtils]: 8: Hoare triple {14853#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 2 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296)) 4294967293)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 01:04:26,671 INFO L290 TraceCheckUtils]: 9: Hoare triple {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {14855#(and (<= (+ main_~x~0 3) main_~n~0) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) main_~x~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 01:04:26,672 INFO L290 TraceCheckUtils]: 10: Hoare triple {14855#(and (<= (+ main_~x~0 3) main_~n~0) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) main_~x~0) (<= main_~n~0 (+ main_~x~0 3)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {14855#(and (<= (+ main_~x~0 3) main_~n~0) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) main_~x~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 01:04:26,673 INFO L290 TraceCheckUtils]: 11: Hoare triple {14855#(and (<= (+ main_~x~0 3) main_~n~0) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) main_~x~0) (<= main_~n~0 (+ main_~x~0 3)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14856#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 01:04:26,675 INFO L290 TraceCheckUtils]: 12: Hoare triple {14856#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14857#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 01:04:26,676 INFO L290 TraceCheckUtils]: 13: Hoare triple {14857#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} is VALID [2022-04-15 01:04:26,677 INFO L290 TraceCheckUtils]: 14: Hoare triple {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} is VALID [2022-04-15 01:04:26,677 INFO L290 TraceCheckUtils]: 15: Hoare triple {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} is VALID [2022-04-15 01:04:26,677 INFO L290 TraceCheckUtils]: 16: Hoare triple {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} is VALID [2022-04-15 01:04:26,678 INFO L290 TraceCheckUtils]: 17: Hoare triple {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} is VALID [2022-04-15 01:04:26,678 INFO L290 TraceCheckUtils]: 18: Hoare triple {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} is VALID [2022-04-15 01:04:26,680 INFO L290 TraceCheckUtils]: 19: Hoare triple {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {14857#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 01:04:26,682 INFO L290 TraceCheckUtils]: 20: Hoare triple {14857#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {14856#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 01:04:26,684 INFO L290 TraceCheckUtils]: 21: Hoare triple {14856#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {14855#(and (<= (+ main_~x~0 3) main_~n~0) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) main_~x~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 01:04:26,684 INFO L290 TraceCheckUtils]: 22: Hoare triple {14855#(and (<= (+ main_~x~0 3) main_~n~0) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) main_~x~0) (<= main_~n~0 (+ main_~x~0 3)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {14855#(and (<= (+ main_~x~0 3) main_~n~0) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) main_~x~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 01:04:26,685 INFO L290 TraceCheckUtils]: 23: Hoare triple {14855#(and (<= (+ main_~x~0 3) main_~n~0) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) main_~x~0) (<= main_~n~0 (+ main_~x~0 3)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {14856#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 01:04:26,686 INFO L290 TraceCheckUtils]: 24: Hoare triple {14856#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {14857#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 01:04:26,687 INFO L290 TraceCheckUtils]: 25: Hoare triple {14857#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:04:26,688 INFO L290 TraceCheckUtils]: 26: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:04:26,689 INFO L272 TraceCheckUtils]: 27: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {14860#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 01:04:26,689 INFO L290 TraceCheckUtils]: 28: Hoare triple {14860#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14861#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 01:04:26,689 INFO L290 TraceCheckUtils]: 29: Hoare triple {14861#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {14847#false} is VALID [2022-04-15 01:04:26,689 INFO L290 TraceCheckUtils]: 30: Hoare triple {14847#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14847#false} is VALID [2022-04-15 01:04:26,690 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-15 01:04:26,690 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:04:26,690 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [678042262] [2022-04-15 01:04:26,690 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [678042262] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:04:26,690 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [516884009] [2022-04-15 01:04:26,690 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-15 01:04:26,690 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:04:26,690 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:04:26,692 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:04:26,692 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-15 01:04:26,757 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2022-04-15 01:04:26,757 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:04:26,758 INFO L263 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 29 conjunts are in the unsatisfiable core [2022-04-15 01:04:26,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:26,766 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:04:26,987 INFO L272 TraceCheckUtils]: 0: Hoare triple {14846#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-15 01:04:26,988 INFO L290 TraceCheckUtils]: 1: Hoare triple {14846#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14846#true} is VALID [2022-04-15 01:04:26,988 INFO L290 TraceCheckUtils]: 2: Hoare triple {14846#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-15 01:04:26,988 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14846#true} {14846#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-15 01:04:26,988 INFO L272 TraceCheckUtils]: 4: Hoare triple {14846#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-15 01:04:26,988 INFO L290 TraceCheckUtils]: 5: Hoare triple {14846#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:04:26,989 INFO L290 TraceCheckUtils]: 6: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14884#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-15 01:04:26,989 INFO L290 TraceCheckUtils]: 7: Hoare triple {14884#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14888#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} is VALID [2022-04-15 01:04:26,990 INFO L290 TraceCheckUtils]: 8: Hoare triple {14888#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 01:04:26,990 INFO L290 TraceCheckUtils]: 9: Hoare triple {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 01:04:26,990 INFO L290 TraceCheckUtils]: 10: Hoare triple {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 01:04:26,991 INFO L290 TraceCheckUtils]: 11: Hoare triple {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14888#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} is VALID [2022-04-15 01:04:26,991 INFO L290 TraceCheckUtils]: 12: Hoare triple {14888#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14884#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-15 01:04:26,992 INFO L290 TraceCheckUtils]: 13: Hoare triple {14884#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:04:26,992 INFO L290 TraceCheckUtils]: 14: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:04:26,993 INFO L290 TraceCheckUtils]: 15: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:04:26,993 INFO L290 TraceCheckUtils]: 16: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:04:26,993 INFO L290 TraceCheckUtils]: 17: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:04:26,994 INFO L290 TraceCheckUtils]: 18: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:04:26,994 INFO L290 TraceCheckUtils]: 19: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {14884#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-15 01:04:26,995 INFO L290 TraceCheckUtils]: 20: Hoare triple {14884#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {14888#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} is VALID [2022-04-15 01:04:26,995 INFO L290 TraceCheckUtils]: 21: Hoare triple {14888#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 01:04:26,996 INFO L290 TraceCheckUtils]: 22: Hoare triple {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 01:04:26,996 INFO L290 TraceCheckUtils]: 23: Hoare triple {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {14888#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} is VALID [2022-04-15 01:04:26,997 INFO L290 TraceCheckUtils]: 24: Hoare triple {14888#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {14884#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-15 01:04:26,997 INFO L290 TraceCheckUtils]: 25: Hoare triple {14884#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:04:26,997 INFO L290 TraceCheckUtils]: 26: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:04:26,998 INFO L272 TraceCheckUtils]: 27: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {14949#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:04:26,998 INFO L290 TraceCheckUtils]: 28: Hoare triple {14949#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14953#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:04:26,999 INFO L290 TraceCheckUtils]: 29: Hoare triple {14953#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {14847#false} is VALID [2022-04-15 01:04:26,999 INFO L290 TraceCheckUtils]: 30: Hoare triple {14847#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14847#false} is VALID [2022-04-15 01:04:26,999 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-15 01:04:26,999 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:04:27,380 INFO L290 TraceCheckUtils]: 30: Hoare triple {14847#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14847#false} is VALID [2022-04-15 01:04:27,381 INFO L290 TraceCheckUtils]: 29: Hoare triple {14953#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {14847#false} is VALID [2022-04-15 01:04:27,381 INFO L290 TraceCheckUtils]: 28: Hoare triple {14949#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14953#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:04:27,382 INFO L272 TraceCheckUtils]: 27: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {14949#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:04:27,382 INFO L290 TraceCheckUtils]: 26: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:04:27,383 INFO L290 TraceCheckUtils]: 25: Hoare triple {14975#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:04:27,384 INFO L290 TraceCheckUtils]: 24: Hoare triple {14979#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {14975#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-15 01:04:27,385 INFO L290 TraceCheckUtils]: 23: Hoare triple {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {14979#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-15 01:04:27,385 INFO L290 TraceCheckUtils]: 22: Hoare triple {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} is VALID [2022-04-15 01:04:27,386 INFO L290 TraceCheckUtils]: 21: Hoare triple {14979#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} is VALID [2022-04-15 01:04:27,387 INFO L290 TraceCheckUtils]: 20: Hoare triple {14975#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {14979#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-15 01:04:27,388 INFO L290 TraceCheckUtils]: 19: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {14975#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-15 01:04:27,388 INFO L290 TraceCheckUtils]: 18: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:04:27,389 INFO L290 TraceCheckUtils]: 17: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:04:27,389 INFO L290 TraceCheckUtils]: 16: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:04:27,390 INFO L290 TraceCheckUtils]: 15: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:04:27,390 INFO L290 TraceCheckUtils]: 14: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:04:27,392 INFO L290 TraceCheckUtils]: 13: Hoare triple {14975#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:04:27,393 INFO L290 TraceCheckUtils]: 12: Hoare triple {14979#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14975#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-15 01:04:27,394 INFO L290 TraceCheckUtils]: 11: Hoare triple {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14979#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-15 01:04:27,394 INFO L290 TraceCheckUtils]: 10: Hoare triple {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} is VALID [2022-04-15 01:04:27,395 INFO L290 TraceCheckUtils]: 9: Hoare triple {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} is VALID [2022-04-15 01:04:27,395 INFO L290 TraceCheckUtils]: 8: Hoare triple {14979#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} is VALID [2022-04-15 01:04:27,396 INFO L290 TraceCheckUtils]: 7: Hoare triple {14975#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14979#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-15 01:04:27,397 INFO L290 TraceCheckUtils]: 6: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14975#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-15 01:04:27,398 INFO L290 TraceCheckUtils]: 5: Hoare triple {14846#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:04:27,398 INFO L272 TraceCheckUtils]: 4: Hoare triple {14846#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-15 01:04:27,398 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14846#true} {14846#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-15 01:04:27,398 INFO L290 TraceCheckUtils]: 2: Hoare triple {14846#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-15 01:04:27,398 INFO L290 TraceCheckUtils]: 1: Hoare triple {14846#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14846#true} is VALID [2022-04-15 01:04:27,398 INFO L272 TraceCheckUtils]: 0: Hoare triple {14846#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-15 01:04:27,398 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-15 01:04:27,399 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [516884009] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:04:27,399 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:04:27,399 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 8, 8] total 21 [2022-04-15 01:04:27,399 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1233004846] [2022-04-15 01:04:27,399 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:04:27,399 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 3.142857142857143) internal successors, (66), 18 states have internal predecessors, (66), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-15 01:04:27,400 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:04:27,400 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 21 states have (on average 3.142857142857143) internal successors, (66), 18 states have internal predecessors, (66), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:27,472 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 73 edges. 73 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:04:27,472 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-15 01:04:27,472 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:04:27,473 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-15 01:04:27,473 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=361, Unknown=0, NotChecked=0, Total=420 [2022-04-15 01:04:27,473 INFO L87 Difference]: Start difference. First operand 207 states and 281 transitions. Second operand has 21 states, 21 states have (on average 3.142857142857143) internal successors, (66), 18 states have internal predecessors, (66), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:28,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:28,970 INFO L93 Difference]: Finished difference Result 217 states and 291 transitions. [2022-04-15 01:04:28,970 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-15 01:04:28,970 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 3.142857142857143) internal successors, (66), 18 states have internal predecessors, (66), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-15 01:04:28,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:04:28,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 3.142857142857143) internal successors, (66), 18 states have internal predecessors, (66), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:28,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 46 transitions. [2022-04-15 01:04:28,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 3.142857142857143) internal successors, (66), 18 states have internal predecessors, (66), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:28,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 46 transitions. [2022-04-15 01:04:28,976 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 46 transitions. [2022-04-15 01:04:29,099 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:04:29,102 INFO L225 Difference]: With dead ends: 217 [2022-04-15 01:04:29,102 INFO L226 Difference]: Without dead ends: 208 [2022-04-15 01:04:29,102 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 50 SyntacticMatches, 12 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=118, Invalid=752, Unknown=0, NotChecked=0, Total=870 [2022-04-15 01:04:29,103 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 25 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 307 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 330 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 307 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-15 01:04:29,103 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [25 Valid, 76 Invalid, 330 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 307 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-15 01:04:29,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states. [2022-04-15 01:04:29,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 208. [2022-04-15 01:04:29,540 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:04:29,541 INFO L82 GeneralOperation]: Start isEquivalent. First operand 208 states. Second operand has 208 states, 203 states have (on average 1.3694581280788178) internal successors, (278), 203 states have internal predecessors, (278), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:29,541 INFO L74 IsIncluded]: Start isIncluded. First operand 208 states. Second operand has 208 states, 203 states have (on average 1.3694581280788178) internal successors, (278), 203 states have internal predecessors, (278), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:29,541 INFO L87 Difference]: Start difference. First operand 208 states. Second operand has 208 states, 203 states have (on average 1.3694581280788178) internal successors, (278), 203 states have internal predecessors, (278), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:29,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:29,543 INFO L93 Difference]: Finished difference Result 208 states and 282 transitions. [2022-04-15 01:04:29,543 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 282 transitions. [2022-04-15 01:04:29,544 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:04:29,544 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:04:29,544 INFO L74 IsIncluded]: Start isIncluded. First operand has 208 states, 203 states have (on average 1.3694581280788178) internal successors, (278), 203 states have internal predecessors, (278), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 208 states. [2022-04-15 01:04:29,544 INFO L87 Difference]: Start difference. First operand has 208 states, 203 states have (on average 1.3694581280788178) internal successors, (278), 203 states have internal predecessors, (278), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 208 states. [2022-04-15 01:04:29,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:29,546 INFO L93 Difference]: Finished difference Result 208 states and 282 transitions. [2022-04-15 01:04:29,546 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 282 transitions. [2022-04-15 01:04:29,547 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:04:29,547 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:04:29,547 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:04:29,547 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:04:29,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 208 states, 203 states have (on average 1.3694581280788178) internal successors, (278), 203 states have internal predecessors, (278), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:29,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 282 transitions. [2022-04-15 01:04:29,549 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 282 transitions. Word has length 31 [2022-04-15 01:04:29,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:04:29,549 INFO L478 AbstractCegarLoop]: Abstraction has 208 states and 282 transitions. [2022-04-15 01:04:29,550 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 3.142857142857143) internal successors, (66), 18 states have internal predecessors, (66), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:29,550 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 282 transitions. [2022-04-15 01:04:29,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-15 01:04:29,550 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:04:29,550 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:04:29,568 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2022-04-15 01:04:29,763 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:04:29,763 INFO L403 AbstractCegarLoop]: === Iteration 21 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:04:29,764 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:04:29,764 INFO L85 PathProgramCache]: Analyzing trace with hash 1970498543, now seen corresponding path program 4 times [2022-04-15 01:04:29,764 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:04:29,764 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [397867029] [2022-04-15 01:04:29,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:04:29,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:04:29,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:29,909 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:04:29,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:29,913 INFO L290 TraceCheckUtils]: 0: Hoare triple {16120#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16104#true} is VALID [2022-04-15 01:04:29,914 INFO L290 TraceCheckUtils]: 1: Hoare triple {16104#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-15 01:04:29,914 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16104#true} {16104#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-15 01:04:29,914 INFO L272 TraceCheckUtils]: 0: Hoare triple {16104#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16120#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:04:29,914 INFO L290 TraceCheckUtils]: 1: Hoare triple {16120#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16104#true} is VALID [2022-04-15 01:04:29,914 INFO L290 TraceCheckUtils]: 2: Hoare triple {16104#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-15 01:04:29,914 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16104#true} {16104#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-15 01:04:29,914 INFO L272 TraceCheckUtils]: 4: Hoare triple {16104#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-15 01:04:29,915 INFO L290 TraceCheckUtils]: 5: Hoare triple {16104#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16109#(= main_~y~0 0)} is VALID [2022-04-15 01:04:29,915 INFO L290 TraceCheckUtils]: 6: Hoare triple {16109#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16110#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:04:29,916 INFO L290 TraceCheckUtils]: 7: Hoare triple {16110#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16111#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:04:29,917 INFO L290 TraceCheckUtils]: 8: Hoare triple {16111#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16112#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:04:29,917 INFO L290 TraceCheckUtils]: 9: Hoare triple {16112#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16113#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:04:29,918 INFO L290 TraceCheckUtils]: 10: Hoare triple {16113#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16114#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:04:29,918 INFO L290 TraceCheckUtils]: 11: Hoare triple {16114#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16114#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:04:29,918 INFO L290 TraceCheckUtils]: 12: Hoare triple {16114#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {16115#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:04:29,919 INFO L290 TraceCheckUtils]: 13: Hoare triple {16115#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16116#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:04:29,919 INFO L290 TraceCheckUtils]: 14: Hoare triple {16116#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16117#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:04:29,920 INFO L290 TraceCheckUtils]: 15: Hoare triple {16117#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16118#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:04:29,920 INFO L290 TraceCheckUtils]: 16: Hoare triple {16118#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16119#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-15 01:04:29,921 INFO L290 TraceCheckUtils]: 17: Hoare triple {16119#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-15 01:04:29,921 INFO L290 TraceCheckUtils]: 18: Hoare triple {16105#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16105#false} is VALID [2022-04-15 01:04:29,921 INFO L290 TraceCheckUtils]: 19: Hoare triple {16105#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16105#false} is VALID [2022-04-15 01:04:29,921 INFO L290 TraceCheckUtils]: 20: Hoare triple {16105#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16105#false} is VALID [2022-04-15 01:04:29,921 INFO L290 TraceCheckUtils]: 21: Hoare triple {16105#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16105#false} is VALID [2022-04-15 01:04:29,921 INFO L290 TraceCheckUtils]: 22: Hoare triple {16105#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16105#false} is VALID [2022-04-15 01:04:29,921 INFO L290 TraceCheckUtils]: 23: Hoare triple {16105#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-15 01:04:29,921 INFO L290 TraceCheckUtils]: 24: Hoare triple {16105#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {16105#false} is VALID [2022-04-15 01:04:29,921 INFO L290 TraceCheckUtils]: 25: Hoare triple {16105#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-15 01:04:29,921 INFO L290 TraceCheckUtils]: 26: Hoare triple {16105#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-15 01:04:29,921 INFO L272 TraceCheckUtils]: 27: Hoare triple {16105#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {16105#false} is VALID [2022-04-15 01:04:29,921 INFO L290 TraceCheckUtils]: 28: Hoare triple {16105#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16105#false} is VALID [2022-04-15 01:04:29,921 INFO L290 TraceCheckUtils]: 29: Hoare triple {16105#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-15 01:04:29,922 INFO L290 TraceCheckUtils]: 30: Hoare triple {16105#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-15 01:04:29,922 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-15 01:04:29,922 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:04:29,922 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [397867029] [2022-04-15 01:04:29,922 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [397867029] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:04:29,922 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [939325025] [2022-04-15 01:04:29,922 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 01:04:29,922 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:04:29,922 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:04:29,923 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:04:29,923 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-15 01:04:29,957 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 01:04:29,958 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:04:29,958 INFO L263 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 22 conjunts are in the unsatisfiable core [2022-04-15 01:04:29,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:29,966 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:04:30,117 INFO L272 TraceCheckUtils]: 0: Hoare triple {16104#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-15 01:04:30,117 INFO L290 TraceCheckUtils]: 1: Hoare triple {16104#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16104#true} is VALID [2022-04-15 01:04:30,117 INFO L290 TraceCheckUtils]: 2: Hoare triple {16104#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-15 01:04:30,117 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16104#true} {16104#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-15 01:04:30,117 INFO L272 TraceCheckUtils]: 4: Hoare triple {16104#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-15 01:04:30,117 INFO L290 TraceCheckUtils]: 5: Hoare triple {16104#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16104#true} is VALID [2022-04-15 01:04:30,117 INFO L290 TraceCheckUtils]: 6: Hoare triple {16104#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16104#true} is VALID [2022-04-15 01:04:30,118 INFO L290 TraceCheckUtils]: 7: Hoare triple {16104#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16104#true} is VALID [2022-04-15 01:04:30,118 INFO L290 TraceCheckUtils]: 8: Hoare triple {16104#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16148#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:04:30,119 INFO L290 TraceCheckUtils]: 9: Hoare triple {16148#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16152#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:04:30,119 INFO L290 TraceCheckUtils]: 10: Hoare triple {16152#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:04:30,120 INFO L290 TraceCheckUtils]: 11: Hoare triple {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:04:30,120 INFO L290 TraceCheckUtils]: 12: Hoare triple {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:04:30,121 INFO L290 TraceCheckUtils]: 13: Hoare triple {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16152#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:04:30,121 INFO L290 TraceCheckUtils]: 14: Hoare triple {16152#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16148#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:04:30,122 INFO L290 TraceCheckUtils]: 15: Hoare triple {16148#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16172#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:30,122 INFO L290 TraceCheckUtils]: 16: Hoare triple {16172#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:30,123 INFO L290 TraceCheckUtils]: 17: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:30,123 INFO L290 TraceCheckUtils]: 18: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:30,123 INFO L290 TraceCheckUtils]: 19: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:30,124 INFO L290 TraceCheckUtils]: 20: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:30,124 INFO L290 TraceCheckUtils]: 21: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:30,124 INFO L290 TraceCheckUtils]: 22: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:30,125 INFO L290 TraceCheckUtils]: 23: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:30,126 INFO L290 TraceCheckUtils]: 24: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {16172#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:30,126 INFO L290 TraceCheckUtils]: 25: Hoare triple {16172#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-15 01:04:30,126 INFO L290 TraceCheckUtils]: 26: Hoare triple {16105#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-15 01:04:30,126 INFO L272 TraceCheckUtils]: 27: Hoare triple {16105#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {16105#false} is VALID [2022-04-15 01:04:30,126 INFO L290 TraceCheckUtils]: 28: Hoare triple {16105#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16105#false} is VALID [2022-04-15 01:04:30,127 INFO L290 TraceCheckUtils]: 29: Hoare triple {16105#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-15 01:04:30,127 INFO L290 TraceCheckUtils]: 30: Hoare triple {16105#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-15 01:04:30,127 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-15 01:04:30,127 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:04:30,221 INFO L290 TraceCheckUtils]: 30: Hoare triple {16105#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-15 01:04:30,221 INFO L290 TraceCheckUtils]: 29: Hoare triple {16105#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-15 01:04:30,221 INFO L290 TraceCheckUtils]: 28: Hoare triple {16105#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16105#false} is VALID [2022-04-15 01:04:30,221 INFO L272 TraceCheckUtils]: 27: Hoare triple {16105#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {16105#false} is VALID [2022-04-15 01:04:30,221 INFO L290 TraceCheckUtils]: 26: Hoare triple {16105#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-15 01:04:30,222 INFO L290 TraceCheckUtils]: 25: Hoare triple {16172#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-15 01:04:30,223 INFO L290 TraceCheckUtils]: 24: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {16172#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:30,223 INFO L290 TraceCheckUtils]: 23: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:30,224 INFO L290 TraceCheckUtils]: 22: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:30,224 INFO L290 TraceCheckUtils]: 21: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:30,225 INFO L290 TraceCheckUtils]: 20: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:30,225 INFO L290 TraceCheckUtils]: 19: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:30,225 INFO L290 TraceCheckUtils]: 18: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:30,226 INFO L290 TraceCheckUtils]: 17: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:30,226 INFO L290 TraceCheckUtils]: 16: Hoare triple {16172#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:30,227 INFO L290 TraceCheckUtils]: 15: Hoare triple {16148#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16172#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:30,228 INFO L290 TraceCheckUtils]: 14: Hoare triple {16152#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16148#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:04:30,228 INFO L290 TraceCheckUtils]: 13: Hoare triple {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16152#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:04:30,229 INFO L290 TraceCheckUtils]: 12: Hoare triple {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:04:30,229 INFO L290 TraceCheckUtils]: 11: Hoare triple {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:04:30,230 INFO L290 TraceCheckUtils]: 10: Hoare triple {16152#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:04:30,231 INFO L290 TraceCheckUtils]: 9: Hoare triple {16148#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16152#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:04:30,231 INFO L290 TraceCheckUtils]: 8: Hoare triple {16104#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16148#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:04:30,231 INFO L290 TraceCheckUtils]: 7: Hoare triple {16104#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16104#true} is VALID [2022-04-15 01:04:30,231 INFO L290 TraceCheckUtils]: 6: Hoare triple {16104#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16104#true} is VALID [2022-04-15 01:04:30,231 INFO L290 TraceCheckUtils]: 5: Hoare triple {16104#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16104#true} is VALID [2022-04-15 01:04:30,232 INFO L272 TraceCheckUtils]: 4: Hoare triple {16104#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-15 01:04:30,232 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16104#true} {16104#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-15 01:04:30,232 INFO L290 TraceCheckUtils]: 2: Hoare triple {16104#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-15 01:04:30,232 INFO L290 TraceCheckUtils]: 1: Hoare triple {16104#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16104#true} is VALID [2022-04-15 01:04:30,232 INFO L272 TraceCheckUtils]: 0: Hoare triple {16104#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-15 01:04:30,232 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-15 01:04:30,232 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [939325025] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:04:30,232 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:04:30,232 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 7, 7] total 19 [2022-04-15 01:04:30,232 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [302647213] [2022-04-15 01:04:30,232 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:04:30,233 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.1052631578947367) internal successors, (40), 18 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-15 01:04:30,233 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:04:30,233 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 2.1052631578947367) internal successors, (40), 18 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:30,265 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:04:30,266 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-15 01:04:30,266 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:04:30,266 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-15 01:04:30,266 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=303, Unknown=0, NotChecked=0, Total=342 [2022-04-15 01:04:30,266 INFO L87 Difference]: Start difference. First operand 208 states and 282 transitions. Second operand has 19 states, 19 states have (on average 2.1052631578947367) internal successors, (40), 18 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:38,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:38,018 INFO L93 Difference]: Finished difference Result 376 states and 513 transitions. [2022-04-15 01:04:38,018 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2022-04-15 01:04:38,018 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.1052631578947367) internal successors, (40), 18 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-15 01:04:38,018 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:04:38,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.1052631578947367) internal successors, (40), 18 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:38,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 247 transitions. [2022-04-15 01:04:38,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.1052631578947367) internal successors, (40), 18 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:38,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 247 transitions. [2022-04-15 01:04:38,023 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 66 states and 247 transitions. [2022-04-15 01:04:38,347 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 247 edges. 247 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:04:38,353 INFO L225 Difference]: With dead ends: 376 [2022-04-15 01:04:38,353 INFO L226 Difference]: Without dead ends: 357 [2022-04-15 01:04:38,355 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 67 SyntacticMatches, 0 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1959 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=743, Invalid=5899, Unknown=0, NotChecked=0, Total=6642 [2022-04-15 01:04:38,355 INFO L913 BasicCegarLoop]: 62 mSDtfsCounter, 203 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 1599 mSolverCounterSat, 248 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 203 SdHoareTripleChecker+Valid, 144 SdHoareTripleChecker+Invalid, 1847 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 248 IncrementalHoareTripleChecker+Valid, 1599 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.4s IncrementalHoareTripleChecker+Time [2022-04-15 01:04:38,355 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [203 Valid, 144 Invalid, 1847 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [248 Valid, 1599 Invalid, 0 Unknown, 0 Unchecked, 2.4s Time] [2022-04-15 01:04:38,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2022-04-15 01:04:38,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 194. [2022-04-15 01:04:38,809 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:04:38,810 INFO L82 GeneralOperation]: Start isEquivalent. First operand 357 states. Second operand has 194 states, 189 states have (on average 1.380952380952381) internal successors, (261), 189 states have internal predecessors, (261), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:38,810 INFO L74 IsIncluded]: Start isIncluded. First operand 357 states. Second operand has 194 states, 189 states have (on average 1.380952380952381) internal successors, (261), 189 states have internal predecessors, (261), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:38,810 INFO L87 Difference]: Start difference. First operand 357 states. Second operand has 194 states, 189 states have (on average 1.380952380952381) internal successors, (261), 189 states have internal predecessors, (261), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:38,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:38,815 INFO L93 Difference]: Finished difference Result 357 states and 489 transitions. [2022-04-15 01:04:38,815 INFO L276 IsEmpty]: Start isEmpty. Operand 357 states and 489 transitions. [2022-04-15 01:04:38,815 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:04:38,815 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:04:38,816 INFO L74 IsIncluded]: Start isIncluded. First operand has 194 states, 189 states have (on average 1.380952380952381) internal successors, (261), 189 states have internal predecessors, (261), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 357 states. [2022-04-15 01:04:38,816 INFO L87 Difference]: Start difference. First operand has 194 states, 189 states have (on average 1.380952380952381) internal successors, (261), 189 states have internal predecessors, (261), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 357 states. [2022-04-15 01:04:38,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:38,820 INFO L93 Difference]: Finished difference Result 357 states and 489 transitions. [2022-04-15 01:04:38,820 INFO L276 IsEmpty]: Start isEmpty. Operand 357 states and 489 transitions. [2022-04-15 01:04:38,821 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:04:38,821 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:04:38,821 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:04:38,821 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:04:38,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 194 states, 189 states have (on average 1.380952380952381) internal successors, (261), 189 states have internal predecessors, (261), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:38,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 265 transitions. [2022-04-15 01:04:38,823 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 265 transitions. Word has length 31 [2022-04-15 01:04:38,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:04:38,824 INFO L478 AbstractCegarLoop]: Abstraction has 194 states and 265 transitions. [2022-04-15 01:04:38,824 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 2.1052631578947367) internal successors, (40), 18 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:38,824 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 265 transitions. [2022-04-15 01:04:38,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-15 01:04:38,824 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:04:38,824 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:04:38,840 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-15 01:04:39,039 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:04:39,039 INFO L403 AbstractCegarLoop]: === Iteration 22 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:04:39,040 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:04:39,040 INFO L85 PathProgramCache]: Analyzing trace with hash 831347557, now seen corresponding path program 5 times [2022-04-15 01:04:39,040 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:04:39,040 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [621039866] [2022-04-15 01:04:39,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:04:39,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:04:39,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:39,244 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:04:39,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:39,247 INFO L290 TraceCheckUtils]: 0: Hoare triple {17977#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17959#true} is VALID [2022-04-15 01:04:39,247 INFO L290 TraceCheckUtils]: 1: Hoare triple {17959#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-15 01:04:39,247 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {17959#true} {17959#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-15 01:04:39,248 INFO L272 TraceCheckUtils]: 0: Hoare triple {17959#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17977#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:04:39,248 INFO L290 TraceCheckUtils]: 1: Hoare triple {17977#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17959#true} is VALID [2022-04-15 01:04:39,248 INFO L290 TraceCheckUtils]: 2: Hoare triple {17959#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-15 01:04:39,248 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17959#true} {17959#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-15 01:04:39,248 INFO L272 TraceCheckUtils]: 4: Hoare triple {17959#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-15 01:04:39,248 INFO L290 TraceCheckUtils]: 5: Hoare triple {17959#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {17964#(= main_~y~0 0)} is VALID [2022-04-15 01:04:39,249 INFO L290 TraceCheckUtils]: 6: Hoare triple {17964#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17965#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:04:39,249 INFO L290 TraceCheckUtils]: 7: Hoare triple {17965#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17966#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:04:39,250 INFO L290 TraceCheckUtils]: 8: Hoare triple {17966#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17967#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:04:39,251 INFO L290 TraceCheckUtils]: 9: Hoare triple {17967#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17968#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:04:39,251 INFO L290 TraceCheckUtils]: 10: Hoare triple {17968#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17969#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:04:39,251 INFO L290 TraceCheckUtils]: 11: Hoare triple {17969#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {17969#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:04:39,252 INFO L290 TraceCheckUtils]: 12: Hoare triple {17969#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {17970#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:04:39,252 INFO L290 TraceCheckUtils]: 13: Hoare triple {17970#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17971#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:04:39,253 INFO L290 TraceCheckUtils]: 14: Hoare triple {17971#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17972#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:04:39,253 INFO L290 TraceCheckUtils]: 15: Hoare triple {17972#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17973#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:04:39,254 INFO L290 TraceCheckUtils]: 16: Hoare triple {17973#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17974#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 01:04:39,254 INFO L290 TraceCheckUtils]: 17: Hoare triple {17974#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17975#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 01:04:39,255 INFO L290 TraceCheckUtils]: 18: Hoare triple {17975#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {17975#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 01:04:39,255 INFO L290 TraceCheckUtils]: 19: Hoare triple {17975#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17974#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 01:04:39,256 INFO L290 TraceCheckUtils]: 20: Hoare triple {17974#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17973#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:04:39,256 INFO L290 TraceCheckUtils]: 21: Hoare triple {17973#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17972#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:04:39,257 INFO L290 TraceCheckUtils]: 22: Hoare triple {17972#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17971#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:04:39,257 INFO L290 TraceCheckUtils]: 23: Hoare triple {17971#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17976#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 01:04:39,258 INFO L290 TraceCheckUtils]: 24: Hoare triple {17976#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {17976#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 01:04:39,258 INFO L290 TraceCheckUtils]: 25: Hoare triple {17976#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {17976#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 01:04:39,259 INFO L290 TraceCheckUtils]: 26: Hoare triple {17976#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-15 01:04:39,259 INFO L272 TraceCheckUtils]: 27: Hoare triple {17960#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {17960#false} is VALID [2022-04-15 01:04:39,259 INFO L290 TraceCheckUtils]: 28: Hoare triple {17960#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17960#false} is VALID [2022-04-15 01:04:39,259 INFO L290 TraceCheckUtils]: 29: Hoare triple {17960#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-15 01:04:39,259 INFO L290 TraceCheckUtils]: 30: Hoare triple {17960#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-15 01:04:39,259 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 01:04:39,259 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:04:39,259 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [621039866] [2022-04-15 01:04:39,259 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [621039866] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:04:39,260 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [329844460] [2022-04-15 01:04:39,260 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-15 01:04:39,260 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:04:39,260 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:04:39,261 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:04:39,262 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-15 01:04:39,325 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-15 01:04:39,325 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:04:39,326 INFO L263 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-15 01:04:39,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:39,332 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:04:39,512 INFO L272 TraceCheckUtils]: 0: Hoare triple {17959#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-15 01:04:39,513 INFO L290 TraceCheckUtils]: 1: Hoare triple {17959#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17959#true} is VALID [2022-04-15 01:04:39,513 INFO L290 TraceCheckUtils]: 2: Hoare triple {17959#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-15 01:04:39,513 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17959#true} {17959#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-15 01:04:39,513 INFO L272 TraceCheckUtils]: 4: Hoare triple {17959#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-15 01:04:39,513 INFO L290 TraceCheckUtils]: 5: Hoare triple {17959#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {17959#true} is VALID [2022-04-15 01:04:39,514 INFO L290 TraceCheckUtils]: 6: Hoare triple {17959#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17999#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:04:39,514 INFO L290 TraceCheckUtils]: 7: Hoare triple {17999#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18003#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:04:39,515 INFO L290 TraceCheckUtils]: 8: Hoare triple {18003#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18007#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:04:39,515 INFO L290 TraceCheckUtils]: 9: Hoare triple {18007#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18011#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 01:04:39,516 INFO L290 TraceCheckUtils]: 10: Hoare triple {18011#(< 0 (mod (+ main_~x~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-15 01:04:39,516 INFO L290 TraceCheckUtils]: 11: Hoare triple {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-15 01:04:39,517 INFO L290 TraceCheckUtils]: 12: Hoare triple {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-15 01:04:39,517 INFO L290 TraceCheckUtils]: 13: Hoare triple {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18011#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 01:04:39,518 INFO L290 TraceCheckUtils]: 14: Hoare triple {18011#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18007#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:04:39,518 INFO L290 TraceCheckUtils]: 15: Hoare triple {18007#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18003#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:04:39,519 INFO L290 TraceCheckUtils]: 16: Hoare triple {18003#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17999#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:04:39,520 INFO L290 TraceCheckUtils]: 17: Hoare triple {17999#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:39,520 INFO L290 TraceCheckUtils]: 18: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:39,520 INFO L290 TraceCheckUtils]: 19: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:39,520 INFO L290 TraceCheckUtils]: 20: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:39,521 INFO L290 TraceCheckUtils]: 21: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:39,521 INFO L290 TraceCheckUtils]: 22: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:39,521 INFO L290 TraceCheckUtils]: 23: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:39,521 INFO L290 TraceCheckUtils]: 24: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:39,522 INFO L290 TraceCheckUtils]: 25: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-15 01:04:39,522 INFO L290 TraceCheckUtils]: 26: Hoare triple {17960#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-15 01:04:39,522 INFO L272 TraceCheckUtils]: 27: Hoare triple {17960#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {17960#false} is VALID [2022-04-15 01:04:39,522 INFO L290 TraceCheckUtils]: 28: Hoare triple {17960#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17960#false} is VALID [2022-04-15 01:04:39,522 INFO L290 TraceCheckUtils]: 29: Hoare triple {17960#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-15 01:04:39,522 INFO L290 TraceCheckUtils]: 30: Hoare triple {17960#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-15 01:04:39,522 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-15 01:04:39,522 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:04:39,612 INFO L290 TraceCheckUtils]: 30: Hoare triple {17960#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-15 01:04:39,613 INFO L290 TraceCheckUtils]: 29: Hoare triple {17960#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-15 01:04:39,613 INFO L290 TraceCheckUtils]: 28: Hoare triple {17960#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17960#false} is VALID [2022-04-15 01:04:39,613 INFO L272 TraceCheckUtils]: 27: Hoare triple {17960#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {17960#false} is VALID [2022-04-15 01:04:39,613 INFO L290 TraceCheckUtils]: 26: Hoare triple {17960#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-15 01:04:39,613 INFO L290 TraceCheckUtils]: 25: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-15 01:04:39,613 INFO L290 TraceCheckUtils]: 24: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:39,614 INFO L290 TraceCheckUtils]: 23: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:39,614 INFO L290 TraceCheckUtils]: 22: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:39,614 INFO L290 TraceCheckUtils]: 21: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:39,614 INFO L290 TraceCheckUtils]: 20: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:39,615 INFO L290 TraceCheckUtils]: 19: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:39,615 INFO L290 TraceCheckUtils]: 18: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:39,616 INFO L290 TraceCheckUtils]: 17: Hoare triple {17999#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:04:39,616 INFO L290 TraceCheckUtils]: 16: Hoare triple {18003#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17999#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:04:39,617 INFO L290 TraceCheckUtils]: 15: Hoare triple {18007#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18003#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:04:39,618 INFO L290 TraceCheckUtils]: 14: Hoare triple {18011#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18007#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:04:39,618 INFO L290 TraceCheckUtils]: 13: Hoare triple {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18011#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 01:04:39,618 INFO L290 TraceCheckUtils]: 12: Hoare triple {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-15 01:04:39,630 INFO L290 TraceCheckUtils]: 11: Hoare triple {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-15 01:04:39,631 INFO L290 TraceCheckUtils]: 10: Hoare triple {18011#(< 0 (mod (+ main_~x~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-15 01:04:39,631 INFO L290 TraceCheckUtils]: 9: Hoare triple {18007#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18011#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-15 01:04:39,632 INFO L290 TraceCheckUtils]: 8: Hoare triple {18003#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18007#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-15 01:04:39,633 INFO L290 TraceCheckUtils]: 7: Hoare triple {17999#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18003#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:04:39,634 INFO L290 TraceCheckUtils]: 6: Hoare triple {17959#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17999#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:04:39,634 INFO L290 TraceCheckUtils]: 5: Hoare triple {17959#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {17959#true} is VALID [2022-04-15 01:04:39,634 INFO L272 TraceCheckUtils]: 4: Hoare triple {17959#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-15 01:04:39,634 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17959#true} {17959#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-15 01:04:39,634 INFO L290 TraceCheckUtils]: 2: Hoare triple {17959#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-15 01:04:39,634 INFO L290 TraceCheckUtils]: 1: Hoare triple {17959#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17959#true} is VALID [2022-04-15 01:04:39,634 INFO L272 TraceCheckUtils]: 0: Hoare triple {17959#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-15 01:04:39,634 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-15 01:04:39,634 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [329844460] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:04:39,634 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:04:39,634 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 8, 8] total 22 [2022-04-15 01:04:39,635 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [403388963] [2022-04-15 01:04:39,635 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:04:39,635 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-15 01:04:39,635 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:04:39,635 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:39,672 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:04:39,672 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-15 01:04:39,672 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:04:39,673 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-15 01:04:39,673 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=420, Unknown=0, NotChecked=0, Total=462 [2022-04-15 01:04:39,673 INFO L87 Difference]: Start difference. First operand 194 states and 265 transitions. Second operand has 22 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:55,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:55,645 INFO L93 Difference]: Finished difference Result 380 states and 532 transitions. [2022-04-15 01:04:55,645 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 116 states. [2022-04-15 01:04:55,645 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-15 01:04:55,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:04:55,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:55,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 293 transitions. [2022-04-15 01:04:55,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:55,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 293 transitions. [2022-04-15 01:04:55,650 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 116 states and 293 transitions. [2022-04-15 01:04:56,220 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 293 edges. 293 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:04:56,225 INFO L225 Difference]: With dead ends: 380 [2022-04-15 01:04:56,225 INFO L226 Difference]: Without dead ends: 365 [2022-04-15 01:04:56,229 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 62 SyntacticMatches, 0 SemanticMatches, 133 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6314 ImplicationChecksByTransitivity, 5.8s TimeCoverageRelationStatistics Valid=1697, Invalid=16393, Unknown=0, NotChecked=0, Total=18090 [2022-04-15 01:04:56,234 INFO L913 BasicCegarLoop]: 27 mSDtfsCounter, 267 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 1856 mSolverCounterSat, 491 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 267 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 2347 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 491 IncrementalHoareTripleChecker+Valid, 1856 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.4s IncrementalHoareTripleChecker+Time [2022-04-15 01:04:56,235 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [267 Valid, 119 Invalid, 2347 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [491 Valid, 1856 Invalid, 0 Unknown, 0 Unchecked, 4.4s Time] [2022-04-15 01:04:56,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 365 states. [2022-04-15 01:04:56,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 365 to 226. [2022-04-15 01:04:56,724 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:04:56,725 INFO L82 GeneralOperation]: Start isEquivalent. First operand 365 states. Second operand has 226 states, 221 states have (on average 1.3710407239819005) internal successors, (303), 221 states have internal predecessors, (303), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:56,725 INFO L74 IsIncluded]: Start isIncluded. First operand 365 states. Second operand has 226 states, 221 states have (on average 1.3710407239819005) internal successors, (303), 221 states have internal predecessors, (303), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:56,725 INFO L87 Difference]: Start difference. First operand 365 states. Second operand has 226 states, 221 states have (on average 1.3710407239819005) internal successors, (303), 221 states have internal predecessors, (303), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:56,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:56,730 INFO L93 Difference]: Finished difference Result 365 states and 475 transitions. [2022-04-15 01:04:56,730 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 475 transitions. [2022-04-15 01:04:56,730 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:04:56,730 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:04:56,730 INFO L74 IsIncluded]: Start isIncluded. First operand has 226 states, 221 states have (on average 1.3710407239819005) internal successors, (303), 221 states have internal predecessors, (303), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 365 states. [2022-04-15 01:04:56,731 INFO L87 Difference]: Start difference. First operand has 226 states, 221 states have (on average 1.3710407239819005) internal successors, (303), 221 states have internal predecessors, (303), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 365 states. [2022-04-15 01:04:56,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:04:56,735 INFO L93 Difference]: Finished difference Result 365 states and 475 transitions. [2022-04-15 01:04:56,735 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 475 transitions. [2022-04-15 01:04:56,735 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:04:56,736 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:04:56,736 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:04:56,736 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:04:56,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 226 states, 221 states have (on average 1.3710407239819005) internal successors, (303), 221 states have internal predecessors, (303), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:56,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 307 transitions. [2022-04-15 01:04:56,739 INFO L78 Accepts]: Start accepts. Automaton has 226 states and 307 transitions. Word has length 31 [2022-04-15 01:04:56,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:04:56,739 INFO L478 AbstractCegarLoop]: Abstraction has 226 states and 307 transitions. [2022-04-15 01:04:56,739 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:56,739 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 307 transitions. [2022-04-15 01:04:56,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-15 01:04:56,739 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:04:56,739 INFO L499 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:04:56,773 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2022-04-15 01:04:56,955 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:04:56,955 INFO L403 AbstractCegarLoop]: === Iteration 23 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:04:56,955 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:04:56,955 INFO L85 PathProgramCache]: Analyzing trace with hash 1964470703, now seen corresponding path program 5 times [2022-04-15 01:04:56,956 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:04:56,956 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2073276185] [2022-04-15 01:04:56,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:04:56,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:04:56,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:57,164 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:04:57,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:57,178 INFO L290 TraceCheckUtils]: 0: Hoare triple {19978#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19958#true} is VALID [2022-04-15 01:04:57,178 INFO L290 TraceCheckUtils]: 1: Hoare triple {19958#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-15 01:04:57,178 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19958#true} {19958#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-15 01:04:57,178 INFO L272 TraceCheckUtils]: 0: Hoare triple {19958#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19978#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:04:57,179 INFO L290 TraceCheckUtils]: 1: Hoare triple {19978#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19958#true} is VALID [2022-04-15 01:04:57,179 INFO L290 TraceCheckUtils]: 2: Hoare triple {19958#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-15 01:04:57,179 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19958#true} {19958#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-15 01:04:57,179 INFO L272 TraceCheckUtils]: 4: Hoare triple {19958#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-15 01:04:57,179 INFO L290 TraceCheckUtils]: 5: Hoare triple {19958#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {19963#(= main_~y~0 0)} is VALID [2022-04-15 01:04:57,179 INFO L290 TraceCheckUtils]: 6: Hoare triple {19963#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19964#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:04:57,180 INFO L290 TraceCheckUtils]: 7: Hoare triple {19964#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19965#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:04:57,181 INFO L290 TraceCheckUtils]: 8: Hoare triple {19965#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19966#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:04:57,181 INFO L290 TraceCheckUtils]: 9: Hoare triple {19966#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19967#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:04:57,182 INFO L290 TraceCheckUtils]: 10: Hoare triple {19967#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19968#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:04:57,182 INFO L290 TraceCheckUtils]: 11: Hoare triple {19968#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19969#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:04:57,183 INFO L290 TraceCheckUtils]: 12: Hoare triple {19969#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19970#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:04:57,183 INFO L290 TraceCheckUtils]: 13: Hoare triple {19970#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19971#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:04:57,184 INFO L290 TraceCheckUtils]: 14: Hoare triple {19971#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19972#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:04:57,184 INFO L290 TraceCheckUtils]: 15: Hoare triple {19972#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19973#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 01:04:57,185 INFO L290 TraceCheckUtils]: 16: Hoare triple {19973#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19974#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 01:04:57,185 INFO L290 TraceCheckUtils]: 17: Hoare triple {19974#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19975#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 01:04:57,185 INFO L290 TraceCheckUtils]: 18: Hoare triple {19975#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {19975#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 01:04:57,186 INFO L290 TraceCheckUtils]: 19: Hoare triple {19975#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {19976#(and (<= main_~z~0 12) (<= 12 main_~z~0))} is VALID [2022-04-15 01:04:57,186 INFO L290 TraceCheckUtils]: 20: Hoare triple {19976#(and (<= main_~z~0 12) (<= 12 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19977#(and (<= (div main_~z~0 4294967296) 0) (<= 11 main_~z~0))} is VALID [2022-04-15 01:04:57,187 INFO L290 TraceCheckUtils]: 21: Hoare triple {19977#(and (<= (div main_~z~0 4294967296) 0) (<= 11 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-15 01:04:57,187 INFO L290 TraceCheckUtils]: 22: Hoare triple {19959#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19959#false} is VALID [2022-04-15 01:04:57,187 INFO L290 TraceCheckUtils]: 23: Hoare triple {19959#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-15 01:04:57,187 INFO L290 TraceCheckUtils]: 24: Hoare triple {19959#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19959#false} is VALID [2022-04-15 01:04:57,187 INFO L290 TraceCheckUtils]: 25: Hoare triple {19959#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-15 01:04:57,187 INFO L290 TraceCheckUtils]: 26: Hoare triple {19959#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-15 01:04:57,187 INFO L272 TraceCheckUtils]: 27: Hoare triple {19959#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {19959#false} is VALID [2022-04-15 01:04:57,187 INFO L290 TraceCheckUtils]: 28: Hoare triple {19959#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19959#false} is VALID [2022-04-15 01:04:57,187 INFO L290 TraceCheckUtils]: 29: Hoare triple {19959#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-15 01:04:57,187 INFO L290 TraceCheckUtils]: 30: Hoare triple {19959#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-15 01:04:57,188 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 79 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-15 01:04:57,188 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:04:57,188 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2073276185] [2022-04-15 01:04:57,188 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2073276185] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:04:57,188 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1166322336] [2022-04-15 01:04:57,188 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-15 01:04:57,188 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:04:57,188 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:04:57,189 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:04:57,190 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-15 01:04:57,439 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2022-04-15 01:04:57,440 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:04:57,441 INFO L263 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 31 conjunts are in the unsatisfiable core [2022-04-15 01:04:57,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:04:57,448 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:04:57,677 INFO L272 TraceCheckUtils]: 0: Hoare triple {19958#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-15 01:04:57,677 INFO L290 TraceCheckUtils]: 1: Hoare triple {19958#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19958#true} is VALID [2022-04-15 01:04:57,677 INFO L290 TraceCheckUtils]: 2: Hoare triple {19958#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-15 01:04:57,677 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19958#true} {19958#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-15 01:04:57,678 INFO L272 TraceCheckUtils]: 4: Hoare triple {19958#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-15 01:04:57,678 INFO L290 TraceCheckUtils]: 5: Hoare triple {19958#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {19963#(= main_~y~0 0)} is VALID [2022-04-15 01:04:57,678 INFO L290 TraceCheckUtils]: 6: Hoare triple {19963#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19964#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:04:57,679 INFO L290 TraceCheckUtils]: 7: Hoare triple {19964#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19965#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:04:57,679 INFO L290 TraceCheckUtils]: 8: Hoare triple {19965#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19966#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:04:57,680 INFO L290 TraceCheckUtils]: 9: Hoare triple {19966#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19967#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:04:57,680 INFO L290 TraceCheckUtils]: 10: Hoare triple {19967#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19968#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:04:57,681 INFO L290 TraceCheckUtils]: 11: Hoare triple {19968#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19969#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:04:57,681 INFO L290 TraceCheckUtils]: 12: Hoare triple {19969#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19970#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:04:57,682 INFO L290 TraceCheckUtils]: 13: Hoare triple {19970#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19971#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:04:57,682 INFO L290 TraceCheckUtils]: 14: Hoare triple {19971#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19972#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:04:57,683 INFO L290 TraceCheckUtils]: 15: Hoare triple {19972#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19973#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 01:04:57,683 INFO L290 TraceCheckUtils]: 16: Hoare triple {19973#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19974#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 01:04:57,684 INFO L290 TraceCheckUtils]: 17: Hoare triple {19974#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19975#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 01:04:57,684 INFO L290 TraceCheckUtils]: 18: Hoare triple {19975#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {19975#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 01:04:57,684 INFO L290 TraceCheckUtils]: 19: Hoare triple {19975#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {19976#(and (<= main_~z~0 12) (<= 12 main_~z~0))} is VALID [2022-04-15 01:04:57,685 INFO L290 TraceCheckUtils]: 20: Hoare triple {19976#(and (<= main_~z~0 12) (<= 12 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20042#(and (<= main_~z~0 11) (<= 11 main_~z~0))} is VALID [2022-04-15 01:04:57,685 INFO L290 TraceCheckUtils]: 21: Hoare triple {20042#(and (<= main_~z~0 11) (<= 11 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-15 01:04:57,685 INFO L290 TraceCheckUtils]: 22: Hoare triple {19959#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19959#false} is VALID [2022-04-15 01:04:57,685 INFO L290 TraceCheckUtils]: 23: Hoare triple {19959#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-15 01:04:57,685 INFO L290 TraceCheckUtils]: 24: Hoare triple {19959#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19959#false} is VALID [2022-04-15 01:04:57,685 INFO L290 TraceCheckUtils]: 25: Hoare triple {19959#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-15 01:04:57,685 INFO L290 TraceCheckUtils]: 26: Hoare triple {19959#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-15 01:04:57,685 INFO L272 TraceCheckUtils]: 27: Hoare triple {19959#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {19959#false} is VALID [2022-04-15 01:04:57,686 INFO L290 TraceCheckUtils]: 28: Hoare triple {19959#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19959#false} is VALID [2022-04-15 01:04:57,686 INFO L290 TraceCheckUtils]: 29: Hoare triple {19959#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-15 01:04:57,686 INFO L290 TraceCheckUtils]: 30: Hoare triple {19959#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-15 01:04:57,686 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 79 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-15 01:04:57,686 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:04:58,063 INFO L290 TraceCheckUtils]: 30: Hoare triple {19959#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-15 01:04:58,063 INFO L290 TraceCheckUtils]: 29: Hoare triple {19959#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-15 01:04:58,063 INFO L290 TraceCheckUtils]: 28: Hoare triple {19959#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19959#false} is VALID [2022-04-15 01:04:58,063 INFO L272 TraceCheckUtils]: 27: Hoare triple {19959#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {19959#false} is VALID [2022-04-15 01:04:58,063 INFO L290 TraceCheckUtils]: 26: Hoare triple {19959#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-15 01:04:58,063 INFO L290 TraceCheckUtils]: 25: Hoare triple {19959#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-15 01:04:58,063 INFO L290 TraceCheckUtils]: 24: Hoare triple {19959#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19959#false} is VALID [2022-04-15 01:04:58,063 INFO L290 TraceCheckUtils]: 23: Hoare triple {19959#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-15 01:04:58,064 INFO L290 TraceCheckUtils]: 22: Hoare triple {19959#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19959#false} is VALID [2022-04-15 01:04:58,064 INFO L290 TraceCheckUtils]: 21: Hoare triple {20100#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-15 01:04:58,064 INFO L290 TraceCheckUtils]: 20: Hoare triple {20104#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20100#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 01:04:58,065 INFO L290 TraceCheckUtils]: 19: Hoare triple {20108#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {20104#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:58,065 INFO L290 TraceCheckUtils]: 18: Hoare triple {20108#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {20108#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:58,066 INFO L290 TraceCheckUtils]: 17: Hoare triple {20115#(< 0 (mod main_~y~0 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20108#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:04:58,066 INFO L290 TraceCheckUtils]: 16: Hoare triple {20119#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20115#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:04:58,067 INFO L290 TraceCheckUtils]: 15: Hoare triple {20123#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20119#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-15 01:04:58,068 INFO L290 TraceCheckUtils]: 14: Hoare triple {20127#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20123#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-15 01:04:58,068 INFO L290 TraceCheckUtils]: 13: Hoare triple {20131#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20127#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-15 01:04:58,069 INFO L290 TraceCheckUtils]: 12: Hoare triple {20135#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20131#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-15 01:04:58,069 INFO L290 TraceCheckUtils]: 11: Hoare triple {20139#(< 0 (mod (+ main_~y~0 6) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20135#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-15 01:04:58,070 INFO L290 TraceCheckUtils]: 10: Hoare triple {20143#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20139#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-15 01:04:58,070 INFO L290 TraceCheckUtils]: 9: Hoare triple {20147#(< 0 (mod (+ main_~y~0 8) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20143#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-15 01:04:58,071 INFO L290 TraceCheckUtils]: 8: Hoare triple {20151#(< 0 (mod (+ main_~y~0 9) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20147#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-15 01:04:58,072 INFO L290 TraceCheckUtils]: 7: Hoare triple {20155#(< 0 (mod (+ main_~y~0 10) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20151#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-15 01:04:58,072 INFO L290 TraceCheckUtils]: 6: Hoare triple {20159#(< 0 (mod (+ main_~y~0 11) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20155#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-15 01:04:58,073 INFO L290 TraceCheckUtils]: 5: Hoare triple {19958#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {20159#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-15 01:04:58,073 INFO L272 TraceCheckUtils]: 4: Hoare triple {19958#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-15 01:04:58,073 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19958#true} {19958#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-15 01:04:58,073 INFO L290 TraceCheckUtils]: 2: Hoare triple {19958#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-15 01:04:58,073 INFO L290 TraceCheckUtils]: 1: Hoare triple {19958#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19958#true} is VALID [2022-04-15 01:04:58,073 INFO L272 TraceCheckUtils]: 0: Hoare triple {19958#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-15 01:04:58,073 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 79 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-15 01:04:58,073 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1166322336] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:04:58,073 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:04:58,073 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 17] total 34 [2022-04-15 01:04:58,073 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [51111741] [2022-04-15 01:04:58,073 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:04:58,074 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 33 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-15 01:04:58,074 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:04:58,074 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 34 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 33 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:04:58,104 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:04:58,104 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-04-15 01:04:58,104 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:04:58,104 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-04-15 01:04:58,105 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=240, Invalid=882, Unknown=0, NotChecked=0, Total=1122 [2022-04-15 01:04:58,105 INFO L87 Difference]: Start difference. First operand 226 states and 307 transitions. Second operand has 34 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 33 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:05:06,933 WARN L232 SmtUtils]: Spent 5.17s on a formula simplification that was a NOOP. DAG size: 60 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:06:56,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:06:56,033 INFO L93 Difference]: Finished difference Result 920 states and 1372 transitions. [2022-04-15 01:06:56,033 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 129 states. [2022-04-15 01:06:56,033 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 33 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-15 01:06:56,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:06:56,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 33 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:06:56,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 492 transitions. [2022-04-15 01:06:56,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 33 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:06:56,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 492 transitions. [2022-04-15 01:06:56,042 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 129 states and 492 transitions. [2022-04-15 01:07:01,475 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 492 edges. 491 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-15 01:07:01,502 INFO L225 Difference]: With dead ends: 920 [2022-04-15 01:07:01,502 INFO L226 Difference]: Without dead ends: 879 [2022-04-15 01:07:01,504 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 207 GetRequests, 48 SyntacticMatches, 1 SemanticMatches, 158 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9847 ImplicationChecksByTransitivity, 95.8s TimeCoverageRelationStatistics Valid=6087, Invalid=19353, Unknown=0, NotChecked=0, Total=25440 [2022-04-15 01:07:01,504 INFO L913 BasicCegarLoop]: 84 mSDtfsCounter, 1411 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 2174 mSolverCounterSat, 1251 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 9.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1411 SdHoareTripleChecker+Valid, 166 SdHoareTripleChecker+Invalid, 3425 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1251 IncrementalHoareTripleChecker+Valid, 2174 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 9.9s IncrementalHoareTripleChecker+Time [2022-04-15 01:07:01,505 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [1411 Valid, 166 Invalid, 3425 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1251 Valid, 2174 Invalid, 0 Unknown, 0 Unchecked, 9.9s Time] [2022-04-15 01:07:01,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 879 states. [2022-04-15 01:07:02,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 879 to 257. [2022-04-15 01:07:02,122 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:07:02,122 INFO L82 GeneralOperation]: Start isEquivalent. First operand 879 states. Second operand has 257 states, 252 states have (on average 1.380952380952381) internal successors, (348), 252 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:02,123 INFO L74 IsIncluded]: Start isIncluded. First operand 879 states. Second operand has 257 states, 252 states have (on average 1.380952380952381) internal successors, (348), 252 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:02,123 INFO L87 Difference]: Start difference. First operand 879 states. Second operand has 257 states, 252 states have (on average 1.380952380952381) internal successors, (348), 252 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:02,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:07:02,146 INFO L93 Difference]: Finished difference Result 879 states and 1219 transitions. [2022-04-15 01:07:02,146 INFO L276 IsEmpty]: Start isEmpty. Operand 879 states and 1219 transitions. [2022-04-15 01:07:02,147 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:07:02,147 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:07:02,147 INFO L74 IsIncluded]: Start isIncluded. First operand has 257 states, 252 states have (on average 1.380952380952381) internal successors, (348), 252 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 879 states. [2022-04-15 01:07:02,148 INFO L87 Difference]: Start difference. First operand has 257 states, 252 states have (on average 1.380952380952381) internal successors, (348), 252 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 879 states. [2022-04-15 01:07:02,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:07:02,170 INFO L93 Difference]: Finished difference Result 879 states and 1219 transitions. [2022-04-15 01:07:02,171 INFO L276 IsEmpty]: Start isEmpty. Operand 879 states and 1219 transitions. [2022-04-15 01:07:02,171 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:07:02,172 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:07:02,172 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:07:02,172 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:07:02,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 257 states, 252 states have (on average 1.380952380952381) internal successors, (348), 252 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:02,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 257 states to 257 states and 352 transitions. [2022-04-15 01:07:02,175 INFO L78 Accepts]: Start accepts. Automaton has 257 states and 352 transitions. Word has length 31 [2022-04-15 01:07:02,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:07:02,175 INFO L478 AbstractCegarLoop]: Abstraction has 257 states and 352 transitions. [2022-04-15 01:07:02,176 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 33 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:02,176 INFO L276 IsEmpty]: Start isEmpty. Operand 257 states and 352 transitions. [2022-04-15 01:07:02,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-15 01:07:02,176 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:07:02,176 INFO L499 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:07:02,186 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Ended with exit code 0 [2022-04-15 01:07:02,380 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:07:02,380 INFO L403 AbstractCegarLoop]: === Iteration 24 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:07:02,380 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:07:02,381 INFO L85 PathProgramCache]: Analyzing trace with hash 179018828, now seen corresponding path program 6 times [2022-04-15 01:07:02,381 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:07:02,381 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1738039560] [2022-04-15 01:07:02,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:07:02,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:07:02,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:02,457 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:07:02,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:02,460 INFO L290 TraceCheckUtils]: 0: Hoare triple {23719#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {23710#true} is VALID [2022-04-15 01:07:02,460 INFO L290 TraceCheckUtils]: 1: Hoare triple {23710#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-15 01:07:02,460 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {23710#true} {23710#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-15 01:07:02,461 INFO L272 TraceCheckUtils]: 0: Hoare triple {23710#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23719#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:07:02,461 INFO L290 TraceCheckUtils]: 1: Hoare triple {23719#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {23710#true} is VALID [2022-04-15 01:07:02,461 INFO L290 TraceCheckUtils]: 2: Hoare triple {23710#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-15 01:07:02,461 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23710#true} {23710#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-15 01:07:02,461 INFO L272 TraceCheckUtils]: 4: Hoare triple {23710#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-15 01:07:02,461 INFO L290 TraceCheckUtils]: 5: Hoare triple {23710#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {23710#true} is VALID [2022-04-15 01:07:02,461 INFO L290 TraceCheckUtils]: 6: Hoare triple {23710#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23710#true} is VALID [2022-04-15 01:07:02,461 INFO L290 TraceCheckUtils]: 7: Hoare triple {23710#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23710#true} is VALID [2022-04-15 01:07:02,461 INFO L290 TraceCheckUtils]: 8: Hoare triple {23710#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23710#true} is VALID [2022-04-15 01:07:02,462 INFO L290 TraceCheckUtils]: 9: Hoare triple {23710#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:07:02,462 INFO L290 TraceCheckUtils]: 10: Hoare triple {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:07:02,463 INFO L290 TraceCheckUtils]: 11: Hoare triple {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:07:02,464 INFO L290 TraceCheckUtils]: 12: Hoare triple {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,464 INFO L290 TraceCheckUtils]: 13: Hoare triple {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,465 INFO L290 TraceCheckUtils]: 14: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,465 INFO L290 TraceCheckUtils]: 15: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,465 INFO L290 TraceCheckUtils]: 16: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,466 INFO L290 TraceCheckUtils]: 17: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,466 INFO L290 TraceCheckUtils]: 18: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,467 INFO L290 TraceCheckUtils]: 19: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,468 INFO L290 TraceCheckUtils]: 20: Hoare triple {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:07:02,469 INFO L290 TraceCheckUtils]: 21: Hoare triple {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:07:02,469 INFO L290 TraceCheckUtils]: 22: Hoare triple {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23711#false} is VALID [2022-04-15 01:07:02,469 INFO L290 TraceCheckUtils]: 23: Hoare triple {23711#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-15 01:07:02,469 INFO L290 TraceCheckUtils]: 24: Hoare triple {23711#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {23711#false} is VALID [2022-04-15 01:07:02,469 INFO L290 TraceCheckUtils]: 25: Hoare triple {23711#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {23711#false} is VALID [2022-04-15 01:07:02,469 INFO L290 TraceCheckUtils]: 26: Hoare triple {23711#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {23711#false} is VALID [2022-04-15 01:07:02,469 INFO L290 TraceCheckUtils]: 27: Hoare triple {23711#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-15 01:07:02,470 INFO L272 TraceCheckUtils]: 28: Hoare triple {23711#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {23711#false} is VALID [2022-04-15 01:07:02,470 INFO L290 TraceCheckUtils]: 29: Hoare triple {23711#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {23711#false} is VALID [2022-04-15 01:07:02,470 INFO L290 TraceCheckUtils]: 30: Hoare triple {23711#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-15 01:07:02,470 INFO L290 TraceCheckUtils]: 31: Hoare triple {23711#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-15 01:07:02,470 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-15 01:07:02,470 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:07:02,470 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1738039560] [2022-04-15 01:07:02,470 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1738039560] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:07:02,470 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [292497048] [2022-04-15 01:07:02,470 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-15 01:07:02,470 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:07:02,471 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:07:02,471 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:07:02,474 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-04-15 01:07:02,514 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2022-04-15 01:07:02,514 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:07:02,515 INFO L263 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-15 01:07:02,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:02,522 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:07:02,708 INFO L272 TraceCheckUtils]: 0: Hoare triple {23710#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-15 01:07:02,708 INFO L290 TraceCheckUtils]: 1: Hoare triple {23710#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {23710#true} is VALID [2022-04-15 01:07:02,708 INFO L290 TraceCheckUtils]: 2: Hoare triple {23710#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-15 01:07:02,708 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23710#true} {23710#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-15 01:07:02,708 INFO L272 TraceCheckUtils]: 4: Hoare triple {23710#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-15 01:07:02,708 INFO L290 TraceCheckUtils]: 5: Hoare triple {23710#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {23710#true} is VALID [2022-04-15 01:07:02,709 INFO L290 TraceCheckUtils]: 6: Hoare triple {23710#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23710#true} is VALID [2022-04-15 01:07:02,709 INFO L290 TraceCheckUtils]: 7: Hoare triple {23710#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23710#true} is VALID [2022-04-15 01:07:02,709 INFO L290 TraceCheckUtils]: 8: Hoare triple {23710#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23710#true} is VALID [2022-04-15 01:07:02,709 INFO L290 TraceCheckUtils]: 9: Hoare triple {23710#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:07:02,710 INFO L290 TraceCheckUtils]: 10: Hoare triple {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:07:02,710 INFO L290 TraceCheckUtils]: 11: Hoare triple {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:07:02,711 INFO L290 TraceCheckUtils]: 12: Hoare triple {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,712 INFO L290 TraceCheckUtils]: 13: Hoare triple {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,712 INFO L290 TraceCheckUtils]: 14: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,713 INFO L290 TraceCheckUtils]: 15: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,713 INFO L290 TraceCheckUtils]: 16: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,713 INFO L290 TraceCheckUtils]: 17: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,714 INFO L290 TraceCheckUtils]: 18: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,715 INFO L290 TraceCheckUtils]: 19: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,716 INFO L290 TraceCheckUtils]: 20: Hoare triple {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:07:02,716 INFO L290 TraceCheckUtils]: 21: Hoare triple {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:07:02,717 INFO L290 TraceCheckUtils]: 22: Hoare triple {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23711#false} is VALID [2022-04-15 01:07:02,717 INFO L290 TraceCheckUtils]: 23: Hoare triple {23711#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-15 01:07:02,717 INFO L290 TraceCheckUtils]: 24: Hoare triple {23711#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {23711#false} is VALID [2022-04-15 01:07:02,717 INFO L290 TraceCheckUtils]: 25: Hoare triple {23711#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {23711#false} is VALID [2022-04-15 01:07:02,717 INFO L290 TraceCheckUtils]: 26: Hoare triple {23711#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {23711#false} is VALID [2022-04-15 01:07:02,717 INFO L290 TraceCheckUtils]: 27: Hoare triple {23711#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-15 01:07:02,717 INFO L272 TraceCheckUtils]: 28: Hoare triple {23711#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {23711#false} is VALID [2022-04-15 01:07:02,717 INFO L290 TraceCheckUtils]: 29: Hoare triple {23711#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {23711#false} is VALID [2022-04-15 01:07:02,717 INFO L290 TraceCheckUtils]: 30: Hoare triple {23711#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-15 01:07:02,718 INFO L290 TraceCheckUtils]: 31: Hoare triple {23711#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-15 01:07:02,718 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-15 01:07:02,718 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:07:02,918 INFO L290 TraceCheckUtils]: 31: Hoare triple {23711#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-15 01:07:02,919 INFO L290 TraceCheckUtils]: 30: Hoare triple {23711#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-15 01:07:02,919 INFO L290 TraceCheckUtils]: 29: Hoare triple {23711#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {23711#false} is VALID [2022-04-15 01:07:02,919 INFO L272 TraceCheckUtils]: 28: Hoare triple {23711#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {23711#false} is VALID [2022-04-15 01:07:02,919 INFO L290 TraceCheckUtils]: 27: Hoare triple {23711#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-15 01:07:02,919 INFO L290 TraceCheckUtils]: 26: Hoare triple {23711#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {23711#false} is VALID [2022-04-15 01:07:02,919 INFO L290 TraceCheckUtils]: 25: Hoare triple {23711#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {23711#false} is VALID [2022-04-15 01:07:02,919 INFO L290 TraceCheckUtils]: 24: Hoare triple {23711#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {23711#false} is VALID [2022-04-15 01:07:02,919 INFO L290 TraceCheckUtils]: 23: Hoare triple {23711#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-15 01:07:02,920 INFO L290 TraceCheckUtils]: 22: Hoare triple {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23711#false} is VALID [2022-04-15 01:07:02,921 INFO L290 TraceCheckUtils]: 21: Hoare triple {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:07:02,922 INFO L290 TraceCheckUtils]: 20: Hoare triple {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:07:02,922 INFO L290 TraceCheckUtils]: 19: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,923 INFO L290 TraceCheckUtils]: 18: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,923 INFO L290 TraceCheckUtils]: 17: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,923 INFO L290 TraceCheckUtils]: 16: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,924 INFO L290 TraceCheckUtils]: 15: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,924 INFO L290 TraceCheckUtils]: 14: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,925 INFO L290 TraceCheckUtils]: 13: Hoare triple {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,925 INFO L290 TraceCheckUtils]: 12: Hoare triple {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-15 01:07:02,926 INFO L290 TraceCheckUtils]: 11: Hoare triple {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-15 01:07:02,926 INFO L290 TraceCheckUtils]: 10: Hoare triple {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:07:02,927 INFO L290 TraceCheckUtils]: 9: Hoare triple {23710#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-15 01:07:02,927 INFO L290 TraceCheckUtils]: 8: Hoare triple {23710#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23710#true} is VALID [2022-04-15 01:07:02,927 INFO L290 TraceCheckUtils]: 7: Hoare triple {23710#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23710#true} is VALID [2022-04-15 01:07:02,927 INFO L290 TraceCheckUtils]: 6: Hoare triple {23710#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23710#true} is VALID [2022-04-15 01:07:02,927 INFO L290 TraceCheckUtils]: 5: Hoare triple {23710#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {23710#true} is VALID [2022-04-15 01:07:02,927 INFO L272 TraceCheckUtils]: 4: Hoare triple {23710#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-15 01:07:02,927 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23710#true} {23710#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-15 01:07:02,927 INFO L290 TraceCheckUtils]: 2: Hoare triple {23710#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-15 01:07:02,927 INFO L290 TraceCheckUtils]: 1: Hoare triple {23710#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {23710#true} is VALID [2022-04-15 01:07:02,928 INFO L272 TraceCheckUtils]: 0: Hoare triple {23710#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-15 01:07:02,928 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-15 01:07:02,928 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [292497048] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:07:02,928 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:07:02,928 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6] total 7 [2022-04-15 01:07:02,928 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1715846950] [2022-04-15 01:07:02,928 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:07:02,928 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-15 01:07:02,929 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:07:02,929 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:02,947 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:07:02,947 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-15 01:07:02,947 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:07:02,947 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-15 01:07:02,947 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-04-15 01:07:02,947 INFO L87 Difference]: Start difference. First operand 257 states and 352 transitions. Second operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:03,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:07:03,987 INFO L93 Difference]: Finished difference Result 305 states and 411 transitions. [2022-04-15 01:07:03,987 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-15 01:07:03,987 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-15 01:07:03,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:07:03,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:03,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 62 transitions. [2022-04-15 01:07:03,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:03,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 62 transitions. [2022-04-15 01:07:03,989 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 62 transitions. [2022-04-15 01:07:04,035 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:07:04,038 INFO L225 Difference]: With dead ends: 305 [2022-04-15 01:07:04,038 INFO L226 Difference]: Without dead ends: 278 [2022-04-15 01:07:04,038 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 67 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2022-04-15 01:07:04,039 INFO L913 BasicCegarLoop]: 33 mSDtfsCounter, 33 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 147 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 55 SdHoareTripleChecker+Invalid, 166 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 147 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 01:07:04,039 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [33 Valid, 55 Invalid, 166 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 147 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 01:07:04,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 278 states. [2022-04-15 01:07:04,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 278 to 261. [2022-04-15 01:07:04,637 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:07:04,637 INFO L82 GeneralOperation]: Start isEquivalent. First operand 278 states. Second operand has 261 states, 256 states have (on average 1.375) internal successors, (352), 256 states have internal predecessors, (352), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:04,637 INFO L74 IsIncluded]: Start isIncluded. First operand 278 states. Second operand has 261 states, 256 states have (on average 1.375) internal successors, (352), 256 states have internal predecessors, (352), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:04,638 INFO L87 Difference]: Start difference. First operand 278 states. Second operand has 261 states, 256 states have (on average 1.375) internal successors, (352), 256 states have internal predecessors, (352), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:04,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:07:04,641 INFO L93 Difference]: Finished difference Result 278 states and 377 transitions. [2022-04-15 01:07:04,641 INFO L276 IsEmpty]: Start isEmpty. Operand 278 states and 377 transitions. [2022-04-15 01:07:04,641 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:07:04,641 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:07:04,641 INFO L74 IsIncluded]: Start isIncluded. First operand has 261 states, 256 states have (on average 1.375) internal successors, (352), 256 states have internal predecessors, (352), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 278 states. [2022-04-15 01:07:04,642 INFO L87 Difference]: Start difference. First operand has 261 states, 256 states have (on average 1.375) internal successors, (352), 256 states have internal predecessors, (352), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 278 states. [2022-04-15 01:07:04,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:07:04,645 INFO L93 Difference]: Finished difference Result 278 states and 377 transitions. [2022-04-15 01:07:04,645 INFO L276 IsEmpty]: Start isEmpty. Operand 278 states and 377 transitions. [2022-04-15 01:07:04,645 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:07:04,645 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:07:04,645 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:07:04,645 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:07:04,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 261 states, 256 states have (on average 1.375) internal successors, (352), 256 states have internal predecessors, (352), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:04,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 261 states to 261 states and 356 transitions. [2022-04-15 01:07:04,649 INFO L78 Accepts]: Start accepts. Automaton has 261 states and 356 transitions. Word has length 32 [2022-04-15 01:07:04,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:07:04,649 INFO L478 AbstractCegarLoop]: Abstraction has 261 states and 356 transitions. [2022-04-15 01:07:04,649 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:04,649 INFO L276 IsEmpty]: Start isEmpty. Operand 261 states and 356 transitions. [2022-04-15 01:07:04,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-15 01:07:04,649 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:07:04,649 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:07:04,665 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-04-15 01:07:04,859 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:07:04,859 INFO L403 AbstractCegarLoop]: === Iteration 25 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:07:04,860 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:07:04,860 INFO L85 PathProgramCache]: Analyzing trace with hash -1026125076, now seen corresponding path program 6 times [2022-04-15 01:07:04,860 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:07:04,860 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1673678685] [2022-04-15 01:07:04,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:07:04,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:07:04,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:04,998 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:07:04,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:05,001 INFO L290 TraceCheckUtils]: 0: Hoare triple {25294#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25279#true} is VALID [2022-04-15 01:07:05,001 INFO L290 TraceCheckUtils]: 1: Hoare triple {25279#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-15 01:07:05,001 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25279#true} {25279#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-15 01:07:05,002 INFO L272 TraceCheckUtils]: 0: Hoare triple {25279#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25294#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:07:05,002 INFO L290 TraceCheckUtils]: 1: Hoare triple {25294#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25279#true} is VALID [2022-04-15 01:07:05,002 INFO L290 TraceCheckUtils]: 2: Hoare triple {25279#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-15 01:07:05,002 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25279#true} {25279#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-15 01:07:05,002 INFO L272 TraceCheckUtils]: 4: Hoare triple {25279#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-15 01:07:05,002 INFO L290 TraceCheckUtils]: 5: Hoare triple {25279#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {25284#(= main_~y~0 0)} is VALID [2022-04-15 01:07:05,003 INFO L290 TraceCheckUtils]: 6: Hoare triple {25284#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25285#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:07:05,003 INFO L290 TraceCheckUtils]: 7: Hoare triple {25285#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25286#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:07:05,004 INFO L290 TraceCheckUtils]: 8: Hoare triple {25286#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25287#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:07:05,004 INFO L290 TraceCheckUtils]: 9: Hoare triple {25287#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25288#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:07:05,005 INFO L290 TraceCheckUtils]: 10: Hoare triple {25288#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25289#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:07:05,005 INFO L290 TraceCheckUtils]: 11: Hoare triple {25289#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25290#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:07:05,006 INFO L290 TraceCheckUtils]: 12: Hoare triple {25290#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {25290#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:07:05,006 INFO L290 TraceCheckUtils]: 13: Hoare triple {25290#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {25291#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 01:07:05,007 INFO L290 TraceCheckUtils]: 14: Hoare triple {25291#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25292#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:07:05,007 INFO L290 TraceCheckUtils]: 15: Hoare triple {25292#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25293#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 01:07:05,007 INFO L290 TraceCheckUtils]: 16: Hoare triple {25293#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-15 01:07:05,008 INFO L290 TraceCheckUtils]: 17: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-15 01:07:05,008 INFO L290 TraceCheckUtils]: 18: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-15 01:07:05,008 INFO L290 TraceCheckUtils]: 19: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-15 01:07:05,008 INFO L290 TraceCheckUtils]: 20: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-15 01:07:05,008 INFO L290 TraceCheckUtils]: 21: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-15 01:07:05,008 INFO L290 TraceCheckUtils]: 22: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-15 01:07:05,008 INFO L290 TraceCheckUtils]: 23: Hoare triple {25280#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-15 01:07:05,008 INFO L290 TraceCheckUtils]: 24: Hoare triple {25280#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {25280#false} is VALID [2022-04-15 01:07:05,008 INFO L290 TraceCheckUtils]: 25: Hoare triple {25280#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {25280#false} is VALID [2022-04-15 01:07:05,008 INFO L290 TraceCheckUtils]: 26: Hoare triple {25280#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-15 01:07:05,008 INFO L290 TraceCheckUtils]: 27: Hoare triple {25280#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-15 01:07:05,008 INFO L272 TraceCheckUtils]: 28: Hoare triple {25280#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {25280#false} is VALID [2022-04-15 01:07:05,008 INFO L290 TraceCheckUtils]: 29: Hoare triple {25280#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {25280#false} is VALID [2022-04-15 01:07:05,008 INFO L290 TraceCheckUtils]: 30: Hoare triple {25280#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-15 01:07:05,009 INFO L290 TraceCheckUtils]: 31: Hoare triple {25280#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-15 01:07:05,009 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-15 01:07:05,009 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:07:05,009 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1673678685] [2022-04-15 01:07:05,009 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1673678685] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:07:05,009 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [98935144] [2022-04-15 01:07:05,009 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-15 01:07:05,009 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:07:05,009 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:07:05,010 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:07:05,011 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-04-15 01:07:05,105 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2022-04-15 01:07:05,106 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:07:05,107 INFO L263 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 21 conjunts are in the unsatisfiable core [2022-04-15 01:07:05,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:05,113 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:07:05,323 INFO L272 TraceCheckUtils]: 0: Hoare triple {25279#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-15 01:07:05,323 INFO L290 TraceCheckUtils]: 1: Hoare triple {25279#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25279#true} is VALID [2022-04-15 01:07:05,324 INFO L290 TraceCheckUtils]: 2: Hoare triple {25279#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-15 01:07:05,324 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25279#true} {25279#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-15 01:07:05,324 INFO L272 TraceCheckUtils]: 4: Hoare triple {25279#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-15 01:07:05,324 INFO L290 TraceCheckUtils]: 5: Hoare triple {25279#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {25284#(= main_~y~0 0)} is VALID [2022-04-15 01:07:05,324 INFO L290 TraceCheckUtils]: 6: Hoare triple {25284#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25285#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:07:05,325 INFO L290 TraceCheckUtils]: 7: Hoare triple {25285#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25286#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:07:05,325 INFO L290 TraceCheckUtils]: 8: Hoare triple {25286#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25287#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:07:05,326 INFO L290 TraceCheckUtils]: 9: Hoare triple {25287#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25288#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:07:05,326 INFO L290 TraceCheckUtils]: 10: Hoare triple {25288#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25289#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:07:05,327 INFO L290 TraceCheckUtils]: 11: Hoare triple {25289#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25290#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:07:05,327 INFO L290 TraceCheckUtils]: 12: Hoare triple {25290#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {25290#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:07:05,327 INFO L290 TraceCheckUtils]: 13: Hoare triple {25290#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {25291#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 01:07:05,328 INFO L290 TraceCheckUtils]: 14: Hoare triple {25291#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25292#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:07:05,328 INFO L290 TraceCheckUtils]: 15: Hoare triple {25292#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25343#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:07:05,329 INFO L290 TraceCheckUtils]: 16: Hoare triple {25343#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-15 01:07:05,329 INFO L290 TraceCheckUtils]: 17: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-15 01:07:05,329 INFO L290 TraceCheckUtils]: 18: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-15 01:07:05,329 INFO L290 TraceCheckUtils]: 19: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-15 01:07:05,329 INFO L290 TraceCheckUtils]: 20: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-15 01:07:05,329 INFO L290 TraceCheckUtils]: 21: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-15 01:07:05,329 INFO L290 TraceCheckUtils]: 22: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-15 01:07:05,329 INFO L290 TraceCheckUtils]: 23: Hoare triple {25280#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-15 01:07:05,330 INFO L290 TraceCheckUtils]: 24: Hoare triple {25280#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {25280#false} is VALID [2022-04-15 01:07:05,330 INFO L290 TraceCheckUtils]: 25: Hoare triple {25280#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {25280#false} is VALID [2022-04-15 01:07:05,330 INFO L290 TraceCheckUtils]: 26: Hoare triple {25280#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-15 01:07:05,330 INFO L290 TraceCheckUtils]: 27: Hoare triple {25280#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-15 01:07:05,330 INFO L272 TraceCheckUtils]: 28: Hoare triple {25280#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {25280#false} is VALID [2022-04-15 01:07:05,330 INFO L290 TraceCheckUtils]: 29: Hoare triple {25280#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {25280#false} is VALID [2022-04-15 01:07:05,330 INFO L290 TraceCheckUtils]: 30: Hoare triple {25280#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-15 01:07:05,330 INFO L290 TraceCheckUtils]: 31: Hoare triple {25280#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-15 01:07:05,330 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-15 01:07:05,330 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:07:05,535 INFO L290 TraceCheckUtils]: 31: Hoare triple {25280#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-15 01:07:05,535 INFO L290 TraceCheckUtils]: 30: Hoare triple {25280#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-15 01:07:05,535 INFO L290 TraceCheckUtils]: 29: Hoare triple {25280#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {25280#false} is VALID [2022-04-15 01:07:05,535 INFO L272 TraceCheckUtils]: 28: Hoare triple {25280#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {25280#false} is VALID [2022-04-15 01:07:05,536 INFO L290 TraceCheckUtils]: 27: Hoare triple {25280#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-15 01:07:05,536 INFO L290 TraceCheckUtils]: 26: Hoare triple {25280#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-15 01:07:05,536 INFO L290 TraceCheckUtils]: 25: Hoare triple {25280#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {25280#false} is VALID [2022-04-15 01:07:05,536 INFO L290 TraceCheckUtils]: 24: Hoare triple {25280#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {25280#false} is VALID [2022-04-15 01:07:05,536 INFO L290 TraceCheckUtils]: 23: Hoare triple {25280#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-15 01:07:05,536 INFO L290 TraceCheckUtils]: 22: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-15 01:07:05,536 INFO L290 TraceCheckUtils]: 21: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-15 01:07:05,536 INFO L290 TraceCheckUtils]: 20: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-15 01:07:05,536 INFO L290 TraceCheckUtils]: 19: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-15 01:07:05,536 INFO L290 TraceCheckUtils]: 18: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-15 01:07:05,536 INFO L290 TraceCheckUtils]: 17: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-15 01:07:05,537 INFO L290 TraceCheckUtils]: 16: Hoare triple {25437#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-15 01:07:05,537 INFO L290 TraceCheckUtils]: 15: Hoare triple {25441#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25437#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 01:07:05,538 INFO L290 TraceCheckUtils]: 14: Hoare triple {25445#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25441#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-15 01:07:05,538 INFO L290 TraceCheckUtils]: 13: Hoare triple {25449#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {25445#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:05,538 INFO L290 TraceCheckUtils]: 12: Hoare triple {25449#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {25449#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:05,539 INFO L290 TraceCheckUtils]: 11: Hoare triple {25456#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25449#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:05,540 INFO L290 TraceCheckUtils]: 10: Hoare triple {25460#(< 0 (mod main_~y~0 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25456#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:07:05,540 INFO L290 TraceCheckUtils]: 9: Hoare triple {25464#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25460#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:07:05,541 INFO L290 TraceCheckUtils]: 8: Hoare triple {25468#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25464#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-15 01:07:05,542 INFO L290 TraceCheckUtils]: 7: Hoare triple {25472#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25468#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-15 01:07:05,543 INFO L290 TraceCheckUtils]: 6: Hoare triple {25476#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25472#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-15 01:07:05,543 INFO L290 TraceCheckUtils]: 5: Hoare triple {25279#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {25476#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-15 01:07:05,543 INFO L272 TraceCheckUtils]: 4: Hoare triple {25279#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-15 01:07:05,543 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25279#true} {25279#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-15 01:07:05,544 INFO L290 TraceCheckUtils]: 2: Hoare triple {25279#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-15 01:07:05,544 INFO L290 TraceCheckUtils]: 1: Hoare triple {25279#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25279#true} is VALID [2022-04-15 01:07:05,544 INFO L272 TraceCheckUtils]: 0: Hoare triple {25279#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-15 01:07:05,544 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-15 01:07:05,544 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [98935144] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:07:05,544 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:07:05,544 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 24 [2022-04-15 01:07:05,544 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [254768593] [2022-04-15 01:07:05,544 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:07:05,545 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-15 01:07:05,545 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:07:05,545 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:05,570 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:07:05,570 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-04-15 01:07:05,570 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:07:05,571 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-04-15 01:07:05,571 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=446, Unknown=0, NotChecked=0, Total=552 [2022-04-15 01:07:05,571 INFO L87 Difference]: Start difference. First operand 261 states and 356 transitions. Second operand has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:19,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:07:19,414 INFO L93 Difference]: Finished difference Result 627 states and 849 transitions. [2022-04-15 01:07:19,414 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 105 states. [2022-04-15 01:07:19,414 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-15 01:07:19,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:07:19,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:19,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 336 transitions. [2022-04-15 01:07:19,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:19,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 336 transitions. [2022-04-15 01:07:19,419 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 105 states and 336 transitions. [2022-04-15 01:07:20,089 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 336 edges. 336 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:07:20,101 INFO L225 Difference]: With dead ends: 627 [2022-04-15 01:07:20,101 INFO L226 Difference]: Without dead ends: 579 [2022-04-15 01:07:20,102 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 55 SyntacticMatches, 1 SemanticMatches, 124 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5763 ImplicationChecksByTransitivity, 8.5s TimeCoverageRelationStatistics Valid=3248, Invalid=12502, Unknown=0, NotChecked=0, Total=15750 [2022-04-15 01:07:20,102 INFO L913 BasicCegarLoop]: 49 mSDtfsCounter, 481 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 1072 mSolverCounterSat, 556 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 481 SdHoareTripleChecker+Valid, 111 SdHoareTripleChecker+Invalid, 1628 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 556 IncrementalHoareTripleChecker+Valid, 1072 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2022-04-15 01:07:20,102 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [481 Valid, 111 Invalid, 1628 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [556 Valid, 1072 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2022-04-15 01:07:20,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 579 states. [2022-04-15 01:07:20,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 579 to 278. [2022-04-15 01:07:20,801 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:07:20,802 INFO L82 GeneralOperation]: Start isEquivalent. First operand 579 states. Second operand has 278 states, 273 states have (on average 1.36996336996337) internal successors, (374), 273 states have internal predecessors, (374), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:20,806 INFO L74 IsIncluded]: Start isIncluded. First operand 579 states. Second operand has 278 states, 273 states have (on average 1.36996336996337) internal successors, (374), 273 states have internal predecessors, (374), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:20,807 INFO L87 Difference]: Start difference. First operand 579 states. Second operand has 278 states, 273 states have (on average 1.36996336996337) internal successors, (374), 273 states have internal predecessors, (374), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:20,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:07:20,817 INFO L93 Difference]: Finished difference Result 579 states and 778 transitions. [2022-04-15 01:07:20,817 INFO L276 IsEmpty]: Start isEmpty. Operand 579 states and 778 transitions. [2022-04-15 01:07:20,818 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:07:20,818 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:07:20,818 INFO L74 IsIncluded]: Start isIncluded. First operand has 278 states, 273 states have (on average 1.36996336996337) internal successors, (374), 273 states have internal predecessors, (374), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 579 states. [2022-04-15 01:07:20,819 INFO L87 Difference]: Start difference. First operand has 278 states, 273 states have (on average 1.36996336996337) internal successors, (374), 273 states have internal predecessors, (374), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 579 states. [2022-04-15 01:07:20,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:07:20,830 INFO L93 Difference]: Finished difference Result 579 states and 778 transitions. [2022-04-15 01:07:20,830 INFO L276 IsEmpty]: Start isEmpty. Operand 579 states and 778 transitions. [2022-04-15 01:07:20,830 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:07:20,830 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:07:20,830 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:07:20,830 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:07:20,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 278 states, 273 states have (on average 1.36996336996337) internal successors, (374), 273 states have internal predecessors, (374), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:20,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 278 states to 278 states and 378 transitions. [2022-04-15 01:07:20,834 INFO L78 Accepts]: Start accepts. Automaton has 278 states and 378 transitions. Word has length 32 [2022-04-15 01:07:20,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:07:20,834 INFO L478 AbstractCegarLoop]: Abstraction has 278 states and 378 transitions. [2022-04-15 01:07:20,835 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:20,835 INFO L276 IsEmpty]: Start isEmpty. Operand 278 states and 378 transitions. [2022-04-15 01:07:20,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-15 01:07:20,835 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:07:20,835 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:07:20,839 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-04-15 01:07:21,038 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2022-04-15 01:07:21,039 INFO L403 AbstractCegarLoop]: === Iteration 26 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:07:21,039 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:07:21,039 INFO L85 PathProgramCache]: Analyzing trace with hash -1824944628, now seen corresponding path program 7 times [2022-04-15 01:07:21,039 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:07:21,039 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1392283495] [2022-04-15 01:07:21,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:07:21,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:07:21,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:21,143 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:07:21,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:21,146 INFO L290 TraceCheckUtils]: 0: Hoare triple {28037#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28025#true} is VALID [2022-04-15 01:07:21,146 INFO L290 TraceCheckUtils]: 1: Hoare triple {28025#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-15 01:07:21,146 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28025#true} {28025#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-15 01:07:21,146 INFO L272 TraceCheckUtils]: 0: Hoare triple {28025#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28037#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:07:21,147 INFO L290 TraceCheckUtils]: 1: Hoare triple {28037#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28025#true} is VALID [2022-04-15 01:07:21,147 INFO L290 TraceCheckUtils]: 2: Hoare triple {28025#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-15 01:07:21,147 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28025#true} {28025#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-15 01:07:21,147 INFO L272 TraceCheckUtils]: 4: Hoare triple {28025#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-15 01:07:21,147 INFO L290 TraceCheckUtils]: 5: Hoare triple {28025#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {28025#true} is VALID [2022-04-15 01:07:21,147 INFO L290 TraceCheckUtils]: 6: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28025#true} is VALID [2022-04-15 01:07:21,147 INFO L290 TraceCheckUtils]: 7: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28025#true} is VALID [2022-04-15 01:07:21,147 INFO L290 TraceCheckUtils]: 8: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28025#true} is VALID [2022-04-15 01:07:21,147 INFO L290 TraceCheckUtils]: 9: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28025#true} is VALID [2022-04-15 01:07:21,148 INFO L290 TraceCheckUtils]: 10: Hoare triple {28025#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {28030#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-15 01:07:21,148 INFO L290 TraceCheckUtils]: 11: Hoare triple {28030#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {28030#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-15 01:07:21,149 INFO L290 TraceCheckUtils]: 12: Hoare triple {28030#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28031#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-15 01:07:21,150 INFO L290 TraceCheckUtils]: 13: Hoare triple {28031#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28032#(<= (+ 2 (* (div (+ main_~x~0 4294967293) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-15 01:07:21,150 INFO L290 TraceCheckUtils]: 14: Hoare triple {28032#(<= (+ 2 (* (div (+ main_~x~0 4294967293) 4294967296) 4294967296)) main_~x~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28033#(<= (+ 3 (* (div (+ 4294967292 main_~x~0) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-15 01:07:21,151 INFO L290 TraceCheckUtils]: 15: Hoare triple {28033#(<= (+ 3 (* (div (+ 4294967292 main_~x~0) 4294967296) 4294967296)) main_~x~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-15 01:07:21,151 INFO L290 TraceCheckUtils]: 16: Hoare triple {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-15 01:07:21,152 INFO L290 TraceCheckUtils]: 17: Hoare triple {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-15 01:07:21,152 INFO L290 TraceCheckUtils]: 18: Hoare triple {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-15 01:07:21,153 INFO L290 TraceCheckUtils]: 19: Hoare triple {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-15 01:07:21,153 INFO L290 TraceCheckUtils]: 20: Hoare triple {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-15 01:07:21,153 INFO L290 TraceCheckUtils]: 21: Hoare triple {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-15 01:07:21,154 INFO L290 TraceCheckUtils]: 22: Hoare triple {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28035#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-15 01:07:21,155 INFO L290 TraceCheckUtils]: 23: Hoare triple {28035#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28036#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-15 01:07:21,155 INFO L290 TraceCheckUtils]: 24: Hoare triple {28036#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-15 01:07:21,155 INFO L290 TraceCheckUtils]: 25: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-15 01:07:21,156 INFO L290 TraceCheckUtils]: 26: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-15 01:07:21,156 INFO L290 TraceCheckUtils]: 27: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-15 01:07:21,156 INFO L290 TraceCheckUtils]: 28: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-15 01:07:21,156 INFO L290 TraceCheckUtils]: 29: Hoare triple {28026#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-15 01:07:21,156 INFO L272 TraceCheckUtils]: 30: Hoare triple {28026#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {28026#false} is VALID [2022-04-15 01:07:21,156 INFO L290 TraceCheckUtils]: 31: Hoare triple {28026#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28026#false} is VALID [2022-04-15 01:07:21,156 INFO L290 TraceCheckUtils]: 32: Hoare triple {28026#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-15 01:07:21,156 INFO L290 TraceCheckUtils]: 33: Hoare triple {28026#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-15 01:07:21,156 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-04-15 01:07:21,156 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:07:21,156 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1392283495] [2022-04-15 01:07:21,157 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1392283495] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:07:21,157 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [545438640] [2022-04-15 01:07:21,157 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-15 01:07:21,157 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:07:21,157 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:07:21,158 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:07:21,160 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-04-15 01:07:21,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:21,203 INFO L263 TraceCheckSpWp]: Trace formula consists of 151 conjuncts, 22 conjunts are in the unsatisfiable core [2022-04-15 01:07:21,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:21,211 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:07:21,357 INFO L272 TraceCheckUtils]: 0: Hoare triple {28025#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-15 01:07:21,357 INFO L290 TraceCheckUtils]: 1: Hoare triple {28025#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28025#true} is VALID [2022-04-15 01:07:21,357 INFO L290 TraceCheckUtils]: 2: Hoare triple {28025#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-15 01:07:21,357 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28025#true} {28025#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-15 01:07:21,357 INFO L272 TraceCheckUtils]: 4: Hoare triple {28025#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-15 01:07:21,357 INFO L290 TraceCheckUtils]: 5: Hoare triple {28025#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {28025#true} is VALID [2022-04-15 01:07:21,357 INFO L290 TraceCheckUtils]: 6: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28025#true} is VALID [2022-04-15 01:07:21,357 INFO L290 TraceCheckUtils]: 7: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28025#true} is VALID [2022-04-15 01:07:21,358 INFO L290 TraceCheckUtils]: 8: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28065#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:07:21,359 INFO L290 TraceCheckUtils]: 9: Hoare triple {28065#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:07:21,359 INFO L290 TraceCheckUtils]: 10: Hoare triple {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:07:21,360 INFO L290 TraceCheckUtils]: 11: Hoare triple {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:07:21,360 INFO L290 TraceCheckUtils]: 12: Hoare triple {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28065#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:07:21,361 INFO L290 TraceCheckUtils]: 13: Hoare triple {28065#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28082#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:07:21,361 INFO L290 TraceCheckUtils]: 14: Hoare triple {28082#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28086#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:07:21,362 INFO L290 TraceCheckUtils]: 15: Hoare triple {28086#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:21,362 INFO L290 TraceCheckUtils]: 16: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:21,363 INFO L290 TraceCheckUtils]: 17: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:21,363 INFO L290 TraceCheckUtils]: 18: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:21,363 INFO L290 TraceCheckUtils]: 19: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:21,364 INFO L290 TraceCheckUtils]: 20: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:21,364 INFO L290 TraceCheckUtils]: 21: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:21,365 INFO L290 TraceCheckUtils]: 22: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28086#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:07:21,366 INFO L290 TraceCheckUtils]: 23: Hoare triple {28086#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28082#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:07:21,366 INFO L290 TraceCheckUtils]: 24: Hoare triple {28082#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-15 01:07:21,366 INFO L290 TraceCheckUtils]: 25: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-15 01:07:21,366 INFO L290 TraceCheckUtils]: 26: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-15 01:07:21,366 INFO L290 TraceCheckUtils]: 27: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-15 01:07:21,367 INFO L290 TraceCheckUtils]: 28: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-15 01:07:21,367 INFO L290 TraceCheckUtils]: 29: Hoare triple {28026#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-15 01:07:21,367 INFO L272 TraceCheckUtils]: 30: Hoare triple {28026#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {28026#false} is VALID [2022-04-15 01:07:21,367 INFO L290 TraceCheckUtils]: 31: Hoare triple {28026#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28026#false} is VALID [2022-04-15 01:07:21,367 INFO L290 TraceCheckUtils]: 32: Hoare triple {28026#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-15 01:07:21,367 INFO L290 TraceCheckUtils]: 33: Hoare triple {28026#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-15 01:07:21,367 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2022-04-15 01:07:21,367 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:07:21,465 INFO L290 TraceCheckUtils]: 33: Hoare triple {28026#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-15 01:07:21,465 INFO L290 TraceCheckUtils]: 32: Hoare triple {28026#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-15 01:07:21,465 INFO L290 TraceCheckUtils]: 31: Hoare triple {28026#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28026#false} is VALID [2022-04-15 01:07:21,465 INFO L272 TraceCheckUtils]: 30: Hoare triple {28026#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {28026#false} is VALID [2022-04-15 01:07:21,465 INFO L290 TraceCheckUtils]: 29: Hoare triple {28026#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-15 01:07:21,465 INFO L290 TraceCheckUtils]: 28: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-15 01:07:21,465 INFO L290 TraceCheckUtils]: 27: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-15 01:07:21,465 INFO L290 TraceCheckUtils]: 26: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-15 01:07:21,466 INFO L290 TraceCheckUtils]: 25: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-15 01:07:21,466 INFO L290 TraceCheckUtils]: 24: Hoare triple {28082#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-15 01:07:21,467 INFO L290 TraceCheckUtils]: 23: Hoare triple {28086#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28082#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:07:21,467 INFO L290 TraceCheckUtils]: 22: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28086#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:07:21,468 INFO L290 TraceCheckUtils]: 21: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:21,468 INFO L290 TraceCheckUtils]: 20: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:21,468 INFO L290 TraceCheckUtils]: 19: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:21,469 INFO L290 TraceCheckUtils]: 18: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:21,469 INFO L290 TraceCheckUtils]: 17: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:21,470 INFO L290 TraceCheckUtils]: 16: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:21,470 INFO L290 TraceCheckUtils]: 15: Hoare triple {28086#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:21,471 INFO L290 TraceCheckUtils]: 14: Hoare triple {28082#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28086#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-15 01:07:21,472 INFO L290 TraceCheckUtils]: 13: Hoare triple {28065#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28082#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-15 01:07:21,472 INFO L290 TraceCheckUtils]: 12: Hoare triple {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28065#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:07:21,473 INFO L290 TraceCheckUtils]: 11: Hoare triple {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:07:21,473 INFO L290 TraceCheckUtils]: 10: Hoare triple {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:07:21,473 INFO L290 TraceCheckUtils]: 9: Hoare triple {28065#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-15 01:07:21,474 INFO L290 TraceCheckUtils]: 8: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28065#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-15 01:07:21,474 INFO L290 TraceCheckUtils]: 7: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28025#true} is VALID [2022-04-15 01:07:21,474 INFO L290 TraceCheckUtils]: 6: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28025#true} is VALID [2022-04-15 01:07:21,474 INFO L290 TraceCheckUtils]: 5: Hoare triple {28025#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {28025#true} is VALID [2022-04-15 01:07:21,474 INFO L272 TraceCheckUtils]: 4: Hoare triple {28025#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-15 01:07:21,475 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28025#true} {28025#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-15 01:07:21,475 INFO L290 TraceCheckUtils]: 2: Hoare triple {28025#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-15 01:07:21,475 INFO L290 TraceCheckUtils]: 1: Hoare triple {28025#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28025#true} is VALID [2022-04-15 01:07:21,475 INFO L272 TraceCheckUtils]: 0: Hoare triple {28025#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-15 01:07:21,475 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2022-04-15 01:07:21,475 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [545438640] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:07:21,475 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:07:21,475 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 7, 7] total 15 [2022-04-15 01:07:21,475 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [351183007] [2022-04-15 01:07:21,475 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:07:21,476 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-15 01:07:21,476 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:07:21,476 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:21,507 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:07:21,507 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-15 01:07:21,507 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:07:21,507 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-15 01:07:21,508 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=150, Unknown=0, NotChecked=0, Total=210 [2022-04-15 01:07:21,508 INFO L87 Difference]: Start difference. First operand 278 states and 378 transitions. Second operand has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:23,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:07:23,665 INFO L93 Difference]: Finished difference Result 493 states and 712 transitions. [2022-04-15 01:07:23,666 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-04-15 01:07:23,666 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-15 01:07:23,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:07:23,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:23,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 130 transitions. [2022-04-15 01:07:23,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:23,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 130 transitions. [2022-04-15 01:07:23,668 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 130 transitions. [2022-04-15 01:07:23,810 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 130 edges. 130 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:07:23,819 INFO L225 Difference]: With dead ends: 493 [2022-04-15 01:07:23,819 INFO L226 Difference]: Without dead ends: 474 [2022-04-15 01:07:23,820 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 114 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=245, Invalid=685, Unknown=0, NotChecked=0, Total=930 [2022-04-15 01:07:23,820 INFO L913 BasicCegarLoop]: 36 mSDtfsCounter, 141 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 263 mSolverCounterSat, 133 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 141 SdHoareTripleChecker+Valid, 68 SdHoareTripleChecker+Invalid, 396 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 133 IncrementalHoareTripleChecker+Valid, 263 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-15 01:07:23,820 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [141 Valid, 68 Invalid, 396 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [133 Valid, 263 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-15 01:07:23,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 474 states. [2022-04-15 01:07:24,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 474 to 381. [2022-04-15 01:07:24,726 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:07:24,726 INFO L82 GeneralOperation]: Start isEquivalent. First operand 474 states. Second operand has 381 states, 376 states have (on average 1.428191489361702) internal successors, (537), 376 states have internal predecessors, (537), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:24,726 INFO L74 IsIncluded]: Start isIncluded. First operand 474 states. Second operand has 381 states, 376 states have (on average 1.428191489361702) internal successors, (537), 376 states have internal predecessors, (537), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:24,727 INFO L87 Difference]: Start difference. First operand 474 states. Second operand has 381 states, 376 states have (on average 1.428191489361702) internal successors, (537), 376 states have internal predecessors, (537), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:24,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:07:24,734 INFO L93 Difference]: Finished difference Result 474 states and 658 transitions. [2022-04-15 01:07:24,734 INFO L276 IsEmpty]: Start isEmpty. Operand 474 states and 658 transitions. [2022-04-15 01:07:24,735 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:07:24,735 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:07:24,735 INFO L74 IsIncluded]: Start isIncluded. First operand has 381 states, 376 states have (on average 1.428191489361702) internal successors, (537), 376 states have internal predecessors, (537), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 474 states. [2022-04-15 01:07:24,735 INFO L87 Difference]: Start difference. First operand has 381 states, 376 states have (on average 1.428191489361702) internal successors, (537), 376 states have internal predecessors, (537), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 474 states. [2022-04-15 01:07:24,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:07:24,743 INFO L93 Difference]: Finished difference Result 474 states and 658 transitions. [2022-04-15 01:07:24,743 INFO L276 IsEmpty]: Start isEmpty. Operand 474 states and 658 transitions. [2022-04-15 01:07:24,743 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:07:24,743 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:07:24,743 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:07:24,743 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:07:24,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 381 states, 376 states have (on average 1.428191489361702) internal successors, (537), 376 states have internal predecessors, (537), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:24,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 381 states to 381 states and 541 transitions. [2022-04-15 01:07:24,750 INFO L78 Accepts]: Start accepts. Automaton has 381 states and 541 transitions. Word has length 34 [2022-04-15 01:07:24,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:07:24,750 INFO L478 AbstractCegarLoop]: Abstraction has 381 states and 541 transitions. [2022-04-15 01:07:24,750 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:24,750 INFO L276 IsEmpty]: Start isEmpty. Operand 381 states and 541 transitions. [2022-04-15 01:07:24,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-04-15 01:07:24,750 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:07:24,750 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:07:24,771 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2022-04-15 01:07:24,963 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2022-04-15 01:07:24,963 INFO L403 AbstractCegarLoop]: === Iteration 27 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:07:24,964 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:07:24,964 INFO L85 PathProgramCache]: Analyzing trace with hash 1440953804, now seen corresponding path program 8 times [2022-04-15 01:07:24,964 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:07:24,964 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1506668421] [2022-04-15 01:07:24,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:07:24,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:07:24,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:25,372 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:07:25,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:25,375 INFO L290 TraceCheckUtils]: 0: Hoare triple {30462#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {30444#true} is VALID [2022-04-15 01:07:25,375 INFO L290 TraceCheckUtils]: 1: Hoare triple {30444#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-15 01:07:25,375 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30444#true} {30444#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-15 01:07:25,375 INFO L272 TraceCheckUtils]: 0: Hoare triple {30444#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30462#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:07:25,375 INFO L290 TraceCheckUtils]: 1: Hoare triple {30462#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {30444#true} is VALID [2022-04-15 01:07:25,375 INFO L290 TraceCheckUtils]: 2: Hoare triple {30444#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-15 01:07:25,375 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30444#true} {30444#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-15 01:07:25,375 INFO L272 TraceCheckUtils]: 4: Hoare triple {30444#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-15 01:07:25,376 INFO L290 TraceCheckUtils]: 5: Hoare triple {30444#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:07:25,377 INFO L290 TraceCheckUtils]: 6: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30450#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0) 1) 4294967296) 4294967296) 4294967294)))} is VALID [2022-04-15 01:07:25,380 INFO L290 TraceCheckUtils]: 7: Hoare triple {30450#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0) 1) 4294967296) 4294967296) 4294967294)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30451#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 2 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296)) 4294967293)))} is VALID [2022-04-15 01:07:25,388 INFO L290 TraceCheckUtils]: 8: Hoare triple {30451#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 2 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296)) 4294967293)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30452#(and (< (div main_~n~0 4294967296) (+ (div main_~x~0 4294967296) 1)) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 01:07:25,389 INFO L290 TraceCheckUtils]: 9: Hoare triple {30452#(and (< (div main_~n~0 4294967296) (+ (div main_~x~0 4294967296) 1)) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 01:07:25,390 INFO L290 TraceCheckUtils]: 10: Hoare triple {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {30454#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0) (<= (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) main_~x~0))} is VALID [2022-04-15 01:07:25,390 INFO L290 TraceCheckUtils]: 11: Hoare triple {30454#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0) (<= (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) main_~x~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {30454#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0) (<= (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) main_~x~0))} is VALID [2022-04-15 01:07:25,391 INFO L290 TraceCheckUtils]: 12: Hoare triple {30454#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0) (<= (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) main_~x~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30455#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 1) main_~x~0) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 01:07:25,392 INFO L290 TraceCheckUtils]: 13: Hoare triple {30455#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 1) main_~x~0) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30456#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 01:07:25,393 INFO L290 TraceCheckUtils]: 14: Hoare triple {30456#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30457#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 01:07:25,394 INFO L290 TraceCheckUtils]: 15: Hoare triple {30457#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} is VALID [2022-04-15 01:07:25,395 INFO L290 TraceCheckUtils]: 16: Hoare triple {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} is VALID [2022-04-15 01:07:25,395 INFO L290 TraceCheckUtils]: 17: Hoare triple {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} is VALID [2022-04-15 01:07:25,396 INFO L290 TraceCheckUtils]: 18: Hoare triple {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} is VALID [2022-04-15 01:07:25,396 INFO L290 TraceCheckUtils]: 19: Hoare triple {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} is VALID [2022-04-15 01:07:25,397 INFO L290 TraceCheckUtils]: 20: Hoare triple {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} is VALID [2022-04-15 01:07:25,397 INFO L290 TraceCheckUtils]: 21: Hoare triple {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} is VALID [2022-04-15 01:07:25,398 INFO L290 TraceCheckUtils]: 22: Hoare triple {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30457#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 01:07:25,401 INFO L290 TraceCheckUtils]: 23: Hoare triple {30457#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30456#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 01:07:25,408 INFO L290 TraceCheckUtils]: 24: Hoare triple {30456#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30455#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 1) main_~x~0) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 01:07:25,409 INFO L290 TraceCheckUtils]: 25: Hoare triple {30455#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 1) main_~x~0) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30454#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0) (<= (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) main_~x~0))} is VALID [2022-04-15 01:07:25,410 INFO L290 TraceCheckUtils]: 26: Hoare triple {30454#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0) (<= (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) main_~x~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {30454#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0) (<= (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) main_~x~0))} is VALID [2022-04-15 01:07:25,411 INFO L290 TraceCheckUtils]: 27: Hoare triple {30454#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0) (<= (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) main_~x~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30455#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 1) main_~x~0) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-15 01:07:25,412 INFO L290 TraceCheckUtils]: 28: Hoare triple {30455#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 1) main_~x~0) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30456#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-15 01:07:25,413 INFO L290 TraceCheckUtils]: 29: Hoare triple {30456#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30457#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-15 01:07:25,414 INFO L290 TraceCheckUtils]: 30: Hoare triple {30457#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:07:25,414 INFO L290 TraceCheckUtils]: 31: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:07:25,415 INFO L272 TraceCheckUtils]: 32: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {30460#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 01:07:25,415 INFO L290 TraceCheckUtils]: 33: Hoare triple {30460#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {30461#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 01:07:25,415 INFO L290 TraceCheckUtils]: 34: Hoare triple {30461#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {30445#false} is VALID [2022-04-15 01:07:25,416 INFO L290 TraceCheckUtils]: 35: Hoare triple {30445#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30445#false} is VALID [2022-04-15 01:07:25,416 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-15 01:07:25,416 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:07:25,416 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1506668421] [2022-04-15 01:07:25,416 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1506668421] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:07:25,416 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1246204018] [2022-04-15 01:07:25,416 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 01:07:25,416 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:07:25,416 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:07:25,417 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:07:25,418 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-04-15 01:07:25,457 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 01:07:25,458 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:07:25,458 INFO L263 TraceCheckSpWp]: Trace formula consists of 161 conjuncts, 37 conjunts are in the unsatisfiable core [2022-04-15 01:07:25,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:25,466 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:07:25,728 INFO L272 TraceCheckUtils]: 0: Hoare triple {30444#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-15 01:07:25,729 INFO L290 TraceCheckUtils]: 1: Hoare triple {30444#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {30444#true} is VALID [2022-04-15 01:07:25,729 INFO L290 TraceCheckUtils]: 2: Hoare triple {30444#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-15 01:07:25,729 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30444#true} {30444#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-15 01:07:25,729 INFO L272 TraceCheckUtils]: 4: Hoare triple {30444#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-15 01:07:25,729 INFO L290 TraceCheckUtils]: 5: Hoare triple {30444#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:07:25,730 INFO L290 TraceCheckUtils]: 6: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30484#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-15 01:07:25,730 INFO L290 TraceCheckUtils]: 7: Hoare triple {30484#(= (+ main_~x~0 1) main_~n~0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30488#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-15 01:07:25,731 INFO L290 TraceCheckUtils]: 8: Hoare triple {30488#(= main_~n~0 (+ main_~x~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30492#(= (+ main_~x~0 3) main_~n~0)} is VALID [2022-04-15 01:07:25,731 INFO L290 TraceCheckUtils]: 9: Hoare triple {30492#(= (+ main_~x~0 3) main_~n~0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 01:07:25,732 INFO L290 TraceCheckUtils]: 10: Hoare triple {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 01:07:25,732 INFO L290 TraceCheckUtils]: 11: Hoare triple {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 01:07:25,733 INFO L290 TraceCheckUtils]: 12: Hoare triple {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30492#(= (+ main_~x~0 3) main_~n~0)} is VALID [2022-04-15 01:07:25,733 INFO L290 TraceCheckUtils]: 13: Hoare triple {30492#(= (+ main_~x~0 3) main_~n~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30488#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-15 01:07:25,734 INFO L290 TraceCheckUtils]: 14: Hoare triple {30488#(= main_~n~0 (+ main_~x~0 2))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30484#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-15 01:07:25,734 INFO L290 TraceCheckUtils]: 15: Hoare triple {30484#(= (+ main_~x~0 1) main_~n~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:07:25,734 INFO L290 TraceCheckUtils]: 16: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:07:25,735 INFO L290 TraceCheckUtils]: 17: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:07:25,735 INFO L290 TraceCheckUtils]: 18: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:07:25,736 INFO L290 TraceCheckUtils]: 19: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:07:25,736 INFO L290 TraceCheckUtils]: 20: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:07:25,736 INFO L290 TraceCheckUtils]: 21: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:07:25,737 INFO L290 TraceCheckUtils]: 22: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30484#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-15 01:07:25,737 INFO L290 TraceCheckUtils]: 23: Hoare triple {30484#(= (+ main_~x~0 1) main_~n~0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30488#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-15 01:07:25,738 INFO L290 TraceCheckUtils]: 24: Hoare triple {30488#(= main_~n~0 (+ main_~x~0 2))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30492#(= (+ main_~x~0 3) main_~n~0)} is VALID [2022-04-15 01:07:25,738 INFO L290 TraceCheckUtils]: 25: Hoare triple {30492#(= (+ main_~x~0 3) main_~n~0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 01:07:25,739 INFO L290 TraceCheckUtils]: 26: Hoare triple {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-15 01:07:25,739 INFO L290 TraceCheckUtils]: 27: Hoare triple {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30492#(= (+ main_~x~0 3) main_~n~0)} is VALID [2022-04-15 01:07:25,740 INFO L290 TraceCheckUtils]: 28: Hoare triple {30492#(= (+ main_~x~0 3) main_~n~0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30488#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-15 01:07:25,740 INFO L290 TraceCheckUtils]: 29: Hoare triple {30488#(= main_~n~0 (+ main_~x~0 2))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30484#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-15 01:07:25,741 INFO L290 TraceCheckUtils]: 30: Hoare triple {30484#(= (+ main_~x~0 1) main_~n~0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:07:25,741 INFO L290 TraceCheckUtils]: 31: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-15 01:07:25,742 INFO L272 TraceCheckUtils]: 32: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {30565#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:07:25,742 INFO L290 TraceCheckUtils]: 33: Hoare triple {30565#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {30569#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:07:25,742 INFO L290 TraceCheckUtils]: 34: Hoare triple {30569#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {30445#false} is VALID [2022-04-15 01:07:25,743 INFO L290 TraceCheckUtils]: 35: Hoare triple {30445#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30445#false} is VALID [2022-04-15 01:07:25,743 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-15 01:07:25,743 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:07:26,221 INFO L290 TraceCheckUtils]: 35: Hoare triple {30445#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30445#false} is VALID [2022-04-15 01:07:26,221 INFO L290 TraceCheckUtils]: 34: Hoare triple {30569#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {30445#false} is VALID [2022-04-15 01:07:26,221 INFO L290 TraceCheckUtils]: 33: Hoare triple {30565#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {30569#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 01:07:26,222 INFO L272 TraceCheckUtils]: 32: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {30565#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 01:07:26,223 INFO L290 TraceCheckUtils]: 31: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:07:26,224 INFO L290 TraceCheckUtils]: 30: Hoare triple {30591#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:07:26,225 INFO L290 TraceCheckUtils]: 29: Hoare triple {30595#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30591#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-15 01:07:26,226 INFO L290 TraceCheckUtils]: 28: Hoare triple {30599#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30595#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-15 01:07:26,227 INFO L290 TraceCheckUtils]: 27: Hoare triple {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30599#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} is VALID [2022-04-15 01:07:26,228 INFO L290 TraceCheckUtils]: 26: Hoare triple {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-15 01:07:26,229 INFO L290 TraceCheckUtils]: 25: Hoare triple {30599#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-15 01:07:26,230 INFO L290 TraceCheckUtils]: 24: Hoare triple {30595#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30599#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} is VALID [2022-04-15 01:07:26,230 INFO L290 TraceCheckUtils]: 23: Hoare triple {30591#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30595#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-15 01:07:26,232 INFO L290 TraceCheckUtils]: 22: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30591#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-15 01:07:26,232 INFO L290 TraceCheckUtils]: 21: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:07:26,233 INFO L290 TraceCheckUtils]: 20: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:07:26,233 INFO L290 TraceCheckUtils]: 19: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:07:26,234 INFO L290 TraceCheckUtils]: 18: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:07:26,234 INFO L290 TraceCheckUtils]: 17: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:07:26,235 INFO L290 TraceCheckUtils]: 16: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:07:26,236 INFO L290 TraceCheckUtils]: 15: Hoare triple {30591#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:07:26,237 INFO L290 TraceCheckUtils]: 14: Hoare triple {30595#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30591#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-15 01:07:26,238 INFO L290 TraceCheckUtils]: 13: Hoare triple {30599#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30595#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-15 01:07:26,239 INFO L290 TraceCheckUtils]: 12: Hoare triple {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30599#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} is VALID [2022-04-15 01:07:26,239 INFO L290 TraceCheckUtils]: 11: Hoare triple {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-15 01:07:26,240 INFO L290 TraceCheckUtils]: 10: Hoare triple {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-15 01:07:26,241 INFO L290 TraceCheckUtils]: 9: Hoare triple {30599#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-15 01:07:26,242 INFO L290 TraceCheckUtils]: 8: Hoare triple {30595#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30599#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} is VALID [2022-04-15 01:07:26,243 INFO L290 TraceCheckUtils]: 7: Hoare triple {30591#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30595#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-15 01:07:26,244 INFO L290 TraceCheckUtils]: 6: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30591#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-15 01:07:26,244 INFO L290 TraceCheckUtils]: 5: Hoare triple {30444#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-15 01:07:26,244 INFO L272 TraceCheckUtils]: 4: Hoare triple {30444#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-15 01:07:26,244 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30444#true} {30444#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-15 01:07:26,244 INFO L290 TraceCheckUtils]: 2: Hoare triple {30444#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-15 01:07:26,244 INFO L290 TraceCheckUtils]: 1: Hoare triple {30444#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {30444#true} is VALID [2022-04-15 01:07:26,244 INFO L272 TraceCheckUtils]: 0: Hoare triple {30444#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-15 01:07:26,245 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-15 01:07:26,245 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1246204018] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:07:26,245 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:07:26,245 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 9, 9] total 25 [2022-04-15 01:07:26,245 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1111618173] [2022-04-15 01:07:26,245 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:07:26,259 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 3.12) internal successors, (78), 22 states have internal predecessors, (78), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-15 01:07:26,261 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:07:26,261 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 25 states, 25 states have (on average 3.12) internal successors, (78), 22 states have internal predecessors, (78), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:26,357 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 85 edges. 85 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:07:26,357 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-04-15 01:07:26,357 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:07:26,358 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-04-15 01:07:26,358 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=527, Unknown=0, NotChecked=0, Total=600 [2022-04-15 01:07:26,358 INFO L87 Difference]: Start difference. First operand 381 states and 541 transitions. Second operand has 25 states, 25 states have (on average 3.12) internal successors, (78), 22 states have internal predecessors, (78), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:28,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:07:28,795 INFO L93 Difference]: Finished difference Result 391 states and 550 transitions. [2022-04-15 01:07:28,795 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-15 01:07:28,795 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 3.12) internal successors, (78), 22 states have internal predecessors, (78), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-15 01:07:28,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:07:28,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 3.12) internal successors, (78), 22 states have internal predecessors, (78), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:28,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 49 transitions. [2022-04-15 01:07:28,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 3.12) internal successors, (78), 22 states have internal predecessors, (78), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:28,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 49 transitions. [2022-04-15 01:07:28,797 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 49 transitions. [2022-04-15 01:07:28,848 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:07:28,853 INFO L225 Difference]: With dead ends: 391 [2022-04-15 01:07:28,853 INFO L226 Difference]: Without dead ends: 365 [2022-04-15 01:07:28,853 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 62 SyntacticMatches, 10 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 313 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=146, Invalid=1114, Unknown=0, NotChecked=0, Total=1260 [2022-04-15 01:07:28,854 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 25 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 370 mSolverCounterSat, 28 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 81 SdHoareTripleChecker+Invalid, 398 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 28 IncrementalHoareTripleChecker+Valid, 370 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-15 01:07:28,854 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [25 Valid, 81 Invalid, 398 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [28 Valid, 370 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-15 01:07:28,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 365 states. [2022-04-15 01:07:29,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 365 to 365. [2022-04-15 01:07:29,739 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:07:29,740 INFO L82 GeneralOperation]: Start isEquivalent. First operand 365 states. Second operand has 365 states, 360 states have (on average 1.4444444444444444) internal successors, (520), 360 states have internal predecessors, (520), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:29,740 INFO L74 IsIncluded]: Start isIncluded. First operand 365 states. Second operand has 365 states, 360 states have (on average 1.4444444444444444) internal successors, (520), 360 states have internal predecessors, (520), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:29,740 INFO L87 Difference]: Start difference. First operand 365 states. Second operand has 365 states, 360 states have (on average 1.4444444444444444) internal successors, (520), 360 states have internal predecessors, (520), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:29,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:07:29,745 INFO L93 Difference]: Finished difference Result 365 states and 524 transitions. [2022-04-15 01:07:29,745 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 524 transitions. [2022-04-15 01:07:29,745 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:07:29,745 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:07:29,746 INFO L74 IsIncluded]: Start isIncluded. First operand has 365 states, 360 states have (on average 1.4444444444444444) internal successors, (520), 360 states have internal predecessors, (520), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 365 states. [2022-04-15 01:07:29,746 INFO L87 Difference]: Start difference. First operand has 365 states, 360 states have (on average 1.4444444444444444) internal successors, (520), 360 states have internal predecessors, (520), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 365 states. [2022-04-15 01:07:29,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:07:29,750 INFO L93 Difference]: Finished difference Result 365 states and 524 transitions. [2022-04-15 01:07:29,750 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 524 transitions. [2022-04-15 01:07:29,751 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:07:29,751 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:07:29,751 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:07:29,751 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:07:29,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 365 states, 360 states have (on average 1.4444444444444444) internal successors, (520), 360 states have internal predecessors, (520), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:29,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 365 states to 365 states and 524 transitions. [2022-04-15 01:07:29,757 INFO L78 Accepts]: Start accepts. Automaton has 365 states and 524 transitions. Word has length 36 [2022-04-15 01:07:29,757 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:07:29,757 INFO L478 AbstractCegarLoop]: Abstraction has 365 states and 524 transitions. [2022-04-15 01:07:29,757 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 3.12) internal successors, (78), 22 states have internal predecessors, (78), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:29,757 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 524 transitions. [2022-04-15 01:07:29,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-04-15 01:07:29,757 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:07:29,757 INFO L499 BasicCegarLoop]: trace histogram [8, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:07:29,774 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-04-15 01:07:29,973 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2022-04-15 01:07:29,973 INFO L403 AbstractCegarLoop]: === Iteration 28 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:07:29,974 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:07:29,974 INFO L85 PathProgramCache]: Analyzing trace with hash -696091028, now seen corresponding path program 6 times [2022-04-15 01:07:29,974 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:07:29,974 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [772656983] [2022-04-15 01:07:29,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:07:29,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:07:29,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:30,171 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:07:30,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:30,174 INFO L290 TraceCheckUtils]: 0: Hoare triple {32541#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32522#true} is VALID [2022-04-15 01:07:30,174 INFO L290 TraceCheckUtils]: 1: Hoare triple {32522#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-15 01:07:30,174 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {32522#true} {32522#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-15 01:07:30,175 INFO L272 TraceCheckUtils]: 0: Hoare triple {32522#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32541#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:07:30,175 INFO L290 TraceCheckUtils]: 1: Hoare triple {32541#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32522#true} is VALID [2022-04-15 01:07:30,175 INFO L290 TraceCheckUtils]: 2: Hoare triple {32522#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-15 01:07:30,175 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {32522#true} {32522#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-15 01:07:30,175 INFO L272 TraceCheckUtils]: 4: Hoare triple {32522#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-15 01:07:30,175 INFO L290 TraceCheckUtils]: 5: Hoare triple {32522#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {32527#(= main_~y~0 0)} is VALID [2022-04-15 01:07:30,176 INFO L290 TraceCheckUtils]: 6: Hoare triple {32527#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32528#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:07:30,176 INFO L290 TraceCheckUtils]: 7: Hoare triple {32528#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32529#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:07:30,177 INFO L290 TraceCheckUtils]: 8: Hoare triple {32529#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32530#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:07:30,177 INFO L290 TraceCheckUtils]: 9: Hoare triple {32530#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32531#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:07:30,178 INFO L290 TraceCheckUtils]: 10: Hoare triple {32531#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32532#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:07:30,178 INFO L290 TraceCheckUtils]: 11: Hoare triple {32532#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32533#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:07:30,179 INFO L290 TraceCheckUtils]: 12: Hoare triple {32533#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {32533#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:07:30,179 INFO L290 TraceCheckUtils]: 13: Hoare triple {32533#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {32534#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 01:07:30,180 INFO L290 TraceCheckUtils]: 14: Hoare triple {32534#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32535#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:07:30,180 INFO L290 TraceCheckUtils]: 15: Hoare triple {32535#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32536#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:07:30,181 INFO L290 TraceCheckUtils]: 16: Hoare triple {32536#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32537#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-15 01:07:30,181 INFO L290 TraceCheckUtils]: 17: Hoare triple {32537#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32538#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-15 01:07:30,182 INFO L290 TraceCheckUtils]: 18: Hoare triple {32538#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32539#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-15 01:07:30,182 INFO L290 TraceCheckUtils]: 19: Hoare triple {32539#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32540#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-15 01:07:30,183 INFO L290 TraceCheckUtils]: 20: Hoare triple {32540#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32523#false} is VALID [2022-04-15 01:07:30,183 INFO L290 TraceCheckUtils]: 21: Hoare triple {32523#false} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32523#false} is VALID [2022-04-15 01:07:30,183 INFO L290 TraceCheckUtils]: 22: Hoare triple {32523#false} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-15 01:07:30,183 INFO L290 TraceCheckUtils]: 23: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-15 01:07:30,183 INFO L290 TraceCheckUtils]: 24: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-15 01:07:30,183 INFO L290 TraceCheckUtils]: 25: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-15 01:07:30,183 INFO L290 TraceCheckUtils]: 26: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-15 01:07:30,183 INFO L290 TraceCheckUtils]: 27: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-15 01:07:30,183 INFO L290 TraceCheckUtils]: 28: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-15 01:07:30,183 INFO L290 TraceCheckUtils]: 29: Hoare triple {32523#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-15 01:07:30,183 INFO L290 TraceCheckUtils]: 30: Hoare triple {32523#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-15 01:07:30,183 INFO L290 TraceCheckUtils]: 31: Hoare triple {32523#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-15 01:07:30,183 INFO L272 TraceCheckUtils]: 32: Hoare triple {32523#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {32523#false} is VALID [2022-04-15 01:07:30,183 INFO L290 TraceCheckUtils]: 33: Hoare triple {32523#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {32523#false} is VALID [2022-04-15 01:07:30,184 INFO L290 TraceCheckUtils]: 34: Hoare triple {32523#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-15 01:07:30,184 INFO L290 TraceCheckUtils]: 35: Hoare triple {32523#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-15 01:07:30,184 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 14 proven. 42 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-15 01:07:30,184 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:07:30,184 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [772656983] [2022-04-15 01:07:30,184 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [772656983] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:07:30,184 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [220447022] [2022-04-15 01:07:30,184 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-15 01:07:30,184 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:07:30,184 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:07:30,185 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:07:30,186 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-04-15 01:07:30,298 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2022-04-15 01:07:30,298 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:07:30,300 INFO L263 TraceCheckSpWp]: Trace formula consists of 161 conjuncts, 42 conjunts are in the unsatisfiable core [2022-04-15 01:07:30,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:30,310 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:07:30,572 INFO L272 TraceCheckUtils]: 0: Hoare triple {32522#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-15 01:07:30,572 INFO L290 TraceCheckUtils]: 1: Hoare triple {32522#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32522#true} is VALID [2022-04-15 01:07:30,573 INFO L290 TraceCheckUtils]: 2: Hoare triple {32522#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-15 01:07:30,573 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {32522#true} {32522#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-15 01:07:30,573 INFO L272 TraceCheckUtils]: 4: Hoare triple {32522#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-15 01:07:30,578 INFO L290 TraceCheckUtils]: 5: Hoare triple {32522#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {32527#(= main_~y~0 0)} is VALID [2022-04-15 01:07:30,578 INFO L290 TraceCheckUtils]: 6: Hoare triple {32527#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32528#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:07:30,579 INFO L290 TraceCheckUtils]: 7: Hoare triple {32528#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32529#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:07:30,580 INFO L290 TraceCheckUtils]: 8: Hoare triple {32529#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32530#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:07:30,580 INFO L290 TraceCheckUtils]: 9: Hoare triple {32530#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32531#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:07:30,581 INFO L290 TraceCheckUtils]: 10: Hoare triple {32531#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32532#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:07:30,581 INFO L290 TraceCheckUtils]: 11: Hoare triple {32532#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32533#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:07:30,582 INFO L290 TraceCheckUtils]: 12: Hoare triple {32533#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {32533#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:07:30,582 INFO L290 TraceCheckUtils]: 13: Hoare triple {32533#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {32584#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} is VALID [2022-04-15 01:07:30,582 INFO L290 TraceCheckUtils]: 14: Hoare triple {32584#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32588#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-15 01:07:30,583 INFO L290 TraceCheckUtils]: 15: Hoare triple {32588#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32592#(and (<= main_~y~0 6) (= main_~y~0 (+ main_~z~0 2)) (<= 6 main_~y~0))} is VALID [2022-04-15 01:07:30,584 INFO L290 TraceCheckUtils]: 16: Hoare triple {32592#(and (<= main_~y~0 6) (= main_~y~0 (+ main_~z~0 2)) (<= 6 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32596#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:07:30,584 INFO L290 TraceCheckUtils]: 17: Hoare triple {32596#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32600#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} is VALID [2022-04-15 01:07:30,585 INFO L290 TraceCheckUtils]: 18: Hoare triple {32600#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32604#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 2)) (<= 6 main_~y~0))} is VALID [2022-04-15 01:07:30,586 INFO L290 TraceCheckUtils]: 19: Hoare triple {32604#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 2)) (<= 6 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32608#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 3)) (<= 6 main_~y~0))} is VALID [2022-04-15 01:07:30,586 INFO L290 TraceCheckUtils]: 20: Hoare triple {32608#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 3)) (<= 6 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32523#false} is VALID [2022-04-15 01:07:30,586 INFO L290 TraceCheckUtils]: 21: Hoare triple {32523#false} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32523#false} is VALID [2022-04-15 01:07:30,586 INFO L290 TraceCheckUtils]: 22: Hoare triple {32523#false} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-15 01:07:30,586 INFO L290 TraceCheckUtils]: 23: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-15 01:07:30,586 INFO L290 TraceCheckUtils]: 24: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-15 01:07:30,587 INFO L290 TraceCheckUtils]: 25: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-15 01:07:30,587 INFO L290 TraceCheckUtils]: 26: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-15 01:07:30,587 INFO L290 TraceCheckUtils]: 27: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-15 01:07:30,587 INFO L290 TraceCheckUtils]: 28: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-15 01:07:30,587 INFO L290 TraceCheckUtils]: 29: Hoare triple {32523#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-15 01:07:30,587 INFO L290 TraceCheckUtils]: 30: Hoare triple {32523#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-15 01:07:30,587 INFO L290 TraceCheckUtils]: 31: Hoare triple {32523#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-15 01:07:30,587 INFO L272 TraceCheckUtils]: 32: Hoare triple {32523#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {32523#false} is VALID [2022-04-15 01:07:30,587 INFO L290 TraceCheckUtils]: 33: Hoare triple {32523#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {32523#false} is VALID [2022-04-15 01:07:30,587 INFO L290 TraceCheckUtils]: 34: Hoare triple {32523#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-15 01:07:30,587 INFO L290 TraceCheckUtils]: 35: Hoare triple {32523#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-15 01:07:30,587 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 14 proven. 42 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-15 01:07:30,588 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:07:31,042 INFO L290 TraceCheckUtils]: 35: Hoare triple {32523#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-15 01:07:31,042 INFO L290 TraceCheckUtils]: 34: Hoare triple {32523#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-15 01:07:31,042 INFO L290 TraceCheckUtils]: 33: Hoare triple {32523#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {32523#false} is VALID [2022-04-15 01:07:31,042 INFO L272 TraceCheckUtils]: 32: Hoare triple {32523#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {32523#false} is VALID [2022-04-15 01:07:31,042 INFO L290 TraceCheckUtils]: 31: Hoare triple {32523#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-15 01:07:31,042 INFO L290 TraceCheckUtils]: 30: Hoare triple {32523#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-15 01:07:31,043 INFO L290 TraceCheckUtils]: 29: Hoare triple {32675#(< 0 (mod main_~y~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-15 01:07:31,043 INFO L290 TraceCheckUtils]: 28: Hoare triple {32679#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32675#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:07:31,044 INFO L290 TraceCheckUtils]: 27: Hoare triple {32683#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32679#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:07:31,046 INFO L290 TraceCheckUtils]: 26: Hoare triple {32687#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32683#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:31,046 INFO L290 TraceCheckUtils]: 25: Hoare triple {32691#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32687#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 01:07:31,047 INFO L290 TraceCheckUtils]: 24: Hoare triple {32695#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32691#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-15 01:07:31,047 INFO L290 TraceCheckUtils]: 23: Hoare triple {32699#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32695#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-15 01:07:31,048 INFO L290 TraceCheckUtils]: 22: Hoare triple {32699#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {32699#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-15 01:07:31,048 INFO L290 TraceCheckUtils]: 21: Hoare triple {32699#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32699#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-15 01:07:31,048 INFO L290 TraceCheckUtils]: 20: Hoare triple {32709#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32699#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-15 01:07:31,049 INFO L290 TraceCheckUtils]: 19: Hoare triple {32713#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32709#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:07:31,050 INFO L290 TraceCheckUtils]: 18: Hoare triple {32717#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32713#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:07:31,051 INFO L290 TraceCheckUtils]: 17: Hoare triple {32721#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32717#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:07:31,052 INFO L290 TraceCheckUtils]: 16: Hoare triple {32725#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32721#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:07:31,053 INFO L290 TraceCheckUtils]: 15: Hoare triple {32729#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32725#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-15 01:07:31,053 INFO L290 TraceCheckUtils]: 14: Hoare triple {32733#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~z~0) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32729#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} is VALID [2022-04-15 01:07:31,054 INFO L290 TraceCheckUtils]: 13: Hoare triple {32522#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {32733#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~z~0) 4294967296))))} is VALID [2022-04-15 01:07:31,054 INFO L290 TraceCheckUtils]: 12: Hoare triple {32522#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-15 01:07:31,063 INFO L290 TraceCheckUtils]: 11: Hoare triple {32522#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32522#true} is VALID [2022-04-15 01:07:31,064 INFO L290 TraceCheckUtils]: 10: Hoare triple {32522#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32522#true} is VALID [2022-04-15 01:07:31,064 INFO L290 TraceCheckUtils]: 9: Hoare triple {32522#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32522#true} is VALID [2022-04-15 01:07:31,064 INFO L290 TraceCheckUtils]: 8: Hoare triple {32522#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32522#true} is VALID [2022-04-15 01:07:31,064 INFO L290 TraceCheckUtils]: 7: Hoare triple {32522#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32522#true} is VALID [2022-04-15 01:07:31,064 INFO L290 TraceCheckUtils]: 6: Hoare triple {32522#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32522#true} is VALID [2022-04-15 01:07:31,064 INFO L290 TraceCheckUtils]: 5: Hoare triple {32522#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {32522#true} is VALID [2022-04-15 01:07:31,064 INFO L272 TraceCheckUtils]: 4: Hoare triple {32522#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-15 01:07:31,064 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {32522#true} {32522#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-15 01:07:31,064 INFO L290 TraceCheckUtils]: 2: Hoare triple {32522#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-15 01:07:31,065 INFO L290 TraceCheckUtils]: 1: Hoare triple {32522#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32522#true} is VALID [2022-04-15 01:07:31,065 INFO L272 TraceCheckUtils]: 0: Hoare triple {32522#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-15 01:07:31,065 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 14 proven. 42 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-15 01:07:31,065 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [220447022] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:07:31,065 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:07:31,065 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16] total 38 [2022-04-15 01:07:31,065 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1933376609] [2022-04-15 01:07:31,065 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:07:31,066 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.4736842105263157) internal successors, (56), 37 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-15 01:07:31,066 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:07:31,066 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 38 states, 38 states have (on average 1.4736842105263157) internal successors, (56), 37 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:31,105 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:07:31,105 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-04-15 01:07:31,105 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:07:31,106 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-04-15 01:07:31,106 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=234, Invalid=1172, Unknown=0, NotChecked=0, Total=1406 [2022-04-15 01:07:31,106 INFO L87 Difference]: Start difference. First operand 365 states and 524 transitions. Second operand has 38 states, 38 states have (on average 1.4736842105263157) internal successors, (56), 37 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:50,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:07:50,988 INFO L93 Difference]: Finished difference Result 947 states and 1296 transitions. [2022-04-15 01:07:50,988 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 138 states. [2022-04-15 01:07:50,988 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.4736842105263157) internal successors, (56), 37 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-15 01:07:50,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:07:50,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.4736842105263157) internal successors, (56), 37 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:50,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 419 transitions. [2022-04-15 01:07:50,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.4736842105263157) internal successors, (56), 37 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:50,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 419 transitions. [2022-04-15 01:07:50,995 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 138 states and 419 transitions. [2022-04-15 01:07:51,681 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 419 edges. 419 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:07:51,708 INFO L225 Difference]: With dead ends: 947 [2022-04-15 01:07:51,708 INFO L226 Difference]: Without dead ends: 897 [2022-04-15 01:07:51,709 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 59 SyntacticMatches, 1 SemanticMatches, 171 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10587 ImplicationChecksByTransitivity, 7.7s TimeCoverageRelationStatistics Valid=4463, Invalid=25293, Unknown=0, NotChecked=0, Total=29756 [2022-04-15 01:07:51,710 INFO L913 BasicCegarLoop]: 37 mSDtfsCounter, 349 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 1818 mSolverCounterSat, 556 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 349 SdHoareTripleChecker+Valid, 129 SdHoareTripleChecker+Invalid, 2374 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 556 IncrementalHoareTripleChecker+Valid, 1818 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.4s IncrementalHoareTripleChecker+Time [2022-04-15 01:07:51,710 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [349 Valid, 129 Invalid, 2374 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [556 Valid, 1818 Invalid, 0 Unknown, 0 Unchecked, 5.4s Time] [2022-04-15 01:07:51,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 897 states. [2022-04-15 01:07:52,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 897 to 429. [2022-04-15 01:07:52,749 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:07:52,750 INFO L82 GeneralOperation]: Start isEquivalent. First operand 897 states. Second operand has 429 states, 424 states have (on average 1.4504716981132075) internal successors, (615), 424 states have internal predecessors, (615), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:52,750 INFO L74 IsIncluded]: Start isIncluded. First operand 897 states. Second operand has 429 states, 424 states have (on average 1.4504716981132075) internal successors, (615), 424 states have internal predecessors, (615), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:52,751 INFO L87 Difference]: Start difference. First operand 897 states. Second operand has 429 states, 424 states have (on average 1.4504716981132075) internal successors, (615), 424 states have internal predecessors, (615), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:52,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:07:52,774 INFO L93 Difference]: Finished difference Result 897 states and 1145 transitions. [2022-04-15 01:07:52,775 INFO L276 IsEmpty]: Start isEmpty. Operand 897 states and 1145 transitions. [2022-04-15 01:07:52,775 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:07:52,775 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:07:52,776 INFO L74 IsIncluded]: Start isIncluded. First operand has 429 states, 424 states have (on average 1.4504716981132075) internal successors, (615), 424 states have internal predecessors, (615), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 897 states. [2022-04-15 01:07:52,776 INFO L87 Difference]: Start difference. First operand has 429 states, 424 states have (on average 1.4504716981132075) internal successors, (615), 424 states have internal predecessors, (615), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 897 states. [2022-04-15 01:07:52,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:07:52,799 INFO L93 Difference]: Finished difference Result 897 states and 1145 transitions. [2022-04-15 01:07:52,799 INFO L276 IsEmpty]: Start isEmpty. Operand 897 states and 1145 transitions. [2022-04-15 01:07:52,800 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:07:52,800 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:07:52,800 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:07:52,800 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:07:52,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 429 states, 424 states have (on average 1.4504716981132075) internal successors, (615), 424 states have internal predecessors, (615), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:52,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 429 states to 429 states and 619 transitions. [2022-04-15 01:07:52,808 INFO L78 Accepts]: Start accepts. Automaton has 429 states and 619 transitions. Word has length 36 [2022-04-15 01:07:52,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:07:52,808 INFO L478 AbstractCegarLoop]: Abstraction has 429 states and 619 transitions. [2022-04-15 01:07:52,808 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 38 states have (on average 1.4736842105263157) internal successors, (56), 37 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:52,808 INFO L276 IsEmpty]: Start isEmpty. Operand 429 states and 619 transitions. [2022-04-15 01:07:52,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-04-15 01:07:52,808 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:07:52,808 INFO L499 BasicCegarLoop]: trace histogram [7, 7, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:07:52,812 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2022-04-15 01:07:53,012 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27,24 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:07:53,013 INFO L403 AbstractCegarLoop]: === Iteration 29 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:07:53,013 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:07:53,013 INFO L85 PathProgramCache]: Analyzing trace with hash -444944079, now seen corresponding path program 7 times [2022-04-15 01:07:53,013 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:07:53,013 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1307253455] [2022-04-15 01:07:53,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:07:53,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:07:53,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:53,187 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:07:53,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:53,190 INFO L290 TraceCheckUtils]: 0: Hoare triple {36578#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {36561#true} is VALID [2022-04-15 01:07:53,190 INFO L290 TraceCheckUtils]: 1: Hoare triple {36561#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-15 01:07:53,191 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {36561#true} {36561#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-15 01:07:53,191 INFO L272 TraceCheckUtils]: 0: Hoare triple {36561#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36578#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:07:53,191 INFO L290 TraceCheckUtils]: 1: Hoare triple {36578#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {36561#true} is VALID [2022-04-15 01:07:53,191 INFO L290 TraceCheckUtils]: 2: Hoare triple {36561#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-15 01:07:53,191 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36561#true} {36561#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-15 01:07:53,191 INFO L272 TraceCheckUtils]: 4: Hoare triple {36561#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-15 01:07:53,192 INFO L290 TraceCheckUtils]: 5: Hoare triple {36561#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {36566#(= main_~y~0 0)} is VALID [2022-04-15 01:07:53,192 INFO L290 TraceCheckUtils]: 6: Hoare triple {36566#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36567#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:07:53,193 INFO L290 TraceCheckUtils]: 7: Hoare triple {36567#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36568#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:07:53,193 INFO L290 TraceCheckUtils]: 8: Hoare triple {36568#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36569#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:07:53,194 INFO L290 TraceCheckUtils]: 9: Hoare triple {36569#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36570#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:07:53,194 INFO L290 TraceCheckUtils]: 10: Hoare triple {36570#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36571#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:07:53,195 INFO L290 TraceCheckUtils]: 11: Hoare triple {36571#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36572#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:07:53,195 INFO L290 TraceCheckUtils]: 12: Hoare triple {36572#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36573#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:07:53,196 INFO L290 TraceCheckUtils]: 13: Hoare triple {36573#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {36573#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:07:53,196 INFO L290 TraceCheckUtils]: 14: Hoare triple {36573#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {36574#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-15 01:07:53,197 INFO L290 TraceCheckUtils]: 15: Hoare triple {36574#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {36575#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 01:07:53,197 INFO L290 TraceCheckUtils]: 16: Hoare triple {36575#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {36576#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:07:53,198 INFO L290 TraceCheckUtils]: 17: Hoare triple {36576#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {36577#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 01:07:53,198 INFO L290 TraceCheckUtils]: 18: Hoare triple {36577#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-15 01:07:53,198 INFO L290 TraceCheckUtils]: 19: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,198 INFO L290 TraceCheckUtils]: 20: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,198 INFO L290 TraceCheckUtils]: 21: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,198 INFO L290 TraceCheckUtils]: 22: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,198 INFO L290 TraceCheckUtils]: 23: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,199 INFO L290 TraceCheckUtils]: 24: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,199 INFO L290 TraceCheckUtils]: 25: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,199 INFO L290 TraceCheckUtils]: 26: Hoare triple {36562#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-15 01:07:53,199 INFO L290 TraceCheckUtils]: 27: Hoare triple {36562#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {36562#false} is VALID [2022-04-15 01:07:53,199 INFO L290 TraceCheckUtils]: 28: Hoare triple {36562#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {36562#false} is VALID [2022-04-15 01:07:53,199 INFO L290 TraceCheckUtils]: 29: Hoare triple {36562#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {36562#false} is VALID [2022-04-15 01:07:53,199 INFO L290 TraceCheckUtils]: 30: Hoare triple {36562#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-15 01:07:53,199 INFO L290 TraceCheckUtils]: 31: Hoare triple {36562#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-15 01:07:53,199 INFO L272 TraceCheckUtils]: 32: Hoare triple {36562#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {36562#false} is VALID [2022-04-15 01:07:53,199 INFO L290 TraceCheckUtils]: 33: Hoare triple {36562#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {36562#false} is VALID [2022-04-15 01:07:53,199 INFO L290 TraceCheckUtils]: 34: Hoare triple {36562#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-15 01:07:53,199 INFO L290 TraceCheckUtils]: 35: Hoare triple {36562#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-15 01:07:53,200 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2022-04-15 01:07:53,200 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:07:53,200 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1307253455] [2022-04-15 01:07:53,200 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1307253455] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:07:53,200 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2113829513] [2022-04-15 01:07:53,200 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-15 01:07:53,200 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:07:53,200 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:07:53,201 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:07:53,202 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-04-15 01:07:53,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:53,244 INFO L263 TraceCheckSpWp]: Trace formula consists of 161 conjuncts, 25 conjunts are in the unsatisfiable core [2022-04-15 01:07:53,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:07:53,251 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:07:53,499 INFO L272 TraceCheckUtils]: 0: Hoare triple {36561#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-15 01:07:53,500 INFO L290 TraceCheckUtils]: 1: Hoare triple {36561#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {36561#true} is VALID [2022-04-15 01:07:53,500 INFO L290 TraceCheckUtils]: 2: Hoare triple {36561#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-15 01:07:53,500 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36561#true} {36561#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-15 01:07:53,500 INFO L272 TraceCheckUtils]: 4: Hoare triple {36561#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-15 01:07:53,500 INFO L290 TraceCheckUtils]: 5: Hoare triple {36561#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {36566#(= main_~y~0 0)} is VALID [2022-04-15 01:07:53,501 INFO L290 TraceCheckUtils]: 6: Hoare triple {36566#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36567#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:07:53,501 INFO L290 TraceCheckUtils]: 7: Hoare triple {36567#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36568#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:07:53,502 INFO L290 TraceCheckUtils]: 8: Hoare triple {36568#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36569#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:07:53,502 INFO L290 TraceCheckUtils]: 9: Hoare triple {36569#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36570#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:07:53,503 INFO L290 TraceCheckUtils]: 10: Hoare triple {36570#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36571#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:07:53,503 INFO L290 TraceCheckUtils]: 11: Hoare triple {36571#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36572#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:07:53,504 INFO L290 TraceCheckUtils]: 12: Hoare triple {36572#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36573#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:07:53,504 INFO L290 TraceCheckUtils]: 13: Hoare triple {36573#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {36573#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:07:53,505 INFO L290 TraceCheckUtils]: 14: Hoare triple {36573#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {36574#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-15 01:07:53,505 INFO L290 TraceCheckUtils]: 15: Hoare triple {36574#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {36575#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-15 01:07:53,507 INFO L290 TraceCheckUtils]: 16: Hoare triple {36575#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {36576#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-15 01:07:53,507 INFO L290 TraceCheckUtils]: 17: Hoare triple {36576#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {36633#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-15 01:07:53,508 INFO L290 TraceCheckUtils]: 18: Hoare triple {36633#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-15 01:07:53,508 INFO L290 TraceCheckUtils]: 19: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,508 INFO L290 TraceCheckUtils]: 20: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,508 INFO L290 TraceCheckUtils]: 21: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,508 INFO L290 TraceCheckUtils]: 22: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,508 INFO L290 TraceCheckUtils]: 23: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,508 INFO L290 TraceCheckUtils]: 24: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,508 INFO L290 TraceCheckUtils]: 25: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,508 INFO L290 TraceCheckUtils]: 26: Hoare triple {36562#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-15 01:07:53,509 INFO L290 TraceCheckUtils]: 27: Hoare triple {36562#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {36562#false} is VALID [2022-04-15 01:07:53,509 INFO L290 TraceCheckUtils]: 28: Hoare triple {36562#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {36562#false} is VALID [2022-04-15 01:07:53,509 INFO L290 TraceCheckUtils]: 29: Hoare triple {36562#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {36562#false} is VALID [2022-04-15 01:07:53,509 INFO L290 TraceCheckUtils]: 30: Hoare triple {36562#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-15 01:07:53,509 INFO L290 TraceCheckUtils]: 31: Hoare triple {36562#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-15 01:07:53,509 INFO L272 TraceCheckUtils]: 32: Hoare triple {36562#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {36562#false} is VALID [2022-04-15 01:07:53,509 INFO L290 TraceCheckUtils]: 33: Hoare triple {36562#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {36562#false} is VALID [2022-04-15 01:07:53,509 INFO L290 TraceCheckUtils]: 34: Hoare triple {36562#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-15 01:07:53,509 INFO L290 TraceCheckUtils]: 35: Hoare triple {36562#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-15 01:07:53,509 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2022-04-15 01:07:53,509 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:07:53,792 INFO L290 TraceCheckUtils]: 35: Hoare triple {36562#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-15 01:07:53,792 INFO L290 TraceCheckUtils]: 34: Hoare triple {36562#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-15 01:07:53,793 INFO L290 TraceCheckUtils]: 33: Hoare triple {36562#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {36562#false} is VALID [2022-04-15 01:07:53,793 INFO L272 TraceCheckUtils]: 32: Hoare triple {36562#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {36562#false} is VALID [2022-04-15 01:07:53,793 INFO L290 TraceCheckUtils]: 31: Hoare triple {36562#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-15 01:07:53,793 INFO L290 TraceCheckUtils]: 30: Hoare triple {36562#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-15 01:07:53,793 INFO L290 TraceCheckUtils]: 29: Hoare triple {36562#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {36562#false} is VALID [2022-04-15 01:07:53,793 INFO L290 TraceCheckUtils]: 28: Hoare triple {36562#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {36562#false} is VALID [2022-04-15 01:07:53,793 INFO L290 TraceCheckUtils]: 27: Hoare triple {36562#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {36562#false} is VALID [2022-04-15 01:07:53,793 INFO L290 TraceCheckUtils]: 26: Hoare triple {36562#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-15 01:07:53,793 INFO L290 TraceCheckUtils]: 25: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,793 INFO L290 TraceCheckUtils]: 24: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,794 INFO L290 TraceCheckUtils]: 23: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,794 INFO L290 TraceCheckUtils]: 22: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,794 INFO L290 TraceCheckUtils]: 21: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,794 INFO L290 TraceCheckUtils]: 20: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,794 INFO L290 TraceCheckUtils]: 19: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-15 01:07:53,794 INFO L290 TraceCheckUtils]: 18: Hoare triple {36739#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-15 01:07:53,795 INFO L290 TraceCheckUtils]: 17: Hoare triple {36743#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {36739#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 01:07:53,796 INFO L290 TraceCheckUtils]: 16: Hoare triple {36747#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {36743#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-15 01:07:53,797 INFO L290 TraceCheckUtils]: 15: Hoare triple {36751#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {36747#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:53,798 INFO L290 TraceCheckUtils]: 14: Hoare triple {36755#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {36751#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-15 01:07:53,798 INFO L290 TraceCheckUtils]: 13: Hoare triple {36755#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {36755#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 01:07:53,799 INFO L290 TraceCheckUtils]: 12: Hoare triple {36762#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36755#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-15 01:07:53,799 INFO L290 TraceCheckUtils]: 11: Hoare triple {36766#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36762#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-15 01:07:53,800 INFO L290 TraceCheckUtils]: 10: Hoare triple {36770#(< 0 (mod main_~y~0 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36766#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-15 01:07:53,801 INFO L290 TraceCheckUtils]: 9: Hoare triple {36774#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36770#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:07:53,801 INFO L290 TraceCheckUtils]: 8: Hoare triple {36778#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36774#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-15 01:07:53,802 INFO L290 TraceCheckUtils]: 7: Hoare triple {36782#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36778#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-15 01:07:53,803 INFO L290 TraceCheckUtils]: 6: Hoare triple {36786#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36782#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-15 01:07:53,803 INFO L290 TraceCheckUtils]: 5: Hoare triple {36561#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {36786#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-15 01:07:53,803 INFO L272 TraceCheckUtils]: 4: Hoare triple {36561#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-15 01:07:53,803 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36561#true} {36561#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-15 01:07:53,803 INFO L290 TraceCheckUtils]: 2: Hoare triple {36561#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-15 01:07:53,803 INFO L290 TraceCheckUtils]: 1: Hoare triple {36561#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {36561#true} is VALID [2022-04-15 01:07:53,804 INFO L272 TraceCheckUtils]: 0: Hoare triple {36561#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-15 01:07:53,804 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2022-04-15 01:07:53,804 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2113829513] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:07:53,804 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:07:53,804 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 14] total 28 [2022-04-15 01:07:53,804 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1533740609] [2022-04-15 01:07:53,804 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:07:53,805 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 1.4642857142857142) internal successors, (41), 27 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-15 01:07:53,805 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:07:53,805 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 28 states, 28 states have (on average 1.4642857142857142) internal successors, (41), 27 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:07:53,836 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:07:53,837 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2022-04-15 01:07:53,837 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:07:53,837 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-04-15 01:07:53,837 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=137, Invalid=619, Unknown=0, NotChecked=0, Total=756 [2022-04-15 01:07:53,837 INFO L87 Difference]: Start difference. First operand 429 states and 619 transitions. Second operand has 28 states, 28 states have (on average 1.4642857142857142) internal successors, (41), 27 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:08:30,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:08:30,679 INFO L93 Difference]: Finished difference Result 986 states and 1379 transitions. [2022-04-15 01:08:30,679 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 165 states. [2022-04-15 01:08:30,679 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 1.4642857142857142) internal successors, (41), 27 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-15 01:08:30,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 01:08:30,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.4642857142857142) internal successors, (41), 27 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:08:30,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 477 transitions. [2022-04-15 01:08:30,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.4642857142857142) internal successors, (41), 27 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:08:30,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 477 transitions. [2022-04-15 01:08:30,687 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 165 states and 477 transitions. [2022-04-15 01:08:32,172 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 477 edges. 477 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:08:32,203 INFO L225 Difference]: With dead ends: 986 [2022-04-15 01:08:32,203 INFO L226 Difference]: Without dead ends: 921 [2022-04-15 01:08:32,205 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 250 GetRequests, 61 SyntacticMatches, 1 SemanticMatches, 188 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14071 ImplicationChecksByTransitivity, 24.1s TimeCoverageRelationStatistics Valid=6269, Invalid=29641, Unknown=0, NotChecked=0, Total=35910 [2022-04-15 01:08:32,205 INFO L913 BasicCegarLoop]: 60 mSDtfsCounter, 542 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 1710 mSolverCounterSat, 784 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 542 SdHoareTripleChecker+Valid, 127 SdHoareTripleChecker+Invalid, 2494 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 784 IncrementalHoareTripleChecker+Valid, 1710 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.4s IncrementalHoareTripleChecker+Time [2022-04-15 01:08:32,205 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [542 Valid, 127 Invalid, 2494 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [784 Valid, 1710 Invalid, 0 Unknown, 0 Unchecked, 5.4s Time] [2022-04-15 01:08:32,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 921 states. [2022-04-15 01:08:33,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 921 to 482. [2022-04-15 01:08:33,426 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 01:08:33,426 INFO L82 GeneralOperation]: Start isEquivalent. First operand 921 states. Second operand has 482 states, 477 states have (on average 1.4360587002096437) internal successors, (685), 477 states have internal predecessors, (685), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:08:33,426 INFO L74 IsIncluded]: Start isIncluded. First operand 921 states. Second operand has 482 states, 477 states have (on average 1.4360587002096437) internal successors, (685), 477 states have internal predecessors, (685), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:08:33,427 INFO L87 Difference]: Start difference. First operand 921 states. Second operand has 482 states, 477 states have (on average 1.4360587002096437) internal successors, (685), 477 states have internal predecessors, (685), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:08:33,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:08:33,452 INFO L93 Difference]: Finished difference Result 921 states and 1266 transitions. [2022-04-15 01:08:33,452 INFO L276 IsEmpty]: Start isEmpty. Operand 921 states and 1266 transitions. [2022-04-15 01:08:33,452 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:08:33,453 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:08:33,453 INFO L74 IsIncluded]: Start isIncluded. First operand has 482 states, 477 states have (on average 1.4360587002096437) internal successors, (685), 477 states have internal predecessors, (685), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 921 states. [2022-04-15 01:08:33,453 INFO L87 Difference]: Start difference. First operand has 482 states, 477 states have (on average 1.4360587002096437) internal successors, (685), 477 states have internal predecessors, (685), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 921 states. [2022-04-15 01:08:33,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 01:08:33,477 INFO L93 Difference]: Finished difference Result 921 states and 1266 transitions. [2022-04-15 01:08:33,477 INFO L276 IsEmpty]: Start isEmpty. Operand 921 states and 1266 transitions. [2022-04-15 01:08:33,478 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 01:08:33,478 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 01:08:33,478 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 01:08:33,478 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 01:08:33,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 482 states, 477 states have (on average 1.4360587002096437) internal successors, (685), 477 states have internal predecessors, (685), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:08:33,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 482 states to 482 states and 689 transitions. [2022-04-15 01:08:33,488 INFO L78 Accepts]: Start accepts. Automaton has 482 states and 689 transitions. Word has length 36 [2022-04-15 01:08:33,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 01:08:33,488 INFO L478 AbstractCegarLoop]: Abstraction has 482 states and 689 transitions. [2022-04-15 01:08:33,488 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 1.4642857142857142) internal successors, (41), 27 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:08:33,488 INFO L276 IsEmpty]: Start isEmpty. Operand 482 states and 689 transitions. [2022-04-15 01:08:33,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2022-04-15 01:08:33,489 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 01:08:33,489 INFO L499 BasicCegarLoop]: trace histogram [15, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 01:08:33,505 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2022-04-15 01:08:33,689 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2022-04-15 01:08:33,689 INFO L403 AbstractCegarLoop]: === Iteration 30 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 01:08:33,689 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 01:08:33,690 INFO L85 PathProgramCache]: Analyzing trace with hash 1913433546, now seen corresponding path program 8 times [2022-04-15 01:08:33,690 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 01:08:33,690 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [40163412] [2022-04-15 01:08:33,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 01:08:33,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 01:08:33,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:08:33,963 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 01:08:33,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:08:33,966 INFO L290 TraceCheckUtils]: 0: Hoare triple {40839#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {40815#true} is VALID [2022-04-15 01:08:33,966 INFO L290 TraceCheckUtils]: 1: Hoare triple {40815#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-15 01:08:33,966 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {40815#true} {40815#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-15 01:08:33,966 INFO L272 TraceCheckUtils]: 0: Hoare triple {40815#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40839#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 01:08:33,967 INFO L290 TraceCheckUtils]: 1: Hoare triple {40839#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {40815#true} is VALID [2022-04-15 01:08:33,967 INFO L290 TraceCheckUtils]: 2: Hoare triple {40815#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-15 01:08:33,967 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {40815#true} {40815#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-15 01:08:33,967 INFO L272 TraceCheckUtils]: 4: Hoare triple {40815#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-15 01:08:33,967 INFO L290 TraceCheckUtils]: 5: Hoare triple {40815#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {40820#(= main_~y~0 0)} is VALID [2022-04-15 01:08:33,967 INFO L290 TraceCheckUtils]: 6: Hoare triple {40820#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40821#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:08:33,968 INFO L290 TraceCheckUtils]: 7: Hoare triple {40821#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40822#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:08:33,968 INFO L290 TraceCheckUtils]: 8: Hoare triple {40822#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40823#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:08:33,969 INFO L290 TraceCheckUtils]: 9: Hoare triple {40823#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40824#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:08:33,969 INFO L290 TraceCheckUtils]: 10: Hoare triple {40824#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40825#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:08:33,970 INFO L290 TraceCheckUtils]: 11: Hoare triple {40825#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40826#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:08:33,970 INFO L290 TraceCheckUtils]: 12: Hoare triple {40826#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40827#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:08:33,971 INFO L290 TraceCheckUtils]: 13: Hoare triple {40827#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40828#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:08:33,971 INFO L290 TraceCheckUtils]: 14: Hoare triple {40828#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40829#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:08:33,972 INFO L290 TraceCheckUtils]: 15: Hoare triple {40829#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40830#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 01:08:33,972 INFO L290 TraceCheckUtils]: 16: Hoare triple {40830#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40831#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 01:08:33,973 INFO L290 TraceCheckUtils]: 17: Hoare triple {40831#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40832#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 01:08:33,973 INFO L290 TraceCheckUtils]: 18: Hoare triple {40832#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40833#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-15 01:08:33,974 INFO L290 TraceCheckUtils]: 19: Hoare triple {40833#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40834#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-15 01:08:33,974 INFO L290 TraceCheckUtils]: 20: Hoare triple {40834#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40835#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-15 01:08:33,975 INFO L290 TraceCheckUtils]: 21: Hoare triple {40835#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {40835#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-15 01:08:33,975 INFO L290 TraceCheckUtils]: 22: Hoare triple {40835#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-15 01:08:33,976 INFO L290 TraceCheckUtils]: 23: Hoare triple {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40837#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-15 01:08:33,976 INFO L290 TraceCheckUtils]: 24: Hoare triple {40837#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40838#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-15 01:08:33,976 INFO L290 TraceCheckUtils]: 25: Hoare triple {40838#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-15 01:08:33,977 INFO L290 TraceCheckUtils]: 26: Hoare triple {40816#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40816#false} is VALID [2022-04-15 01:08:33,977 INFO L290 TraceCheckUtils]: 27: Hoare triple {40816#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40816#false} is VALID [2022-04-15 01:08:33,977 INFO L290 TraceCheckUtils]: 28: Hoare triple {40816#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-15 01:08:33,977 INFO L290 TraceCheckUtils]: 29: Hoare triple {40816#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {40816#false} is VALID [2022-04-15 01:08:33,977 INFO L290 TraceCheckUtils]: 30: Hoare triple {40816#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {40816#false} is VALID [2022-04-15 01:08:33,977 INFO L290 TraceCheckUtils]: 31: Hoare triple {40816#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-15 01:08:33,977 INFO L290 TraceCheckUtils]: 32: Hoare triple {40816#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-15 01:08:33,977 INFO L272 TraceCheckUtils]: 33: Hoare triple {40816#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {40816#false} is VALID [2022-04-15 01:08:33,977 INFO L290 TraceCheckUtils]: 34: Hoare triple {40816#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {40816#false} is VALID [2022-04-15 01:08:33,977 INFO L290 TraceCheckUtils]: 35: Hoare triple {40816#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-15 01:08:33,977 INFO L290 TraceCheckUtils]: 36: Hoare triple {40816#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-15 01:08:33,978 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-15 01:08:33,978 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 01:08:33,978 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [40163412] [2022-04-15 01:08:33,978 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [40163412] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 01:08:33,978 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2071828251] [2022-04-15 01:08:33,978 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 01:08:33,978 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 01:08:33,978 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 01:08:33,979 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 01:08:33,980 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-04-15 01:08:34,025 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 01:08:34,025 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 01:08:34,026 INFO L263 TraceCheckSpWp]: Trace formula consists of 166 conjuncts, 43 conjunts are in the unsatisfiable core [2022-04-15 01:08:34,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 01:08:34,034 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 01:08:34,331 INFO L272 TraceCheckUtils]: 0: Hoare triple {40815#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-15 01:08:34,331 INFO L290 TraceCheckUtils]: 1: Hoare triple {40815#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {40815#true} is VALID [2022-04-15 01:08:34,331 INFO L290 TraceCheckUtils]: 2: Hoare triple {40815#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-15 01:08:34,331 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {40815#true} {40815#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-15 01:08:34,332 INFO L272 TraceCheckUtils]: 4: Hoare triple {40815#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-15 01:08:34,332 INFO L290 TraceCheckUtils]: 5: Hoare triple {40815#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {40820#(= main_~y~0 0)} is VALID [2022-04-15 01:08:34,332 INFO L290 TraceCheckUtils]: 6: Hoare triple {40820#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40821#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-15 01:08:34,333 INFO L290 TraceCheckUtils]: 7: Hoare triple {40821#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40822#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-15 01:08:34,333 INFO L290 TraceCheckUtils]: 8: Hoare triple {40822#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40823#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-15 01:08:34,334 INFO L290 TraceCheckUtils]: 9: Hoare triple {40823#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40824#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-15 01:08:34,334 INFO L290 TraceCheckUtils]: 10: Hoare triple {40824#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40825#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-15 01:08:34,335 INFO L290 TraceCheckUtils]: 11: Hoare triple {40825#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40826#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-15 01:08:34,335 INFO L290 TraceCheckUtils]: 12: Hoare triple {40826#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40827#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-15 01:08:34,336 INFO L290 TraceCheckUtils]: 13: Hoare triple {40827#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40828#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-15 01:08:34,336 INFO L290 TraceCheckUtils]: 14: Hoare triple {40828#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40829#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-15 01:08:34,337 INFO L290 TraceCheckUtils]: 15: Hoare triple {40829#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40830#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-15 01:08:34,337 INFO L290 TraceCheckUtils]: 16: Hoare triple {40830#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40831#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-15 01:08:34,338 INFO L290 TraceCheckUtils]: 17: Hoare triple {40831#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40832#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-15 01:08:34,338 INFO L290 TraceCheckUtils]: 18: Hoare triple {40832#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40833#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-15 01:08:34,339 INFO L290 TraceCheckUtils]: 19: Hoare triple {40833#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40834#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-15 01:08:34,339 INFO L290 TraceCheckUtils]: 20: Hoare triple {40834#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40835#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-15 01:08:34,339 INFO L290 TraceCheckUtils]: 21: Hoare triple {40835#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {40835#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-15 01:08:34,340 INFO L290 TraceCheckUtils]: 22: Hoare triple {40835#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-15 01:08:34,340 INFO L290 TraceCheckUtils]: 23: Hoare triple {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40837#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-15 01:08:34,341 INFO L290 TraceCheckUtils]: 24: Hoare triple {40837#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40915#(and (<= 13 main_~z~0) (<= main_~z~0 13))} is VALID [2022-04-15 01:08:34,341 INFO L290 TraceCheckUtils]: 25: Hoare triple {40915#(and (<= 13 main_~z~0) (<= main_~z~0 13))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {40915#(and (<= 13 main_~z~0) (<= main_~z~0 13))} is VALID [2022-04-15 01:08:34,342 INFO L290 TraceCheckUtils]: 26: Hoare triple {40915#(and (<= 13 main_~z~0) (<= main_~z~0 13))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40837#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-15 01:08:34,342 INFO L290 TraceCheckUtils]: 27: Hoare triple {40837#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-15 01:08:34,343 INFO L290 TraceCheckUtils]: 28: Hoare triple {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-15 01:08:34,343 INFO L290 TraceCheckUtils]: 29: Hoare triple {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-15 01:08:34,343 INFO L290 TraceCheckUtils]: 30: Hoare triple {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-15 01:08:34,344 INFO L290 TraceCheckUtils]: 31: Hoare triple {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-15 01:08:34,344 INFO L290 TraceCheckUtils]: 32: Hoare triple {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-15 01:08:34,344 INFO L272 TraceCheckUtils]: 33: Hoare triple {40816#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {40816#false} is VALID [2022-04-15 01:08:34,344 INFO L290 TraceCheckUtils]: 34: Hoare triple {40816#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {40816#false} is VALID [2022-04-15 01:08:34,345 INFO L290 TraceCheckUtils]: 35: Hoare triple {40816#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-15 01:08:34,345 INFO L290 TraceCheckUtils]: 36: Hoare triple {40816#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-15 01:08:34,345 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-15 01:08:34,345 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 01:08:34,907 INFO L290 TraceCheckUtils]: 36: Hoare triple {40816#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-15 01:08:34,907 INFO L290 TraceCheckUtils]: 35: Hoare triple {40816#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-15 01:08:34,907 INFO L290 TraceCheckUtils]: 34: Hoare triple {40816#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {40816#false} is VALID [2022-04-15 01:08:34,907 INFO L272 TraceCheckUtils]: 33: Hoare triple {40816#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {40816#false} is VALID [2022-04-15 01:08:34,908 INFO L290 TraceCheckUtils]: 32: Hoare triple {40964#(< 0 (mod main_~z~0 4294967296))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-15 01:08:34,908 INFO L290 TraceCheckUtils]: 31: Hoare triple {40964#(< 0 (mod main_~z~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {40964#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 01:08:34,908 INFO L290 TraceCheckUtils]: 30: Hoare triple {40964#(< 0 (mod main_~z~0 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {40964#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 01:08:34,909 INFO L290 TraceCheckUtils]: 29: Hoare triple {40964#(< 0 (mod main_~z~0 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {40964#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 01:08:34,909 INFO L290 TraceCheckUtils]: 28: Hoare triple {40964#(< 0 (mod main_~z~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {40964#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 01:08:34,910 INFO L290 TraceCheckUtils]: 27: Hoare triple {40980#(< 0 (mod (+ main_~z~0 1) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40964#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 01:08:34,911 INFO L290 TraceCheckUtils]: 26: Hoare triple {40984#(< 0 (mod (+ main_~z~0 2) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40980#(< 0 (mod (+ main_~z~0 1) 4294967296))} is VALID [2022-04-15 01:08:34,911 INFO L290 TraceCheckUtils]: 25: Hoare triple {40984#(< 0 (mod (+ main_~z~0 2) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {40984#(< 0 (mod (+ main_~z~0 2) 4294967296))} is VALID [2022-04-15 01:08:34,912 INFO L290 TraceCheckUtils]: 24: Hoare triple {40980#(< 0 (mod (+ main_~z~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40984#(< 0 (mod (+ main_~z~0 2) 4294967296))} is VALID [2022-04-15 01:08:34,912 INFO L290 TraceCheckUtils]: 23: Hoare triple {40964#(< 0 (mod main_~z~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40980#(< 0 (mod (+ main_~z~0 1) 4294967296))} is VALID [2022-04-15 01:08:34,913 INFO L290 TraceCheckUtils]: 22: Hoare triple {40997#(< 0 (mod main_~y~0 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {40964#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-15 01:08:34,913 INFO L290 TraceCheckUtils]: 21: Hoare triple {40997#(< 0 (mod main_~y~0 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {40997#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:08:34,914 INFO L290 TraceCheckUtils]: 20: Hoare triple {41004#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40997#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-15 01:08:34,914 INFO L290 TraceCheckUtils]: 19: Hoare triple {41008#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41004#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-15 01:08:34,915 INFO L290 TraceCheckUtils]: 18: Hoare triple {41012#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41008#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-15 01:08:34,916 INFO L290 TraceCheckUtils]: 17: Hoare triple {41016#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41012#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-15 01:08:34,916 INFO L290 TraceCheckUtils]: 16: Hoare triple {41020#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41016#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-15 01:08:34,917 INFO L290 TraceCheckUtils]: 15: Hoare triple {41024#(< 0 (mod (+ main_~y~0 6) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41020#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-15 01:08:34,918 INFO L290 TraceCheckUtils]: 14: Hoare triple {41028#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41024#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-15 01:08:34,919 INFO L290 TraceCheckUtils]: 13: Hoare triple {41032#(< 0 (mod (+ main_~y~0 8) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41028#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-15 01:08:34,919 INFO L290 TraceCheckUtils]: 12: Hoare triple {41036#(< 0 (mod (+ main_~y~0 9) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41032#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-15 01:08:34,920 INFO L290 TraceCheckUtils]: 11: Hoare triple {41040#(< 0 (mod (+ main_~y~0 10) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41036#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-15 01:08:34,920 INFO L290 TraceCheckUtils]: 10: Hoare triple {41044#(< 0 (mod (+ main_~y~0 11) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41040#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-15 01:08:34,921 INFO L290 TraceCheckUtils]: 9: Hoare triple {41048#(< 0 (mod (+ main_~y~0 12) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41044#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-15 01:08:34,922 INFO L290 TraceCheckUtils]: 8: Hoare triple {41052#(< 0 (mod (+ main_~y~0 13) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41048#(< 0 (mod (+ main_~y~0 12) 4294967296))} is VALID [2022-04-15 01:08:34,923 INFO L290 TraceCheckUtils]: 7: Hoare triple {41056#(< 0 (mod (+ main_~y~0 14) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41052#(< 0 (mod (+ main_~y~0 13) 4294967296))} is VALID [2022-04-15 01:08:34,923 INFO L290 TraceCheckUtils]: 6: Hoare triple {41060#(< 0 (mod (+ main_~y~0 15) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41056#(< 0 (mod (+ main_~y~0 14) 4294967296))} is VALID [2022-04-15 01:08:34,924 INFO L290 TraceCheckUtils]: 5: Hoare triple {40815#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {41060#(< 0 (mod (+ main_~y~0 15) 4294967296))} is VALID [2022-04-15 01:08:34,924 INFO L272 TraceCheckUtils]: 4: Hoare triple {40815#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-15 01:08:34,924 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {40815#true} {40815#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-15 01:08:34,924 INFO L290 TraceCheckUtils]: 2: Hoare triple {40815#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-15 01:08:34,924 INFO L290 TraceCheckUtils]: 1: Hoare triple {40815#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {40815#true} is VALID [2022-04-15 01:08:34,924 INFO L272 TraceCheckUtils]: 0: Hoare triple {40815#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-15 01:08:34,924 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-15 01:08:34,924 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2071828251] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 01:08:34,924 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 01:08:34,925 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 21] total 42 [2022-04-15 01:08:34,925 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [214644763] [2022-04-15 01:08:34,925 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 01:08:34,928 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 41 states have internal predecessors, (67), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 37 [2022-04-15 01:08:34,928 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 01:08:34,928 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 41 states have internal predecessors, (67), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:08:34,976 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 01:08:34,976 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-04-15 01:08:34,976 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 01:08:34,977 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-04-15 01:08:34,977 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=349, Invalid=1373, Unknown=0, NotChecked=0, Total=1722 [2022-04-15 01:08:34,977 INFO L87 Difference]: Start difference. First operand 482 states and 689 transitions. Second operand has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 41 states have internal predecessors, (67), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 01:08:52,345 WARN L232 SmtUtils]: Spent 8.98s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:09:06,800 WARN L232 SmtUtils]: Spent 9.04s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:09:32,685 WARN L232 SmtUtils]: Spent 16.21s on a formula simplification that was a NOOP. DAG size: 81 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:09:45,434 WARN L232 SmtUtils]: Spent 6.49s on a formula simplification that was a NOOP. DAG size: 64 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:09:48,036 WARN L833 $PredicateComparison]: unable to prove that (and (< 0 (mod (+ 2 c_main_~y~0) 4294967296)) (= |c_#NULL.base| |c_old(#NULL.base)|) (< 0 (mod (+ 11 c_main_~y~0) 4294967296)) (< 0 (mod c_main_~y~0 4294967296)) (< 0 (mod (+ 13 c_main_~y~0) 4294967296)) (< 0 (mod (+ 3 c_main_~y~0) 4294967296)) (< 0 (mod (+ c_main_~z~0 1) 4294967296)) (< 0 (mod (+ c_main_~y~0 1) 4294967296)) (< 0 (mod (+ 15 c_main_~y~0) 4294967296)) (< 0 (mod (+ 8 c_main_~y~0) 4294967296)) (< 0 (mod (+ 6 c_main_~y~0) 4294967296)) (< 0 (mod (+ 5 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4 c_main_~y~0) 4294967296)) (< 0 (mod (+ 9 c_main_~y~0) 4294967296)) (< 0 (mod (+ 14 c_main_~y~0) 4294967296)) (< 0 (mod (+ 2 c_main_~z~0) 4294967296)) (< 0 (mod (+ 10 c_main_~y~0) 4294967296)) (= |c_#NULL.offset| |c_old(#NULL.offset)|) (< 0 (mod (+ 7 c_main_~y~0) 4294967296)) (< 0 (mod (+ 12 c_main_~y~0) 4294967296))) is different from false [2022-04-15 01:10:11,047 WARN L232 SmtUtils]: Spent 14.59s on a formula simplification that was a NOOP. DAG size: 77 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:10:30,465 WARN L232 SmtUtils]: Spent 7.68s on a formula simplification that was a NOOP. DAG size: 75 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:10:45,649 WARN L232 SmtUtils]: Spent 9.72s on a formula simplification that was a NOOP. DAG size: 73 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:11:01,238 WARN L232 SmtUtils]: Spent 5.91s on a formula simplification that was a NOOP. DAG size: 71 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:11:10,571 WARN L232 SmtUtils]: Spent 5.49s on a formula simplification that was a NOOP. DAG size: 69 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:11:46,687 WARN L232 SmtUtils]: Spent 7.84s on a formula simplification that was a NOOP. DAG size: 76 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:12:02,805 WARN L833 $PredicateComparison]: unable to prove that (and (< 0 (mod (+ 2 c_main_~y~0) 4294967296)) (= |c_#NULL.base| |c_old(#NULL.base)|) (< 0 (mod (+ 11 c_main_~y~0) 4294967296)) (< 0 (mod (+ 13 c_main_~y~0) 4294967296)) (< 0 (mod (+ 3 c_main_~y~0) 4294967296)) (< 0 (mod (+ c_main_~y~0 1) 4294967296)) (< 0 (mod (+ 15 c_main_~y~0) 4294967296)) (< 0 (mod (+ 8 c_main_~y~0) 4294967296)) (< 0 (mod c_main_~z~0 4294967296)) (< 0 (mod (+ 6 c_main_~y~0) 4294967296)) (< 0 (mod (+ 5 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4 c_main_~y~0) 4294967296)) (< 0 (mod (+ 9 c_main_~y~0) 4294967296)) (< 0 (mod (+ 14 c_main_~y~0) 4294967296)) (< 0 (mod (+ 10 c_main_~y~0) 4294967296)) (= |c_#NULL.offset| |c_old(#NULL.offset)|) (< 0 (mod (+ 7 c_main_~y~0) 4294967296)) (< 0 (mod (+ 12 c_main_~y~0) 4294967296))) is different from false [2022-04-15 01:12:13,255 WARN L232 SmtUtils]: Spent 6.95s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:12:35,775 WARN L232 SmtUtils]: Spent 5.68s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:12:46,138 WARN L232 SmtUtils]: Spent 5.16s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:13:32,185 WARN L232 SmtUtils]: Spent 6.45s on a formula simplification that was a NOOP. DAG size: 66 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:13:50,615 WARN L833 $PredicateComparison]: unable to prove that (and (< 0 (mod (+ 2 c_main_~y~0) 4294967296)) (= |c_#NULL.base| |c_old(#NULL.base)|) (< 0 (mod (+ 11 c_main_~y~0) 4294967296)) (< 0 (mod (+ 13 c_main_~y~0) 4294967296)) (< 0 (mod (+ 3 c_main_~y~0) 4294967296)) (< 0 (mod (+ c_main_~y~0 1) 4294967296)) (< 0 (mod (+ 8 c_main_~y~0) 4294967296)) (< 0 (mod (+ 6 c_main_~y~0) 4294967296)) (< 0 (mod (+ 5 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4 c_main_~y~0) 4294967296)) (< 0 (mod (+ 9 c_main_~y~0) 4294967296)) (< 0 (mod (+ 10 c_main_~y~0) 4294967296)) (= |c_#NULL.offset| |c_old(#NULL.offset)|) (< 0 (mod (+ 7 c_main_~y~0) 4294967296)) (< 0 (mod (+ 12 c_main_~y~0) 4294967296))) is different from false [2022-04-15 01:14:47,453 WARN L232 SmtUtils]: Spent 10.05s on a formula simplification that was a NOOP. DAG size: 77 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:15:02,684 WARN L232 SmtUtils]: Spent 6.84s on a formula simplification that was a NOOP. DAG size: 74 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:15:04,231 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.13s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-15 01:15:19,682 WARN L232 SmtUtils]: Spent 5.47s on a formula simplification that was a NOOP. DAG size: 74 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:15:42,484 WARN L232 SmtUtils]: Spent 5.96s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:15:44,383 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.76s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-15 01:15:46,386 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-15 01:15:48,775 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-15 01:15:50,853 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.75s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-15 01:15:57,488 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.44s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-15 01:16:16,285 WARN L232 SmtUtils]: Spent 11.18s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:16:34,652 WARN L232 SmtUtils]: Spent 7.08s on a formula simplification that was a NOOP. DAG size: 76 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:16:47,668 WARN L232 SmtUtils]: Spent 6.36s on a formula simplification that was a NOOP. DAG size: 66 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 01:16:49,911 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.39s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-15 01:16:52,099 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-15 01:16:59,147 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-15 01:17:10,463 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers []